JP2001189632A - Equalized amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To normally operate DC feedback control even if a preamplifier operates in a saturated state in an equalized amplifier, for which the peak detection of the amplitude of an output signal is utilized. SOLUTION: A first peak detecting circuit 26 performs the peak detection of the amplitudes of output signals having positive and negative phases from a preamplifier 21 and detects whether or not gain saturation occurs in the preamplifier 21 on the basis of the detected result. When the gain saturation occurs in the preamplifier 21 as a result of the detection, the gain of a differential amplifier 31 becomes low, DC feedback control is prevented from being unstable and the threshold voltage of an abnormal value is prevented from being outputted to the preamplifier 21. When the gain saturation does not occur in the preamplifier 21, on the other hand, the gain of the differential amplifier 31 becomes high and DC offset is canceled.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an equalizing amplifier for compensating for a loss in an optical fiber transmission line in an optical transmission system.

[0002]

2. Description of the Related Art In an optical transmission system, signal light attenuates as it is transmitted through an optical fiber transmission line, and thus the amplitude of a signal received at the end of the transmission line varies depending on the distance of the transmission line. In order to compensate for the loss in the transmission line, an equalizing amplifier is usually provided on the light receiving side. The equalizing amplifier automatically controls the gain of the amplifier based on the amplified signal amplitude and keeps the output amplitude constant.

[0003] In order to reduce the size of the optical receiver, an equalizing amplifier for optical communication is integrated. Each amplifier in the equalizing amplifier is constituted by a DC direct-coupled amplifier. DC-coupled amplifiers produce a DC offset for the high gain required of the equalizing amplifier. Therefore, a DC feedback loop for canceling the DC offset is required.

FIG. 3 is a block diagram showing a configuration of a conventional equalizing amplifier. This equalization amplifier includes a pre-amplifier 11,
AGC (Automatic Gain Control) amplifier 12, post-stage amplifier 13, peak detection circuit 14, and differential amplifier 15
It is composed of In FIG. 3, IN1 is a signal input terminal, IN2 is a threshold input terminal, IN3 is a reference voltage input terminal, OUT1 is a positive-phase data output terminal, and OUT2 is a negative-phase data output terminal. This equalizing amplifier is configured to perform DC feedback control by peak-detecting the amplitude of the positive-phase and negative-phase output data signals output from the subsequent-stage amplifier 13 by a peak detection circuit 14.

The operation of the equalizing amplifier shown in FIG. 3 will be described. The signal light propagating through the optical fiber transmission line is converted into an electric signal by a photodetector (not shown) of the optical receiver. The electric signal is amplified by a preamplifier (not shown) and converted into a digital data signal sequence. The digital data signal sequence is input to the pre-stage amplifier 11 via the signal input terminal IN1. Also, the front-stage amplifier 11 includes:
A threshold voltage is input via the threshold input terminal IN2.

The output signal of the pre-stage amplifier 11 is the AGC of the next stage.
The signal is further amplified by the amplifier 12. AGC amplifier 12
Is further amplified by the subsequent-stage amplifier 13. The positive-phase data output terminal O
A positive-phase output data signal and a negative-phase output data signal are output to the outside via the UT1 and the negative-phase data output terminal OUT2, respectively.

The positive-phase and negative-phase output data signals of the latter-stage amplifier 13 are also input to a peak detection circuit 14.
The peak detection circuit 14 detects the peak value of the amplitude by the peak detection of the input signal. The output signal of the peak detection circuit 14 is input to the differential amplifier 15. The input signal is supplied to a reference voltage input terminal IN3
Is compared with the reference voltage input from Then, the difference between the two voltages is amplified by the differential amplifier 15. The amplified difference signal is input to a threshold input terminal IN2 as a threshold voltage.

Thus, a DC feedback loop is formed, and the result of comparison between the output signal of the peak detection circuit 14 and the reference voltage is fed back to the threshold input terminal IN2, so that the positive-phase data output terminal OUT1
And the DC offset at the inverted phase data output terminal OUT2 is canceled. Although the equalizing amplifier has an AGC function for keeping the output amplitude constant irrespective of the input amplitude based on the same operation principle, the description of the AGC function is omitted.

Next, the DC feedback mechanism will be described in detail with reference to FIGS. FIG.
FIG. 9 is a waveform diagram of positive-phase and reverse-phase output data signals of the post-stage amplifier 13 when the DC offset is not controlled. In FIG. 4, Vs is the difference between the space-side voltage value of the positive-phase output data signal and the space-side voltage value of the negative-phase output data signal. Vm is the difference between the mark-side voltage value of the positive-phase output data signal and the mark-side voltage value of the negative-phase output data signal. As shown in FIG. 4, when a DC offset occurs, the mark-side voltage value of the positive-phase output data signal does not match the space-side voltage value of the negative-phase output data signal.

FIG. 5 is a waveform diagram of positive-phase and negative-phase output data signals of the post-stage amplifier 13 when the DC offset is controlled. In FIG. 5, VR is a set output amplitude of the equalizing amplifier. When no DC offset has occurred, as shown in FIG. 5, the voltage value on the mark side of the positive-phase output data signal substantially matches the voltage value on the space side of the negative-phase output data signal. Therefore, in order to cancel the DC offset, it is necessary to control the threshold voltage input to the threshold input terminal IN2 so that the following equation (1) holds. Vs = Vm = VR (1)

When the peak detection circuit 14 is used, DC feedback control is realized as follows. FIG. 6 is a waveform diagram of the output data signals of the positive and negative phases of the post-stage amplifier 13 when the feedback control is not performed, and the waveforms of the respective signals when the output data signals are level-shifted by the set output amplitude VR. FIG. 7 is a waveform diagram of the output data signals of the positive and negative phases of the post-stage amplifier 13 when the feedback control is performed, and the waveforms of the respective signals when the output data signals are level-shifted by the set output amplitude VR. FIG. 8 is a waveform diagram of a signal when the positive-phase output data signal of the rear-stage amplifier 13 and the negative-phase output data signal of the rear-stage amplifier 13 when the feedback control is not performed are level-shifted by the set output amplitude VR. FIG. 9 shows the positive-phase output data signal of the rear-stage amplifier 13 and the rear-stage amplifier 1 when the feedback control is performed.
FIG. 7 is a waveform diagram of a signal in a case where the level of the negative-phase output data signal is shifted by a set output amplitude VR.

In order to make the above equation (1) hold, as is apparent from FIG. 9, the space-side peak detection value VNs of the positive-phase output data signal of the rear-stage amplifier 13 and the negative-phase detection value of the rear-stage amplifier 13 The difference between the output data signal and the peak detection value VSIs on the space side of the level-shifted signal is eliminated, that is, the threshold voltage is controlled so that the following equation (2) is satisfied and the threshold voltage is input to the threshold input terminal IN2. VNs−VSIs = 0 (2)

[0013]

However, in the above-described conventional equalizing amplifier, the DC feedback operation works normally while the pre-amplifier 11 is operating linearly, but the threshold voltage becomes high when the pre-amplifier 11 is saturated. The amount of change in the peak detection value with respect to the change in voltage is almost eliminated. Therefore, the DC feedback operation becomes unstable, and the threshold voltage is set to an abnormal voltage value.
There is a problem that DC feedback control does not work properly.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem. Even when a preceding amplifier is operating in a saturated state, a stable threshold voltage can be obtained based on a peak detection value of the amplitude of an output signal. It is an object of the present invention to obtain an equalizing amplifier in which DC feedback control operates normally.

[0015]

In order to achieve the above object, an equalizing amplifier according to the present invention comprises a pre-amplifier to which an input signal to be amplified and a threshold voltage are input, and an output from the pre-amplifier. An AGC amplifier to which a positive-phase data signal and a negative-phase data signal are input;
A second-stage amplifier to which the positive-phase data signal and the negative-phase data signal output from the C amplifier are input, and to output the amplified positive-phase data signal and negative-phase data signal to the outside; A first peak detection circuit for detecting the amplitudes of the positive-phase data signal and the negative-phase data signal, and a second peak detection circuit for detecting the amplitudes of the positive-phase data signal and the negative-phase data signal output from the subsequent-stage amplifier. And a DC feedback control circuit that controls the threshold voltage based on a signal output from the first peak detection circuit, a signal output from the second peak detection circuit, and a reference voltage. And characterized in that:

According to the present invention, the first peak detection circuit detects the amplitudes of the positive-phase data signal and the negative-phase data signal output from the preceding amplifier, and the second peak detection circuit outputs The amplitudes of the positive-phase data signal and the negative-phase data signal output from are detected. Then, the DC feedback control circuit controls the threshold voltage supplied to the preceding-stage amplifier based on the output signal of the first peak detection circuit, the output signal of the second peak detection circuit, and the reference voltage.

In the present invention, the DC feedback control circuit receives the signal output from the second peak detection circuit, the reference voltage, and outputs a signal output from the first peak detection circuit. It may be configured to include a differential amplifier whose gain can be controlled.
In this case, the gain of the differential amplifier is controlled by the output amplitude of the previous-stage amplifier detected by the first peak detection circuit.

The differential amplifier increases the gain when the preamplifier does not have gain saturation as a result of the amplitude detection of the first peak detection circuit, while the preamplifier performs gain saturation. When it occurs, the gain may be reduced. In this case, the gain of the differential amplifier is high when the pre-amplifier is not gain saturated, while the gain of the differential amplifier is low when the pre-amplifier is saturated.

Alternatively, in the present invention, the DC feedback control circuit includes a differential amplifier to which the signal output from the second peak detection circuit and the reference voltage are input, and an output from the first peak detection circuit. A switch that switches the threshold voltage to be supplied to the pre-amplifier to one of a signal output from the differential amplifier and a predetermined threshold voltage based on the received signal. It may be. In this case, the changeover switch is switched based on the output amplitude of the pre-amplifier detected by the first peak detection circuit, whereby either the output signal of the differential amplifier or the predetermined threshold voltage is applied to the pre-amplifier. Supplied.

The changeover switch supplies the output signal of the differential amplifier to the preamplifier when the preamplifier does not have gain saturation as a result of the amplitude detection of the first peak detection circuit, On the other hand, when the preamplifier is gain-saturated, a switching operation may be performed to supply the predetermined threshold voltage to the preamplifier. In this case, the output signal of the differential amplifier is supplied when the pre-amplifier is not gain-saturated, while a predetermined threshold voltage is supplied when the pre-amplifier is gain-saturated.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an equalizing amplifier according to the present invention will be described below in detail with reference to the drawings.

Embodiment 1 FIG. 1 is a block diagram illustrating a configuration of the equalization amplifier according to the first embodiment of the present invention. This equalization amplifier includes a front-stage amplifier 21, an AGC amplifier 22, a rear-stage amplifier 23, a first peak detection circuit 26, a second peak detection circuit 24, and a DC feedback control circuit 3. The DC feedback control circuit 3 includes a differential amplifier 31 that is a variable gain amplifier.

The two input terminals of the pre-amplifier 21 are respectively connected to the signal input terminal IN1 and the threshold value input terminal IN2 of the equalizing amplifier. The two output terminals of the pre-amplifier 21 are connected to the two input terminals of the AGC amplifier 22, respectively, and are also connected to the two input terminals of the first peak detection circuit 26, respectively. The two output terminals of the AGC amplifier 22 are connected to the two input terminals of the subsequent amplifier 23, respectively.

The two output terminals of the post-stage amplifier 23 are respectively the positive-phase and negative-phase output terminals OUT1 and O2 of the equalizing amplifier.
It is connected to the UT2 and to the two input terminals of the second peak detection circuit 24, respectively. The output terminal of the second peak detection circuit 24 and the reference voltage input terminal IN3 are connected to two input terminals of the differential amplifier 31, respectively. The output terminal of the differential amplifier 31 is connected to the threshold input terminal IN2.

The first peak detection circuit 26 performs peak detection on the amplitudes of the positive-phase and negative-phase output signals of the pre-amplifier 21 and detects whether the pre-amplifier 21 has gain-saturated based on the detected amplitude. The gain of the differential amplifier 31 is controlled based on the detection result of the first peak detection circuit 26. That is, when the pre-amplifier 21 is gain-saturated, the gain of the differential amplifier 31 decreases. On the other hand, when the former-stage amplifier 21 does not cause gain saturation, the gain of the differential amplifier 31 increases.

Next, the operation of the equalizing amplifier shown in FIG. 1 will be described. The flow of the electric signal from the pre-amplifier 21 to the post-amplifier 23 and the second peak detection circuit 24
The operation of the DC feedback loop including the differential amplifier 31 is the same as that of the conventional example, and therefore, the duplicated description will be omitted. Further, description of the AGC function of the equalizing amplifier is omitted. Therefore, the gain control of the differential amplifier 31 by the first peak detection circuit 26 will be described below.

If the amplitude of the signal input from the signal input terminal IN1 is in the gain saturation region of the pre-amplifier 21, the first
, The preamplifier 21 is detected to be in the gain saturation region. Then, the gain of the differential amplifier 31 is reduced by the first peak detection circuit 26. This prevents the DC feedback control from becoming unstable and an abnormal threshold voltage from being output to the pre-amplifier 21. Here, when the pre-amplifier 21 is in the gain saturation region, the gain of the equalizing amplifier is low, so that high accuracy is not required for controlling the threshold voltage value. Therefore, there is no problem in lowering the gain of the DC feedback loop.

On the other hand, when the amplitude of the signal input from the signal input terminal IN1 is in the linear gain region of the preamplifier 21, the first peak detection circuit 26 detects that the preamplifier 21 is in the linear gain region. . Then, the gain of the differential amplifier 31 is increased by the first peak detection circuit 26. Thereby, the DC feedback control gain is increased, and the DC offset is accurately canceled even when the equalizing amplifier has a high gain.

As described above, according to the first embodiment,
When the pre-amplifier 21 is in the linear gain region, the gain of the differential amplifier 31 is increased by the first peak detection circuit 26, so that the DC offset can be reliably canceled. Also, the amplitude of the input signal is large and the
Is in the gain saturation region, the gain of the differential amplifier 31 is reduced by the first peak detection circuit 26, so that an appropriate threshold voltage is output from the differential amplifier 31. Therefore, even if the pre-amplifier 21 is in the linear gain region or in the gain saturation region, the DC feedback control has an effect of always operating normally.

Embodiment 2 FIG. FIG. 2 is a block diagram illustrating a configuration of the equalization amplifier according to the second embodiment of the present invention. The second embodiment is different from the first embodiment in that a DC feedback control circuit 4 including a differential amplifier 41 and a changeover switch 42 is provided instead of the DC feedback control circuit 3, That is, a threshold voltage is input. Other configurations are the same as those of the first embodiment, and therefore, the same components as those of the first embodiment are denoted by the same reference numerals and description thereof will be omitted. Hereinafter, only the configuration different from the first embodiment will be described.

An output terminal of the second peak detection circuit 24 and a reference voltage input terminal IN3 are connected to two input terminals of the differential amplifier 41, respectively. Differential amplifier 41
Is connected to one input terminal of the changeover switch 42. The other input terminal of the changeover switch 42 is connected to a threshold voltage input terminal IN4. A predetermined threshold voltage is applied to the threshold voltage input terminal IN4. The output terminal of the changeover switch 42 is connected to the threshold value input terminal IN2. The switching operation of the changeover switch 42 is controlled by the first peak detection circuit 26.

When the first peak detection circuit 26 detects that the pre-amplifier 21 is gain-saturated, the changeover switch 42 sets the threshold voltage input terminal IN.
The four sides are switched so as to be valid. On the other hand, when the first peak detection circuit 26 detects that the pre-amplifier 21 does not cause gain saturation, the changeover switch 42 is switched so that the output side of the differential amplifier 41 is enabled.

Next, the operation of the equalizing amplifier shown in FIG. 2 will be described. The flow of an electric signal from the pre-amplifier 21 to the post-amplifier 23 and the second peak detection circuit 24 are described.
The operation of the DC feedback loop including the differential amplifier 41 is the same as that of the conventional example, and therefore, the duplicated description will be omitted. Further, description of the AGC function of the equalizing amplifier is omitted. Therefore, the operation of the changeover switch 42 by the first peak detection circuit 26 will be described below.

When the amplitude of the signal input from the signal input terminal IN1 is in the gain saturation region of the pre-amplifier 21, the first
, The preamplifier 21 is detected to be in the gain saturation region. Then, the changeover switch 42 is switched so as to connect the threshold voltage input terminal IN4 to the threshold voltage input terminal IN2. As a result, the pre-amplifier 21 via the threshold input terminal IN2
Is input with a predetermined threshold voltage.

On the other hand, when the amplitude of the signal input from the signal input terminal IN1 is in the linear gain region of the preamplifier 21, the first peak detection circuit 26 detects that the preamplifier 21 is in the linear gain region. . Then, the changeover switch 42 is switched so as to supply the output signal of the differential amplifier 41 to the threshold value input terminal IN2. As a result, a DC feedback loop is formed, and the result of comparison between the output signal of the second peak detection circuit 24 and the reference voltage is fed back to the pre-amplifier 21 via the threshold input terminal IN2. Therefore,
Normal phase data output terminal OUT1 and reverse phase data output terminal OU
The DC offset at T2 is canceled.

As described above, according to the second embodiment,
When the pre-amplifier 21 is in the linear gain region, a DC feedback loop is formed by switching the changeover switch 42, so that the DC offset can be canceled. When the amplitude of the input signal is large and the pre-amplifier 21 is in the gain saturation region, a predetermined threshold voltage is input to the pre-amplifier 21 by switching the changeover switch 42. Therefore, even if the pre-amplifier 21 is in the linear gain region or in the gain saturation region, the DC feedback control has an effect of always operating normally.

In the above, the present invention is not limited to each of the above-described embodiments, and it is needless to say that various designs can be changed.

[0038]

As described above, according to the present invention, according to the present invention, the first peak detection circuit detects the amplitude of the positive-phase data signal and the negative-phase data signal output from the preceding-stage amplifier, and The peak detection circuit detects the amplitude of the positive-phase data signal and the negative-phase data signal output from the subsequent-stage amplifier. Then, the DC feedback control circuit controls the threshold voltage supplied to the preceding-stage amplifier based on the output signal of the first peak detection circuit, the output signal of the second peak detection circuit, and the reference voltage. Therefore, a DC feedback loop for supplying an appropriate threshold voltage to the preceding-stage amplifier can be obtained, so that the DC feedback control always operates normally.

Further, according to the present invention, the gain of the differential amplifier constituting the DC feedback control circuit is controlled by the output amplitude of the preceding amplifier detected by the first peak detection circuit. Therefore, when it is detected that the amplitude of the input signal is large and the pre-amplifier is in the gain saturation region, an appropriate threshold voltage is supplied to the pre-amplifier by the gain control of the differential amplifier. This has the effect of operating in a timely manner.

Further, according to the present invention, the gain of the differential amplifier constituting the DC feedback control circuit becomes high when the pre-amplifier does not cause gain saturation.
It becomes lower when the pre-amplifier is causing gain saturation. Therefore, whether the pre-amplifier is in the linear gain region or the gain saturation region, an appropriate threshold voltage is supplied to the pre-amplifier by the gain control of the differential amplifier, so that the DC feedback control is always performed normally. It has the effect of operating.

Further, according to the present invention, the changeover switch is switched based on the output amplitude of the pre-amplifier detected by the first peak detection circuit, so that the pre-amplifier has a DC feedback control circuit. Either the output signal of the amplifier or a predetermined threshold voltage is supplied. Therefore, when the DC feedback control operates stably, the output signal of the differential amplifier is supplied to the preceding-stage amplifier. On the other hand, when there is a possibility that the DC feedback control becomes unstable, a predetermined threshold voltage is supplied to the pre-stage amplifier, so that there is an effect that the DC feedback control operates normally.

According to the present invention, the output signal of the differential amplifier is supplied when the pre-amplifier is not gain-saturated, while the predetermined signal is supplied when the pre-amplifier is gain-saturated. A threshold voltage is provided. Therefore, whether the pre-amplifier is in the linear gain region or the gain saturation region, an appropriate threshold voltage is supplied to the pre-amplifier by the switching operation of the changeover switch, so that the DC feedback control always operates normally. It has the effect of doing.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an equalization amplifier according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of an equalization amplifier according to a second embodiment of the present invention;

FIG. 3 is a block diagram showing a configuration of a conventional equalizing amplifier.

FIG. 4 is a waveform diagram of positive-phase and negative-phase output data signals of the equalizing amplifier when the DC offset is not controlled.

FIG. 5 is a waveform diagram of positive-phase and negative-phase output data signals of the equalizing amplifier when the DC offset is controlled.

FIG. 6 is a waveform diagram of the output data signals of the positive and negative phases of the equalizing amplifier when the feedback control is not performed, and the waveforms of the respective signals when the output data signals are level-shifted by the set output amplitude VR.

FIG. 7 is a waveform diagram of positive-phase and negative-phase output data signals of an equalizing amplifier when feedback control is performed, and waveforms of the respective signals when the output data signals are level-shifted by a set output amplitude VR.

FIG. 8 is a waveform diagram of a signal when a normal-phase output data signal of an equalization amplifier when feedback control is not performed and a signal when a negative-phase output data signal of an equalization amplifier are level-shifted by a set output amplitude VR.

FIG. 9 is a waveform diagram of a signal when the normal-phase output data signal of the equalization amplifier and the negative-phase output data signal of the equalization amplifier are level-shifted by the set output amplitude VR when the feedback control is performed.

[Explanation of symbols]

IN1 signal input terminal, IN2 threshold input terminal, I
N3 reference voltage input terminal, IN4 original threshold voltage input terminal, OUT1 positive phase output terminal, OUT2 negative phase output terminal, 21 pre-stage amplifier, 22 AGC amplifier, 23
Post-stage amplifier, 24 second peak detection circuit, 26 first
Peak detection circuit, 3, 4 DC feedback control circuit, 31 gain controllable differential amplifier, 41 differential amplifier, 42 changeover switch.

Claims (5)

[Claims] A first-stage amplifier to which an input signal to be amplified and a threshold voltage are input; an AGC amplifier to which a positive-phase data signal and a negative-phase data signal output from the previous-stage amplifier are input; A rear-stage amplifier to which the positive-phase data signal and the negative-phase data signal output from the AGC amplifier are input, and which outputs the amplified positive-phase data signal and negative-phase data signal to the outside; A first peak detection circuit for detecting the amplitude of the output positive-phase data signal and the negative-phase data signal; and detecting the amplitude of the positive-phase data signal and the negative-phase data signal output from the subsequent-stage amplifier. A second peak detection circuit, the threshold based on a signal output from the first peak detection circuit, a signal output from the second peak detection circuit, and a reference voltage. Equalizing amplifier characterized by comprising: a DC feedback control circuit for controlling the value voltage. 2. The DC feedback control circuit receives a signal output from the second peak detection circuit and the reference voltage, and adjusts a gain based on a signal output from the first peak detection circuit. The equalizing amplifier according to claim 1, further comprising a controllable differential amplifier. 3. The differential amplifier raises the gain when the preamplifier does not cause gain saturation as a result of the amplitude detection of the first peak detection circuit, while the preamplifier performs gain saturation. 3. The equalizing amplifier according to claim 2, wherein the gain is reduced when the signal is generated. 4. The DC feedback control circuit includes: a differential amplifier to which a signal output from the second peak detection circuit and the reference voltage are input; and a signal output from the first peak detection circuit. A switching switch for switching the threshold voltage supplied to the preceding-stage amplifier to one of a signal output from the differential amplifier and a predetermined threshold voltage based on the threshold voltage. Item 2. An equalizing amplifier according to Item 1. 5. The changeover switch supplies an output signal of the differential amplifier to the preamplifier when the preamplifier does not have gain saturation as a result of the amplitude detection of the first peak detection circuit. 5. The equalizing amplifier according to claim 4, wherein when the pre-amplifier has gain saturation, a switching operation is performed so as to supply the predetermined threshold voltage to the pre-amplifier.