JP2001185810A - Semiconductor optical device and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor optical device element capable of obtaining a high yield and excellent LD characteristics by facilitating cleavage and assembling and sufficiently narrowing the current. SOLUTION: The semiconductor optical device element comprises a compound semiconductor layer including an active layer formed on a substrate, a protective layer having an opening formed on the compound semiconductor layer, and a ridge compound semiconductor layer formed in the opening. In this case, a current block region or a current block layer is formed at the lower side of the active layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor optical device and a method for manufacturing the same, and more particularly to a semiconductor optical device having a ridge-type stripe structure and a method for manufacturing the same, which are suitable as a semiconductor laser.

[0002]

2. Description of the Related Art A conventional ridge waveguide type semiconductor laser having a stripe structure and a method of fabricating the same are shown in FIGS.
It is shown in (c). As shown in FIG. 3A, after a first conductive type clad layer 42, an active layer 43, a second conductive type clad layer 44, and a second conductive type contact layer 45 are grown on a substrate 41, as shown in FIG. The ridge portion is formed by etching the second conductivity type contact layer 45 and the second conductivity type cladding layer 44 by etching as shown in FIG. At this time, the portion other than the ridge is etched to the middle of the second conductivity type cladding layer 44 on the active layer 43, and then the side surface of the ridge portion and the surface of the portion other than the ridge are insulated by the insulating layer 46.
Is formed by forming an electrode 47 including the upper part of the ridge thereon and forming an electrode 48 also on the substrate side (FIG. 3C).

[0003] With such a structure, current is injected into the active layer 12 through the ridge portion, and light corresponding to the composition of the active layer 12 is generated in the active layer 12 below the ridge portion.
On the other hand, since the insulating layer 31 having a smaller refractive index than the semiconductor portion is formed, the effective refractive index of the active layer other than the ridge is smaller than the effective refractive index of the ridge. As a result, the generated light is confined in the optical waveguide below the ridge.

In this ridge waveguide type semiconductor optical device having a stripe structure, the ridge portion is formed by etching. Therefore, the thickness of the etched clad layer portion other than the ridge on the active layer can be made constant. It was difficult. As a result, a slight difference in the thickness of the cladding layer in a portion other than the ridge significantly changes the effective refractive index of the active layer in this portion. Further, the width of the bottom of the ridge that determines the width of the current injection also fluctuates, which makes it difficult to produce a laser with a low threshold and a constant light spread angle with good reproducibility.

In order to solve such a problem, the thickness of the cladding layer above the active layer is determined by using the crystal growth rate at the time of crystal growth, and a protective film is formed other than the ridge portion, and the ridge portion is re-formed. A growing method has been proposed (Japanese Unexamined Patent Application Publication No.
-121822, JP-A-9-199791). Fig. 3 shows the structure of such a laser and the method of making it.
(A ') to (c'). First, on the substrate 51, the first
Conductive clad layer 52, active layer 53 and second conductive type first
After growing the cladding layer 54 (FIG. 3A '), the second
The surface of the conductive type first cladding layer 54 is covered with a protective film 5 of SiO ₂ or the like.
5 and a stripe-shaped window is opened by photolithography, and a second conductive type second cladding layer 56 and a second conductive type contact layer 57 are selectively grown only in the stripe region (FIG. 3 (b ')). . Next, the protective film 55 covering portions other than the ridge, the side surface of the second conductive type second cladding layer 56 forming the ridge, and the entire surface of the second conductive type contact layer 57 are covered with an insulating layer 58 such as SiNx, and again. After removing the SiNx insulating layer on the ridge top by photolithography,
An electrode 59 is formed on the entire surface, and an electrode 60 is also formed on the substrate side (FIG. 3 (c ')).

If the current is prevented from flowing through the insulating layer other than the ridge, the surface is covered with the insulating layer, making it difficult to cleave and peeling off the electrodes. Further, when a pinhole or the like is present in the insulating layer, a current flows to a portion other than the ridge, and there is a problem that the current cannot be sufficiently confined in the ridge portion. Furthermore, as shown in FIG. 4, when assembled by junction down with the substrate side up and the epitaxial layer side down, the solder material only reaches the compound semiconductor layer beneath it by wrapping around the thickness of the electrode and the protective film. Current leakage is likely to occur. Also,
If the ridge portion protrudes as compared with other portions, it is not preferable because there is a problem that deterioration due to stress is likely to occur.

[0007]

As described above, the conventional semiconductor optical device device of the ridge stripe type waveguide structure has the following features.
Even in the case of using regrowth, in an LD in which current does not flow to portions other than the ridge with an insulating layer or the like, cleavage,
In some cases, it is difficult to assemble, and the current is not sufficiently confined by the protective film or the like, so that the yield may decrease. Also, when assembled in a junction-down state, deterioration due to current leakage to portions other than the ridge may be caused, and sufficient LD characteristics may not be obtained. In view of the above-mentioned problems of the prior art, the present invention provides a semiconductor optical device element that is easy to cleave and assemble, has a sufficiently narrow current, has a high yield, and can obtain excellent LD characteristics. An object of the present invention is to provide a method for easily manufacturing a semiconductor optical device having such characteristics.

[0008]

Means for Solving the Problems As a result of intensive studies to solve the above-mentioned problems, the present inventors have found that a current blocking region or an active layer (for example, a substrate) is provided below an active layer (for example, inside a substrate). It has been found that by using a semiconductor optical device having a structure in which a current block layer is formed above, the presence of a protective film is minimized and the yield of cleavage, assembly, etc. is improved, and assembly is performed by junction down. In this case, the present inventors have found that sufficient LD characteristics can be obtained, and furthermore, have found that the irreversible optical damage (COD) level can be increased and the reliability of the device can be improved.

That is, the present invention provides a compound semiconductor layer including an active layer formed on a substrate, a protective film having an opening formed on the compound semiconductor layer, and a ridge type compound semiconductor formed in the opening. A semiconductor optical device having a layer, wherein a current blocking region or a current blocking layer is formed below the active layer.

In a preferred embodiment of the semiconductor optical device according to the present invention, the compound semiconductor layer including the active layer includes layers above and below the active layer, each having a lower refractive index than the active layer; Is smaller than the refractive index of the protective film having the opening; of the layers having lower refractive indexes than the active layers above and below the active layer, the layer on the substrate side is the first conductivity type clad layer, and the other layer is Is a second conductivity type first cladding layer; wherein the ridge type compound semiconductor layer is
An embodiment including a layer having a lower refractive index than the active layer; an embodiment in which the layer having a lower refractive index than the active layer is a second conductive type second cladding layer; An embodiment formed near the side surface of the compound semiconductor layer below the layer; an embodiment in which the current block region or the current confined region sandwiched by the current block layers is formed only in the vicinity immediately below the opening; The region or current blocking layer is
An embodiment of a conductivity type or a high resistance; an embodiment in which the current block region is selectively formed inside a compound semiconductor layer under a substrate and / or an active layer; An embodiment in which the current blocking region is formed in the vicinity of the end surface without any step in the optical waveguide; a compound in which the current blocking layer is below the substrate and / or the active layer. A mode in which a light guide layer is formed between the active layer and the current blocking layer; a mode in which the current blocking layer is selectively formed on the semiconductor layer;
A mode in which the current block layer is an insulator film; a mode in which current is injected into the active layer from the opening; and a mode in which current is injected into the active layer from a region where the block layer is not formed. An embodiment in which a region transparent to laser light is formed at an end of the optical waveguide; and a band gap of the active layer in a current injection region in the center of the optical waveguide at both ends of the optical waveguide. An aspect in which at least a part of a side surface of the ridge-type compound semiconductor layer is in contact with a surface-side electrode; and a width of the opening is wider than a central portion of the device near an end surface of the device. Aspect; an aspect in which the width of the opening is narrower in the vicinity of the end face of the apparatus than in the center of the apparatus; an aspect in which the opening is a stripe-shaped opening extending to both ends; An embodiment in which the opening extends to one end but does not extend to the other end; an embodiment in which the opening does not extend to both ends; the active layer includes at least GaAs; AlGaAs, InGa
As, AlGaInAs, GaInP, AlGaIn
An embodiment comprising P, GaInAsP, AlGaInAsP, GaN or InGaN; an embodiment wherein the surface of the substrate has an off-angle with respect to a low-order plane orientation; an embodiment having a ridge dummy region outside the protective film; An aspect in which a ridge dummy layer is formed in the ridge dummy area; an aspect in which a current block layer is formed in at least a part of a lower side of the ridge dummy area; And a mode in which the laser chip is assembled at the junction down.

The present invention also provides a process for forming a current blocking region or a current blocking layer inside or above a substrate, a process for forming a compound semiconductor layer including an active layer and a protective film in this order, and an opening in the protective film. Forming a,
A method of manufacturing a semiconductor optical device, comprising the step of selectively growing a ridge type compound semiconductor layer in the opening.

As a preferred embodiment of the method for manufacturing a semiconductor optical device according to the present invention, the current block region is formed by impurity diffusion or impurity implantation; an impurity diffusion layer is formed in a crystal growth apparatus, and then the crystal growth apparatus is formed. An embodiment in which the crystal growth apparatus is a metal organic chemical vapor deposition apparatus; an embodiment in which the impurity diffusion layer is selectively removed from the current block region by etching; A ridge-type compound semiconductor layer is selectively grown on the opening by performing a metal organic chemical vapor deposition method while adding a gas containing a halogen element; The direction in which the portion extends is selected so that the contact layer is formed over substantially the entire surface of the ridge shape; The growth plane is a (100) plane or a plane crystallographically equivalent thereto, and the direction in which the opening of the protective film extends is the [01-1] direction or a direction crystallographically equivalent thereto. Can be.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor optical device and a method of manufacturing the same according to the present invention will be described in detail. The semiconductor optical device of the present invention comprises a compound semiconductor layer including an active layer formed on a substrate, a protective film having an opening formed on the compound semiconductor layer, and a ridge-type compound formed in the opening. A semiconductor optical device having at least a semiconductor layer. The semiconductor optical device of the present invention may appropriately have layers usually formed in the semiconductor optical device in addition to these layers. A feature of the present invention is that a current blocking region or a current blocking layer is formed below the active layer.

As used herein, the term "current blocking region" refers to a region that forms a part of a certain layer and has a function of blocking current. The “current blocking layer” refers to a layer having a function of blocking current as a whole. In the semiconductor optical device device of the present invention, only one of the current block region and the current block layer may be formed below the active layer, or both the current block region and the current block layer may be formed. Is also good.

The structure of the semiconductor optical device of the present invention having such features will be described in detail with reference to the embodiments shown in FIGS. FIG. 1 (a) and (b)
Shows a specific embodiment of the semiconductor optical device of the present invention having a current block region. 1A and 1B, a current block region 12 is formed in a substrate 11. In FIG. 1A, the current block region 1
No. 2 is not formed immediately below the optical waveguide, but is formed on the left and right sides of the portion directly below the optical waveguide and over the side surface of the substrate. Further, in FIG. 1B, the current block region 12
In addition to the portion shown in FIG. The shape and formation position of the current block region are not limited to these modes. For example, the current blocking region may be formed inside a buffer layer or a cladding layer formed below the active layer. Further, it may be formed over a plurality of layers.

FIGS. 2A and 2B show a specific embodiment of the semiconductor optical device of the present invention having a current blocking layer. 2A and 2B, a current blocking layer 13 is formed on a substrate 11. FIG.
In (a), the current block layer 13 is not formed immediately below the optical waveguide, but is formed on the left and right sides of the portion directly below the optical waveguide and over the side surface of the substrate. Further, in FIG. 2B, the current block layer 13 is formed at the end in addition to the portion of FIG. 2A. The shape and the formation position of the current blocking layer are not limited to these embodiments. For example, the current blocking layer may be formed between any layers formed below the active layer, or may be formed between the buffer layer and the cladding layer. The number of current blocking layers may be one or more.

In the present invention, the current block region is preferably formed in the substrate, and the current block layer is preferably formed on the substrate. In particular, FIGS. 1 and 2
As shown in (1), the current block region is preferably formed only in the substrate, and the current block layer is preferably formed only on the substrate from the viewpoint of reducing the number of times of growth and suppressing surface oxidation. Thereby, the presence of the protective film can be minimized, and the yield of cleavage, assembly, and the like can be improved. In addition, sufficient LD characteristics can be obtained when assembled in a junction-down state, and the irreversible optical damage (COD) level can be increased, and the reliability of the device can be improved.

If the thickness of the current block region or the current block layer is too small, the function of the current block becomes insufficient, and if the thickness is too large, the passage resistance increases. Specifically, the lower limit is preferably 0.01 μm or more,
0.1 μm or more is more preferable. The upper limit is preferably 5 μm or less, more preferably 3 μm or less. As shown in FIGS. 1 and 2, the current blocking region or the current blocking layer is not formed in a portion directly below the optical waveguide,
It is preferable that it is formed over the side surface of the substrate on the left and right of the portion directly below the optical waveguide. As a result, it is possible to prevent current leakage on the end face or side face of the optical waveguide due to the sagging of the electrode on the side face of the chip during the cleavage or the wraparound of the solder material when assembled by junction down.

By forming the current blocking region or the current confining region sandwiched between the current blocking layers only in the vicinity of the portion immediately below the optical waveguide, an electrode is formed directly on the ridge dummy region without interposing a protective film. However, current leakage inside the element can also be prevented. If the width of the current confinement region is too large, the function of the current block becomes insufficient, and if the width is too small, the passage resistance increases. Specifically, the lower limit is preferably 0.5 μm or more, and 1
μm or more is more preferable. The upper limit is preferably 50 μm or less, more preferably 20 μm or less. As shown in FIG.
By forming a current block layer on at least a part of the lower side of the ridge dummy area, the ridge part can be made lower than at least a part of the ridge dummy area, and the stress at the time of junction down assembly can be reduced. Becomes possible.

As shown in FIGS. 1B and 2B, a current block region or a current block layer can be formed near the end face. By forming the current non-injection region at the end in this manner, it is possible to reduce the current recombination at the end face, increase the irreversible optical damage (COD) level, and improve the reliability of the device. be able to. Even in a window structure laser in which a region transparent to laser light is formed at the end of the optical waveguide using a technique such as impurity diffusion, generation of recombination current at the end face can be similarly prevented. At this time, as shown in FIG. 2B, when the current blocking layer is formed near the end face and there is a step in the optical waveguide near the end face, light is transferred from the active layer to the cladding layer or the like near the end face. Leaking into a layer with a large gap,
It is also possible for the end face to be substantially transparent to light, that is, an end face window structure.

On the other hand, as shown in FIG. 1, when the current block region is buried flat, the current block region can be formed near the end face without any step in the optical waveguide, and the end portion can be formed. The occurrence of optical waveguide loss can be prevented. At this time, it is preferable that the optical waveguide is substantially on a straight line, and specifically, it is preferable that the step of the optical waveguide at the end is 1/10 or less of the wavelength. If the width of the current block region or current block layer at the end face is too narrow,
If the effect of current non-injection is reduced or cleavage becomes difficult, problems occur. If too wide, loss in the current non-injection region increases, so that threshold current increases and slope efficiency decreases. This leads to deterioration of laser characteristics. Therefore, the length of the current non-injection region is, as a lower limit, preferably 1 μm or more, more preferably 5 μm or more. As a maximum, 50 micrometers or less are preferred and 30 micrometers or less are more preferred.

The current non-injection regions are preferably formed at both ends, but may be formed only on one side surface. When formed only on one side, it is preferable to form it on the end face side from which higher-power laser light is emitted. Note that the term “near the end face” in this specification refers to a portion where such a current non-injection region is formed.

The method for forming the current block layer or the current block region is not particularly limited. The current block layer is preferably formed by selective growth from the viewpoint of process simplification and shape controllability. On the other hand, the current block region is preferably formed by impurity diffusion or impurity implantation. At this time, it is preferable to form an impurity diffusion layer in the crystal growth apparatus and then to perform heat treatment in the crystal growth apparatus. More preferably, the crystal growth device is a metal organic chemical vapor deposition device. It is preferable that the impurity diffusion layer be removed from the current block region by selective etching from the viewpoint of planarization.

In consideration of ease of production and controllability, it is preferable that the growth of a layer having a diffusion source and the annealing process be performed consistently in a thin film growth apparatus as an impurity diffusion process. Further, in order to reduce the leakage current at the end, it is preferable to remove the impurity diffusion layer at least by the end of the laser chip manufacturing process.

The impurities to be diffused are preferably those having a large diffusion constant from the viewpoint of reducing the diffusion process temperature, and examples thereof include zinc (Zn), tin (Sn), lithium (Li), and copper (Cu). For a III-V group semiconductor, for example, zinc (Z
n), magnesium (Mg), beryllium (Be), etc., as n-type impurities such as silicon (Si), germanium (Ge), tin (Sn), sulfur (S), and selenium (S).
e), tellurium (Te) and the like. Further, impurities that can increase the resistance may be used. For example, copper (C
u), transition elements such as iron (Fe) and chromium (Cr), and hydrogen (H). In particular, for III-V semiconductors, boron (B) and oxygen (O) are exemplified.

In addition, as an impurity doping method, for example, an ion implantation method may be employed in addition to the above-mentioned preferable method. After the ion implantation, heat treatment is performed to diffuse the impurities. However, implanting impurities with high energy or a large mass number is not preferable because a large number of defects (especially, when the dose is large) are generated.

In FIG. 1 and FIG. 2, the substrate 11 on which the current block region 12 is formed or the current block layer 1 is formed.
A compound semiconductor layer including an active layer is formed on the substrate 11 on which the substrate 3 is formed. The compound semiconductor layer including the active layer usually includes layers above and below the active layer 15 having a lower refractive index than the active layer, of which the layer on the substrate side is the first conductivity type cladding layer 14 and the layer on the other epitaxial side. Functions as the first cladding layer 16 of the second conductivity type. In addition, a layer functioning as a light guide layer may be included. Usually 2
Double heterostructure (D
H) structure, the first conductivity type cladding layer 1
4, an active layer 15 and a second conductive type first clad layer 16 are sequentially laminated. At this time, the second conductive type clad layer 13
An antioxidant layer having a function of preventing surface oxidation may be further formed thereon, and for example, it is preferable that the antioxidant layer 17 is formed directly. On the oxidation preventing layer 17, a protective film 18 which is an insulating layer is formed. The protective film 18 has a striped opening 19, and the outside is removed to form a ridge dummy region. Such a protective film 18 is usually formed by photolithography after deposition. In this specification, the “ridge dummy region” refers to a region including the epitaxial layer from the substrate outside the protective film when viewed from the epitaxial layer side. The ridge dummy region also includes epitaxial layers 20a and 21a grown so as to cover the protective film 18. On the opening 19, a ridge type compound semiconductor layer, that is, a second conductivity type second cladding layer 20, which is usually a compound semiconductor layer having a lower refractive index than the active layer, and a contact layer 21 for reducing resistance. Is formed. In addition, a layer functioning as a light guide layer may be included.
Such ridge portions and ridge dummy regions are formed by the second conductive type second cladding layers 20 and 20a and the contact layers 21 and 2
It is common to form by depositing 1a simultaneously. The upper surface side of the contact layers 21 and 21a and the substrate 11
Are formed on the bottom side thereof.

In this specification, the expression “B layer formed on the A layer” refers to the case where the B layer is formed such that the bottom surface of the B layer is in contact with the upper surface of the A layer. In which one or more layers are formed on the upper surface and a B layer is formed on that layer. The above expression also includes the case where the upper surface of the A layer and the bottom surface of the B layer are partially in contact with each other and one or more layers exist between the A layer and the B layer in other portions. Specific aspects are apparent from the following description of each layer and specific examples of the examples.

The conductivity and material of the substrate 11 constituting the semiconductor optical device of the present invention are not particularly limited as long as a crystal having a double hetero structure can be grown thereon. Preferred is a conductive substrate. Specifically, GaAs, InP, GaP, ZnSe, ZnO, S
It is preferable to use a crystal substrate of i, Al ₂ O ₃ or the like, particularly a crystal substrate having a zinc blende structure. In this case, the substrate crystal growth surface is preferably a low-order plane or a plane crystallographically equivalent thereto, and most preferably a (100) plane. In this specification, the (100) plane is always strictly (1).
00) It is not necessary that the surface be exactly the same, and the case including an off-angle of up to about 30 ° is included. The upper limit of the off-angle is preferably 30 ° or less, more preferably 16 ° or less. The lower limit is preferably 0.5 ° or more, more preferably 2 ° or more, still more preferably 6 ° or more, and most preferably 10 ° or more.

The substrate may be a hexagonal substrate, in which case it is also formed on Al ₂ O ₃ , 6H—SiC or the like. On the substrate 11, a thickness of 0.2 to 2 μm is usually used so that defects of the substrate are not introduced into the epitaxial growth layer.
It is preferable to form a buffer layer having a thickness of about m. MOCVD or M
A known growth method such as BE may be used.

When a buffer layer is formed on a substrate, the resistance of the buffer layer is relatively low. If the buffer layer is too thick, a current blocking region or a current constriction region sandwiched between the current blocking layers is placed immediately below the opening. By forming the electrode only in the vicinity, it is difficult to prevent a current leak inside the element even if an electrode is directly formed on the ridge dummy region without a protective film. For this reason, the thickness of the buffer layer is preferably set to 1 μm or less,
It is more preferable that the thickness be not more than μm. Furthermore, if possible, it is most preferable not to form a buffer layer.

On the substrate 11, a compound semiconductor layer including an active layer is formed. The compound semiconductor layer includes layers having a lower refractive index than the active layer above and below the active layer, of which the layer on the substrate side is a first conductive type clad layer and the other epitaxial side layer is a second conductive type clad layer. Function. In addition, a layer functioning as a light guide layer may be included. The magnitude relationship between the refractive indices can be adjusted by appropriately selecting the material composition of each layer according to a method known to those skilled in the art. For example, Al _x Ga _1-x As, (Al _x
The refractive index can be adjusted by changing the Al composition such as Ga _1-x ) _0.5 In _0.5 P and Al _x Ga _1-x N.

The first conductivity type cladding layer 14 is formed of a material having a smaller refractive index than the active layer. Further, it is preferable that the refractive index of the first conductive type clad layer is larger than the refractive index of the second conductive type clad layer. For example, G of the first conductivity type
aInP, AlGaInP, AlInP, AlGaAs
s, AlGaAsP, AlGaInAs, GaInAs
P, GaN, AlGaN, AlGaInN, BeMgZ
General III-V or II-VI group semiconductors such as nSe, MgZnSSe, and CdZnSeTe can be used. The lower limit of the carrier concentration of the first conductivity type cladding layer is preferably 1 × 10 ¹⁸ cm ⁻³ or more, more preferably 3 × 10 ¹⁸ cm ⁻³ or more, and most preferably 5 × 10 ¹⁸ cm ⁻³ or more. The upper limit is preferably 2 × 10 ²⁰ cm ⁻³ or less, and 5 × 10
^It is more preferably ¹⁹ cm ^-3 or less, most preferably 3 × 10 ¹⁸ cm ^-3 or less.

The first conductivity type cladding layer 14 is a single layer.
When the thickness is 0.5 to 4 μm
Preferably, it is 1 to 3 μm. First guide
The electric cladding layer may be composed of a plurality of layers.
Specifically, GaInP, AlGaInP or
AlInP cladding layer and substrate side of the cladding layer
The first conductive type is made of AlGaAs or AlGaAsP.
It is possible to exemplify an embodiment in which a clad layer is formed.
Wear. At this time, the thickness of the layer on the active layer side may be reduced.
Preferably, the lower limit of the thickness is 0.01 μm or more.
Preferably, the thickness is 0.05 μm or more. As an upper limit
Is preferably 0.5 μm or less, more preferably 0.3 μm or less.
preferable. The carrier concentration of the layer on the substrate side is lower limit 2
× 10¹⁷cm^-3Is preferably 5 or more¹⁷cm^-3Less than
The above is more preferred. Upper limit is 3 × 10 ¹⁸cm^-3The following is preferred
2 × 10¹⁸cm^-3The following is more preferred.

The structure of the active layer 15 constituting the semiconductor optical device of the present invention is not particularly limited. The embodiment shown in FIG. 1A has a triple quantum well structure (TQW). Specifically, the triple quantum well structure (TQW) has a light confinement layer (non-doped) 51, a quantum well layer (non-doped) 52, a barrier layer (non-doped) 53, a quantum well layer (non-doped) 54, and a barrier layer (non-doped) 55. , A quantum well layer (non-doped) 56 and a confinement layer (non-doped) 57 are sequentially laminated. In addition to the triple quantum well structure, for example, a single quantum well structure (SQW) including a quantum well layer and a light confinement layer sandwiching the quantum well layer from above and below, a plurality of quantum well layers and a barrier sandwiched therebetween Double quantum well structure (DQW) comprising a light confinement layer laminated above the uppermost quantum well layer and the lowermost quantum well layer, and a multiple quantum well structure having four or more quantum well layers ( MQW). When the active layer has a quantum well structure, a shorter wavelength and a lower threshold can be achieved as compared with a single bulk active layer.

In the semiconductor optical device of the present invention, even if a window region is formed in which the band gap of the active layer at both ends of the optical waveguide is larger than the band gap of the active layer in the current injection region at the center of the optical waveguide. Good. This window region is a disordered region, and the end face of the optical waveguide of the active layer is a mixed crystal region.

The method for forming the window region is not particularly limited. A preferred method is to perform a process for forming a window region from above the active layer. For example, there is impurity diffusion as one method for manufacturing a window region. In the present invention, a window region can be easily manufactured by forming an impurity diffusion layer above an active layer. In particular, it is possible to perform impurity diffusion from a location above the active layer and relatively short from the active layer. For example, impurity diffusion can be performed from above the oxidation prevention layer 17 described later. At this time, the impurity passes through the oxidation preventing layer 17 having a relatively small thickness and the first cladding layer 16 of the second conductivity type to form the active layer 1.
As a result, the controllability of the position of the impurity diffusion front can be improved and the leakage current at the end can be easily reduced.

If the distance from the active layer to the impurity diffusion layer in the optical waveguide is too short, the impurity concentration in the active layer becomes too high, and the optical waveguide is liable to be affected by quality deterioration due to the regrowth interface. On the other hand, if the distance is too long, there is a problem that the controllability of the diffusion front position is reduced and the leak current at the end is increased. In particular, if the impurity diffuses into a layer having a relatively small band gap below the first conductivity type cladding layer, the leakage current increases and the performance as a light emitting element is greatly impaired. further,
When the active layer contains In (further As), if the diffusion distance is long, high temperature or long time diffusion is required.
During thermal diffusion, the interface of the active layer may be disturbed at the center of the waveguide other than the window structure, or the quality of the active layer may be degraded due to thermal damage. In consideration of these, the lower limit of the distance from the active layer to the impurity diffusion layer in the optical waveguide is preferably 0 μm or more, more preferably 0.05 μm or more, and 0.
Most preferably, it is 1 μm or more. The upper limit of the diffusion distance is 0.5μ
m or less, more preferably 0.45 μm or less,
Most preferably, it is 0.4 μm or less. Since the diffusion distance of the impurity is relatively short, there is an advantage that the impurity can be diffused at a relatively low temperature. Impurity diffusion temperature is 850 ° C
Or less, more preferably 770 ° C. or lower, and even more preferably 730 ° C. or lower.

In consideration of ease of production and controllability, it is preferable that the growth of the layer having the diffusion source and the annealing process be performed consistently in the thin film growth apparatus as the impurity diffusion process. Further, it is preferable to remove the impurity diffusion layer at least by the end of the laser chip manufacturing process in order to reduce the leakage current at the end. The diffusion front of the impurity at the end must be lower than the quantum well layer in the active layer in order to perform the mixed crystal, and the first conductivity type clad having a larger band gap than the active layer is required. Layer 1
4 is preferable from the viewpoint of suppressing current leakage.

The impurities to be diffused preferably have a large diffusion constant from the viewpoint of reducing the diffusion process temperature, and examples thereof include zinc (Zn), tin (Sn), lithium (Li), and copper (Cu). Further, from the viewpoint of preventing an increase in internal loss in the optical waveguide, an n-type impurity is preferable,
For example, for a III-V group semiconductor, silicon (S
i), germanium (Ge), tin (Sn), sulfur (S), selenium (Se), tellurium (Te), etc .;
For a group VI semiconductor, nitrogen (N), chlorine (Cl), and the like can be given. From the viewpoint of reducing the leakage current at the end, an impurity capable of increasing the resistance is preferable. For example, transition elements such as copper (Cu), iron (Fe), and chromium (Cr), and hydrogen (H), For a III-V semiconductor, boron (B), oxygen (O), and the like can be given.

As a method for doping impurities into the window region, for example, an ion implantation method may be employed in addition to the above-mentioned preferable method. After the ion implantation, heat treatment is performed to diffuse the impurities, thereby enabling the crystal structure of the quantum well structure to be mixed. However, implanting impurities with high energy or a large mass number is not preferable because a large number of defects (especially, when the dose is large) are generated. In particular, when the implanted impurity reaches the active layer, defects are generated inside the active layer, which is not preferable. From the viewpoint of reducing damage to the active layer, the implantation depth is reduced, and the implanted impurity is formed above the active layer. Preferably, there is a peak in the profile. As the implanted impurities, silicon (Si), fluorine (F), aluminum (Al), boron (B), carbon (C), nitrogen (N), phosphorus (P), sulfur (S), arsenic (As), Gallium (Ga) is suitable. From the viewpoint of damage reduction, B, C, F, Al, Si, and the like having relatively small mass are preferable. In the case of injecting into an all-V semiconductor, it is preferable to use N, F, As, Al, Ga or the like which does not work as a carrier from the viewpoint of eliminating the influence of absorption of free carriers. Although it does not directly contribute to mixed crystal formation, hydrogen (H), argon (A
By injecting r) or the like, the activation rate of carriers can be reduced and a high-resistance layer can be formed.

No impurities are used (impurity free)
By the method, it is possible to produce an end window structure. For example, by forming a dielectric film such as SiO _{2 on} the surface and treating it at a high temperature (which requires a relatively high temperature than impurity diffusion), base atoms such as Ga on the surface side move into the dielectric film, There is a method in which the vacancies generated at this time are diffused in the film, and the quantum well is mixed. Also at this time, as described above, since the diffusion distance of the vacancy can be reduced by forming the dielectric film on the upper portion near the active layer, the process can be performed at a relatively lower temperature and in a shorter time than the conventional structure. . This makes it possible to suppress damage to the active layer and disorder of the doping profile in a region (for example, a current injection region) that does not need to be mixed-crystallized.

Further, the mixed crystal may be locally heated to a high temperature by using a laser beam, an electron beam or the like to form the window region. This method is used not only when no impurity is used but also when an impurity is used, from the viewpoint of suppressing damage to the active layer and disorder of the doping profile in a region (for example, a current injection region) that does not need to be mixed. Is also effective.

A preferred dimensional relationship between a region in which impurities are diffused to form a window structure and a current block layer or a current block region formed below the active layer will be described with reference to FIG. In FIG. 5, a region where impurities are diffused to form a window structure corresponds to a portion A,
The current blocking layer or the current blocking region defined under c and e and formed below the active layer corresponds to the portion B, and b, d,
f. The three views in the top view each show different aspects. W indicates the width of an opening 19 described later.

These parameters preferably satisfy the relationship of b ≧ a / 2 c ≧ W, d ≧ Wf ≧ e / 2, and satisfy the relationship of b ≧ ad ≦ c ≧ Wf ≧ e. Is more preferable.

The second conductive type first clad layer 16 is formed of a material having a lower refractive index than the active layer 15. For example,
Second conductivity type AlGaInP, AlInP, AlGaAs
s, AlGaAsP, AlGaInAs, GaInAs
P, AlGaInN, BeMgZnSe, MgZnSS
e, general III-V groups such as CdZnSeTe, II
-VI group semiconductors can be used. When the second-conductivity-type cladding layer is made of a III-V compound semiconductor containing Al, substantially the entire surface on which GaN can be grown is GaAs.
s, GaAsP, GaInAs, GaInP, GaIn
It is preferable to cover with a group III-V compound semiconductor containing no Al such as N because surface oxidation can be prevented.

The lower limit of the carrier concentration of the second conductive type first cladding layer 16 is preferably 2 × 10 ¹⁷ cm ⁻³ or more, and 5 × 10 ¹⁷ cm ⁻³ or more.
10 ¹⁷ cm ^-3 or more is more preferable, and 7 × 10 ¹⁷ cm ^-3 or more is most preferable. The upper limit is preferably 5 × 10 ¹⁸ cm ⁻³ or less, more preferably 3 × 10 ¹⁸ cm ⁻³ or less, and 2 × 10 ¹⁸ cm ⁻³ or less.
Most preferably ¹⁸ cm ^-3 or less. The lower limit of the thickness is 0.
It is preferably at least 01 μm, more preferably at least 0.05 μm, most preferably at least 0.07 μm. The upper limit is preferably 0.5 μm or less, more preferably 0.3 μm or less, and most preferably 0.2 μm or less.

The first cladding layer 16 of the second conductivity type is the active layer 1
5 is formed. In a preferred embodiment of the present invention, the refractive index of the second conductive type first cladding layer is smaller than the refractive index of the first conductive type cladding layer. By adopting such an embodiment, the light distribution (near-field image) can be controlled so that light effectively seeps from the active layer to the light guide layer side. Further, since the optical waveguide loss from the active region (the portion where the active layer is present) to the impurity diffusion region can be reduced, the laser characteristics and the reliability in high-power operation can be improved.

The second conductive type first cladding layer 16 has a second
By forming the antioxidant layer (etching stop layer) 17 functioning as a conductive type cap layer, when the second conductive type second clad layer 20 is regrown at least in the opening 19, the passage resistance is formed at the regrowth interface. Can be easily prevented from being generated in the high resistance layer.

In another preferred embodiment of the present invention, the second
An anti-oxidation layer is provided at least immediately below the opening of the protective film on the conductive type first clad layer, that is, in the stripe region and preferably on both sides thereof. Thus, when the second conductivity type second cladding layer 20 of the ridge portion is formed by regrowth, it is possible to prevent the generation of a high-resistance layer that increases the passage resistance at the regrowth interface. Also, if a large amount of impurities such as oxygen are present at the regrowth interface, light absorption (heat generation) at the interface due to deterioration of crystal quality and diffusion of impurities through defects are promoted, resulting in deterioration of characteristics and reliability. I will.

The material of the antioxidant layer 17 is not particularly limited as long as it is hardly oxidized or is easily oxidized and cleaned. Specifically, III-V having a low content of an easily oxidizable element such as Al (about 0.3 or less)
Group compound semiconductor layers. It is preferable that light from the active layer is not absorbed by selecting a material and a thickness. The material of the cap layer is generally selected from materials having a larger band gap than the material of the active layer. However, even a material having a small band gap has a thickness of 50 nm or less, more preferably 30 nm or less, and most preferably 10 nm. Below, light absorption can be substantially ignored, so that it can be used.

The protective film 18 constituting the semiconductor optical device of the present invention is formed above the second conductive type first cladding layer and has an opening 19. Basically, the opening 19
A current is injected into the active layer. The material of the protective film 18 is not particularly limited as long as it is an insulator having a current blocking function. In general, a dielectric is preferably used. Specifically, a SiNx film, a SiO ₂ film, a SiON film, an Al ₂ O
₃ film, ZnO film, SiC film, and amorphous Si. This protective film serves as a mask
It is used when it is formed by selective regrowth using CVD or the like. The protective film 18 has an advantage that a layer having a low refractive index and excellent insulating properties can be formed, but also has disadvantages such as poor heat dissipation and poor cleavage due to low thermal conductivity. Have. Therefore, it is preferable to reduce the ratio of covering the surface of the element and shorten the length of the end face, but the present invention makes this possible.

The protective film 18 is used to control the light distribution (particularly the light distribution in the lateral direction) and to improve the current blocking function.
It may be formed from two or more layers having different refractive indexes and the like.

In order to provide an effective refractive index difference between the ridge portion and the non-ridge portion in the active layer in the horizontal direction, and to stabilize the transverse mode of laser oscillation, the refractive index of the protective film is made smaller than the refractive index of the cladding layer. Is also preferably small. However, in practice, when the refractive index difference between the protective film and the cladding layer is too large, the effective refractive index step in the lateral direction in the active layer tends to be large,
The first cladding layer 16 of the second conductivity type under the ridge must be thickened, which causes a problem that leakage current increases in the lateral direction. On the other hand, if the refractive index difference between the protective film and the cladding layer is too small, light tends to leak to the outside of the protective film, so that the protective film needs to be thickened to some extent. Occurs. Taking these facts into consideration, the lower limit of the refractive index difference between the protective film and the cladding layer is preferably 0.3 or more, more preferably 0.2 or more, and most preferably 0.5 or more. The upper limit is 3.0
Or less, more preferably 2.5 or less, and most preferably 1.8 or less. There is no particular problem with the thickness of the protective film as long as it has sufficient insulation properties and does not leak light to the outside of the protective film. The lower limit of the thickness of the protective film is preferably 10 nm or more, more preferably 30 nm or more, and most preferably 50 or more. Upper limit is 500n
m or less, more preferably 300 nm or less, and 2
00 nm or less is most preferable.

Most of the ridge type compound semiconductor layer including a layer having a lower refractive index than the active layer formed on the opening of the protective film 18 is generally formed of the second conductive type second clad layer 20. In addition, a layer functioning as a light guide layer may be included.

A second cladding layer 20 of the second conductivity type is formed on at least a part of the opening of the protective film 18. Second
The conductive type second cladding layer 20 is usually formed so as to cover the entire upper surface of the opening 19. In a preferred embodiment of the present invention, the refractive index of the second conductive type second cladding layer 20 is lower than that of the second conductive type first cladding layer 16. As a result, it is possible to suppress the tailing of the light distribution (near-field image) to the ridge portion, improve the symmetry of the vertical spread angle (far-field image), suppress the side peak of the horizontal spread angle (far-field image), Alternatively, laser characteristics and reliability can be improved by suppressing light absorption in the contact layer.

The lower limit of the carrier concentration of the second conductive type second cladding layer 20 is preferably 5 × 10 ¹⁷ cm ⁻³ or more, and 7 × 10 ¹⁷ cm ⁻³ or more.
It is more preferably at least 10 ¹⁷ cm ^-3, most preferably at least 1 × 10 ¹⁸ cm ^-3 . The upper limit is preferably 1 × 10 ¹⁹ cm ⁻³ or less, more preferably 5 × 10 ¹⁸ cm ⁻³ or less, and 3 × 10 cm ⁻³ or less.
Most preferably ¹⁸ cm ^-3 or less. The lower limit of the thickness of the second conductivity type second cladding layer 20 is preferably 0.5 μm or more in consideration of insufficient light confinement if the thickness is too small, and increase of the passage resistance if the thickness is too large. Preferably, 1.
0 μm or more is more preferable. The upper limit is preferably 3.0 μm or less, more preferably 2.0 μm or less.

The thickness of the second cladding layer 20 of the second conductivity type is set to 0.25 to
About 2.0 times is preferable. Within this range, there is no remarkable protrusion as compared with the surroundings (a current block layer and a ridge dummy region to be described later). Also, on the contrary, it is preferable because the post-process such as the electrode forming process is not difficult to be performed because it is extremely lower than the surroundings.

Protective film 18 and second conductive type second cladding layer 2
It is preferable to form a low-resistance (high carrier concentration) contact layer 21 in order to reduce the contact resistance with the electrode material before forming an electrode after forming 0. In particular, it is preferable to form an electrode after forming a contact layer on the entire surface of the uppermost layer on which an electrode is to be formed. In order to further increase the contact area with the electrode, it is preferable that at least a part of the side surface of the ridge type compound semiconductor layer is in contact with the electrode.

At this time, the material of the contact layer 21 is usually selected from materials having a smaller band gap than that of the cladding layer, and preferably has low resistance and appropriate carrier density in order to obtain ohmic contact with the metal electrode. . For example,
AlGaAs, AlGaInAs, AlGaInP, G
aInAsP, AlGaInN, BeMgZnSe, M
General III- such as gZnSSe and CdZnSeTe
Group V and II-VI semiconductors can be used. The lower limit of the carrier density is preferably 1 × 10 ¹⁸ cm ⁻³ or more,
3 × 10 ¹⁸ cm ^-3 or more is more preferable, and 5 × 10 ¹⁸ cm
^-3 or more is most preferred. The upper limit is preferably 2 × 10 ²⁰ cm ⁻³ or less, more preferably 5 × 10 ¹⁹ cm ⁻³ or less, and 3 × 10 ¹⁹ cm ⁻³ or less.
× 10 ¹⁸ cm ^-3 or less is most preferable. Contact layer 29
Is preferably 0.1 to 10 μm, more preferably 1 to 8 μm, and most preferably 2 to 6 μm.

The side surfaces and part of the upper surface of the ridge on which the contact layer is formed can be further covered with a protective film for the purpose of preventing oxidation and the like. Also in this case, the resistance of the entire device can be reduced as compared with the case where the protective film is not formed on the side surface of the ridge. In particular, AlGaInP
The use of a material having a high specific resistance (particularly in the p-type) such as an AlGaInN-based material is effective in reducing the resistance of the entire device.

According to the present invention, a part of the ridge type compound semiconductor layer having a smaller refractive index than the active layer formed on the opening portion is over the protective film, that is, inside the opening portion and at least on both sides of the opening portion. It is preferable that the second conductive type second clad layer 20 is formed on a part of the protective film. The lower limit of the overlapping portion of the second conductive type second cladding layer 20 on the protective film 18 is preferably 0.01 μm, more preferably 0.1 μm or more, and the upper limit is less than 2.0 μm (2.0 μm
Is more preferable, and 1.0 μm or less is more preferable.
By adopting such an embodiment, it is possible to improve the controllability of the light distribution that seeps into the vicinity of the boundary between the protective film 18 and the bottom of the ridge, or to reduce the light absorption of the contact layer formed on the side surface of the ridge. be able to. In this case, unlike the conventional ridge waveguide laser, it is not necessary to form the protective film 18 on the side surface of the ridge, which is effective in simplifying the process and reducing the cost.

In the present invention, the distribution of light that grows so that the second conductive type second cladding layer 20 of the regrown portion covers the upper surface of the protective film 18 made of an insulator and leaks into the vicinity of the protective film 18 and the ridge. The contact layer 21 is grown on substantially the entire surface of the regrowth portion on the second conductivity type second cladding layer 20 on which growth is possible to suppress the oxidation of the side surface of the cladding layer. It is particularly preferable to increase the contact area with the electrode on the surface side to reduce the contact resistance with the electrode. The growth of the cladding layer and the contact layer of these regrowth portions so as to cover the upper portion of the insulating film may be performed independently, or both may be combined. Furthermore, when the ridge is formed by regrowth, in order to improve the controllability of the composition, carrier concentration and growth rate of the ridge, a ridge dummy layer having a larger area than the ridge to which the current is injected is not used. It is also possible to provide. At this time, a thyristor structure or the like, which is insulated from an oxide film or the like, is formed in the ridge dummy layer in order to prevent the passage of current. Further, when the current injection stripe is formed on the off-substrate in the direction perpendicular to the off-direction by the manufacturing method of the present invention, the ridge for regrowth is asymmetrical in the left and right direction, but more than the conventional semiconductor block layer. The difference in the refractive index between the protective film and the cladding layer in the ridge can be easily increased, or the cladding layer in the regrown portion can be grown so as to cover the upper surface of the protective film by appropriately selecting the stripe direction. As a result, the symmetry of the distribution of light seeping into the vicinity of the protective film and the ridge is good, and stable fundamental transverse mode oscillation up to high output can be obtained. As described above, the present invention is applicable to various semiconductor optical device devices having a ridge stripe type waveguide structure.

The semiconductor of the present invention having a ridge dummy region
Refer to FIG. 6 for a preferable dimensional range in the optical device device.
I will explain while. In FIG. 6, a₁And a_TwoIs protected
W is the width of the film, and W is the width of the opening formed in the protective film.
You. The width d is a₁+ A_Two+ W and b₁And b_TwoIs ridge
Length of area not covered with protective film for dummy area formation
It is. e₁And e_TwoIs the current block below the active layer.
C is the length of the lock region or current block layer,
Area sandwiched between the flow block layer and the current block area
Is the width of d₁And d_TwoIs the difference between the middle point of W and the middle point of C
Indicates the width. d ₁Is that the midpoint of C is more a₁Beside
It is the deviation width that exists when there is deviation (as shown in the figure)
R), d_TwoIs that the midpoint of C is more a than the midpoint of W_TwoOff to the side
Is a deviation width that exists when the position is changed (not shown).

A preferred range of d ₁ and d ₂ is 0 ≦ d ₁ ≦ (W + a ₁ ) / 2 0 ≦ d ₂ ≦ (W + a ₂ ) / 2, and a more preferred range is 0 ≦ d ₁ ≦ (W + a). ₁ ) / 4 0 ≦ d ₂ ≦ (W + a ₂ ) / 4. When d ₁ or d ₂ is within the above preferred range, there is an advantage that the current injection into the opening 19 becomes uniform. A preferred range of e ₁ and e ₂ is b ₁ ≦ e ₁ ≦ b ₁ + a ₁ + W / 2 b ₂ ≦ e ₂ ≦ b ₂ + a ₂ + W / 2, and a more preferred range is b ₁ ≦ e ₁ ≦ b ₁ is a _{+ a 1 b 2 ≦ e 2} ≦ b 2 + a 2. When e ₁ and e ₂ are equal to or more than the above preferable lower limits, current leakage inside the device can be suppressed.

A preferable range of C is W / 2 ≦ C ≦ W + a ₁ + a ₂ , and a more preferable range is W / 2 ≦ C ≦ W + (a ₁ + a ₂ ) / 2. If C is equal to or more than the above preferable lower limit, there is an advantage that the current injection into the opening 19 becomes uniform. b ₁
And b ₂ are preferably in the following range: a ₁ ≦ b ₁ ≦ 3L / 4 a ₂ ≦ b ₂ ≦ 3L / 4, and more preferably 2a ₁ ≦ b ₁ ≦ L / 2 2a ₂ ≦ b ₂ ≦ L / 2. If b ₁ and b ₂ are equal to or more than the above preferable lower limit, there is an advantage that the controllability of the ridge shape is improved,
Below the preferred upper limit, there is an advantage that the symmetry of the ridge dummy region is improved.

On the outer side of the protective film covering both sides of the stripe region, a current block layer made of a semiconductor, a dielectric or the like can be formed. That is, a current block layer can be formed in the ridge dummy region. The current blocking layer may be formed so as to ride on the protective film, or conversely, the protective film may be formed so as to ride on the current blocking layer. In order to prevent current leakage at the boundary between the protective film and the current block layer, it is more preferable that the current block layer be formed so as to ride on the protective film. By forming such a current block layer, the yield at the time of cleavage and assembling can be improved, the stress on the ridge portion when assembling by junction down can be reduced, and the life can be extended.

The type of the current blocking layer is not particularly limited as long as it is a material that can concentrate the current on the ridge portion and cause laser oscillation only at the ridge portion. For example, A
lGaAs, AlGaInP, GaInPAs, AlG
A general group III-V or group II-VI semiconductor such as aInN, BeMgZnSSe, or CdZnSeTe can be used. If the thickness of the current blocking layer is too large, for example, the controllability of the ridge stripe width is deteriorated. Therefore, the lower limit of the thickness of the current blocking layer is 100 nm or more, preferably 30 nm.
It is 0 nm or more, particularly preferably 500 nm or more, and the upper limit is 2000 nm or less, preferably 1500 nm or less. By controlling the thickness within a range determined by appropriately selecting the upper and lower limits according to the purpose of use and the like, a preferable semiconductor optical device can be manufactured. The current blocking layer may be an insulating layer, but is preferably a semiconductor layer. In this case, the conductive semiconductor layer is preferably a first conductive semiconductor layer or a high-resistance semiconductor layer. The lower limit of the carrier concentration is 1 × 10 ¹⁷ cm ⁻³ or more, preferably 5 × 10 ¹⁷ cm ^−3.
10 ¹⁷ cm ⁻³ or more, particularly preferably 7 × 10 ¹⁷ cm ⁻³ or more, and the upper limit is 1 × 10 ¹⁹ cm ⁻³ or less, preferably 5 × 10 ¹⁸ cm ⁻³ or less, and particularly preferably ³ × 10 ¹⁸ cm ⁻³ or less. ¹⁸ cm
^-3 or less. By controlling the carrier concentration within a range determined by appropriately selecting these upper and lower limits according to the purpose of use and the like, a preferable semiconductor optical device can be manufactured.

The width d (FIG. 6) of the protective film when growing the current blocking layer and the repetition width L of the protective film (FIG. 6) are not particularly limited. However, it is preferable that the ratio d / L of the width d of the protective film to the repetition width L of the protective film is 0.002 to 0.5 because the thickness of the ridge and the carrier concentration can be easily controlled. When forming a ridge by forming an opening for forming a ridge in the protective film after forming the current blocking layer first, an opening needs to be formed in the protective film later. Is close to the width W of the opening, it is difficult to open the opening with high accuracy, and it becomes impossible to perform selective growth such that the ridge portion or the ridge dummy region rides on the protective film. At this time, when the width D of the protective film for ridge regrowth is defined as D = (d−W) / 2, the width of the protective film D is not particularly limited, but the lower limit is preferably 5 μm for the above reason. Above, more preferably 7 μm or more, most preferably 10 μm or more, and the upper limit is preferably as long as the ratio d / L is satisfied.

The width D of the protective film and the repetition width L of the ridge portion are not particularly limited.
And the ratio D / L of the ridge portion to the repetition width L is 0.001.
It is preferable that the thickness be up to 0.25 because the thickness of the ridge portion and the carrier concentration can be easily controlled. Here, the width D of the protective film and the repetition width L of the ridge portion are the same width if the width in each repetition unit is the same. An average value may be used.

The direction of the off-angle is preferably within ± 30 °, more preferably within ± 7 °, from the direction perpendicular to the direction in which the opening 19 formed in the protective film 18 extends (longitudinal direction). , ± 2 ° is most preferable. The direction of the opening is such that the plane orientation of the substrate is (100).
In this case, it is preferable to extend in [01-1] or a direction equivalent thereto or a direction crystallographically equivalent thereto.
In that case, most of the side surfaces of the ridge often become the (311) A plane, and the contact layer 21 can be grown on substantially the entire surface of the second cladding layer 20 that forms the ridge and can be grown. . This tendency is due to the fact that the second conductivity type second cladding layer 20 is made of AlGaAs, especially AlAs mixed crystal ratio of 0.2 to 0.2.
1.0, preferably 0.3 to 0.9, most preferably 0.4 to 0.8. The off-angle direction is ± 10 degrees from the [011] direction or a direction equivalent thereto.
A direction within 30 ° is preferred, a direction within ± 7 ° is more preferred, and a direction within ± 2 ° is most preferred. In this specification, the “[01-1] direction” refers to a general III-V or II-VI group semiconductor.
[11] existing between the (100) plane and the [01-1] plane
The [01-1] direction is defined such that the [-1] plane is a plane in which a group V or group VI element appears, respectively.

The embodiment of the present invention is not limited to the case where the opening 19 is in the [01-1] direction. For example, when the opening extends in the [011] direction or a direction crystallographically equivalent thereto, for example, the growth rate can have anisotropy depending on the growth conditions, and the growth rate is high in the (100) plane.
It can be made to hardly grow on the (111) B plane. In that case, the second side having the (111) B surface as a side surface
A conductive type second cladding layer is formed. Also in this case, the next time the contact layer is formed, by selecting a condition under which a more isotropic growth occurs, the contact layer is entirely formed on the side surface composed of the (111) B plane as well as the top of the (100) plane. It is formed.

For the same reason, when a wurtzite type substrate is used, the direction in which the opening extends is, for example, (0
On the (001) plane, [11-20] or [1-100] is preferable. HVPE (Hydride Vapor P
Hase epitaxy) may be in either direction, but in MOVPE, the [11-20] direction is more preferable.

In designing the semiconductor optical device of the present invention, first, the thickness of the active layer and the composition of the cladding layer are determined to obtain a desired vertical divergence angle. Usually, when the vertical divergence angle is reduced, light seepage from the active layer to the cladding layer is promoted, the light density at the end face is reduced, and the optical damage (COD) level at the output end face can be improved. When high-output operation is required, it is set relatively narrow, but the lower limit is to suppress an increase in oscillation threshold current due to a reduction in light confinement in the active layer and a decrease in temperature characteristics due to carrier overflow. There is a limit, and the lower limit is preferably 15 ° or more, more preferably 17 ° or more, and most preferably 19 ° or more. Upper limit is 33 °
Or less, more preferably 31 ° or less, and most preferably 30 ° or less.

Next, when the vertical divergence angle is determined, the structural parameters that largely govern the high output characteristics are the distance dp between the active layer and the current blocking layer and the width at the bottom of the opening (hereinafter referred to as “opening width”) W Becomes When only the second conductivity type first cladding layer exists between the active layer and the current blocking layer, dp is the thickness of the second conductivity type first cladding layer. When the active layer has a quantum well structure, the distance between the active layer closest to the current block layer and the current block layer is dp.

The upper limit of dp is preferably 0.50 μm or less, more preferably 0.45 μm or less, and 0.45 μm or less.
0 μm or less is most preferable. The lower limit is preferably 0.03 μm or more, more preferably 0.1 μm or more, and 0.1
5 μm or more is most preferable. However, if the purpose of use (where the spread angle is set, etc.), material system (refractive index, resistivity, etc.) is different, the above-mentioned optimum range is slightly shifted. It should also be noted that this optimum range affects each of the above structural parameters.

The upper limit of the opening width W at the bottom of the opening is 1
It is preferably at most 00 μm, more preferably at most 50 μm. The lower limit is preferably 1 μm or more, more preferably 1.5 μm or more,
Most preferably, it is 2 μm or more.

To realize a high output operation, it is effective to increase the opening width W at the bottom of the opening from the viewpoint of reducing the light density at the end face. However, in order to reduce the operating current, the opening width is reduced. Is preferable from the viewpoint of reducing the waveguide loss. Therefore, the opening width W2 near the center serving as the gain region
Is relatively narrow, and the opening width W1 near the end is relatively wide, so that a low operation current and a high output operation can be realized at the same time, and high reliability can be secured. 7 (a)). That is, the end (cleavage plane) width W
For 1, the upper limit is preferably 1000 μm or less, more preferably 500 μm or less. The lower limit is preferably 2 μm or more, more preferably 3 μm or more. The upper limit of the center width W2 is 1
It is preferably at most 00 μm, more preferably at most 50 μm. The lower limit is preferably 1 μm or more, more preferably 1.5 μm or more,
Most preferably, it is 2 μm or more. Edge width W1
The upper limit of the difference between the width W2 and the center width W2 is preferably 1000 μm or less, and more preferably 500 μm or less. The lower limit is preferably 0.2 μm or more, more preferably 0.5 μm or more.

Further, in order to make the transverse mode a single mode (transverse light intensity distribution of a single peak), the end width W1
Is preferably 7 μm or less, more preferably 6 μm or less, and even more preferably 4 μm or less. Center width W
The upper limit of 2 is preferably 6 μm or less, more preferably 5 μm or less. Regarding the difference between the end width W1 and the center width W2,
The upper limit is preferably 5 μm or less, more preferably 3 μm or less, and most preferably 2 μm or less. For the lower limit, 0.
It is preferably at least 2 μm, more preferably at least 0.5 μm. By being characterized in that the far-field image has a single peak, a laser suitable for a wide range of uses such as information processing and optical communication can be provided. In the present invention, the thickness of the first cladding layer of the second conductivity type formed between the active layer and the protective film is set to 0.10 to 0.50 μm so that the opening width (stripe width) is high. It becomes easy to realize the output operation.

In order to achieve a laser with a nearly circular beam while maintaining high reliability, it is necessary to control the above dp and W within an appropriate range with good controllability. In order to realize a nearly circular beam, it is effective to reduce the aperture width. However, when the aperture width is reduced, the injection current density is not preferable from the viewpoint of suppressing bulk deterioration. Therefore, by reducing the width of the central portion W2, which is the gain region, to a relatively large value and the portion near the end portion to a relatively small value, beam spot reduction and low operating current can be realized at the same time, and high reliability is secured. (FIG. 7B). That is, the upper limit of the end (cleavage plane) width W1 is preferably 10 μm or less, more preferably 5 μm or less,
It is most preferably 3 μm or less. Lower limit is 0.5μ
m or more, more preferably 1 μm or more. The upper limit of the center width W2 is 100
μm or less, and more preferably 50 μm or less. The lower limit is preferably 1 μm or more, more preferably 1.5 μm or more, and 2 μm or more.
Most preferably, it is at least m. The upper limit of the difference between the end width W1 and the center width W2 is preferably 100 μm or less, more preferably 50 μm or less. The lower limit is preferably 0.2 μm or more, more preferably 0.5 μm or more.

The length of the above-described gradually increasing portion, gradually decreasing portion, and end portion may be designed according to desired characteristics.
10 μm is preferable, and 10 to 50 μm is more preferable.
The length of the end portion is preferably from 5 to 30 μm, more preferably from 10 to 20 μm, from the viewpoint of cleavage accuracy. However, if necessary, the window may be manufactured as follows. (1) The opening width or length of the end portion, the gradually increasing portion or the gradually decreasing portion is asymmetric on both sides of the chip. (2) An area in which the width of the end is constant is not set, but is gradually increased or decreased to the end. (3) One side of the end face (normally, high-output light extraction (front end face)
Side), the opening width of which gradually increases or decreases. (4) The width of the end opening differs between the front end face and the rear end face. (5) A combination of some of the above (1) to (4). In addition, by not providing an electrode near the end face, suppressing bulk deterioration due to current injection into the opening near the end face and reducing the recombination current at the end face can be achieved with a small spot diameter with high reliability. It is effective from the viewpoint of laser production.

Normally, when the stripe width is determined by etching the semiconductor layer (particularly wet etching), a specific surface is likely to be selectively formed. Therefore, if the stripe width is gradually reduced, the stripe edge fluctuates. As a result, the edge of the stripe changes stepwise,
The undulation of the step-like edge easily causes disturbances such as ripples and large side peaks in the horizontal far-field image. On the other hand, in the present invention, since the stripe width gradually increasing or decreasing portion is formed by etching the SiNx amorphous film, the stripe width can be linearly increased or decreased. Unimodal peaks can be easily obtained.

The method for manufacturing the semiconductor optical device of the present invention is not particularly limited. What is manufactured by any method is included in the scope of the present invention as long as it satisfies the requirements of claim 1 described above.

In manufacturing the semiconductor optical device of the present invention, a conventionally used method can be appropriately selected and used. The method of growing the crystal is not particularly limited. For the crystal growth of the double hetero structure and the selective growth of the current block layer, the metal organic chemical vapor deposition (MOC)
A known growth method such as a VD method, a molecular beam epitaxy method (MBE method), a hydride or halide vapor phase growth method (VPE method), and a liquid phase growth method (LPE method) can be appropriately selected and used.

As a preferred manufacturing method, a step of forming a current blocking region or a current blocking layer inside or above the substrate, a step of forming a compound semiconductor layer including an active layer and a protective film in this order, and forming an opening in the protective film. The method of manufacturing a semiconductor optical device according to the present invention includes a step of forming and a step of selectively growing a ridge type compound semiconductor layer in the opening.

The specific growth conditions and the like of each layer vary depending on the composition of the layer, the growth method, the shape of the apparatus, and the like.
The double hetero structure has a growth temperature of about 650 to 750 ° C,
V / III ratio: about 20 to 60 (in the case of AlGaAs) or about 300 to 600 (InGaAsP, AlGa
In the case of InP), the current blocking layer has a growth temperature of 600 to 7
00 ° C., V / III ratio of about 40 to 60 (in the case of AlGaAs) or about 350 to 550 (InGaAsP,
In the case of AlGaInP), the current block region has a growth temperature of 500 to 700 ° C. and a V / III ratio of about 20 to 80 (Al
GaAs) or about 300-600 (InG
The heat treatment (annealing) is preferably performed at 600 to 800 ° C. for 3 hours or less in the case of aAsP or AlGaInP.

In particular, the portion selectively grown using the protective film is A
When Al is contained like lGaAs and AlGaInP,
It is very preferable to introduce a small amount of HCl gas during the growth, because the deposition of poly on the mask can be prevented. If the Al composition is higher, or the mask width or the mask area ratio is larger, and other growth conditions are constant, poly deposition is prevented and selective growth is performed only on the exposed portion of the semiconductor surface (selective mode). The amount of HCl introduced required for this increases. On the other hand, if the introduction amount of the HCl gas is too large, the growth of the AlGaAs layer does not occur, and the semiconductor layer is etched instead (etching mode). The amount of HCl introduced required to enter the etching mode increases. Therefore, the optimal amount of HCl introduced largely depends on the supply mole number of the group III raw material containing Al such as trimethylaluminum. Specifically, the ratio of the number of moles of HCl supplied and the number of moles of group III raw material containing Al (HC
l / III) has a lower limit of preferably 0.01 or more,
0.05 or more is more preferable, and 0.1 or more is most preferable. The upper limit is preferably 50 or less, more preferably 10 or less, and most preferably 5 or less. However, when the compound semiconductor layer containing In is selectively grown (in particular, HCl is introduced), it is easy to control the composition.

In the present invention, the width of the opening and the distance between the active layer and the protective film are set within an appropriate range, and a configuration is adopted in which the vertical spread angle of light is in a specific range. This makes it possible to provide a self-pulsation type semiconductor optical device.

As a semiconductor laser device using the semiconductor optical device of the present invention, a light source for information processing (usually AlG
aAs-based (wavelength around 780 nm), AlGaInP-based (wavelength 600 nm band), InGaN-based (wavelength 400 nm)
Signal light source for communication (usually 1.3 μm band, 1.5 μm with InGaAsP or InGaAs as active layer)
communication semiconductor laser devices such as an m-band) laser, a fiber excitation light source (in the vicinity of 980 nm using an InGaAs strained quantum well active layer / GaAs substrate, near 1480 nm using an InGaAsP strained well active layer / InP substrate), and the like; In particular, there can be mentioned a variety of devices that require a high output operation. In addition, even for communication lasers,
A laser having a circular shape is effective in increasing the coupling efficiency with the fiber. A laser having a single peak in the far-field image can be used as a laser suitable for a wide range of uses such as information processing and optical communication. The semiconductor optical device of the present invention can be applied not only to a semiconductor laser but also to optical elements such as a semiconductor optical amplifier, a photodetector, an optical modulator, and an optical switch, and an integrated device thereof.

Further, the present invention can be applied to an edge emitting type light emitting diode (LED) other than the semiconductor laser.

[0091]

The present invention will be described more specifically with reference to the following examples and test examples. Materials, reagents, ratios, operations, and the like shown in the following examples can be appropriately changed without departing from the spirit of the present invention. Therefore, the scope of the present invention is not limited to the following specific examples. Example 1 In this example, a semiconductor optical device was manufactured by forming each layer in the order shown in FIG.
8 (a) to 8 (f), there are portions where the dimensions are intentionally changed in order to facilitate understanding of the structure, but the actual dimensions are as described in the following text.

In order to form a current blocking region by impurity diffusion, first, an n-type GaAs (n = 1 × 10 ¹⁸ cm ⁻³ ) substrate 10 having a thickness of 350 μm and a surface of (100) plane
On the surface of No. 1, a 100 nm-thick SiNx protective film is deposited by plasma CVD, and a rectangular SiN in the [01-1] B direction is formed by photolithography and etching.
An x protective film 106 was formed (FIG. 8A). Note that [0
1-1] In the B direction, in a general group III-V compound semiconductor, the (11-1) plane existing between the (100) plane and the (01-1) plane is a plane where a group V element appears. Define it as is. At this time, the SiNx protective film is etched by wet etching with a buffered hydrofluoric acid solution or SF ₆ ,
Dry etching using a gas such as CF ₄ was used. The length of the rectangular SiNx protective film was 760 μm, the width was 20 μm, the horizontal space interval of the rectangular protective film was 480 μm, and the vertical space interval was 40 μm.

This striped SiNx protective film 106
A 0.5 μm-thick high-concentration p-type Al _0.7 Ga _0.3 As (Zn-doped: p = 1 × 10 ²⁰ cm ⁻³ ) impurity diffusion layer 107 having a thickness of 0. 1 μm undoped GaAs cap layer 108
Formed at 80 ° C.

After that, annealing (7
(15 ° C., 1 hour) to remove impurities (Z) from the surface of n-type GaAs substrate 101 to a depth of about 0.7 μm
n) Perform diffusion to form a p-type current block region (1 × 10 ¹⁹ c
m ⁻³ ) (FIG. 8B). This annealing step for impurity diffusion was continuously performed in the same MOCVD apparatus as the selective growth step of the impurity diffusion layer 107 and the cap layer 108. For this reason, the manufacturing process was simplified, and the distribution of Zn impurities was also highly reproducible.
By the annealing step, the impurities diffused into the shaded regions in FIG. At this time, III in FIG.
In the section taken along the line III-III, the impurities diffused into regions except under the SiNx protective film 106 (FIG. 8C).

Next, the undoped GaAs cap layer 10
8. The high concentration p-type GaAs impurity diffusion layer 107 was removed by etching. At this time, the undoped GaAs cap layer 108 and the high-concentration p-type Al _0.7 Ga _0.3 As impurity diffusion layer 107 are partially removed with a phosphoric acid / hydrogen peroxide-based etchant, and the high-concentration p-type is removed with a hydrofluoric acid-based etchant.
The remainder of the type Al _0.7 Ga _0.3 As impurity diffusion layer 107 was removed, and etching was stopped on the surface of the n-type GaAs substrate 101. Then, the rectangular SiNx protective film 106 is wet-etched with a buffered hydrofluoric acid solution or SF ₆ , C
It was removed by dry etching using a gas such as F _4.

Next, the rectangular SiNx protective film 106 is removed.
N-type GaAs (n = 1 × 10 ¹⁸cm^-3) Substrate 10
1. An n-type A having a thickness of 2.0 μm was formed on the
l_{0. 35}Ga_0.65As (Si-doped: n = 1 × 10¹⁸cm
^-3), A double quantum well (D
QW) Active layer 103, p-type Al having a thickness of 0.25 μm_{0. 35}
Ga_0.65As (Be doped: p = 1 × 10¹⁸cm^-3) Or
P-type first cladding layer 104, 10 nm-thick p-type
GaAs (Be doped: p = 1 × 10¹⁸cm^-3) Oxidation prevention
A stop layer (etching stop layer) 105 was sequentially laminated. Double
The quantum well (DQW) active layer 103 has a thickness of 30 nm.
aAs light confinement layer (non-doped), 6 nm thick In
_0.2Ga_0.8As well layer (non-doped), G 8 nm thick
aAs barrier layer (non-doped), 6 nm thick In_0.2
Ga_0.8As well layer (non-doped) and 30 nm thick
Structure in which GaAs light confinement layers (non-doped) are sequentially laminated
Has structure.

Thereafter, a SiNx protective film 109 having a thickness of 100 nm is formed on the surface of the double hetero substrate by plasma CV.
D and photolithography [01
-1] Stripe-shaped opening 1 with B direction as the longitudinal direction
An SiNx film having a thickness of 10 (the p-type GaAs antioxidant layer 105 was exposed) was formed (FIG. 8D). The width of the stripe-shaped opening was 2.5 μm, the width of the SiNx film on both sides of the stripe-shaped opening was 20 μm, and the horizontal space interval between the stripe-shaped openings was about 500 μm.

Thereafter, a thickness of 1.8 μm is formed by MOCVD.
m p-type Al _0.4 Ga _0.6 As (Zn doped: p = 1 × 1
0 ¹⁸ cm ⁻³ ) and a 0.5 μm-thick p-type GaAs (Zn-doped: p = 2 × 1)
A contact layer 112 of 0 ¹⁹ cm ⁻³ ) was grown (FIG. 8E). In the above MOCVD method, III
Group materials include trimethylgallium (TMG), trimethylaluminum (TMA) and trimethylindium (T
MI), arsine and phosphine as group V raw materials, and hydrogen as carrier gas. Dimethyl zinc was used as the p-type dopant, and disilane was used as the n-type dopant. During the growth of the ridge, HCl gas is changed to HCl / I
The group II was introduced such that the molar ratio was 0.2, especially the molar ratio of HCl / TMA was 0.3.

Thereafter, the p-side electrode 113 was deposited and the substrate was thinned to 100 μm, and then the n-side electrode 114 was deposited and alloyed (FIG. 8 (f)). The wafer thus fabricated was cleaved at substantially the center of a current block region having a width of 40 μm, and cut into chip bars so as to form a laser light emitting end face (primary cleavage), thereby producing an end face non-injection structure laser. The resonator length at this time was 800 μm.
After applying an asymmetric coating of 5% front end face-95% rear end face, the chip was separated into chips by secondary cleavage. After assembling the chip with junction down, continuous energization at 25 ° C (C
In W), current-light output and current-voltage characteristics were measured.

When the current-light output characteristics of the window structure laser device manufactured as described above were examined, the light output increased with an increase in the operating current. Output was obtained. However, even if the operating current is further increased, the light output does not increase, and the light output is limited by heat saturation due to heat generation of the element itself. The oscillation wavelength is 970 nm on average, the threshold current is 20 mA on average, and the slope efficiency is 0.83 mW on average.
/ MA, and the characteristics were very good. Also, 25
At 0 mW output, the vertical spread angle was 29 ° on average, and the horizontal spread angle was 8.5 ° on average. At this time, it was found that the astigmatic difference could be made as very small as 2 μm or less, and the light source would be excellent in optical coupling characteristics with an optical fiber. Furthermore, high reliability (high temperature of 70 ° C, 200mW,
It has been found that stable operation for 3000 hours or more at high output) can be obtained. Further, since the opening for current injection is formed by the etching stopper layer (antioxidant layer) 105, the uniformity of the element structure can be improved, and the above-described semiconductor laser element can be manufactured with high yield. did it.

Example 2 In this example, a semiconductor optical device was manufactured by forming each layer in the order shown in FIG. 9 (a) to 9 (e), there are portions where the dimensions are intentionally changed in order to facilitate understanding of the structure, but the actual dimensions are as described in the following text. Rectangular S formed on substrate for impurity diffusion
Example 1 except that the vertical length of the iNx protective film was 750 μm and the vertical space interval was 50 μm.
Double hetero growth was performed in the same procedure as described above. Thereafter, in order to fabricate the end face window structure, impurities were diffused in the vicinity of the end by the following procedure, and the quantum well layer was mixed. That is, a SiNx protective film 206 having a thickness of 100 nm is deposited on the surface of the double hetero substrate by plasma CVD, and the SiNx protective film 206 having a stripe-shaped opening in the [011] A direction is formed by photolithography and etching (FIG. 9 (b)). At this time, wet etching using a buffered hydrofluoric acid solution or dry etching using a gas such as SF ₆ or CF ₄ was used for etching the SiNx protective film. The width of the stripe-shaped opening is 40 μm,
The space interval between the openings by the SiNx film is 760 μm.
m.

By selectively growing the stripe-shaped openings using the MOCVD method, a 0.5 μm thick high-concentration p-type A
l _0.7 Ga _0.3 As (Zn doped: p = 1 × 10 ²⁰ c
m ^-3 ) An impurity diffusion layer 207 and an undoped GaAs cap layer 208 having a thickness of 0.1 μm were formed at 580 ° C.

Thereafter, annealing (700 ° C., 1 hour) is performed in the same MOCVD apparatus, thereby forming p-type GaAs.
Impurity (Zn) diffusion was performed from the surface of the surface protective layer to a depth of 0.4 μm (FIG. 9B). This annealing step was continuously performed in the same MOCVD apparatus as the step of selectively growing the impurity diffusion layer 207 and the cap layer 208. For this reason, the manufacturing process was simplified, and the distribution of Zn impurities was also highly reproducible. Due to the annealing step, the impurities diffused into the shaded region in FIG. 9B, and the diffusion front position on the element end face reached the inside of the n-type cladding layer 202 immediately below the opening. At this time, when the composition profile in the depth direction was analyzed by Auger electron spectroscopy while performing Ar sputtering, the double quantum well (DQW)
It was found that mixed crystal formation occurred in the active layer 203. This is because the diffusion of Zn in a high concentration (~1x10 ¹⁹ cm ^-3), the In _0.2 Ga _0.8 As well layers and GaAs barrier layer and the guide layer, because interdiffusion (intermixing) occurs. Also, when the emission wavelength from the active layer was measured by the photoluminescence (PL) method, the PL peak wavelength was shortened by 40 nm (changed from 970 nm to 930 nm) in the Zn-diffused (ie, mixed crystal) region. Was confirmed. That is, since it was found that the band gap was enlarged (55 meV), it was confirmed that the window structure was formed at the laser light emitting end face.

Next, the undoped GaAs cap layer 20
8 and the high concentration p-type GaAs impurity diffusion layer 207 were removed by etching. At this time, the undoped GaAs cap layer 20 is etched with a phosphoric acid / hydrogen peroxide based etchant.
8 and high concentration p-type Al _0.7 Ga _0.3 As impurity diffusion layer 2
07, the remainder of the high-concentration p-type Al _0.7 Ga _0.3 As impurity diffusion layer 207 was removed with a hydrofluoric acid-based etchant, and etching was stopped at the surface of the p-type GaAs surface protective layer 205. Thereafter, the rectangular SiNx protective film 206 was removed by wet etching using a buffered hydrofluoric acid solution or by dry etching using a gas such as SF ₆ and CF ₄ .

Thereafter, a SiNx protective film 209 having a thickness of 100 nm is formed on the surface of the double hetero substrate by plasma CV.
D and photolithography [01
-1] Stripe-shaped opening 2 with B direction as the longitudinal direction
An SiNx film having a thickness of 10 (the p-type GaAs oxidation preventing layer 205 was exposed) was formed (FIG. 9C). The width of the stripe-shaped opening was 2.5 μm, the width of the SiNx film on both sides of the stripe-shaped opening was 20 μm, and the horizontal space interval between the stripe-shaped openings was about 500 μm.

Thereafter, the p-type second cladding layer 211 and the p-type GaAs contact layer 212 are formed in the same procedure as in the first embodiment.
Is grown (FIG. 9D), and the p-side electrode 213 and n
The side electrode 214 was formed (FIG. 9E). The wafer thus fabricated is cleaved at almost the center of the impurity diffusion region having a width of 40 μm, and cut into chip bars so as to form a laser light emitting end face having a cavity length of 800 μm (primary cleavage). Produced. After applying an asymmetric coating of 5% at the front end face-95% at the rear end face, the chip was separated into chips by secondary cleavage, and the chips were assembled by junction down. The current-light output and the current-voltage characteristics under continuous conduction (CW) at 25 ° C. were excellent as in Example 1.
Furthermore, it was found that extremely high reliability (stable operation for 3000 hours or more at 70 ° C., high temperature of 300 nW, high output) was obtained by the effects of the end face window structure and the end face non-injection.

Example 3 In this example, a semiconductor optical device was manufactured by forming each layer in the order shown in FIG. 10A to FIG. 10E,
Some parts are intentionally changed in size to make it easier to grasp the structure, but the actual dimensions are as described in the following text.

In order to form a current block region, first, a 100-nm-thick SiNx is formed on a 350-μm-thick GaAs substrate 301 which is turned off by 10 ° in the [0-1-1] A direction from the (100) plane. A protective film 307 is deposited by plasma CVD, and striped Si in the [01-1] direction by photolithography and etching.
An Nx film 307 was formed (FIG. 10A). At this time,
For the etching of the SiNx protective film 307, wet etching using a buffered hydrofluoric acid solution or the like or dry etching using a gas such as SF ₆ or CF ₄ was used. The lateral width of the striped SiNx protective film was set to 20 μm, and the horizontal space interval of the striped protective film was set to 280 μm.

A 1-μm thick high-concentration p-type GaAs (Zn-doped: p = 1 × 10 ¹⁹ cm) is formed around the rectangular SiNx protective film 307 by selective growth using MOCVD.
^-3 ) The current block layer 308 was formed at 650 ° C. Thereafter, the striped SiNx protective film 307 was removed by wet etching using a buffered hydrofluoric acid solution or by dry etching using a gas such as SF ₆ or CF ₄ .

Next, the G on which the current block layer 308 is formed is formed.
On the aAs substrate 301, a thickness of 0.
2 μm Si-doped n-type GaAs buffer layer (n = 1x
10 ¹⁸cm^-3) (Not shown), 1.5 μm thick Si
N-type Al_0.75Ga_0.25As first cladding layer (n = 1
x10¹⁸cm^-3) 302, 0.25 μm thick Si
N-type (Al_0.7Ga_0.3)_0.5In_0.5P second cladding layer
(N = 1 × 10¹⁸cm ^-3) 303, 50 nm thick non
Dope (Al_0.5Ga_0.5)_0.5In_0.5There is a P light guide layer
Or 5 nm thick non-doped (Al_0.5Ga_0.5)_0.5I
n_0.5Non-dose of 5-6 nm thickness sandwiched between P barrier layers
Ga_0.44In_0.56Triple quantum well consisting of P well layers (three layers)
Well (TQW) active layer 304, 0.3 μm thick Zn
P-type (Al_0.7Ga_0.3)_0.5In_0.5P first cladding
Layer (p = 7 × 10¹⁷cm^-3) 305, 5 nm thick Zn
Doped p-type Ga_0.5In_0.5P oxidation prevention layer (p = 1 × 10
¹⁸cm^-3) 306 is sequentially laminated to double
Formed a terrorist structure.

At this time, it is preferable to select a composition of the antioxidant layer 306 so as not to absorb the light recombined by the active layer in order to reduce the threshold current, but it is intentionally used for self-pulsation. It is also possible to absorb light and use it as a saturable absorption layer. In order to prevent light from being absorbed, the composition of the Ga _x In _{1 -x} P antioxidant layer 306 is changed to the Ga-rich side (X = 0.5 to 1), or a small amount of Al is added (( Al _X Ga _1-X ) _0.5 I
n _0.5 P, X = about 0.1 to _0.2 ) is more effective.

Next, an insulating SiNx protective film (refractive index: 1.9, wavelength: around 650 nm) 309 is deposited on the surface of the double hetero substrate to a thickness of 200 nm, and an off-angle direction is formed on the SiNx protective film 309 by photolithography. A striped opening 310 having a width of 3.5 μm was opened in the [01-1] B direction orthogonal to the above. The width of each of the SiNx protective films on the left and right sides of the stripe-shaped opening is 20 μm, and the horizontal space interval between the stripe-shaped openings is about 300 μm.
m (FIG. 10 (c)).

The stripe-shaped opening 310 has an MO
By selective growth using the CVD method, a Zn-doped p-type Al _0.77 Ga _0.23 As cladding layer having a height of 2.0 μm at the center of the ridge (p = 1.5 × 10 ¹⁸ cm ⁻³ ; refractive index 3.3, wavelength 655 nm) 311 and 0.5 μm thick Zn-doped G
A ridge made of the aAs contact layer 312 was formed.
At the same time, the ridge dummy region outside the protective film also
n-doped p-type Al _0.77 Ga _0.23 As cladding layer (p =
1.5 × 10 ¹⁸ cm ⁻³ ; refractive index 3.3, wavelength 655 n
m) A 311 and Zn-doped GaAs contact layer 312 were grown (FIG. 10D). At this time, most of the side surfaces of the ridge are often (311) A plane or a plane close to the (311) A plane, and the cladding layer of the regrown portion is grown so as to cover the upper surface of the protective film made of an insulator. A contact layer 312 on substantially the entire surface of the cladding layer on which growth is possible.
Grew. SEM observation confirmed that the ridge-shaped p-type second cladding layer 311 was formed so as to overlap the SiNx protective film 309 by about 0.4 μm.
In all stripe widths, the p-GaAs contact layer covered the entire side wall of the ridge. By forming such a structure, the controllability of the distribution of light seeping into the vicinity of the protective film 309 and the ridge is improved, the surface oxidation due to the exposure of the side surface of the cladding layer is suppressed, and the electrode on the epitaxial surface side is connected. Was increased, and the contact resistance with the electrode was able to be reduced. This tendency is remarkable when the regrowth ridge portion is AlGaAs, particularly when the AlAs mixed crystal ratio (Al composition) is 0.2 to 0.9, preferably 0.3 to 0.8.

It is to be noted that there is no particular problem if a part or the whole of the ridge side wall is covered with the SiNx protective film as in the conventional method after the ridge growth, but in this embodiment, the process is simplified and the contact resistance is reduced. In consideration of the above, a protective film made of a dielectric or the like was not formed on the side surface of the ridge. Due to the influence of the off-angle of the substrate, the ridge shape was slightly asymmetric (not shown).

In the above MOCVD method, the group III raw materials include trimethyl gallium (TMG), trimethyl aluminum (TMA) and trimethyl indium (TM
I), arsine and phosphine were used as group V raw materials, and hydrogen was used as a carrier gas. Dimethyl zinc was used as the p-type dopant, and disilane was used as the n-type dopant.
During the growth of the ridge, HCl gas is changed to HCl / III.
The group was introduced such that the molar ratio of the group was 0.2, particularly the molar ratio of HCl / TMA was 0.3.

Thereafter, a p-side electrode 313 was deposited and the substrate was thinned to 100 μm, and then an n-side electrode 314 was deposited and alloyed (FIG. 10E). The wafer thus fabricated was cleaved and cut into chip bars so as to form a laser light emitting end face (primary cleavage), thereby forming a laser resonator structure. The resonator length at this time was 500 μm. After applying an asymmetric coating of 10% of the front end face-90% of the rear end face, chips were separated by secondary cleavage. After assembling by chip junction down, current-light output and current-voltage characteristics were measured at 25 ° C. by continuous energization (CW). Very good current-voltage characteristics and current-output characteristics were exhibited, and the threshold value was 1.9 V, which was a low value corresponding to the band gap of the active layer, and it was confirmed that no high-resistance layer was present. Further, it was confirmed that the series resistance was as small as 5 to 6Ω and the contact resistance between the p-type contact layer and the p-type electrode was small. The laser of this embodiment can achieve a high output up to an optical output of 200 mW, and has an oscillation wavelength of 655 n on average.
m, the threshold current is 20 mA on average, and the slope efficiency is 0.85 mW / mA on average.
The average vertical divergence angle was 23 °, a far-field image (beam divergence angle) of a single peak as designed was obtained, and it was confirmed that the control of the light distribution was very good. From these results, it is considered that since the transverse mode is basically controlled by the SiNx insulating film, the adverse effect on the kink level and the like due to the slightly asymmetric regrowth ridge shape does not appear. In the specification of the present application, “single peak” does not necessarily mean that only one peak exists, but means that there is no other peak having an intensity of 1/10 or more of the maximum peak. In addition, even at the horizontal divergence angle, a good single-peaked peak without any ripple or side peak was obtained. From these results, it can be seen that the laser structure of the present invention is used as a light source for writing on an optical disk such as a DVD. In addition, high reliability (10 ° C at high temperature of 60 ° C. and 50 mW and high output)
(Stable operation for more than 00 hours). Further, since the openings are formed by selective growth, the uniformity of the opening width can be improved, and the above-described semiconductor laser device can be manufactured with a high yield. Also turned out to be small.

When a semiconductor laser device having a stripe-shaped opening wider than that of the present embodiment was manufactured, when the width became 5 μm or more, most of the devices were in a single transverse mode (transverse light with a single peak). It was also found that oscillation did not occur in the intensity distribution. Therefore, in order to realize single transverse mode oscillation, the width of the stripe-shaped opening must be 5
It has been found that the thickness is desirably not more than μm. Furthermore, as a result of confirming the region where high-output operation can be performed from the experimental results by simulation, it was found that the lateral effective refractive index step inside the active layer needs to be set to about 5 × 10 ^{−3 to} 1.3 × 10 ^−2. Was.

In this embodiment, the n-side cladding layer has a thickness
1.5 μm Si-doped Al_0.75Ga _0.25As the first class
Pad layer (n = 1 × 10¹⁸cm^-3) 302 and a thickness of 0.2
5 μm Si-doped n-type (Al_0.7Ga_0.3)_0.5In_0.5
P second cladding layer (n = 1 × 10¹⁸cm^-3) With 303
Although it has a two-layer structure, one layer of any composition
It may be structured. At this time, one n-side cladding layer
The thickness can be approximately the same as the thickness of two layers.
Also, in order to perfectly match the lattice with the GaAs substrate, A
A small amount of P is added to the lGaAs layer to form an AlGaAsP layer.
For example, Zn-doped p-type Al_0.75Ga_0.25
As cladding layer (p = 1.5 × 10¹⁸cm ^-3) Is Al
_0.75Ga_0.25As_0.97P_0.03It can also be. this
These modifications can be made appropriately within a range obvious to those skilled in the art.
Noh.

(Comparative Example) The laser device of this comparative example was manufactured by the same process as in Example 1 without forming a current block region. However, in order to perform current blocking, the SiNx insulating film 120 is formed on the p-type
Then, a 10-μm-wide striped window 121 was opened in the [0-1-1] A direction in the SiNx insulating film on the ridge stripe by photolithography. A laser device was manufactured in exactly the same manner as in Example 1 except for this (FIG. 11). As a result of cleavage and assembling, Si
Since the Nx film and the electrode are formed, problems such as poor cleavage and peeling of the electrode and the SiNx film occur. When the near-field image was confirmed, it was confirmed that the entire active layer was an optical device due to current leakage in the ridge dummy region, and many lasers whose current was not sufficiently confined by the SiNx insulating film were observed. Also, when assembled in a junction-down state, current leakage occurred, many of which could not have current-voltage characteristics occurred, sufficient laser characteristics could not be obtained, and the yield was reduced.

[0120]

According to the semiconductor optical device of the present invention, the current blocking region is formed below the active layer (for example, inside the substrate) or the current blocking layer is formed below the active layer (for example, on the substrate). Minimize the presence of protective film, cleavage,
It is possible to improve the yield of assembling and the like, and to obtain sufficient LD characteristics when assembling by junction down, and to further increase the irreversible optical damage (COD) level and improve the reliability of the device. it can.

By forming a current block region or a current block layer below the active layer and on both side surfaces of the optical waveguide, the solder material used when assembling by assembling by the sagging of the electrode on the side surface of the chip during the cleavage and the junction down. It is possible to prevent the occurrence of current leakage at the end face or side face of the optical waveguide due to wraparound or the like. At this time, the current blocking region or the current constriction region sandwiched between the current blocking layers is formed only in the vicinity immediately below the opening. Current leakage can be prevented, the process can be simplified, and device characteristics and reliability can be improved by improving heat dissipation. In addition, by forming a current block layer below the active layer (for example, on the substrate) and at least partially below the ridge dummy region, the ridge portion is made lower than at least a portion of the ridge dummy region. And the stress at the time of junction down assembly can be reduced.

When the current block region or the current block layer is formed below the active layer, the current block region can be formed near the end face. With this end current non-injection structure, it is possible to reduce current recombination at the end face, increase the irreversible optical damage (COD) level, and improve the reliability of the device. At this time, if the current blocking layer is formed near the end face and there is a step in the optical waveguide near the end face, light leaks from the active layer to a layer having a larger band gap such as the cladding layer near the end face, and In particular, the end face can be made transparent to light, that is, an end face window structure can be provided. On the other hand, when the current block region is buried flat under the active layer (for example, inside the substrate), no step occurs in the optical waveguide.
A current block region can also be formed near the end face,
It is possible to prevent optical waveguide loss at the end. For this reason,
INDUSTRIAL APPLICABILITY The present invention can be applied to a wide range of fields including a semiconductor laser and the like, and is particularly suitable for a light source used for information processing or an optical communication system.

In the device structure of the present invention, a ridge is formed by selective growth in a stripe region into which current is injected using a protective film made of an insulator, and no protective film made of an insulator is formed on the side surface of the ridge. Therefore, the stripe width can be linearly increased and decreased. In addition, since the ridge portion grows in the horizontal direction and is less susceptible to the undulation of the ridge in the tapered portion of the stripe, in the horizontal far-field image, good unimodal characteristics without ripples and side peaks Peaks are easily obtained. In addition, a contact layer is formed on substantially the entire surface including the top and side surfaces of the ridge portion formed by the growth, and the contact area between the contact layer and the electrode is increased, so that the contact resistance is reduced and the cladding layer on the ridge side wall is formed. Surface oxidation (especially when Al is included) is also prevented, and laser characteristics and reliability are improved.

Further, even when a substrate having a large off-angle with respect to a low-order plane orientation (such as (100)) is used to shorten the wavelength, as in the case of an AlGaInP / GaInP-based visible laser, the above-mentioned ridge conductor is used. A stable fundamental transverse mode can be obtained up to a high-output operation without substantially affecting the left-right asymmetry of the ridge shape in the wave-shaped laser by the left-right asymmetry of the light intensity distribution.

In the present invention, since the opening can be formed by selective growth, the uniformity of the opening width can be improved, and the semiconductor laser device can be manufactured with a high yield. In particular, the laser manufacturing method of the present invention is effective for manufacturing a laser having a small structural design margin.

[Brief description of the drawings]

FIG. 1 is a diagram showing a specific embodiment of a semiconductor optical device having a current blocking region according to the present invention.

FIG. 2 is a diagram showing a specific embodiment of a semiconductor optical device having a current blocking layer according to the present invention.

FIG. 3 is a view showing a structure of a conventional ridge waveguide type semiconductor laser having a stripe structure and a method of forming the same.

FIG. 4 is a diagram showing a state where the semiconductor optical device is assembled in a junction-down type.

FIG. 5 is a sectional view showing preferred dimensions of the semiconductor optical device of the present invention.

FIG. 6 is a sectional view showing preferred dimensions of the semiconductor optical device of the present invention.

FIG. 7 is a top view of one embodiment of the semiconductor optical device device of the present invention.

FIG. 8 is a process diagram illustrating an example of a manufacturing process of the semiconductor optical device device of the present invention (Example 1).

FIG. 9 is a process diagram illustrating another example of the manufacturing process of the semiconductor optical device device of the present invention (Example 2).

FIG. 10 is a process diagram illustrating still another example of the manufacturing process of the semiconductor optical device device of the present invention (Example 3).

FIG. 11 is a diagram showing a semiconductor optical device device of a comparative example.

FIG. 12 is a diagram showing the relationship between operating current and optical output of the semiconductor optical device of Example 1 and the semiconductor optical device of Comparative Example.

[Explanation of symbols]

 Reference Signs List 11: substrate 12: current blocking region 13: current blocking layer 14: first conductivity type cladding layer 15: active layer 16: second conductivity type first cladding layer 17: antioxidant layer 18: protective layer 19: opening 20, 20a: Second cladding layer of second conductivity type 21, 21a: Contact layer 22: Electrode 23: Electrode 24: Optical confinement layer 25: Quantum well layer 26: Barrier layer 27: Quantum well layer 28: Barrier layer 29: Quantum well layer 30: Optical confinement layer 34: Solder agent 35: Heat sink 36: Bonded wire 41: Substrate 42: First conductivity type cladding layer 43: Active layer 44: Second conductivity type cladding layer 45: Second conductivity type contact layer 46: Insulating layer 47: Electrode 48: Electrode 51: Substrate 52: First conductivity type clad layer 53: Active layer 54: Second conductivity type first layer Pad layer 55: protective film 56: second conductive type second clad layer 57: second conductive type contact layer 58: insulating layer 59: electrode 60: electrode 101: substrate 102: n-type clad layer 103: active layer 104: p-type first cladding layer 105: antioxidant layer (etching stop layer) 106: SiNx protective film 107: impurity diffusion layer 108: cap layer 109: SiNx protective film 110: stripe-shaped opening 111: p-type second cladding layer 112: contact layer 113: p-side electrode 114: n-side electrode 120: SiNx protective film 121: stripe-shaped opening 201: substrate 202: n-type cladding layer 203: active layer 204: p-type first cladding layer 205: oxidation Prevention layer (etching stop layer) 206: SiNx protective film 207: Impurity diffusion layer 208: Capacitor Layer 209: SiNx protective film 210: striped opening 211: p-type second cladding layer 212: contact layer 213: p-side electrode 214: n-side electrode 301: substrate 302: n-type first cladding layer 303: n Type second cladding layer 304: Active layer 305: P-type first cladding layer 306: Oxidation prevention layer (etching prevention layer) 307: SiNx protective film 308: Current blocking layer 309: SiNx protective film 310: Striped opening 311 : P-type second cladding layer 312: contact layer 313: p-side electrode 314: n-side electrode W1: end width W2: center width

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[Procedure amendment]

[Submission Date] January 14, 2000 (2000.1.1)
4)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] FIG.

[Correction method] Deleted

Claims (42)

[Claims] 1. A semiconductor device comprising: a compound semiconductor layer including an active layer formed on a substrate; a protective film having an opening formed on the compound semiconductor layer; and a ridge type compound semiconductor layer formed in the opening. A semiconductor optical device device, wherein a current block region or a current block layer is formed below an active layer. 2. The compound semiconductor layer including the active layer,
2. The semiconductor optical device according to claim 1, further comprising a layer having a lower refractive index than the active layer above and below the active layer. 3. The semiconductor optical device according to claim 1, wherein the refractive index of the active layer is smaller than the refractive index of the protective film having the opening. 4. A layer having a lower refractive index than the active layers above and below the active layer, a layer on the substrate side is a first conductive type clad layer, and the other layer is a second conductive type first clad layer. The semiconductor optical device according to claim 2 or 3. 5. The semiconductor optical device according to claim 1, wherein said ridge-type compound semiconductor layer includes a layer having a lower refractive index than an active layer. 6. A layer having a lower refractive index than the active layer,
6. The semiconductor optical device according to claim 5, wherein the semiconductor optical device is a second conductive type second clad layer. 7. The semiconductor optical device according to claim 1, wherein the current blocking region or the current blocking layer is formed at least in the vicinity of a side surface of the compound semiconductor layer below the substrate or the active layer. 8. The semiconductor optical device device according to claim 1, wherein the current blocking region or the current constriction region sandwiched by the current blocking layers is formed only in the vicinity immediately below the opening. 9. The current blocking region or the current blocking layer is of a second conductivity type or a high resistance.
8. The semiconductor optical device device according to any one of 8. 10. The semiconductor optical device according to claim 1, wherein said current blocking region is selectively formed in a substrate and / or a compound semiconductor layer below said active layer. 11. The current block region or the current block layer is formed near an end face.
0. A semiconductor optical device device according to 12. The semiconductor optical device according to claim 11, wherein the current block region is formed near an end face without a step in the optical waveguide. 13. The method according to claim 13, wherein the current blocking layer comprises a substrate and / or
13. The semiconductor optical device according to claim 1, which is selectively formed on a compound semiconductor layer under the active layer. 14. The semiconductor optical device device according to claim 1, wherein a light guide layer is formed between said active layer and said current blocking layer. 15. The semiconductor optical device according to claim 1, wherein the current blocking layer is a semiconductor layer. 16. The semiconductor optical device according to claim 1, wherein said current blocking layer is an insulator film. 17. The semiconductor optical device according to claim 1, wherein a current is injected into the active layer from the opening. 18. The semiconductor optical device according to claim 1, wherein a current is injected into an active layer from a region where the block layer is not formed. 19. The semiconductor optical device according to claim 1, wherein a region transparent to laser light is formed at an end of the optical waveguide. 20. The semiconductor optical device according to claim 1, wherein the band gap of the active layer at both ends of the optical waveguide is larger than the band gap of the active layer in a current injection region at the center of the optical waveguide. . 21. At least a part of a side surface of the ridge type compound semiconductor layer is in contact with a surface side electrode.
20. The semiconductor optical device device according to any one of 20. 22. The semiconductor optical device according to claim 1, wherein the width of the opening is wider in the vicinity of the device end face than in the center of the device. 23. The semiconductor optical device according to claim 1, wherein the width of the opening is smaller in the vicinity of the device end face than in the center of the device. 24. The semiconductor optical device according to claim 1, wherein the opening is a stripe-shaped opening extending to both ends. 25. The semiconductor optical device according to claim 1, wherein the opening extends to one end but does not extend to the other end. 26. The semiconductor optical device according to claim 1, wherein the opening is an opening that does not extend to both ends. 27. The active layer is made of at least GaAs, A
lGaAs, InGaAs, AlGaInAs, GaI
nP, AlGaInP, GaInAsP, AlGaIn
2. A semiconductor device comprising AsP, GaN or InGaN.
26. The semiconductor optical device device according to any one of 26. 28. The substrate according to claim 1, wherein the surface of the substrate has an off angle with respect to a low-order plane orientation.
8. The semiconductor optical device according to any one of 7. 29. The semiconductor optical device according to claim 1, further comprising a ridge dummy region outside the protective film. 30. The semiconductor optical device according to claim 29, wherein a ridge dummy layer is formed in the ridge dummy region. 31. A current block layer is formed on at least a part of a lower side of the ridge dummy region.
Or 30 semiconductor optical device devices. 32. The semiconductor optical device according to claim 29, wherein at least a part of the ridge dummy layer is in contact with the front surface side electrode. 33. The semiconductor optical device according to claim 1, wherein the laser chip is assembled at a junction down. 34. A step of forming a current blocking region or a current blocking layer inside or on the substrate, a step of forming a compound semiconductor layer including an active layer and a protective film in this order, and a step of forming an opening in the protective film. And a step of selectively growing a ridge type compound semiconductor layer in the opening. 35. The method according to claim 34, wherein the current block region is formed by impurity diffusion or impurity implantation. 36. The method of manufacturing a semiconductor optical device device according to claim 34, wherein the impurity diffusion layer is formed in the crystal growth apparatus, and then heat treatment is performed in the crystal growth apparatus. 37. The method according to claim 36, wherein the crystal growth apparatus is a metal organic chemical vapor deposition apparatus. 38. The method according to claim 36, wherein the impurity diffusion layer is removed by selective etching with respect to the current block region.
Or 37, a method for manufacturing a semiconductor optical device. 39. The method according to claim 34, wherein the current blocking layer is formed by selective growth. 40. The ridge-type compound semiconductor layer is selectively grown on the opening by performing metal organic chemical vapor deposition while adding a gas containing a halogen element. A method for manufacturing such a semiconductor optical device. 41. The method according to claim 34, wherein the direction in which the opening extends is selected such that the contact layer is formed substantially over the entire surface of the ridge. 42. A crystal growth plane of the substrate is a (100) plane or a plane crystallographically equivalent thereto, and a direction in which the opening of the protective film extends is a [01-1] direction or a crystallographically equivalent direction. 42. The method according to claim 34, wherein the directions are equivalent.