JP2001185757A - Group iii nitride based compound semiconductor light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate compressive stress which is generated by difference of coefficients of thermal expansion of a substrate and group III nitride based compound semiconductor and applied to a light emitting layer as much as possible. SOLUTION: Since a contact layer is formed of group III nitride based compound semiconductor containing indium, a comparatively thick soft layer exists in the vicinity of a substrate. As a result, influence of the substrate upon a light emitting layer is relieved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a group III nitride compound semiconductor light emitting device. More specifically, the present invention relates to improvement of an n-contact layer of the light emitting device.

[0002]

2. Description of the Related Art Conventionally, a general group III nitride compound semiconductor light emitting device has the following configuration. That is, a relatively thick n-contact G having a thickness of 2 to 5 μm is formed on a sapphire substrate via a low-temperature growth buffer layer made of AlN or GaN.
An aN layer is stacked, and an n-cladding layer, a light-emitting layer, a p-cladding layer, and a p-contact layer are sequentially stacked on the n-contact GaN layer. Documents that disclose techniques related to the present invention include JP-A-7-249975 and JP-A-8-228025.

[0003]

Although the light-emitting device having the above-described structure can provide sufficient light emission, recently, a higher light-emitting output has been required. One of the factors considered to limit the light emission output of a light emitting element is a compressive stress applied to a group III nitride compound semiconductor layer constituting the element, particularly a light emitting layer. The coefficient of thermal expansion of the sapphire substrate (7.5 ×
10 ⁻⁶ ) is larger than the thermal expansion coefficient of the group III nitride compound semiconductor (GaN: 5.59 × 10 ⁻⁶ ). Will be extended. In order to reduce the compressive stress applied to the light emitting layer, for example, Japanese Patent Application Laid-Open No. 8-22802
In JP-A-5, the n-cladding layer contains relatively soft In.
It has been proposed to be formed from a group III nitride compound semiconductor.

However, in this publication, since the n-contact layer is formed of GaN that is relatively hard and grown at a high temperature, sufficient relaxation of the compressive stress cannot be expected here, and the light-emitting layer is still slightly exposed. It is considered that such compressive stress is applied. Furthermore, when a plurality of semiconductor layers having different compositions are included in a light-emitting element, it is necessary to adjust and control a material gas and a growth temperature for each layer, so that the defect rate can be reduced and a high yield can be achieved. Had to be troublesome and highly skilled in manufacturing. Therefore, an object of the present invention is to remove as much compressive stress as possible from a light emitting layer of a light emitting element. Another object of the present invention is to simplify the structure for removing the compression effect from the light emitting layer, thereby facilitating the manufacture of the light emitting element and improving the yield,
Accordingly, it is an object of the present invention to provide a light emitting element which is inexpensive and has a high light output.

[0005]

SUMMARY OF THE INVENTION The present invention is to achieve at least one of the above-mentioned objects, and has the following configuration. That is, a substrate, a light-emitting layer, and an n-contact layer made of a group III nitride-based compound semiconductor containing indium formed between the substrate and the light-emitting layer, and the n-contact layer is optionally provided. Except when a buffer layer is interposed, a group III nitride compound semiconductor light emitting device formed in contact with the substrate.

[0006] According to the light emitting device thus configured,
Since the n-contact layer is formed of a group III nitride-based compound semiconductor containing indium which is relatively soft and can be grown at a relatively low temperature, the influence from the substrate is first reduced by the layer closest to the substrate. . In addition, since the n-contact layer is formed to be relatively thick, the relaxation ability is large. Therefore, the compressive stress applied to the light emitting layer can be sufficiently absorbed with a simple configuration. Further, a group III nitride-based compound semiconductor containing indium can be used also as a cladding layer as described in a conventional publication. Therefore, in the case of the present invention, if the n-contact layer is used as it is as the n-cladding layer, the layer structure is simplified and its manufacture becomes easy.

Hereinafter, each element of the present invention will be described in detail. The substrate is not particularly limited as long as a group III nitride-based compound semiconductor can be grown thereon. For example, sapphire, spinel, silicon, silicon carbide, zinc oxide, gallium phosphide, gallium arsenide, magnesium oxide, manganese oxide, and the like can be given as a material of the substrate. According to the study of the present inventors, it is preferable to use sapphire as a substrate, and particularly to use its a-plane.

Group III nitride compounds containing indium
The n-contact layer made of a conductor is In _xGa_1-xN (0
<X ≦ 1) or In_XAl_YGa_1-XYN
(0 <X <1, 0 <Y <1, 0 <X + Y <1)
However, some of the group III elements are boron (B), thallium (T
l) etc., and part of nitrogen (N)
(P), arsenic (As), antimony (Sb), bismuth
(Bi) or the like. The above ternary system In_xGa
_1-xIn N (0 <x ≦ 1), the composition ratio of In, ie,
x is preferably 0.01 to 0.50. Composition ratio
If x is less than 0.01, it is difficult to remove the compressive stress.
You. When the composition ratio x exceeds 0.50, high quality crystals are formed.
It is hard to get. A more preferred value of x is 0.02 to 0.20.
And still more preferably 0.03 to 0.10. n
The contact layer is made of Si, G to increase conductivity.
An n-type dopant such as e, Se, Te, C or the like is added.
The thickness of the n-contact layer should be 0.1 to 10 μm
preferable. More preferably, it is 1 to 5 μm, and further more
Preferably it is 2 to 4 μm.

In order to form an n-contact layer having good crystallinity, it is preferable to form a buffer layer on the substrate in order to correct lattice mismatch with the substrate. AlXGaYIn1-X-YN (0 <X <1, 0 <Y <
1,0 <X + Y <Compound of quaternary represented by 1) _{semiconductor, Al X Ga 1-X N} (0 <X <1) compound of ternary represented by the semiconductor, and AlN, GaN and InN
Can be used. It is known that such a buffer layer is formed at a low temperature of about 400 ° C. by the MOCVD method. In addition, a method of forming the buffer layer at a high temperature exceeding 1000 ° C. or a method of forming it by a sputtering method is also effective.

Generally, an n-cladding layer is often formed between the n-contact layer and the light-emitting layer. However, the influence of the substrate on the light-emitting layer is reduced to reduce the compressive stress in the light-emitting layer as much as possible. In view of the object of the present invention to be attempted,
This n-cladding layer is also preferably made of a group III nitride compound semiconductor containing indium. If so, it is preferable from the viewpoint of simplifying the manufacturing process that the n-contact layer is a group III nitride-based compound semiconductor containing indium whose band gap energy is larger than the band gap energy of the light emitting layer.

A known structure can be adopted for the light emitting layer. MI
A homostructure, heterostructure, or double heterostructure having an S junction, a PIN junction, or a pn junction can be used. The light emitting layer has a quantum well structure (single quantum well structure or multiple quantum well structure). In the configuration of the light emitting device, a well-known p-cladding layer and p-contact layer are further laminated on the light emitting layer.

The layers other than the n-contact defined in the present invention
It is formed of a group III nitride compound semiconductor. Where III
A group nitride-based compound semiconductor has a general formula of Al _X Ga _Y
In _1- XYN (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ X +
Y ≦ 1), a so-called binary system of AlN, GaN and InN, Al _x Ga _1-xN , Al _x In _1-x N and Ga _x In _1-x N (where 0 ≦ x ≦ 1 ) So-called ternary systems. Part of the group III element may be replaced by boron (B), thallium (Tl), etc.
Part of nitrogen (N) can be replaced by phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), or the like. III
The group III nitride compound semiconductor layer may contain an arbitrary dopant. Si, Ge, S as n-type impurities
e, Te, C, etc. can be used. Mg, Zn, Be, Ca, Sr, Ba, or the like can be used as the p-type impurity. After doping with a p-type impurity, the group III nitride compound semiconductor can be exposed to electron beam irradiation, plasma irradiation, or heating by a furnace. The method of forming the group III nitride-based compound semiconductor layer is not particularly limited. In addition to metal organic chemical vapor deposition (MOCVD), well-known molecular beam crystal growth (MBE) and halide vapor deposition (HVPE) Method), a sputtering method, an ion plating method, an electron shower method, or the like.

[0013]

Next, an embodiment of the present invention will be described. The embodiment is a light emitting diode 10, the configuration of which is shown in FIG. Layer: Composition: Dopant (Film thickness) Translucent electrode 19 P-type cladding layer 18: p-GaN: Mg (0.3 μm) Light emitting layer 17: Superlattice structure Quantum well layer: In _0.15 Ga _0.85 N ( 3.5 nm) Barrier layer: GaN (3.5 nm) Number of repetitions of quantum well layer and barrier layer: 1 to 10 n contact layer 16: n-In _0.02 Ga _0.98 N: Si (4 μm) AlN buffer layer 12: AlN (20 nm) substrate 11: sapphire (a surface) (300 μm)

The light emitting layer 17 is not limited to a super lattice structure. As a structure of the light emitting element, a single hetero type, a double hetero type, a homo junction type, or the like can be used. A wide bandgap group III nitride compound semiconductor layer doped with an acceptor such as magnesium can be interposed between the light emitting layer 17 and the p-type cladding layer 18. This is to prevent the electrons injected into the light emitting layer 17 from diffusing into the p-type cladding layer 18. The p-type cladding layer 18 can have a two-layer structure including a low hole concentration p− layer on the light emitting layer 17 side and a high hole concentration p + layer on the electrode side. Each group III nitride compound semiconductor layer is formed by performing MOCVD under general conditions.

A mask is formed and a part of the p-type cladding layer 18, the active layer 17, and the n-contact layer 16 are removed by reactive ion etching to expose the n-contact layer 16 where the n-electrode pad 21 is to be formed. .

A photoresist is uniformly applied on the semiconductor surface, and the p-type cladding layer 1 is formed by photolithography.
The photoresist on the electrode forming portion on top of 8 is removed to expose the p-type cladding layer 18 at that portion. Au-Co is deposited on the exposed p-type cladding layer 18 by a vapor deposition apparatus.
The translucent electrode layer 19 is formed. Next, the p-electrode pad 20 and the n-electrode pad 21 are deposited in the same manner.

Although the specification has been described with reference to a light emitting element as an example, the present invention is applicable to various semiconductor elements. Here, in addition to light emitting diodes, light receiving diodes, laser diodes, optical elements such as solar cells, rectifiers, bipolar elements such as thyristors and transistors,
Electronic devices such as unipolar devices such as FETs and microwave devices are exemplified. The present invention is also applicable to a laminate as an intermediate of these elements.

The present invention is not at all limited to the description of the above-described embodiments and examples. Various modifications are included in the present invention without departing from the scope of the claims and within the scope of those skilled in the art.

Hereinafter, the following items will be disclosed. (1) A laminate formed by laminating a group III nitride compound semiconductor layer on a substrate, wherein the laminate is formed between the substrate, a layer to be a light emitting layer, and a layer between the substrate and the layer to be the light emitting layer. A layer serving as an n-contact layer containing indium,
The layered body, wherein the layer to be the n-contact layer is formed in contact with the substrate except for a case where a buffer layer is interposed as necessary. (2) The laminated body according to (1), wherein the layer to be the n-contact layer is also in contact with the layer to be the light-emitting layer. (3) The layer to be the n-contact layer is In _x Ga
_1-xN (0 <x ≦ 1), or In _X Al _Y Ga
_1- XYN (0 <X <1, 0 <Y <1, 0 <X + Y <
The laminate according to (1) or (2), which is 1). (4) The laminate according to any one of (1) to (3), wherein the buffer layer is made of AlN or GaN. (5) The laminate according to any one of (1) to (4), wherein the substrate is sapphire.

[Brief description of the drawings]

FIG. 1 shows a light emitting diode according to an embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 10 light emitting diode 12 AlN buffer layer 16 n contact layer 17 light emitting layer 18 p-type cladding layer

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Kuki Kato, Inventor 1 Nagata, Ochiai, Kasuga-cho, Nishikasugai-gun, Aichi F-term (in reference) 5F041 AA40 CA04 CA05 CA34 CA40 CA46

Claims (5)

[Claims] 1. A semiconductor device comprising: a substrate; a light-emitting layer; and an n-contact layer made of a group III nitride-based compound semiconductor containing indium and formed between the substrate and the light-emitting layer. A group III nitride-based compound semiconductor light emitting device, formed in contact with the substrate, except that a buffer layer is interposed according to 2. The group III nitride compound semiconductor light emitting device according to claim 1, wherein said n contact layer is also in contact with said light emitting layer. 3. The method according to claim 1, wherein the n-contact layer is In _x Ga _1-x
N (0 <x ≦ 1), or In _X Al _Y Ga
_1- XYN (0 <X <1, 0 <Y <1, 0 <X + Y <
The method according to claim 1, wherein 1) is satisfied.
Group III nitride compound semiconductor light emitting device. 4. The buffer layer is made of AlN or GaN.
The group III nitride-based compound semiconductor light-emitting device according to any one of claims 1 to 3, comprising: 5. The group III nitride compound semiconductor light emitting device according to claim 1, wherein said substrate is sapphire.