JP2001185443A - Thin-film capacitor - Google Patents

Thin-film capacitor

Info

Publication number
JP2001185443A
JP2001185443A JP36388099A JP36388099A JP2001185443A JP 2001185443 A JP2001185443 A JP 2001185443A JP 36388099 A JP36388099 A JP 36388099A JP 36388099 A JP36388099 A JP 36388099A JP 2001185443 A JP2001185443 A JP 2001185443A
Authority
JP
Japan
Prior art keywords
electrode
film capacitor
substrate
thin film
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP36388099A
Other languages
Japanese (ja)
Inventor
Tomohisa Iwanaga
知久 岩永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP36388099A priority Critical patent/JP2001185443A/en
Publication of JP2001185443A publication Critical patent/JP2001185443A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a thin-film capacitor wherein copper and its oxide that are inexpensive and have high conductivity are used for electrode material and stress in the manufacturing process is relaxed. SOLUTION: In a thin-film capacitor wherein an electrode 11, a dielectric layer 21 and an electrode 12 are laminated on a substrate 1, a composite material of copper and cuprous oxide is used for the electrodes 11 and 12. As a result, the stresses generated in the manufacturing process between the substrate 1 and the electrode 11 and between the electrodes 11 and 12 and the dielectric layer 21 are relaxed and the generation of cracks and peelings and the like can be reduced.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は,電子機器等に搭載
する薄膜コンデンサに関する。
The present invention relates to a thin film capacitor mounted on an electronic device or the like.

【0002】[0002]

【従来の技術】近年,コンピュータ等の電子機器の発展
は目覚ましく,高速化・小型化・大容量化の一途をたど
っている。これら電子機器で取り扱うディジタル信号の
データ量が増大し信号切替周波数が高くなるにつれて,
電源電圧の変動,すなわち電源ノイズが大きくなる。こ
の電源ノイズが非常に大きくなると機器の誤動作などを
引き起こす恐れがあるため,ノイズ低減等の対策が必要
となる。
2. Description of the Related Art In recent years, the development of electronic devices such as computers has been remarkable, and the speed, size, and capacity have been steadily increasing. As the data volume of digital signals handled by these electronic devices increases and the signal switching frequency increases,
The fluctuation of the power supply voltage, that is, the power supply noise increases. If the power supply noise becomes extremely large, malfunction of the device may occur, so that measures such as noise reduction are required.

【0003】電源ノイズを低減するには,LSIなどの
ノイズ発生源から電源側を見たときのインピーダンスを
低く抑えることが有効である。この電源インピーダンス
の低減には,ノイズ発生源のすぐ近くに大容量かつ低抵
抗のコンデンサを配置することが有用である。この目的
に使用されるコンデンサとして,最近,LSIを搭載す
るモジュール基板上に形成した薄膜コンデンサが注目さ
れている。
In order to reduce power supply noise, it is effective to reduce the impedance when the power supply is viewed from a noise source such as an LSI. To reduce the power supply impedance, it is useful to arrange a large-capacity, low-resistance capacitor in the immediate vicinity of the noise source. As a capacitor used for this purpose, a thin film capacitor formed on a module substrate on which an LSI is mounted has recently attracted attention.

【0004】薄膜コンデンサの材料として,電極にはC
u,Au等の低抵抗金属を,誘電体層にはペロブスカイ
ト型化合物等の高誘電率の強誘電体セラミックス材料を
用いることが望ましい。また,モジュール基板には機械
的強度の観点からアルミナ等のセラミックス材料を用い
ることが多い。
As a material for a thin film capacitor, the electrode is C
It is desirable to use a low-resistance metal such as u or Au, and to use a ferroelectric ceramic material having a high dielectric constant such as a perovskite compound for the dielectric layer. Further, ceramic materials such as alumina are often used for the module substrate from the viewpoint of mechanical strength.

【0005】しかし,金属材料とセラミックス材料とで
は熱膨張係数の差が大きく,両者の界面において熱膨張
および熱収縮に伴なう応力が発生する。そのため,薄膜
コンデンサ形成時の熱処理により,電極や誘電体層にク
ラックが発生し,電気的ショートの原因となる等の問題
があった。また,基板と電極との間や,電極と誘電体層
との間で剥離が発生し,コンデンサの容量低下や歩留ま
りの低下などの問題があった。
However, the difference between the coefficient of thermal expansion of a metal material and the coefficient of thermal expansion of a ceramic material is large, and a stress is generated at the interface between the two materials due to thermal expansion and thermal contraction. Therefore, there has been a problem that cracks are generated in the electrodes and the dielectric layer due to the heat treatment during the formation of the thin film capacitor, which causes an electric short circuit. In addition, peeling occurs between the substrate and the electrode or between the electrode and the dielectric layer, which causes problems such as a decrease in the capacity of the capacitor and a decrease in the yield.

【0006】これに対する解決法として,電極と誘電体
層等の間に両者の中間の熱膨張率を有する金属の層を設
け,問題解決を図る方法が知られている。
As a solution to this, there is known a method of providing a metal layer having a coefficient of thermal expansion intermediate between the electrode and the dielectric layer to solve the problem.

【0007】その一例として,特開平11-243032号公報
に開示された薄膜コンデンサを図7に示す。基板1上
に,電極11,誘電体層21,電極12を順次積層し,
基板1と電極11との間および/または電極11,12
と誘電体層21との間に,Nbおよび/またはTaから
なる応力緩和層31,32,33を形成するとともに,
基板,電極,誘電体層,応力緩和層の室温から500℃
における熱膨張係数をそれぞれα1,α2,α3,α4とし
たとき,α1<α4<α2および/またはα3<α4<α2
満足することとしている。この方法を用いると,Nbや
Taの応力緩和層がない場合と比較して基板と電極,電
極と誘電体層の界面での熱応力が緩和されるので,薄膜
コンデンサ製造過程におけるクラックや剥離の発生を抑
制することが期待できる。
As an example, FIG. 7 shows a thin film capacitor disclosed in Japanese Patent Application Laid-Open No. H11-243032. An electrode 11, a dielectric layer 21, and an electrode 12 are sequentially laminated on a substrate 1,
Between the substrate 1 and the electrode 11 and / or the electrodes 11, 12
Stress relaxation layers 31, 32, 33 made of Nb and / or Ta are formed between
From room temperature to 500 ° C for substrate, electrode, dielectric layer and stress relaxation layer
When α 1 , α 2 , α 3 , and α 4 are the thermal expansion coefficients of α 1 , α 142 and / or α 342 , respectively. When this method is used, the thermal stress at the interface between the substrate and the electrode and the interface between the electrode and the dielectric layer is relaxed as compared with the case where there is no Nb or Ta stress relaxation layer. It can be expected to suppress the occurrence.

【0008】[0008]

【発明が解決しようとする課題】特開平11-243032号公
報に開示された薄膜コンデンサでは,電極材料として,
Au,Ag,Pt,Cuのうちの少なくとも一種である
ことが望ましいとしている。一方,応力緩和層には電極
とは異なる材料であるNbやTaを用いている。そのた
め,応力緩和層を用いない場合と比較してNbやTaの
材料費がかかるうえ,形成プロセスの工程数が増えるの
で,製造コスト増大の要因となる問題があった。
In the thin film capacitor disclosed in Japanese Patent Application Laid-Open No. H11-243032, the electrode material is
It is stated that at least one of Au, Ag, Pt, and Cu is desirable. On the other hand, a material different from the electrode, such as Nb or Ta, is used for the stress relaxation layer. Therefore, there is a problem that the material cost of Nb and Ta is increased as compared with the case where the stress relaxation layer is not used, and the number of steps of the forming process is increased, which causes an increase in manufacturing cost.

【0009】また,室温におけるNbやTaの導電率は
14%IACS程度であり,電極材料に用いるCu(1
00%IACS)やAu(78%IACS)の導電率と
比べて1/7〜1/5と低いため電極部の抵抗が高くな
る問題があった。
The conductivity of Nb and Ta at room temperature is about 14% IACS, and Cu (1
There is a problem that the resistance of the electrode part is increased because the conductivity is 1/7 to 1/5 of that of the conductivity of 00% IACS or Au (78% IACS).

【0010】本発明は,安価でかつ高い導電率を有する
Cuおよびその酸化物を主成分とする電極材料のみで製
造過程における応力を緩和できる薄膜コンデンサを提供
することを目的とする。
An object of the present invention is to provide a thin-film capacitor which is inexpensive and has high conductivity and which can alleviate stress in the manufacturing process only by using an electrode material mainly composed of Cu and its oxide.

【0011】[0011]

【課題を解決するための手段】前記目的を達成するた
め,本発明は,以下の(1)〜(4)の手段を用いる。
To achieve the above object, the present invention uses the following means (1) to (4).

【0012】(1)前記電極のうち少なくとも1つは銅
と酸化第一銅との複合材料を主成分とする第1の電極で
ある。
(1) At least one of the electrodes is a first electrode mainly composed of a composite material of copper and cuprous oxide.

【0013】(2)前記電極のうち少なくとも1つは銅
を主成分とする第2の電極であり,前記第2の電極が多
孔質構造を有する。 (3)前記第1の電極および/または前記第2の電極
が,コンデンサ形成プロセス中に銅と酸化第一銅との複
合材料を主成分とする状態で存在し,還元処理により酸
化第一銅の含有率を低減させたものである。 (4)前記第1の電極および/または前記第2の電極の
20℃における導電率が15%IACS以上である。
(2) At least one of the electrodes is a second electrode containing copper as a main component, and the second electrode has a porous structure. (3) The first electrode and / or the second electrode exist in a state where a composite material of copper and cuprous oxide is a main component during a capacitor forming process, and the first electrode and / or the second electrode are made of cuprous oxide by a reduction treatment. Is reduced. (4) The conductivity at 20 ° C. of the first electrode and / or the second electrode is 15% IACS or more.

【0014】[0014]

【発明の実施の形態】本発明の薄膜コンデンサは,基板
上に電極と誘電体層を交互に積層してなるものである。
これには,誘電体層が1層のみの単層型と,誘電体層が
複数形成された積層型の薄膜コンデンサを含む。また,
基板の片面のみにコンデンサを形成する片面型と,基板
の両面にコンデンサを形成する両面型をも含む。以下で
は,片面単層型薄膜コンデンサを例にとり本発明を説明
する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A thin film capacitor according to the present invention comprises electrodes and dielectric layers alternately laminated on a substrate.
This includes a single-layer type capacitor having only one dielectric layer and a laminated type thin-film capacitor having a plurality of dielectric layers. Also,
It also includes a single-sided type in which a capacitor is formed on only one side of the substrate and a double-sided type in which a capacitor is formed on both sides of the substrate. Hereinafter, the present invention will be described using a single-sided single-layer type thin film capacitor as an example.

【0015】図1は片面単層型の薄膜コンデンサの断面
図であり,基板1の上面には,電極11,誘電体層2
1,電極12が順次積層されている。
FIG. 1 is a sectional view of a single-sided single-layer type thin-film capacitor. An electrode 11 and a dielectric layer 2 are provided on the upper surface of a substrate 1.
1, electrodes 12 are sequentially laminated.

【0016】基板1としては,例えば,アルミナを主成
分とするセラミックスを用いる。この材料の室温付近で
の熱膨張係数は7.7×10-6/Kである。
As the substrate 1, for example, a ceramic mainly composed of alumina is used. The thermal expansion coefficient of this material near room temperature is 7.7 × 10 −6 / K.

【0017】また,誘電体層21としては,例えば,P
b(Mg1/3Nb2/3)O3(以下PMNと表記)を主成
分とするセラミックスを用いる。この誘電体材料の室温
付近での熱膨張係数は7.4×10-6/Kである。
As the dielectric layer 21, for example, P
A ceramic mainly composed of b (Mg 1/3 Nb 2/3 ) O 3 (hereinafter referred to as PMN) is used. The thermal expansion coefficient of this dielectric material near room temperature is 7.4 × 10 −6 / K.

【0018】ここで,電極11,12としては,Cuと
Cu2Oの複合材料を用いる。この銅複合材料は非常に
安価である。またCu2Oの組成率によって熱膨張係
数,ヤング率,および導電率を表1のように調整するこ
とが可能である。ここで,電極11,12の熱膨張係数
がアルミナやPMNの熱膨張係数に近い値になるように
Cu2Oの組成比を例えば55体積%やそれ以上の値に
調整し,薄膜コンデンサを形成することで,例えばCu
を電極材料に用いた場合と比較して,基板と電極との
間,および電極と誘電体層との間のプロセス応力を低減
することができる。
Here, composite materials of Cu and Cu 2 O are used for the electrodes 11 and 12. This copper composite is very inexpensive. The thermal expansion coefficient, Young's modulus, and conductivity can be adjusted as shown in Table 1 depending on the composition ratio of Cu 2 O. Here, the composition ratio of Cu 2 O is adjusted to, for example, 55% by volume or more so that the coefficients of thermal expansion of the electrodes 11 and 12 are close to the coefficients of thermal expansion of alumina and PMN to form a thin film capacitor. By doing, for example, Cu
The process stress between the substrate and the electrode and between the electrode and the dielectric layer can be reduced as compared with the case where is used as the electrode material.

【0019】[0019]

【表1】 [Table 1]

【0020】また,Cu2Oの組成比率を上げることで
銅複合材料のヤング率が低下するため,電極と基板や誘
電体層間の熱膨張係数に差がある場合でも,応力が低減
する。 これらの応力低減効果により,界面での剥離の
発生やクラックの生成を抑制することができる。
Further, since the Young's modulus of the copper composite material is reduced by increasing the composition ratio of Cu 2 O, the stress is reduced even when there is a difference in the thermal expansion coefficient between the electrode and the substrate or between the dielectric layers. Due to these stress reduction effects, it is possible to suppress the occurrence of peeling and the generation of cracks at the interface.

【0021】なお,電極の熱膨張係数およびヤング率を
低減するためにCu2Oの比率を上げると,電極の導電
率が低下し薄膜コンデンサの抵抗成分増大の原因とな
る。そこで,導電率を向上させる必要がある場合には,
薄膜コンデンサ形成後に水素等の還元雰囲気中で例えば
200℃,2分間程度アニールし,銅複合材料を還元す
ることは非常に有用である。
If the ratio of Cu 2 O is increased in order to reduce the coefficient of thermal expansion and Young's modulus of the electrode, the conductivity of the electrode is reduced and the resistance component of the thin film capacitor is increased. Therefore, when it is necessary to improve the conductivity,
It is very useful to reduce the copper composite material by annealing at, for example, about 200 ° C. for about 2 minutes in a reducing atmosphere such as hydrogen after forming the thin film capacitor.

【0022】還元により,銅複合材料中のCu2Oの比
率が低減あるいは0となり,電極の導電率が高くなる。
この場合,還元処理は誘電体層形成時に要する温度(約
600℃)よりも低い温度で処理を行なうため,還元に
よる銅複合材料とセラミックス材料との熱膨張係数差の
増大はそれほど問題にはならない。また,銅複合材料を
還元するとO2成分が放出され多孔質構造となるため,
同じCu2O比率を持つ非還元銅複合材料と比較してヤ
ング率が低く,応力が低減する効果が期待できる。
By the reduction, the ratio of Cu 2 O in the copper composite material is reduced or becomes zero, and the conductivity of the electrode is increased.
In this case, since the reduction treatment is performed at a temperature lower than the temperature required for forming the dielectric layer (about 600 ° C.), the increase in the difference in thermal expansion coefficient between the copper composite material and the ceramic material due to the reduction does not matter so much. . In addition, when the copper composite material is reduced, the O 2 component is released, resulting in a porous structure.
The Young's modulus is lower than that of the non-reduced copper composite material having the same Cu 2 O ratio, and the effect of reducing the stress can be expected.

【0023】以上に示したとおり,コンデンサ電極中の
Cu2O比率を制御することで,応力を低減しつつNb
およびTaよりも大きな導電率を持つ銅複合材料で電極
を構成することが可能である。
As described above, by controlling the Cu 2 O ratio in the capacitor electrode, Nb can be reduced while reducing the stress.
It is possible to form the electrode with a copper composite material having a conductivity higher than that of Ta and Ta.

【0024】なお,上記実施例では片面単層型薄膜コン
デンサを例に挙げたが,本発明はそれに限定されるもの
ではなく,例えば,片面積層型(図2),両面単層型
(図3),両面積層型(図4)などにも適用可能であ
る。また,構造に関しても,図1から図4に示したプレ
ーナ型のみならず,基板に溝を掘りその表面をコンデン
サとするトレンチ型(図5)や,基板上に3次元構造で
コンデンサを形成するスタックト型(図6)にも適用で
きる。
In the above embodiment, a single-sided single-layer type thin film capacitor is taken as an example. However, the present invention is not limited to this. For example, a single-sided layer type (FIG. 2) and a double-sided single-layer type (FIG. 3) ), Double-sided lamination type (FIG. 4) and the like. Also, as for the structure, not only the planar type shown in FIGS. 1 to 4 but also a trench type (FIG. 5) in which a groove is dug in the substrate and the surface thereof is a capacitor, or a capacitor having a three-dimensional structure is formed on the substrate. It can also be applied to a stacked type (FIG. 6).

【0025】基板材料としては,アルミナ以外にも,S
i,ガラス,ガラスセラミックスなどへの適用も考えら
れる。
As a substrate material, besides alumina, S
Application to i, glass, glass ceramics, etc. is also conceivable.

【0026】薄膜コンデンサに用いる誘電体としては,
上記PMNに限定するものではなく,例えば,Pb(Z
r,Ti)O3,BaTiO3,SrTiO3,(Ba,
Sr)TiO3,酸化タンタルなども適用可能である。
As a dielectric used for a thin film capacitor,
The present invention is not limited to the above PMN. For example, Pb (Z
r, Ti) O 3 , BaTiO 3 , SrTiO 3 , (Ba,
Sr) TiO 3 , tantalum oxide and the like are also applicable.

【0027】また,上記実施例では上部電極,下部電極
とも銅複合材料を用いたが,電極の一部のみに銅複合材
料を適用してもよいし,銅複合材料を用いない電極が存
在してもよい。銅複合材料を用いた電極の組成に関して
は,銅と酸化第一銅の複合物のみならず,例えば,酸化
第二銅(CuO)やその他不純物が混ざっていても,銅
と酸化第一銅の複合物が主成分となる材料であれば本発
明の対象となり得る。
In the above embodiment, a copper composite material is used for both the upper electrode and the lower electrode. However, a copper composite material may be applied to only a part of the electrodes, or there is an electrode that does not use a copper composite material. You may. Regarding the composition of the electrode using the copper composite material, not only the composite of copper and cuprous oxide, but also the mixture of copper and cuprous oxide, for example, even when cupric oxide (CuO) and other impurities are mixed. Any material containing a composite as a main component can be an object of the present invention.

【0028】本発明の薄膜コンデンサの製造方法に関し
ては特に限定しない。例えば,基板を形成後,電極,誘
電体層,電極の順にスパッタ法,CVD法などを用いて
コンデンサを形成してもよい。また,基板材料にグリー
ンシートを用いる場合は,グリーンシート上に銅複合材
料を主成分とする導電ペーストをコンデンサの電極とし
て印刷後,焼成することで基板と下部電極を同時に形成
してもよい。
The method for manufacturing the thin film capacitor of the present invention is not particularly limited. For example, after forming a substrate, a capacitor may be formed by using a sputtering method, a CVD method, or the like in the order of an electrode, a dielectric layer, and an electrode. When a green sheet is used as the substrate material, the substrate and the lower electrode may be simultaneously formed by printing a conductive paste mainly composed of a copper composite material on the green sheet as an electrode of the capacitor, followed by firing.

【0029】[0029]

【発明の効果】本発明によれば,安価でかつ高い導電率
を有するCuおよびその酸化物を主成分とする電極材料
のみで製造過程における応力を緩和可能な薄膜コンデン
サを提供することができる。
According to the present invention, it is possible to provide a thin-film capacitor which is inexpensive and has high conductivity, and which can alleviate the stress in the manufacturing process using only an electrode material mainly composed of Cu and its oxide.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例である片面単層型薄膜コンデ
ンサの断面図。
FIG. 1 is a cross-sectional view of a single-sided single-layer thin-film capacitor according to an embodiment of the present invention.

【図2】本発明の一実施例である片面積層型薄膜コンデ
ンサの断面図。
FIG. 2 is a cross-sectional view of a single-layered thin-film capacitor according to an embodiment of the present invention.

【図3】本発明の一実施例である両面単層型薄膜コンデ
ンサの断面図。
FIG. 3 is a cross-sectional view of a double-sided single-layer thin film capacitor according to an embodiment of the present invention.

【図4】本発明の一実施例である両面積層型薄膜コンデ
ンサの断面図。
FIG. 4 is a sectional view of a double-sided laminated thin-film capacitor according to an embodiment of the present invention.

【図5】本発明の一実施例であるトレンチ型キャパシタ
の断面図。
FIG. 5 is a sectional view of a trench capacitor according to an embodiment of the present invention.

【図6】本発明の一実施例であるスタックトキャパシタ
の断面図。
FIG. 6 is a sectional view of a stacked capacitor according to an embodiment of the present invention.

【図7】従来の片面単層型薄膜コンデンサの断面図。FIG. 7 is a cross-sectional view of a conventional single-sided single-layer thin-film capacitor.

【符号の説明】[Explanation of symbols]

1…基板,11,12,13,14,15,16…電極 21,22,23,24…誘電体層,31,32,33
…応力緩和層。
DESCRIPTION OF SYMBOLS 1 ... Substrate, 11, 12, 13, 14, 15, 16 ... Electrode 21, 22, 23, 24 ... Dielectric layer, 31, 32, 33
... Stress relaxation layer.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】基板上に電極と誘電体層を交互に積層して
なる薄膜コンデンサにおいて,前記電極のうち少なくと
も1つは銅と酸化第一銅との複合材料を主成分とする第
1の電極であることを特徴とする薄膜コンデンサ。
1. A thin film capacitor comprising an electrode and a dielectric layer alternately laminated on a substrate, wherein at least one of said electrodes is composed of a first material mainly composed of a composite material of copper and cuprous oxide. A thin film capacitor characterized by being an electrode.
【請求項2】基板上に電極と誘電体層を交互に積層して
なる薄膜コンデンサにおいて,前記電極のうち少なくと
も1つは銅を主成分とする第2の電極であり,前記第2
の電極が多孔質構造を有することを特徴とする薄膜コン
デンサ。
2. A thin film capacitor comprising an electrode and a dielectric layer alternately stacked on a substrate, wherein at least one of said electrodes is a second electrode mainly composed of copper.
Wherein the electrode has a porous structure.
【請求項3】前記第1の電極および/または前記第2の
電極が,コンデンサ形成プロセス中に銅と酸化第一銅と
の複合材料を主成分とする状態で存在し,その後還元処
理により酸化第一銅の含有率を低減させたものであるこ
とを特徴とする請求項1または2に記載の薄膜コンデン
サ。
3. The method according to claim 1, wherein the first electrode and / or the second electrode are present in a state where a composite material of copper and cuprous oxide is a main component during a capacitor forming process, and then oxidized by a reduction treatment. 3. The thin film capacitor according to claim 1, wherein the content of cuprous copper is reduced.
【請求項4】前記第1の電極および/または前記第2の
電極の20℃における導電率が15%IACS以上であ
ることを特徴とする請求項1または2に記載の薄膜コン
デンサ。
4. The thin film capacitor according to claim 1, wherein the conductivity of the first electrode and / or the second electrode at 20 ° C. is 15% IACS or more.
JP36388099A 1999-12-22 1999-12-22 Thin-film capacitor Pending JP2001185443A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP36388099A JP2001185443A (en) 1999-12-22 1999-12-22 Thin-film capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP36388099A JP2001185443A (en) 1999-12-22 1999-12-22 Thin-film capacitor

Publications (1)

Publication Number Publication Date
JP2001185443A true JP2001185443A (en) 2001-07-06

Family

ID=18480427

Family Applications (1)

Application Number Title Priority Date Filing Date
JP36388099A Pending JP2001185443A (en) 1999-12-22 1999-12-22 Thin-film capacitor

Country Status (1)

Country Link
JP (1) JP2001185443A (en)

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