JP2001179614A - Table for wafer polishing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a table for a wafer polishing device, hard to be destroyed, and capable of positively achieving the larger size and high quality of a semiconductor wafer. SOLUTION: The table 2 has a laminated structure with a plurality of ceramic substrates 11A, 11B, 11C laminated. Among these, the ceramic substrate 11B has a groove 13 formed on the single side, as a part of a fluid passage 12. The upper part of the laminated structure is provided with a polishing plane 2a with which a semiconductor wafer 5 held on a holding plane 6a of a wafer holding plate 6 is put in slide contact. The area of a groove formed portion accounts for 30-70% of the project area of the ceramic substrate 11B having the groove 13 formed in a view from the direction of the thickness.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a table for a wafer polishing apparatus.

[0002]

2. Description of the Related Art Conventionally, as one type of semiconductor manufacturing apparatus,
2. Description of the Related Art A wafer polishing apparatus including a pusher plate, a table, and the like is known. A semiconductor wafer is attached to the holding surface of the pusher plate using a thermoplastic wax.
The semiconductor wafer held by the rotating pusher plate is pressed from above onto the polishing surface of the table. As a result, the semiconductor wafer comes into sliding contact with the polishing surface, and one side surface of the wafer is uniformly polished.

[0003] A large diameter and large diameter
In order to obtain a high quality wafer, it is necessary to improve the heat resistance, wear resistance, strength, etc. of the table itself. It is also necessary to improve the temperature controllability and minimize the temperature variation in the table. Thus, the present inventors
This has led to a table in which a cooling water channel is formed at the interface between a plurality of laminated ceramic substrates. Such a table can be manufactured by preparing a ceramic base having grooves formed on one side thereof forming a part of a water channel, and brazing it to another ceramic base.

Therefore, according to this wafer polishing apparatus, the heat generated on the wafer during polishing is conducted through the table, reaches the water channel, and is taken out of the apparatus by the cooling water flowing therethrough. As a result, the wafer is always maintained at a constant temperature.

[0005]

However, even in the case of a semiconductor wafer using the above-mentioned table, there are cases where it is not possible to obtain high temperature controllability and strength as expected.
It has not yet been possible to reliably achieve a large-diameter and high-quality wafer. For this reason, it has been considered that some further improvement is necessary in order to reliably obtain a large-diameter and high-quality wafer.

Accordingly, the present inventors have conducted intensive studies and, as a result, have paid attention to the magnitude of the ratio of the area of the groove forming portion to the projected area when the ceramic substrate having the groove is viewed from the thickness direction. . Then, they found that the ratio had a suitable range, and finally completed the present invention.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a wafer polishing apparatus which is hard to break and can surely achieve a large-diameter and high-quality semiconductor wafer. Is to provide a table.

[0008]

In order to solve the above-mentioned problems, according to the first aspect of the present invention, a plurality of ceramic substrates including a ceramic substrate having a groove forming a part of a fluid flow path formed on at least one side surface. A semiconductor wafer held on a holding surface of a wafer holding plate constituting a wafer polishing apparatus is slidably contacted with a laminated structure formed by joining a plurality of ceramic base materials through a brazing material layer. That the ratio of the area of the groove-forming portion to the projected area of the ceramic substrate on which the grooves are formed when viewed from the thickness direction is set to 30% to 70%. A feature of the present invention is a table for a wafer polishing apparatus.

According to a second aspect of the present invention, in the first aspect, the ratio of the width to the depth of the groove is 1 to 4. According to a third aspect of the present invention, in the first or second aspect, there is provided a non-groove-formed portion extending in a belt shape continuously in a radial direction of the ceramic base material.

[0010] The invention described in claim 4 is the first to third aspects of the present invention.
In any one of the above, each of the ceramic substrates is made of a silicon carbide sintered body, and these are joined via a brazing material layer containing silver as a main component and containing titanium.

Hereinafter, the "action" of the present invention will be described. According to the invention as set forth in claims 1 to 4, the ratio of the area of the groove forming portion to the projected area when the ceramic base having the groove formed is viewed from the thickness direction (hereinafter, the occupied area ratio of the groove forming portion) Is set within the above preferred range. Therefore, it is possible to provide a table which is not easily broken and which can surely achieve a large-diameter and high-quality semiconductor wafer.

If the occupied area ratio of the groove forming portion is less than 30%, it becomes difficult to flow a sufficient amount of fluid through the fluid flow path, and the area for transmitting heat to the fluid itself becomes small. Therefore, it is difficult to realize high temperature controllability, and there is still a possibility that temperature variation may occur in the table.

Conversely, when the occupied area ratio of the groove forming portion exceeds 70%, the ratio of the area of the groove non-forming portion to the projected area (that is, the area of the joined portion) decreases,
As a result, cracks tend to occur in the brazing material layer at the bonding interface. Therefore, the table is easily broken due to a decrease in the strength of the bonding interface. In addition, the fluid easily leaks from the fluid flow path even if it does not break, making it difficult to realize high temperature controllability.

According to the second aspect of the present invention, since the ratio of the width to the depth of the groove is set within a preferable range of 1 to 4, the clogging of the fluid flow path and the difficulty of manufacturing can be avoided. In addition, the temperature controllability and the strength can be improved.

If the ratio is smaller than 1, the depth of the groove becomes relatively large and the width of the groove becomes small, so that not only is it difficult to form and form the groove, but also foreign matter such as dust and the like can be prevented. The fluid channel is easily clogged by the mixing. Also,
The heat transfer area on the table is reduced.

Conversely, when the ratio is larger than 4, the depth of the groove becomes relatively small and the width of the groove becomes large, resulting in a reduction in the strength of the bonding interface due to a decrease in the area ratio of the bonding portion. In addition, the fluid flow path is likely to be clogged by the entry of foreign matter.

According to the third aspect of the present invention, even if a large frictional force acts in the radial direction of the table, there is a non-groove-forming portion extending continuously in the radial direction of the base material, so that the solder is formed. The generation of cracks in the material layer is avoided. Therefore, the table is extremely difficult to break.

According to the fourth aspect of the present invention, since the base made of a sintered body of silicon carbide having high thermal conductivity is used as the ceramic base, it is possible to reduce the size of the base material as compared with the case where another ceramic sintered body is selected. Temperature controllability can be easily improved. Further, since the base materials are joined to each other through the brazing material layer having good compatibility with the silicon carbide sintered body, high strength can be secured at the joining interface. Therefore, the table is extremely difficult to break.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A wafer polishing apparatus 1 according to one embodiment of the present invention will be described below in detail with reference to FIGS.

FIG. 1 shows a wafer polishing apparatus 1 according to this embodiment.
Is schematically shown. The table 2 constituting the wafer polishing apparatus 1 has a disk shape. The upper surface of the table 2 is a polishing surface 2a for polishing the semiconductor wafer 5. A polishing cloth (not shown) may be attached to the polishing surface 2a. Table 2 of the present embodiment is
The rotating shaft 4 is fixed horizontally and directly to the upper end surface of the cylindrical rotating shaft 4 without using a cooling jacket. Therefore, when the rotation shaft 4 is driven to rotate, the table 2 rotates integrally with the rotation shaft 4.

As shown in FIG. 1, the wafer polishing apparatus 1 includes a plurality (two in FIG. 1 for convenience of illustration) of wafer holding plates 6. As a material for forming the plate 6, for example, a glass, a ceramic material such as alumina, a metal material such as stainless steel, or the like is employed. A pusher bar 7 is fixed to the center of one side surface (non-holding surface 6b) of each wafer holding plate 6. Each pusher bar 7 is located above the table 2 and is connected to driving means (not shown). Each pusher bar 7 horizontally supports each wafer holding plate 6. At this time, the holding surface 6
a is in a state facing the polishing surface 2a of the table 2. Further, each pusher bar 7 can not only rotate with the wafer holding plate 6 but also move up and down within a predetermined range. Instead of the method of moving the plate 6 up and down, a structure of moving the table 2 up and down may be adopted. The semiconductor wafer 5 made of silicon is adhered to the holding surface 6a of the wafer holding plate 6 using, for example, thermoplastic wax. The semiconductor wafer 5 has a holding surface 6a
May be adsorbed by evacuation or electrostatically. At this time, the polished surface 5a of the semiconductor wafer 5
Must face the polishing surface 2a of the table 2.

When the apparatus 1 is a lapping machine, that is, an apparatus for polishing a wafer that has undergone a slicing step in a bare wafer process, the wafer holding plate 6 is preferably as follows. That is, it is preferable that the plate 6 slides the semiconductor wafer 5 in a state where a predetermined pressing force is applied to the polishing surface 2a. This is because, even if a pressing force is applied by such a wafer holding plate 6 (that is, a pusher plate), there is no need to worry about peeling of the epitaxial growth layer since the epitaxial growth layer is not formed. The same applies to a case where the apparatus 1 is a polishing machine for manufacturing a mirror wafer, that is, an apparatus that performs polishing without performing an epitaxial growth step on a wafer that has undergone the lapping step.

On the other hand, if the apparatus 1 is a polishing machine for manufacturing an epitaxial wafer, that is, an apparatus that performs an epitaxial growth step on a wafer that has undergone the lapping step and then performs polishing, the plate 6 is formed as follows. It is good to be something. That is, plate 6
It is preferable that the semiconductor wafer 5 is slid in contact with the polishing surface 2a with almost no pressing force applied. This is because the silicon epitaxial growth layer is easier to peel than single crystal silicon. This is basically the same when the apparatus 1 is a machine for performing chemical mechanical polishing (CMP) after various film forming steps.

Next, the configuration of the table 2 will be described in detail. As shown in FIGS. 1 and 3, the table 2 of the present embodiment includes a plurality of (here, three) circular base materials 1.
1A, 11B, and 11C are materials, and are a laminated ceramic structure obtained by laminating them. Three substrates 11A-
11C are integrated by being joined to each other via the brazing material layer 14. As a result, the base materials 11A-
The water channel 12 is formed at the joint interface of 11C.

The polishing surface 2a is formed on the upper surface of the uppermost one of the three substrates 11A, 11B and 11C (upper substrate 11A). Upper substrate 11A
Is formed with a through hole 20 at the center. The same penetration is made in the center of the lowermost substrate (lower substrate 11C) and in the center of the upper substrate 11A and the lower substrate 11C (intermediate substrate 11B). A hole 20 is formed.

In the vicinity of the through hole 20 in the lower base material 11C, through holes 15 and 16 having a smaller diameter are formed along the thickness direction of the base material. The lower end opening of one through hole 15 communicates with the supply path 4a provided in the rotary shaft 4, and the lower end opening of the other through hole 16 communicates with the discharge path 4b also provided in the rotary shaft 4. .

As shown in FIG. 2, a groove 13 constituting a part of a cooling water passage 12 as a fluid flow passage is formed on the upper surface of the intermediate base material 11B. In the present embodiment, the groove 13 is formed in a spiral shape over substantially the entire upper surface of the intermediate base material 11B. The center of the vortex substantially coincides with the axis of the intermediate base material 11B. The widths of the grooves 13 are equal, and the intervals between adjacent grooves 13 are also substantially equal. Specifically, in the present embodiment, the width of the groove 13 is set to about 1 mm to 20 mm. The interval between the grooves 13 is also set to about 1 mm to 20 mm.

As shown in FIG. 3A, the cross-sectional area of each part of the groove 13 is equal. A radius is provided at a corner portion between the side surface and the bottom surface of the groove 13. In the present embodiment, the depth of the groove 13 is set to about 1 mm to 10 mm.

The ratio of the width to the depth of the groove 13 is preferably 1 to 4, more preferably 1.5 to 3.5, and most preferably 2 to 3. When the width / depth ratio is smaller than 1, the depth of the groove 13 is relatively large and the width of the groove 13 is small. As a result, the groove 13
Not only becomes difficult to form, but also foreign matter such as dust is likely to clog the water channel 12. Of course, if the water channel 12 is clogged, the amount of the cooling water W flowing per unit time decreases, which causes a decrease in cooling capacity. In addition, the heat transfer area of the table 2 may be small, and the heat may not be efficiently transmitted to the cooling water W circulating in the water channel 12.

Conversely, when the width / depth ratio is greater than 4, the depth of the groove 13 is relatively small and the width of the groove 13 is relatively large. As a result, not only the strength of the bonding interface is reduced due to the decrease in the area ratio of the bonding portion, but also the water channel 12 is likely to be clogged by the entry of foreign matter.

On the other hand, a single groove 19 extending in the radial direction is formed on the lower surface of the intermediate base 11B. That is,
In the intermediate base material 11B, the grooves 13 are formed more densely on the upper surface side than on the lower surface side.

The grooves 13 in the present embodiment are
1B is a grinding groove formed by grinding both surfaces using a grindstone. The groove 13 may be formed by grinding, or may be formed by, for example, sandblasting or the like. When the ratio of the width to the depth of the groove 13 is reduced, grinding is more suitable than blasting.

Here, the intermediate base material 11 in which the groove 13 is formed
Let A be the projected area when B is viewed from the thickness direction. The area of the portion where the groove 13 is formed on the upper surface of the intermediate base material 11B is defined as A1. In this case, the ratio of the area A1 of the groove forming portion to the projection area A (that is, the occupied area ratio A1 / A of the groove forming portion) needs to be set to 30% to 70%. In other words, the ratio of the area A2 of the non-groove portion to the area A1 of the groove portion needs to be set to A1: A2 = 3: 7 to 7: 3.
However, the occupied area ratio A1 / A of the groove forming portion is 35%.
It is often set to 65%, 40% to 60%
It is particularly preferable that the value is set to.

The occupied area ratio A1 / A of the groove forming portion is 30%.
If it is less than this, it becomes difficult to flow a sufficient amount of the cooling water W through the water channel 12, and the area itself for transferring heat to the cooling water W also becomes small. Therefore, it is difficult to realize high temperature controllability, and there is still a possibility that temperature variation may occur in the table 2.

Conversely, when the occupied area ratio A1 / A of the groove forming portion exceeds 70%, the ratio of the area of the groove non-forming portion to the projected area decreases, and as a result, the brazing material layer 14 Cracks are likely to occur. Therefore, the table 2 is easily broken due to a decrease in the strength of the bonding interface. In addition, even if it does not break, the cooling water W easily leaks from the water channel 12, making it difficult to realize high temperature controllability.

As shown in FIG. 1, through holes 17 and 18 are formed in the intermediate substrate 11B along the thickness direction of the substrate. One through hole 17 is arranged corresponding to the starting point of the groove 13 located near the through hole 20. The other through hole 18 is arranged corresponding to the end point of the groove 13 located on the outer peripheral portion of the intermediate base material 11B. Through hole 17
The starting point of the groove 13 communicates with the through hole 15. An end point of the groove 13 on the upper surface and the groove 19 on the lower surface are communicated by the through hole 18.

The ceramic material forming each of the substrates 11A, 11B, 11C is preferably a silicide ceramic or a carbide ceramic. In particular, in the present embodiment, as the ceramic material, a silicon carbide sintered body (SiC sintered body) using silicon carbide powder as a starting material
The dense body is selected. This is because a silicon carbide sintered body is preferable among the above-mentioned ceramics because it has excellent heat conductivity, heat resistance, thermal shock resistance, wear resistance, rigidity, and the like. In the present embodiment, the three substrates 11A, 1
The same type of ceramic material is used for 1B and 11C. This is because the same type of ceramic material has a very small difference in thermal expansion coefficient, so that the occurrence of thermal stress can be prevented.

As the silicon carbide powder, α-type silicon carbide powder, β-type silicon carbide powder, amorphous silicon carbide powder and the like are used. In this case, only one kind of powder may be used alone, or two or more kinds of powder may be combined (α type + β type,
α-type + amorphous, β-type + amorphous, or α-type + β-type + amorphous).

The thermal conductivity of the substrates 11A to 11C is 10 W /
m · K or more, and more preferably 40 W / m · K
It is desirably up to 300 W / m · K. If the thermal conductivity is too small, temperature variations are likely to occur in the sintered body, which may prevent the semiconductor wafer 5 from having a large diameter and high quality. Conversely, the larger the thermal conductivity is, the more preferable it is.
This is because it is difficult to supply cheap and stable materials.

The thickness of the upper substrate 11A is 3 mm to 20 mm
, The thickness of the intermediate substrate 11B is 5mm ~ 30mm
, The thickness of the lower substrate 11C is 10mm ~ 50m
m.

The surface roughness of the non-groove portions on the upper and lower surfaces of the intermediate substrate 11B is preferably Ra ≦ 1.0 μm, and more preferably Ra ≦ 0.2 μm. Similarly, the surface roughness of the lower surface of the upper substrate 11A and the upper surface of the lower substrate 11C may also satisfy Ra ≦ 1.0 μm, and more preferably Ra ≦ 0.2 μm. This is because if the surface roughness is set small as described above, the bonding strength tends to increase.

The brazing material layer 14 is preferably formed using a brazing material containing silver as a main component and titanium. If this type of brazing material is used when a silicon carbide sintered body is selected as the base material 11A, 11B, 11C, a high bonding strength can be obtained while giving a high thermal conductivity to the brazing material layer 14. is there. That is, since titanium is easily diffused into the silicon carbide sintered body at the time of brazing, the brazing material has good compatibility with the silicon carbide sintered body. And
This is considered to contribute to the improvement of the bonding strength.

More specifically, in the present embodiment, when the base materials 11A, 11B and 11C are joined together, Ti-Ag
A Cu (titanium-silver-copper) brazing material is used. The content of titanium in this brazing material is 0.1% by weight to 10% by weight.
Wt% and its melting temperature is about 800 ° C.
Further, the thickness of the brazing material layer 14 is preferably set to about 10 μm to 50 μm.

Here, the procedure for manufacturing the table 2 will be briefly described. First, a disk-shaped molded body is produced by performing mold molding using a raw material mixture containing silicon carbide powder as a main component as a material. Furthermore, this molded body is heated to 1800 ° C.
By firing in a temperature range of 2400 ° C., three substrates 11A, 11B and 11C made of a silicon carbide sintered body are produced. In this case, if the firing temperature is too low, not only is it difficult to increase the crystal grain size, but also many pores remain in the sintered body. Conversely, if the firing temperature is too high, the decomposition of silicon carbide starts, resulting in a reduction in the strength of the sintered body.

Subsequently, the upper and lower surfaces of the intermediate base material 11B are ground using a grindstone to form grooves 13 and 19 having a predetermined width and a predetermined depth. Drilling is performed on the intermediate base material 11B and the lower base material 11C to form through holes 15, 16, 17, and 18 at predetermined locations. Further, these are laminated in a state where an appropriate amount of brazing material is arranged between the three base materials 11A to 11C. In such a state, the three substrates 11A to 11C are heated, and the substrates 11A to 11C are heated.
11C are brazed together. And finally, the upper substrate 1
The semiconductor wafer 5 is polished by polishing the upper surface of 1A.
The polishing surface 2a having a surface roughness suitable for polishing is formed. Such a surface polishing step may be performed before the bonding step or the groove processing step. The table 2 of the present embodiment is completed through the above procedure.

In the following, some examples and comparative examples which further embody this embodiment will be introduced. [Example 1] In the production of Example 1, as a starting material, a coarse powder of α-type silicon carbide having an average particle diameter of 30 µm (# 40
0) and α-type silicon carbide fine powder (GMF-15H2) having an average particle diameter of 0.3 μm. Then, 30 parts by weight of the fine powder was blended with 100 parts by weight of the coarse powder, and this was uniformly mixed.

After blending 5 parts by weight of polyvinyl alcohol and 50 parts by weight of water with respect to 100 parts by weight of this mixture, the mixture was mixed in a ball mill for 5 hours to obtain a uniform mixture. After drying the mixture for a predetermined time to remove a certain amount of water, an appropriate amount of the dried mixture was collected and granulated. At this time, the water content of the granules was adjusted to be about 0.8% by weight. Next, the granules of the mixture were molded using a metal mold at a pressing pressure of 1.3 t / cm ² . The density of the obtained three disk-shaped formed bodies is 2.6 g.
/ Cm ³ .

Next, the green compact was charged into a graphite crucible capable of shutting off outside air, and was fired using a tanman type firing furnace. The firing was performed in an argon gas atmosphere at 1 atm. Further, at the time of firing, heating was performed at a heating rate of 10 ° C./min to a maximum temperature of 2300 ° C., and thereafter, the temperature was maintained for 4 hours. Observation of the obtained base materials 11A to 11C revealed that an extremely dense three-dimensional network structure in which plate-like crystals were entangled in multiple directions. Substrates 11A to 11C had a density of 3.1 g / cm ³ , a thermal conductivity of 150 W / m · K, and a surface roughness of Ra = 0.2 μm. Here, the base material 11A
Dimensions of ~ 11C, diameter 600mm, thickness 10mm ~ 2
It was set to 0 mm.

Subsequently, by grinding both surfaces of the intermediate substrate 11B, a groove 13 having a depth of 5 mm and a width of 10 mm was formed as shown in FIG. That is,
Here, the width / depth ratio was set to 2. Further, the occupied area ratio A1 / A of the groove forming portion was set to about 45%.

Thereafter, the three substrates 11 are brazed.
A to 11C were integrated. Here, a foil-shaped silver brazing material containing titanium having a good compatibility with the silicon carbide sintered body was used, and the thickness of brazing material layer 14 was set to 20 μm.

After the brazing step, the upper substrate 11A
By polishing the upper surface of the semiconductor wafer 5, a table 2 having a polished surface 2a having a surface roughness suitable for polishing the semiconductor wafer 5 was finally completed.

The table 2 of Example 1 thus obtained was set in the above various polishing apparatuses 1, and the semiconductor wafers 5 of various sizes were polished while constantly circulating the cooling water W. As a result, no thermal deformation was observed in the table 2 for any type. In addition, it did not appear that the brazing material layer 14 was broken by cracks, and a sufficient adhesion strength was secured at the bonding interface between the substrates 11A to 11C. Therefore, when a destructive test of the table 2 was performed by a conventionally known method and the joint bending strength at the interface was measured by a method according to JIS R 1624, the value was 20 kgf / mm ² or more (see Table 1).
Of course, no leakage of the cooling water W from the joining interface was observed (see Table 1).

Further, when the temperature was measured at a plurality of points on the table 2 to examine the degree of the variation, the variation was found to be within ± 1.0 ° C. That is, the temperature variation was extremely small and the temperature controllability was good.

Observation of the semiconductor wafer 5 obtained through polishing by the various polishing apparatuses 1 showed no scratches or large warpage regardless of the wafer size. That is, when the table 2 of the present embodiment is used,
It has been found that a semiconductor wafer 5 of extremely high precision and high quality can be obtained. [Examples 2, 3, 4, and 5] In Example 2, a table 2 was manufactured basically in accordance with Example 1, except that the occupied area ratio A1 / A of the groove forming portion was set to about 65%. did.

In the third embodiment, the occupied area ratio A
Table 2 was made basically according to Example 1, except that 1 / A was set to about 35%. In Example 4,
In order to set the width / depth ratio to 1, a groove 13 having a depth of 5 mm and a width of 5 mm was formed by grinding (see FIG. 3B). For other items, Table 2 was manufactured in accordance with Example 1.

In Example 5, in order to set the width / depth ratio to 4, a groove 13 having a depth of 5 mm and a width of 20 mm was formed by grinding (see FIG. 3C). For other items, Table 2 was manufactured in accordance with Example 1.

Each of the obtained tables 2 of Examples 2 to 5 was set in the above-mentioned various polishing apparatuses 1, and the semiconductor wafer 5 was actually set.
Was polished. As a result, no thermal deformation was observed in the table 2 for any type. In addition, it did not appear that the brazing material layer 14 was broken by cracks, and a sufficient adhesion strength was secured at the bonding interface between the substrates 11A to 11C.

Then, when the joint bending strength was measured by the above-mentioned method, the values were all over 20 kgf / mm ² (see Table 1). Of course, cooling water W from the bonding interface
Was not observed at all (see Table 1). Further, the temperature variation in the table 2 is ± 2.0 ° C.
And the temperature controllability was good.

When the semiconductor wafer 5 obtained through polishing by the various polishing apparatuses 1 was observed, no damage or large warpage was observed regardless of the wafer size. That is, even when the tables 2 of Examples 2 to 5 were used, it was found that a semiconductor wafer 5 of extremely high precision and high quality could be obtained. [Comparative Examples 1, 2, 3] In Comparative Example 1, the occupied area ratio A1 / A of the groove formation portion was set to be larger than the above-mentioned preferable range (specifically, about 75%). For other items, Table 2 was manufactured in accordance with Example 1.

In Comparative Example 2, the occupied area ratio A
1 / A is made smaller than the above preferred range (specifically, 25
%). For other items, Table 2 was manufactured in accordance with Example 1.

In Comparative Example 3, the occupied area ratio A of the groove formation portion was
1 / A is set to about 25%, and a general silver brazing material containing no titanium (BAg-6; containing 50% by weight of silver, 34% by weight of copper, and 16% by weight of zinc) is used. And brazing. For other items, Table 2 was manufactured in accordance with Example 1.

Then, a destructive test was also performed on the obtained Table 2 of Comparative Examples 1 to 3, and the joint bending strength was measured. As a result, in Comparative Examples 1 and 3, as shown in Table 1, the measured values were considerably lower than those in Examples. That is, the bonding interface of Table 2 of Comparative Examples 1 and 3
High adhesion strength was not ensured as in the example. In particular, in Comparative Example 3, cracks occurred in the brazing material layer 14, and as a result, the cooling water W leaked from the bonding interface. Also, if the use is continued as it is, the brazing material layer 1
It was considered that the occurrence of cracks in No. 4 could lead to destruction.

The temperature variation in Table 2 also tended to be larger in Comparative Examples 2 and 3 than in each of the above Examples, and was clearly inferior in temperature controllability. Therefore, it was expected that even if the semiconductor wafer 5 was polished using the table 2 of these comparative examples, a semiconductor wafer 5 with high accuracy and high quality would not be obtained as in each example.

[0064]

[Table 1] Therefore, according to the example of the present embodiment, the following effects can be obtained.

(1) In any of the embodiments, the occupied area ratio A1 / A of the groove forming portion is set within a preferable range of 30% to 70%. For this reason, a sufficient amount of cooling water W can be circulated in the water channel 12, and the area itself for transmitting heat to the cooling water W is secured, and water leakage due to cracks is also prevented. Therefore, higher temperature controllability can be realized as compared with the conventional product. Therefore, it is possible to provide the table 2 which is hard to be broken and which can surely achieve a large diameter and high quality of the semiconductor wafer 5.

(2) In each embodiment, the depth / width ratio of the groove 13 is set within a preferable range of 1 to 4. Therefore, it is possible to improve the temperature controllability and the strength while avoiding the clogging of the water channel 12 and the difficulty in manufacturing. Needless to say, these factors contribute to achieving a large-diameter and high-quality semiconductor wafer 5 without fail.

(3) In each of the embodiments, since the base materials 11A to 11C made of sintered silicon carbide having high thermal conductivity are used,
The temperature controllability can be easily improved as compared with the case where another ceramic sintered body is selected.

Further, since the base materials 11A to 11C are joined to each other via the brazing material layer 14 which is compatible with the silicon carbide sintered body, high strength can be ensured at the joining interface. Therefore, the table 2 is extremely difficult to break. The setting of the thickness of the brazing material layer 14 to about 10 μm to 50 μm and the setting of the surface roughness to Ra ≦ 1.0 mm also contribute to the improvement of the bonding strength.

The embodiment of the present invention may be modified as follows. In another example of the intermediate base material 11B shown in FIG.
Is different from the embodiment. Another example of the intermediate substrate 11B includes four spiral grooves 13. Therefore, the waterway formation area is in a state of being divided into four. Non-groove forming portion 21 separating water channel formation areas
Extend in a belt shape continuously along the radial direction of the intermediate base material 11B. In FIG. 4, the non-groove forming portions 21 are arranged in a substantially cross shape. Therefore, in the case of such another example of the table 2, even if a large frictional force acts in the radial direction due to the pressing of the wafer holding plate 6, the groove non-formed portion 2
Due to the presence of 1, the occurrence of cracks in the brazing material layer 14 is avoided. Therefore, the table 2 is extremely unlikely to break. The average value of the width W1 of the groove non-formed portion 21 is 5
It is preferable that the distance is set to 20 mm to 20 mm. If the width W1 is too small, the occurrence of cracks may not be avoided when a large frictional force is applied. Conversely, width W
If the value of 1 is too large, there is a possibility that temperature variation will occur.

When the configuration as in the above-described another example is adopted, the number of divisions of the channel formation area may be smaller than 4 (to 2 or 3) or larger than 4 (5, 6, 7).
...).

The table 2 is not limited to the three-layer structure, but may have a two-layer structure, a four-layer structure, a five-layer structure, or the like. The groove 13 may be formed on the upper surface of the intermediate substrate 11B as in the embodiment, or may be formed on the lower surface of the upper substrate 11A. Similarly, the groove 19 may be formed on the lower surface of the intermediate substrate 11B as in the embodiment, and may be formed on the lower substrate 11B.
It may be formed on the upper surface of C.

The grooves 13 and 19 may be formed after the firing step as in the embodiment, or may be formed before the firing step. As the material for forming the table, silicide ceramics other than silicon carbide (for example, silicon nitride (Si ₃ N ₄ ), sialon, etc.) may be selected, or carbide ceramics other than silicon carbide (for example, boron carbide (B ₄ C )) May be selected. Further, not only ceramics of this type but also oxide ceramics typified by, for example, alumina are allowed.

Next, in addition to the technical ideas described in the claims, technical ideas grasped by the above-described embodiments will be enumerated below. (1) In any one of claims 1 to 4, the surface roughness of the non-groove-forming portion is Ra ≦ 1.0. Therefore, according to the invention described in the technical idea 1, further improvement in the strength at the bonding interface can be achieved.

(2) In claim 3, the average value of the width of the non-groove portion is 5 mm to 20 mm.
That. Therefore, according to the invention described in the technical idea 2, it is possible to reliably avoid the occurrence of cracks while avoiding temperature variations.

(3) A laminated structure in which a plurality of ceramic substrates including a ceramic substrate having a groove forming a part of a fluid flow path formed on at least one side surface are joined via a brazing material layer; On a table having a polishing surface on which a semiconductor wafer held on a holding surface of a wafer holding plate constituting a wafer polishing apparatus is slidably contacted, an area of a groove non-forming portion with respect to an area of the groove forming portion Characterized in that the ratio is set to 3: 7 to 7: 3.

(4) A multilayer structure in which a plurality of ceramic bases including a ceramic base having grooves forming a part of a fluid flow path formed on both side surfaces is joined via a brazing material layer. On a table having a polishing surface on which a semiconductor wafer held on a holding surface of a wafer holding plate constituting a wafer polishing apparatus is slidably contacted, the groove is relatively opposed to the ceramic base on which the groove is formed. The ratio of the area of the groove-forming portion of the surface to the projected area when the surface on the side where the grooves are formed densely (the upper surface of the ceramic base on which the grooves are formed) is viewed from the thickness direction is 30. %
A table for a wafer polishing apparatus, wherein the table is set to 70%.

(5) A polishing method using the table according to any one of claims 1 to 4, wherein the cooling fluid is caused to flow through the fluid flow path, and the polishing surface of the table is polished. A method of polishing a semiconductor wafer, wherein the semiconductor wafer is polished by rotating and sliding the semiconductor wafer. Therefore, this technical idea 5
According to the invention described in (1), the semiconductor wafer can be accurately polished.

(6) A method of manufacturing using the table according to any one of claims 1 to 4, wherein the cooling fluid is caused to flow through the fluid flow path and the polishing surface of the table is polished. A method of manufacturing a semiconductor wafer, comprising at least a step of polishing the semiconductor wafer by bringing the semiconductor wafer into sliding contact with the semiconductor wafer while rotating the semiconductor wafer. Therefore, according to the invention described in the technical idea 6, a large-diameter and high-quality semiconductor wafer can be reliably obtained.

[0079]

As described in detail above, according to the first aspect of the present invention, there is provided a wafer polishing apparatus which is hardly broken and can surely achieve a large diameter and high quality of a semiconductor wafer. Table can be provided.

According to the second aspect of the present invention, it is possible to improve the temperature controllability and the strength while avoiding the clogging of the fluid flow path and the difficulty in manufacturing. According to the third aspect of the present invention, it is possible to make the table extremely hard to break.

According to the fourth aspect of the present invention, the temperature controllability can be easily improved, and the table can be made extremely hard to break.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing a wafer polishing apparatus according to an embodiment of the present invention.

FIG. 2 is a plan view of a base material constituting the table for the wafer polishing apparatus according to the embodiment.

FIG. 3A is a partially enlarged cross-sectional view of a table according to the first embodiment;
(b) is a partial enlarged sectional view of the table of Example 4, (c) is a partial enlarged sectional view of the table of Example 5.

FIG. 4 is a plan view of a base material constituting a wafer polishing table of another example.

[Explanation of symbols]

1. Wafer polishing device, 2. Table for wafer polishing device,
2a: Polished surface, 5: Semiconductor wafer, 6: Wafer holding plate, 6a: Holding surface, 11A, 11C: Ceramic substrate, 11B: Ceramic substrate with grooves formed, 14 ...
Brazing material layer, A: projected area, A1: area of groove forming portion, A
2: Area of the non-groove-formed portion

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 3C058 AA07 AA09 BC02 CB03 CB06 DA17 5F031 CA02 HA02 HA05 HA14 MA22 PA18

Claims (4)

[Claims] 1. A laminated structure in which a plurality of ceramic substrates including a ceramic substrate having a groove forming a part of a fluid flow path formed on at least one side surface are joined via a brazing material layer. On a table having a polishing surface on which a semiconductor wafer held on a holding surface of a wafer holding plate constituting a wafer polishing apparatus is slidably contacted, a ceramic substrate having the grooves formed is formed from a thickness direction. The ratio of the area of the groove forming portion to the projected area when viewed is 3
A table for a wafer polishing apparatus, which is set at 0% to 70%. 2. The table for a wafer polishing apparatus according to claim 1, wherein a ratio of a width to a depth of the groove is 1 to 4. 3. The table for a wafer polishing apparatus according to claim 1, further comprising a groove-free portion extending continuously in a band shape along a radial direction of said ceramic base material. 4. The ceramic substrate according to claim 1, wherein each of the ceramic substrates is made of a silicon carbide sintered body, and these are joined via a brazing material layer containing silver as a main component and titanium. 4. The table for a wafer polishing apparatus according to any one of claims 3 to 3.