JP2001062708A - Table for wafer polishing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a table for a wafer polishing device capable of meeting the trend toward larger bore and higher quality in a semiconductor wafer without difficulty of manufacture. SOLUTION: A wafer polishing device 1 is provided with a table 2 and wafer hold plate 6. A semiconductor wafer 5 held to a hold surface 6a of the plate 6 is brought into slide contact with a polishing surface 2a provided in an upper surface of the table 2. The table 2 is a layered structure laminating a plurality of sheets of ceramics-made base materials 11A, 11B. An interface of the base materials 11A, 11B is formed with a fluid flow path 12. A coefficient of the thermal expansion of each base material 11A, 11B is almost equal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a table for a wafer polishing apparatus.

[0002]

2. Description of the Related Art Generally, a mirror wafer having a mirror surface can be obtained by slicing a single crystal silicon ingot thinly and polishing it through a lapping step and a polishing step. In particular, when the epitaxial growth layer forming step is performed after the lapping step and before the polishing step, an epitaxial wafer can be obtained. Then, these bare wafers are oxidized,
Various processes such as etching and impurity diffusion are repeatedly performed, and finally a semiconductor device is manufactured.

In the above series of steps, it is necessary to polish the device formation surface of a semiconductor wafer by using some means. Therefore, various types of wafer polishing apparatuses (lapping machines, polishing machines, and the like) have been conventionally proposed.

A typical wafer polishing apparatus includes a table, a pusher plate, a cooling jacket, and the like. A table made of a metal material such as stainless steel is fixed on an upper portion of the cooling jacket. Cooling water is circulated through a flow path provided in the cooling jacket. A semiconductor wafer is attached to the holding surface of the pusher plate using a thermoplastic wax. The semiconductor wafer held by the rotating pusher plate is pressed from above onto the polished surface of the table. As a result, the semiconductor wafer comes into sliding contact with the polishing surface, and one side surface of the wafer is uniformly polished. Then, the heat generated in the wafer at this time is conducted to the cooling jacket via the table, and is taken out of the apparatus by the cooling water circulating in the flow path.

[0005] The table for a wafer polishing apparatus is often heated to a high temperature during a polishing operation. For this reason, the table forming material is required to have heat resistance and thermal shock resistance. Also,
Abrasion resistance is also required because frictional force constantly acts on the polished surface of the table. Further, in order to realize a large-diameter, high-quality wafer, it is necessary to minimize the temperature variation in the table, that is, to improve the heat uniformity of the table. For this reason, the table forming material is also required to have high thermal conductivity. Under these circumstances, ceramics have recently received particular attention as a suitable table-forming material that replaces conventional metals.

[0006]

In order to further reduce the temperature variation in the table, a cooling water passage is provided not in the cooling jacket but in the table itself, and the table is directly and efficiently circulated by cooling water circulation. It is thought that it should be cooled. However, since the ceramic material is hard, it is generally difficult to form a cooling channel in the material by a normal processing method. Therefore, the present inventors have concluded that a plurality of ceramic base materials should be laminated and a cooling water channel should be formed at the interface between the base materials.

However, when the table having the above structure is used under high temperature conditions, the entire table may be warped due to generation of thermal stress, and it may not be possible to improve the flatness of the wafer. Further, it is expected that the occurrence of the warp becomes more remarkable as the table becomes larger. Therefore,
In order to achieve high quality and large diameter wafers, it is essential to take some measures to prevent the occurrence of warpage of the entire table.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a wafer polishing apparatus which can cope with an increase in the diameter and the quality of a semiconductor wafer despite no difficulty in manufacturing. An object of the present invention is to provide a device table.

[0009]

According to the first aspect of the present invention, a semiconductor wafer held on a holding surface of a wafer holding plate constituting a wafer polishing apparatus is slid. A table having a polishing surface to be contacted, wherein a plurality of ceramic base materials having substantially equal thermal expansion coefficients are laminated, and a table for a wafer polishing apparatus in which a fluid flow path is formed at an interface between the base materials. And

According to a second aspect of the present invention, there is provided a table having a polished surface on which a semiconductor wafer held on a holding surface of a wafer holding plate constituting a wafer polishing apparatus is slidably contacted. In a state in which a plurality of ceramic base materials having substantially the same thickness are laminated, each base material is bonded via an adhesive layer, and a wafer polishing apparatus table in which a fluid flow path is formed at a bonding interface between the base materials is formed. Make a summary.

According to a third aspect of the present invention, in any one of the first and second aspects, each of the base materials has a thermal expansion coefficient of 8.
It was determined to be 0 × 10 ⁻⁶ / ° C. or less. According to a fourth aspect of the present invention, in any one of the first and second aspects, each of the substrates has a thermal expansion coefficient of 5.0 × 10 ⁻⁶ / ° C. or less.

According to a fifth aspect of the present invention, in the fourth aspect, the difference between the thermal expansion coefficients of the respective substrates is 1.0 × 10 ⁻⁶ /
It was assumed to be within ° C. Hereinafter, the “action” of the present invention will be described.

According to the first to fifth aspects of the present invention, the heat on the polished surface side is quickly conducted into the table and is reliably transferred to the fluid in the fluid flow path. Therefore, heat can be efficiently released from the table as compared with the case where cooling is performed indirectly, and the temperature variation in the table is reduced. That is, the temperature uniformity of the table is improved, and the temperature control by fluid supply becomes relatively easy. Further, since a plurality of ceramic base materials having substantially equal thermal expansion coefficients are used, even when used under high temperature conditions, thermal stress that causes the entire table to warp hardly occurs. Therefore, the entire table is prevented from warping, and the flatness of the wafer is also improved.

As a result, it is possible to provide a table which can cope with an increase in the diameter and quality of the wafer. In addition, since this substrate is made of ceramics, it has excellent thermal conductivity, heat resistance, thermal shock resistance, wear resistance, and the like, as compared with metal.
Further, according to the present invention employing the laminated structure, the fluid flow path can be formed relatively easily at the interface of the base material, so that there is no difficulty in manufacturing the table.

[0015] Even when the respective substrates are joined to each other via an adhesive layer as in the invention according to the second aspect, the joint interface is hardly broken by cracks, and a high strength table is provided. It can be. Also, fluid leakage from the joint interface can be prevented.

The thermal expansion coefficient of each substrate is 8.0 ×
It is preferably at most 10 ⁻⁶ / ° C. and 5.0 × 10 ^−6.
/ ° C or lower is particularly preferred. Thermal expansion coefficient of silicon (Si) (3.5 ×
10 ⁻⁶ / ° C.) and the thermal expansion coefficient of the table is reduced. In addition, the difference in the coefficient of thermal expansion of each substrate,
The temperature is preferably within 1.0 × 10 ⁻⁶ / ° C. This is because it is possible to more reliably prevent the occurrence of thermal stress that causes warpage and cracks.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A wafer polishing apparatus 1 according to one embodiment of the present invention will be described below in detail with reference to FIGS.

FIG. 1 shows a wafer polishing apparatus 1 according to this embodiment.
Is schematically shown. The table 2 constituting the wafer polishing apparatus 1 has a disk shape. The upper surface of the table 2 is a polishing surface 2a for polishing the semiconductor wafer 5. A polishing cloth (not shown) is attached to the polishing surface 2a. The table 2 according to the present embodiment is directly and horizontally fixed to the upper end surface of the cylindrical rotating shaft 4 without using a cooling jacket. Therefore, when the rotation shaft 4 is driven to rotate, the table 2 rotates integrally with the rotation shaft 4.

As shown in FIG. 1, the wafer polishing apparatus 1 includes a plurality of (two in FIG. 1 for convenience of illustration) wafer holding plates 6. As a material for forming the plate 6, for example, a glass, a ceramic material such as alumina, a metal material such as stainless steel, or the like is employed. A pusher bar 7 is fixed to the center of one side surface (non-holding surface 6b) of each wafer holding plate 6. Each pusher bar 7 is located above the table 2 and is connected to driving means (not shown). Each pusher bar 7 horizontally supports each wafer holding plate 6. At this time, the holding surface 6
a is in a state facing the polishing surface 2a of the table 2. Further, each pusher bar 7 can not only rotate with the wafer holding plate 6 but also move up and down within a predetermined range. Instead of the method of moving the plate 6 up and down, a structure of moving the table 2 up and down may be adopted. The semiconductor wafer 5 made of silicon is adhered to the holding surface 6a of the wafer holding plate 6 using, for example, thermoplastic wax. The semiconductor wafer 5 has a holding surface 6a
May be adsorbed by evacuation or electrostatically. At this time, the polished surface 5a of the semiconductor wafer 5
Must face the polishing surface 2a of the table 2.

When the apparatus 1 is a lapping machine, that is, an apparatus for polishing a wafer that has undergone a slicing step in a bare wafer process, the wafer holding plate 6 is preferably as follows. That is, it is preferable that the plate 6 slides the semiconductor wafer 5 in a state where a predetermined pressing force is applied to the polishing surface 2a. This is because, even if a pressing force is applied by such a wafer holding plate 6 (that is, a pusher plate), there is no need to worry about peeling of the epitaxial growth layer since the epitaxial growth layer is not formed. The same applies to a case where the apparatus 1 is a polishing machine for manufacturing a mirror wafer, that is, an apparatus that performs polishing without performing an epitaxial growth step on a wafer that has undergone the lapping step.

On the other hand, when the apparatus 1 is a polishing machine for manufacturing an epitaxial wafer, that is, an apparatus that performs an epitaxial growth step on a wafer that has undergone the above-described lapping step and then performs polishing, the plate 6 is formed as follows. It is good to be something. That is, plate 6
It is preferable that the semiconductor wafer 5 is slid in contact with the polishing surface 2a with almost no pressing force applied. This is because the silicon epitaxial growth layer is easier to peel than single crystal silicon. This is basically the same when the apparatus 1 is a machine for performing chemical mechanical polishing (CMP) after various film forming steps.

Next, the configuration of the table 2 will be described in detail. As shown in FIGS. 1 and 2, the table 2 of the present embodiment is a multilayer ceramic structure formed by laminating a plurality of (here, two) ceramic bases 11A and 11B. On the bottom surface of the upper one (upper substrate 11A) of the two substrates 11A and 11B, grooves 13 forming a part of cooling water channel 12 as a fluid flow path are formed in a predetermined pattern. On the other hand, such a groove 13 is not particularly formed in the lower substrate 11B. Two substrates 1
1A and 11B are a brazing material layer 1 as a metal-based adhesive layer.
4 are integrated with each other by being joined to each other. As a result, the water channel 12 is formed at the joint interface between the substrates 11A and 11B. A substantially central portion of the lower substrate 11B is
A through hole 15 is formed. These through holes 15
The flow path 4 a provided in the rotary shaft 4 communicates with the water channel 12.

The ceramic material forming each of the substrates 11A and 11B is preferably a silicide ceramic or a carbide ceramic. Particularly, in the present embodiment, a silicon carbide sintered body (SiC sintered body) using silicon carbide powder as a starting material is selected as the ceramic material. Therefore, in the present embodiment, the two substrates 11A,
11B, the same type of ceramic material is used. In addition, the silicon carbide sintered body is preferable among the above-mentioned ceramics because it has excellent heat conductivity, heat resistance, thermal shock resistance, wear resistance, rigidity, and the like.

The thermal conductivity of the upper substrate 11A is
It may be set to a value equal to or greater than the thermal conductivity of 1B. Therefore, in the present embodiment, a dense body having strong bonding between crystal grains and having extremely few pores is selected as the upper substrate 11A. On the other hand, a porous body having many pores is selected as the lower substrate 11B.

The thermal expansion coefficients of both substrates 11A and 11B at 0 ° C. to 400 ° C. are 8.0 × 10 ⁻⁶ / ° C. or less, further 6.5 × 10 ⁻⁶ / ° C. or less, and especially 5 × 10 ⁻⁶ / ° C. or less. 0.0 × 10 ⁻⁶ /
It is good to be below ° C. The thermal expansion coefficient of silicon is 3.
This is to minimize the difference between the thermal expansion coefficient of the table 2 and 5 × 10 ⁻⁶ / ° C. However, the thermal expansion coefficients of both base materials 11A and 11B at 0 ° C. to 400 ° C. are as follows:
Both are preferably at least 2.0 × 10 ⁻⁶ / ° C.

In this embodiment, the thermal expansion coefficients are substantially equal.
The base materials 11A and 11B need to be used. Concrete
In other words, the difference between the thermal expansion coefficients of the base materials 11A and 11B
Is 1.0 × 10^-6/ ° C or less, and 0.5 × 10^-6
/ ° C or less, especially 0.2 × 10 ^-6/ ℃
Good. The smaller the difference, the more warpage and cracks
Because it can more reliably prevent the occurrence of thermal stress that causes
is there.

The thickness of the upper substrate 11A is smaller than the thickness of the lower substrate 11B. This ensures that the thermal resistance of the upper substrate 11A is lower than the thermal resistance of the lower substrate 11B. In the present embodiment, the upper substrate 11
The thickness of A is set to 3 mm to 20 mm. The thickness of the lower substrate 11B is set to 10 mm to 50 mm.

As the silicon carbide powder, α-type silicon carbide powder, β-type silicon carbide powder, amorphous silicon carbide powder and the like are used. In this case, only one kind of powder may be used alone, or two or more kinds of powder may be combined (α type + β type,
α-type + amorphous, β-type + amorphous, or α-type + β-type + amorphous). Note that a sintered body manufactured using β-type silicon carbide powder contains more large plate-like crystals than a sintered body manufactured using other types of silicon carbide powder. Therefore, when it is desired to obtain a dense body, the grain boundaries of the crystal grains in the sintered body are reduced, and the sintered body can be particularly excellent in thermal conductivity.

The upper substrate 11A made of a silicon carbide sintered body preferably has a thermal conductivity of 40 W / mK or more.
It is desirable that it be 0 W / mK to 300 W / mK. If the thermal conductivity is too small, temperature variations are likely to occur in the sintered body, which may prevent the semiconductor wafer 5 from having a large diameter and high quality. Conversely, the higher the thermal conductivity is, the more preferable it is. On the other hand, if the thermal conductivity exceeds 300 W / mK, it is difficult to supply a low-cost and stable material. The thermal conductivity of the lower substrate 11B is preferably 5 W / mK or more, and more preferably 10 W / mK to 80 W / m.
K is desirable. The reason is that the cooling water channel 12
This is to prevent the heat radiation below the cooling section constituted by the above, thereby facilitating the temperature control of the polishing surface 2a.

The brazing material layer 14 is preferably formed using a brazing material containing titanium. When a silicon carbide sintered body is selected as the base materials 11A and 11B, by using a brazing material containing titanium, it is possible to obtain a high bonding strength while securing a high thermal conductivity in the brazing material layer 14. . Since titanium is easily diffused into pores of the sintered body at the time of brazing, at present, this property is considered to be a main factor for improving the bonding strength.

In this embodiment, a Ti-Ag-Cu (titanium-silver-copper) brazing material is used for joining the base materials 11A and 11B together. The content of titanium in this brazing material is about 0.1% by weight to 10% by weight, and its melting temperature is about 850 ° C. Further, the thickness of the brazing material layer 14 is preferably set to about 10 μm to 50 μm.

The groove 13 forming a part of the water channel 12 is a grinding groove formed by grinding the bottom surface of the upper substrate 11A using a grindstone. The groove 13 is not limited to one formed by grinding, but may be one formed by injection processing such as sandblasting. Groove 13
Is preferably set to about 3 mm to 10 mm, and the width is set to about 5 mm to 20 mm.

Here, the procedure for manufacturing the table 2 will be briefly described. First, a mixture obtained by adding a small amount of a sintering aid to silicon carbide powder is uniformly mixed. As the sintering aid, boron and its compound, aluminum and its compound, carbon and the like are selected. This is because if a small amount of this kind of sintering aid is added, the crystal growth rate of silicon carbide increases, leading to densification and high thermal conductivity of the sintered body.

Next, the above mixture is used as a material to carry out mold molding to produce a disk-shaped molded body.
Further, by firing this molded body in a temperature range of 1800 ° C. to 2400 ° C., the base material 1 made of a silicon carbide sintered body is fired.
Two 1A and 11B are manufactured. In this case, if the firing temperature is too low, not only is it difficult to increase the crystal grain size, but also many pores remain in the sintered body. Conversely, if the firing temperature is too high, the decomposition of silicon carbide starts, resulting in a reduction in the strength of the sintered body.

Subsequently, the bottom surface of the upper base material 11A is ground by using a grindstone to form a groove 13 having a predetermined width and a predetermined depth in almost the entire surface of the upper surface. Furthermore, two substrates 1
With the appropriate amount of brazing material placed between 1A and 11B, both 11A and 11B are laminated. In this state, the two substrates 11A and 11B are heated, and the substrates 11A and 11B are brazed together. Finally, the surface of the upper substrate 11A is polished to form a polished surface 2a having a surface roughness suitable for polishing the semiconductor wafer 5. Such a surface polishing step may be performed before the bonding step or the groove processing step. The table 2 of the present embodiment is completed through the above procedure. Hereinafter, an example that more specifically embodies the present embodiment will be introduced. [Example] In the production of the upper substrate 11A, 94.6 was used.
"Beta Random (trade name)" manufactured by IBIDEN CO., LTD. The silicon carbide powder had an average crystal grain size of 1.3 μm and contained 1.5% by weight of boron and 3.6% by weight of free carbon.

First, 5 parts by weight of polyvinyl alcohol and 300 parts by weight of water were mixed with 100 parts by weight of the silicon carbide powder, and then mixed in a ball mill for 5 hours to obtain a uniform mixture. After drying the mixture for a predetermined time to remove a certain amount of water, an appropriate amount of the dried mixture was collected and granulated. Next, the granules of the mixture were molded using a metal mold under a pressing pressure of 50 kg / cm ² . The density of the obtained disk-shaped green compact is 1.2 g /
cm ³ .

Next, the green compact was charged into a graphite crucible capable of shutting off outside air, and was fired using a tanman type firing furnace. The firing was performed in an argon gas atmosphere at 1 atm. Further, at the time of baking, heating was performed at a heating rate of 10 ° C./min to a maximum temperature of 2300 ° C., and thereafter, the temperature was maintained for 2 hours. Observation of the obtained upper base material 11A showed an extremely dense three-dimensional network structure in which plate-like crystals were entangled in multiple directions. The density of the upper substrate 11A is 3.1.
g / cm ³ and the thermal conductivity was 150 W / mK. The upper substrate 11A contained 0.4% by weight of boron and 1.8% by weight of free carbon. Here, the dimensions of the upper substrate 11A were set to a diameter of 600 mm and a thickness of 5 mm.

On the other hand, a commercially available porous silicon carbide sintered body (specifically, “SCP-5 (trade name)” manufactured by IBIDEN Co., Ltd.) was used as the lower substrate 11B. The sintered body had a density of about 1.9 g / cm ³ and a thermal conductivity of 30 W / m.
K, porosity is 40% to 45%. The dimensions of the lower substrate 11B were also set to a diameter of 600 mm and a thickness of 25 mm.

The upper base material 11A and the lower base material 11B
Has a thermal expansion coefficient of 4.5 × 1 at 0 ° C. to 400 ° C.
0 ⁻⁶ / ° C., 4.4 × 10 ⁻⁶ / ° C., and the difference is 0.1
× 10 ^-6 / ° C.

Subsequently, a groove 13 having a depth of 5 mm and a width of 10 mm is formed on the back surface of the upper substrate 11A by grinding.
The two substrates 11A and 11B were integrated by brazing. Here, a foil-like silver brazing material containing titanium was used, and the thickness of the brazing material layer 14 was set to 20 μm.

After the brazing step, the upper base material 11A
The table 2 having a polished surface 2a having a surface roughness suitable for polishing the semiconductor wafer 5 was finally completed by subjecting the surface to polishing. The table 2 of the embodiment thus obtained was set in the above-mentioned various polishing apparatuses 1, and the cooling water W
Is constantly circulated, and polishing of semiconductor wafers (silicon wafers) 5 of various sizes is performed under a high temperature condition of several hundred degrees Celsius. As a result, for both types, Table 2
No warpage was observed. Further, no breakage of the brazing material layer 14 occurs due to cracks, and the base material 11A,
It seemed that sufficient adhesion strength was secured at the bonding interface of 11B. Therefore, a destructive test of the table 2 is performed by a conventionally known method, and the joint bending strength at the interface is determined by J.
The value was about 30 kgf / mm ^{2 as} measured by a method according to IS R 1624. Of course, no leakage of the cooling water W from the joint interface was observed at all.

When the wafer 5 obtained through polishing by various polishing apparatuses 1 was observed, the wafer 5 was not damaged irrespective of the wafer size. Also, there was no occurrence of a large warp in the wafer 5. More specifically, the flatness of the wafer 5 at this time was within 2 μm at 600 mmφ. Also,
The flatness of the plate 6 at a temperature of 40 ° C. was within 5 μm.

That is, it was found that when the table 2 of the present embodiment was used, an extremely accurate and high quality semiconductor wafer 5 could be obtained. Therefore, according to the example of the present embodiment, the following effects can be obtained. (1) In the table 2 of the wafer polishing apparatus 1, a water channel 12 is formed at a bonding interface between the silicon carbide base materials 11A and 11B. Therefore, the heat on the polishing surface 2 a side is conducted through the inside of the table 2 and reliably transferred to the cooling water W flowing in the water passage 12. Therefore, compared to the conventional apparatus in which the table 2 is placed on the cooling jacket to perform indirect cooling, the heat is
Can be escaped directly and efficiently. Therefore, the temperature variation in the table 2 is also reduced. That is, the temperature uniformity of the table 2 is improved, and the temperature control by the fluid supply becomes relatively easy. As a result, the wafer 5 can be processed with high accuracy.

The table 2 of the apparatus 1 is constituted by using two silicon carbide base materials 11A and 11B having substantially equal thermal expansion coefficients. Therefore, even when used under high temperature conditions, thermal stress that causes the entire table 2 to warp is less likely to occur. Therefore, the entire table 2 is prevented from warping, and the flatness of the wafer 5 is also improved.

As a result, it is possible to obtain the table 2 which can cope with an increase in diameter and quality of the wafer 5. (2) In this table 2, two substrates 11A and 11B
Is adopted. Therefore, waterway 12
The upper substrate 11A
After being formed on the back surface of the base material, the base materials 11A and 11B can be joined to each other. Therefore, the water channel 12 can be formed relatively easily at the interface between the substrates 11A and 11B. Therefore, there is an advantage that there is no particular difficulty in manufacturing the table 2. Further, with this structure, it is not necessary to add a piping structure to the joint interface, so that the structure is not complicated and the cost is not increased.

(3) Two substrates 1 constituting the table 2
1A and 11B are firmly joined by brazing via a brazing material layer 14. Therefore, unlike the case where the layers are laminated without the brazing material layer 14 interposed therebetween, high bonding strength can be secured at the bonding interface. In addition, since the thermal stress is less likely to be generated on the table 2 as described above, crack breakage at the joining interface is reliably avoided. Therefore,
A high-strength table 2 that is difficult to break can be obtained.
In addition, as a result of avoiding breakage due to cracks, water leakage from the joint interface can be prevented beforehand.

(4) In the case of the wafer polishing apparatus 1 using the table 2, since the cooling jacket itself is not required, the structure of the entire apparatus is simplified. The embodiment of the present invention may be modified as follows.

The base materials 11A and 11B do not necessarily have to be bonded via an adhesive layer. For example, in another example of the table 31 shown in FIG. 3, instead of omitting the adhesive layer, the base materials 11A and 11B are integrated by fastening the bolt 23 and the nut 24. Even in this case, the entire table 21 can be prevented from warping by setting the thermal expansion coefficients of the bases 11A and 11B to be substantially equal.

Table 2 of the embodiment having a two-layer structure
Alternatively, the present invention may be embodied in a table having a three-layer structure. Of course, a stacked structure of four or more layers may be used. The groove 13 may be formed only on the upper substrate 11A as in the embodiment, may be formed only on the lower substrate 11B, or may be formed on both the substrates 11A and 11B. You may.

In the embodiment, the upper substrate 11A is formed using a dense silicon carbide sintered body, and the lower substrate 11B is formed using a porous silicon carbide sintered body. Was. Of course, the combination is not limited to such a combination.
1A and 11B may be formed, or both substrates 11A and 11B may be formed using a porous silicon carbide sintered body. That is, by making the materials of both base materials 11A and 11B the same, the thermal expansion coefficients of both may be set completely equal.

Further, as a silicide ceramic other than silicon carbide, for example, silicon nitride (Si ₃ N ₄ ), sialon, or the like may be selected. As a carbide ceramic other than silicon carbide, for example, boron carbide (B ₄ C) Etc. may be selected. However, also in this case, it is desirable that the thermal expansion coefficient satisfy the condition of 8.0 × 10 ⁻⁶ / ° C. or less.

In using the table 2 of the present embodiment, a liquid other than water may be circulated in the water channel 12.
Further, a gas may be circulated. The multilayer ceramic structure of the present invention is not only embodied as the table 2 of the wafer polishing apparatus 1, but may be applied to other uses.

Next, in addition to the technical ideas described in the claims, the technical ideas grasped by the above-described embodiments will be listed below together with their effects. (1) In any one of claims 1 to 5, each of the base materials is made of silicide ceramics or carbide ceramics (preferably, a silicon carbide sintered body). Therefore, according to the invention described in the technical idea 1, thermal conductivity, heat resistance, thermal shock resistance, wear resistance, rigidity, and the like can be improved.

(2) A table having a polishing surface on which a silicon wafer held on a holding surface of a wafer holding plate constituting a wafer polishing apparatus is slidably contacted.
An upper substrate made of a dense silicon carbide sintered body having a thermal expansion coefficient of about 4.5 × 10 ⁻⁶ / ° C.
In a state where the thermal expansion coefficient at about 400 ° C. to about 400 ° C. is about 4.4 × 10 ⁻⁶ / ° C. and the lower substrate made of a porous silicon carbide sintered body is laminated, A wafer polishing apparatus table joined through a brazing material layer containing titanium and having a fluid flow path having a groove as a part at a joint interface of the base material.

(3) Both thermal expansion coefficients are 8.0 × 1
A multilayer ceramic structure in which a plurality of substrates made of silicide ceramics or carbide ceramics having a temperature of 0 ⁻⁶ / ° C. or less are laminated, and a fluid channel is formed at an interface between the substrates.

(4) A polishing method using the table according to any one of claims 1 to 5, wherein the cooling fluid is caused to flow through the fluid flow path and the polishing surface of the table is polished. A method of polishing a semiconductor wafer, wherein the semiconductor wafer is polished by rotating and sliding the semiconductor wafer. Therefore, this technical idea 4
According to the invention described in (1), the wafer is less likely to be adversely affected by heat during polishing, so that the wafer can be accurately polished, and a large-diameter and high-quality wafer can be obtained.

(5) A method of manufacturing using the table according to any one of claims 1 to 5, wherein the cooling fluid flows through the fluid flow path while the polishing fluid is applied to the polishing surface of the table. A method of manufacturing a semiconductor wafer, comprising at least a step of polishing the semiconductor wafer by bringing the semiconductor wafer into sliding contact with the semiconductor wafer while rotating the semiconductor wafer. Therefore, according to the invention described in the technical idea 5, the wafer is hardly affected by heat during polishing, and a large-diameter and high-quality wafer can be obtained.

[0058]

As described in detail above, according to the first to fifth aspects of the present invention, it is possible to cope with an increase in diameter and quality of a semiconductor wafer despite no difficulty in manufacturing. A table for a wafer polishing apparatus can be provided.

According to the second aspect of the present invention, a high-strength table that is hard to break down can be provided. According to the third and fourth aspects of the present invention, it is possible to more reliably prevent the occurrence of thermal stress that causes warpage and cracks, so that it is possible to reliably increase the diameter and quality of the semiconductor wafer and increase the strength of the table. Can be.

[Brief description of the drawings]

FIG. 1 is a schematic view showing a wafer polishing apparatus according to an embodiment of the invention.

FIG. 2 is an enlarged sectional view of a main part of a table used in the wafer polishing apparatus according to the embodiment.

FIG. 3 is an enlarged sectional view of a main part of a table used in another example of a wafer polishing apparatus.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Wafer polishing device, 2, 31 ... Table for wafer polishing devices, 2a ... Polishing surface, 5 ... Semiconductor wafer, 6 ... Wafer holding plate, 6a ... Holding surface, 11A, 11B ... Base material, 1
2 ... a water channel as a fluid flow path, 14 ... a brazing material layer as an adhesive layer.

Claims (5)

[Claims] 1. A table having a polishing surface on which a semiconductor wafer held on a holding surface of a wafer holding plate constituting a wafer polishing apparatus is slidably contacted, wherein a ceramic base material having substantially equal thermal expansion coefficients is provided. And a wafer polishing apparatus table in which a plurality of sheets are stacked and a fluid channel is formed at an interface of the base material. 2. A table having a polishing surface on which a semiconductor wafer held on a holding surface of a wafer holding plate constituting a wafer polishing apparatus is slidably contacted, wherein a ceramic base material having substantially equal thermal expansion coefficients is provided. In a state in which a plurality of substrates are stacked, the respective substrates are joined via an adhesive layer, and a fluid flow path is formed at a joint interface between the substrates, the table for a wafer polishing apparatus. 3. The thermal expansion coefficient of each of the base materials is 8.
The table for a wafer polishing apparatus according to claim 1, wherein the temperature is 0 × 10 ⁻⁶ / ° C. or less. 4. The thermal expansion coefficient of each of the substrates is 5.
The table for a wafer polishing apparatus according to claim 1, wherein the temperature is 0 × 10 ⁻⁶ / ° C. or less. 5. The difference between thermal expansion coefficients of the respective substrates is 1.0 ×
The table for a wafer polishing apparatus according to claim 4, wherein the temperature is within 10 ^-6 / ° C.