JP2001177220A - Manufacturing method of wiring board - Google Patents

Manufacturing method of wiring board

Info

Publication number
JP2001177220A
JP2001177220A JP35631399A JP35631399A JP2001177220A JP 2001177220 A JP2001177220 A JP 2001177220A JP 35631399 A JP35631399 A JP 35631399A JP 35631399 A JP35631399 A JP 35631399A JP 2001177220 A JP2001177220 A JP 2001177220A
Authority
JP
Japan
Prior art keywords
nickel
layer
wiring
plating layer
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35631399A
Other languages
Japanese (ja)
Inventor
Hiroshi Tsukamoto
弘志 塚本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP35631399A priority Critical patent/JP2001177220A/en
Publication of JP2001177220A publication Critical patent/JP2001177220A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15174Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Abstract

PROBLEM TO BE SOLVED: To solve the problem, where nickel of a nickel-plated layer is moved the surface of a gold-plated layer for diffusion, and the electrode of a semiconductor element cannot be connected firmly and electrically to a wiring layer. SOLUTION: A wiring board 4, where a wiring layer 2 is formed in an insulating substrate 1, is dipped into a nickel-plated bath using nickel salt and hydrazine as the metal supply source and the reduction agent, respectively, a nickel- plated layer 6 consisting of nickel particles with an average grain size of 20 nm or more is deposited onto the exposure surface of the wiring layer 2 of the wiring board 4, the wiring board 4 where the nickel-plated layer 6 is deposited is dipped into a gold-plating bath, and a gold-plated layer 7 is deposited on the surface of the nickel-plated layer 6.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体素子を収容す
るための半導体素子収納用パッケージや混成集積回路基
板等に用いられる配線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing a semiconductor device and a wiring board used for a hybrid integrated circuit board.

【0002】[0002]

【従来の技術】従来、半導体素子や容量素子、抵抗器等
の電子部品が搭載される配線基板は、酸化アルミニウム
質焼結体から成る絶縁基体の内部及び表面にタングステ
ン、モリブデン等の高融点金属材料から成る配線層を形
成した構造を有しており、絶縁基体表面に半導体素子や
容量素子、抵抗器等の電子部品が搭載されるとともに、
各電子部品の電極が配線層の露出表面にボンディングワ
イヤまたは低融点ロウ材を介して電気的に接続させるよ
うになっている。
2. Description of the Related Art Conventionally, a wiring board on which electronic components such as a semiconductor element, a capacitance element and a resistor are mounted has a high melting point metal such as tungsten, molybdenum or the like on and inside an insulating substrate made of an aluminum oxide sintered body. It has a structure in which a wiring layer made of a material is formed, and electronic components such as a semiconductor element, a capacitor element, and a resistor are mounted on the surface of the insulating base.
The electrode of each electronic component is electrically connected to the exposed surface of the wiring layer via a bonding wire or a low melting point brazing material.

【0003】なお、前記配線層は、その酸化腐蝕を防止
するとともに低融点ロウ材の濡れ性を良好なものとする
ために、その表面に、配線層との密着性に優れたニッケ
ルめっき層と、耐蝕性、低融点ロウ材の濡れ性、ボンデ
ィング性に優れた金めっき層とが、通常、以下の方法に
よって配線層上に所定厚みに被着されている。
In order to prevent the oxidative corrosion of the wiring layer and to improve the wettability of the low melting point brazing material, a nickel plating layer having excellent adhesion to the wiring layer is formed on the surface of the wiring layer. A gold plating layer having excellent corrosion resistance, low melting point brazing material wettability, and bonding properties is usually applied to the wiring layer to a predetermined thickness by the following method.

【0004】即ち、(1)まず、酸化アルミニウム質焼
結体等から成る絶縁基体の表面にタングステン、モリブ
デン等の高融点金属材料から成る配線層を形成した配線
基板を準備し、(2)次に前記配線層の露出表面に、ニ
ッケル供給源であるニッケル塩と、還元剤である次亜リ
ン酸ナトリウムまたはジメチルアミンボランとを主成分
とし、コハク酸、酢酸等の有機酸またはその塩から成る
錯化剤、水酸化ナトリウム、アンモニア等のpH調整剤
等の補助成分を添加して成る、いわゆるリン系またはホ
ウ素系の無電解ニッケルめっき液を使用してニッケルめ
っき層を所定厚みに被着させ、(3)最後に、前記ニッ
ケルめっき層の露出表面に、シアン化金カリウムを金供
給源とする無電解金めっき液を用いて金めっき層を所定
厚みに被着させることによって行われていた。
That is, (1) First, a wiring board is prepared in which a wiring layer made of a refractory metal material such as tungsten or molybdenum is formed on the surface of an insulating substrate made of an aluminum oxide sintered body or the like. On the exposed surface of the wiring layer, a nickel salt as a nickel source and sodium hypophosphite or dimethylamine borane as a reducing agent as main components, and an organic acid such as succinic acid and acetic acid or a salt thereof. Using a so-called phosphorus-based or boron-based electroless nickel plating solution made by adding auxiliary components such as a pH adjuster such as a complexing agent, sodium hydroxide, and ammonia, a nickel plating layer is applied to a predetermined thickness. (3) Finally, a gold plating layer is deposited on the exposed surface of the nickel plating layer to a predetermined thickness using an electroless gold plating solution using gold potassium cyanide as a gold supply source. It was done by the.

【0005】しかしながら、上記従来の配線基板の製造
方法では、配線層の露出表面にニッケルめっき層を被着
させる無電解ニッケルめっき液が、リン(P)を含有す
る次亜リン酸ナトリウムまたはホウ素(B)を含有する
ジメチルアミンボランを還元剤として使用しており、還
元剤がニッケルを還元析出させると同時に自身も分解さ
れてリンまたはホウ素を析出(共析)させることから、
形成されるニッケルめっき層はリンを5重量%程度、ま
たはホウ素を0.3〜3重量%程度含有するものとな
り、このリンまたはホウ素といった共析物によってめっ
き層を形成する個々のニッケル粒子の粒成長が妨げられ
るため、得られたニッケルめっき層は平均粒径が20n
m未満と微細なニッケル粒子により形成されることとな
る。
However, in the above-mentioned conventional method of manufacturing a wiring board, the electroless nickel plating solution for depositing the nickel plating layer on the exposed surface of the wiring layer is formed of sodium hypophosphite or boron (P) containing phosphorus (P). Since dimethylamine borane containing B) is used as a reducing agent, the reducing agent causes reduction and precipitation of nickel, and at the same time, is itself decomposed to precipitate phosphorus or boron (eutectoid).
The nickel plating layer to be formed contains about 5% by weight of phosphorus or about 0.3 to 3% by weight of boron, and particles of individual nickel particles forming the plating layer by eutectoids such as phosphorus or boron. Since the growth is hindered, the obtained nickel plating layer has an average particle size of 20 n.
m and formed by fine nickel particles.

【0006】そしてニッケル粒子の平均粒径が小さく粒
界が多いため、この多数の粒界に沿ってニッケルが移動
拡散しやすく、配線基板に半導体素子をロウ材等で接合
する際等に熱が印加されたとき、前記粒界に沿ってニッ
ケルが金めっき層の表面にまで容易に移動拡散して酸化
され、酸化ニッケル層を形成して配線導体層の低融点ロ
ウ材の濡れ性やボンディング性を劣化させてしまい、半
導体素子の電極を配線導体層に電気的に接続することが
できなくなるという問題があった。
Since the average particle size of nickel particles is small and there are many grain boundaries, nickel easily moves and diffuses along these many grain boundaries, and heat is generated when a semiconductor element is joined to a wiring board with a brazing material or the like. When applied, nickel easily migrates and diffuses along the grain boundaries to the surface of the gold plating layer and is oxidized, forming a nickel oxide layer to form a low melting point brazing material of the wiring conductor layer and the bonding property. Has been deteriorated, and it has been impossible to electrically connect the electrode of the semiconductor element to the wiring conductor layer.

【0007】そこで、ニッケルめっき層に約500℃〜
1200℃の熱処理を加えてニッケル粒子を再結晶によ
り粒成長させ、その平均粒子を大きくすることにより粒
界を少なくして熱による拡散を抑制するという方法が考
えられる。
Therefore, the temperature of the nickel plating layer is set to about 500 ° C.
A method is conceivable in which a heat treatment at 1200 ° C. is applied to grow the nickel particles by recrystallization, and the average grain size is increased to reduce the grain boundaries and suppress diffusion by heat.

【0008】[0008]

【発明が解決しようとする課題】しかしながら、ニッケ
ルめっき層を熱処理した場合、この熱によってニッケル
めっき層にフクレ、ハガレ等の不具合を生じるおそれが
あるという問題や、熱処理に使用するトンネル炉等の加
熱装置内の炭化物等の異物が配線基板に焼き付いて配線
層間の電気絶縁性の低下や外観不良を生じてしまうとい
う問題が誘発されることとなる。
However, when the nickel plating layer is heat-treated, the heat may cause problems such as blistering and peeling on the nickel plating layer, and the heating of a tunnel furnace or the like used for the heat treatment. Foreign matter such as carbides in the device is burned onto the wiring board, which causes a problem that electric insulation between wiring layers is deteriorated and appearance is deteriorated.

【0009】またニッケルめっき層に熱処理を施す場
合、絶縁基体が耐熱性の低い材料で形成されている場
合、高温で熱処理することができずニッケル粒子を十分
に粒成長させることができないという問題も発生する。
Further, when heat treatment is applied to the nickel plating layer, if the insulating substrate is formed of a material having low heat resistance, heat treatment cannot be performed at a high temperature, and nickel particles cannot be sufficiently grown. appear.

【0010】本発明は上記従来の方法の問題点に鑑み案
出されたものであり、その目的は、絶縁基体表面に露出
した配線層にニッケルめっき層および金めっき層を順次
被着させてなる配線基板において、半導体素子を接合、
搭載する際等の熱によっても配線層に被着させたニッケ
ルめっき層のニッケルが金めっき層の表面に移動拡散し
て酸化ニッケル層を形成することがなく、かつ、ニッケ
ルめっき層のフクレ、ハガレや異物の焼き付き等の不具
合のない配線基板の製造方法を提供することにある。
The present invention has been devised in view of the problems of the above-mentioned conventional method, and has as its object to sequentially deposit a nickel plating layer and a gold plating layer on a wiring layer exposed on the surface of an insulating substrate. Bonding semiconductor elements on the wiring board,
The nickel of the nickel plating layer adhered to the wiring layer does not move and diffuse to the surface of the gold plating layer to form a nickel oxide layer even by heat at the time of mounting or the like. It is an object of the present invention to provide a method for manufacturing a wiring board free from defects such as image sticking and foreign matter burning.

【0011】[0011]

【課題を解決するための手段】本発明の配線基板の製造
方法は、(1)絶縁基体に配線層を形成した配線基板を
準備する工程と、(2)前記配線基板を、金属供給源と
してニッケル塩、還元剤としてヒドラジンを用いたニッ
ケルめっき浴中に浸漬し、配線基板の配線層の露出表面
に平均粒径が20nm以上のニッケル粒子から成るニッ
ケルめっき層を被着させる工程と、(3)前記配線層に
ニッケルめっき層が被着された配線基板を金めっき浴中
に浸漬し、前記ニッケルめっき層表面に金めっき層を被
着させる工程とから成ることを特徴とするものである。
According to the present invention, there is provided a method of manufacturing a wiring board, comprising the steps of (1) preparing a wiring board having a wiring layer formed on an insulating base; and (2) using the wiring board as a metal supply source. (3) immersing in a nickel plating bath using nickel salt and hydrazine as a reducing agent, and applying a nickel plating layer made of nickel particles having an average particle diameter of 20 nm or more to the exposed surface of the wiring layer of the wiring board; D) dipping a wiring board having the nickel plating layer applied to the wiring layer in a gold plating bath, and applying a gold plating layer to the surface of the nickel plating layer.

【0012】本発明の配線基板の製造方法によれば、ニ
ッケルめっき層を被着形成させるニッケルめっき液が、
還元剤としてヒドラジン(NH2・NH2)を使用し、該ヒド
ラジンの分解生成物(窒素ガス、水素ガス、水等)が容
易に気化またはめっき浴中に溶解し、従来のリンやホウ
素のようにニッケルめっき層中に析出(共析)すること
がほとんどないことから、ニッケルめっき中、析出形成
されたニッケル粒子の粒成長が、ニッケル粒子に含有さ
れるリンやホウ素といった共析物によって妨げられるこ
とがなく、ニッケル粒子を粒成長させて20nm以上と
大きくすることができる。
According to the method for manufacturing a wiring board of the present invention, a nickel plating solution for forming a nickel plating layer is provided by:
Hydrazine (NH 2 · NH 2 ) is used as a reducing agent, and the decomposition products of the hydrazine (nitrogen gas, hydrogen gas, water, etc.) are easily vaporized or dissolved in the plating bath, and are used as in conventional phosphorus and boron. Hardly precipitates (eutectoid) in the nickel plating layer, so that during nickel plating, the grain growth of the precipitated nickel particles is hindered by eutectoids such as phosphorus and boron contained in the nickel particles. Therefore, the nickel particles can be grown to a size of 20 nm or more by grain growth.

【0013】そして、ニッケル粒子の平均粒径を20n
m以上と大きくしたことから、ニッケル粒子の粒界が少
なく、配線基板に熱が印加されたとしても多量のニッケ
ルが容易に移動拡散することはなく、ニッケルが金めっ
き層表面に移動拡散し酸化ニッケル層を形成して配線層
への低融点ロウ材の濡れ性を劣化させてしまう、という
問題を有効に防ぐことができる。
The average particle size of the nickel particles is 20 n.
m, the grain boundaries of the nickel particles are small, and even if heat is applied to the wiring board, a large amount of nickel does not easily move and diffuse, but the nickel moves and diffuses to the surface of the gold plating layer and is oxidized. It is possible to effectively prevent the problem that the nickel layer is formed to deteriorate the wettability of the low melting point brazing material to the wiring layer.

【0014】また本発明の配線基板の製造方法によれ
ば、ニッケル粒子が20nm以上と大きく、ニッケルめ
っき層に熱処理を施す必要がないことから、熱処理に伴
うニッケルめっき層のフクレ、ハガレや、異物の焼き付
きによる外観不良、配線層間の絶縁性の低下等の不具合
を生じることはない。
Further, according to the method of manufacturing a wiring board of the present invention, since the nickel particles are as large as 20 nm or more and it is not necessary to perform a heat treatment on the nickel plating layer, blisters, peeling, foreign matters, etc. of the nickel plating layer due to the heat treatment are eliminated. There are no problems such as poor appearance due to image sticking or deterioration in insulation between wiring layers.

【0015】[0015]

【発明の実施の形態】次に本発明を添付図面に基づいて
詳細に説明する。図1は、本発明の製造方法で製作され
た配線基板を半導体素子収納用パッケージに適用した場
合の一実施例を示す断面図であり、1は絶縁基体、2は
配線層である。この絶縁基体1と配線層2とで半導体素
子3を搭載する配線基板4が構成される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing an embodiment in which a wiring board manufactured by the manufacturing method of the present invention is applied to a package for accommodating a semiconductor element, wherein 1 is an insulating base, and 2 is a wiring layer. The insulating substrate 1 and the wiring layer 2 constitute a wiring board 4 on which the semiconductor element 3 is mounted.

【0016】前記絶縁基体1は、酸化アルミニウム質焼
結体、窒化アルミニウム質焼結体、ムライト質焼結体、
炭化珪素質焼結体、ガラスセラミック焼結体、エポキシ
樹脂、ポリイミド樹脂、ガラスエポキシ樹脂等の電気絶
縁材料から成り、その上面に半導体素子3を搭載する搭
載部1aを有し、搭載部1a上面には半導体素子3がガ
ラスや樹脂、ロウ材等の接着材を介して接着固定され
る。
The insulating substrate 1 is made of an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body,
It is made of an electrically insulating material such as a silicon carbide sintered body, a glass ceramic sintered body, an epoxy resin, a polyimide resin, and a glass epoxy resin, and has a mounting portion 1a for mounting the semiconductor element 3 on the upper surface thereof. The semiconductor element 3 is bonded and fixed via an adhesive such as glass, resin, or brazing material.

【0017】また前記絶縁基体1は、その搭載部1aか
ら下面にかけて、タングステン、モリブデン、マンガ
ン、銀、銅等の金属材料から成る多数の配線層2が被着
形成されており、これら配線層2の搭載部1aに露出し
た部位には半導体素子3の各電極が錫―鉛半田等の低融
点ロウ材から成る金属バンプ5を介して電気的に接続さ
れ、また絶縁基体1下面に導出された部位は外部電気回
路基板の回路導体と低融点ロウ材等を介して電気的に接
続される。
The insulating substrate 1 has a large number of wiring layers 2 made of a metal material such as tungsten, molybdenum, manganese, silver, copper or the like formed thereon from the mounting portion 1a to the lower surface thereof. Each electrode of the semiconductor element 3 is electrically connected to a portion exposed to the mounting portion 1a through a metal bump 5 made of a low melting point brazing material such as tin-lead solder, and is led out to the lower surface of the insulating base 1. The portion is electrically connected to a circuit conductor of the external electric circuit board via a low melting point brazing material or the like.

【0018】さらに前記配線層2は、図2に示す如く、
その露出表面にニッケルめっき層6および金めっき層7
が順次被着されている。
Further, as shown in FIG.
A nickel plating layer 6 and a gold plating layer 7 are formed on the exposed surface.
Are sequentially applied.

【0019】前記ニッケルめっき層6は金めっき層7を
配線層2の表面に強固に被着させるための下地めっき層
として作用し、金めっき層7は、配線層2およびニッケ
ルめっき層6の酸化腐蝕を防ぐとともに、配線層2に対
する低融点ロウ材の濡れ性を良好なものとする作用をな
す。
The nickel plating layer 6 acts as a base plating layer for firmly attaching the gold plating layer 7 to the surface of the wiring layer 2, and the gold plating layer 7 oxidizes the wiring layer 2 and the nickel plating layer 6. In addition to preventing corrosion, it has an effect of improving the wettability of the low melting point brazing material to the wiring layer 2.

【0020】なお前記絶縁基体1はその上面に前記搭載
部1aを覆うように蓋体8が取着され、該蓋体8によっ
て絶縁基体1の搭載部1aに搭載された半導体素子3は
気密封止するようになっている。
A cover 8 is attached to the upper surface of the insulating substrate 1 so as to cover the mounting portion 1a, and the semiconductor element 3 mounted on the mounting portion 1a of the insulating substrate 1 by the lid 8 is hermetically sealed. It is designed to stop.

【0021】次に、上述の配線基板の製造方法について
図3(a)乃至(c)に基づいて説明する。なお、図
中、図1及び図2と同一箇所には同一符号が付してあ
る。
Next, a method of manufacturing the above-described wiring board will be described with reference to FIGS. In the drawings, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals.

【0022】まず、図3(a)に示す如く、表面に配線
層2を有する絶縁基体1を準備する。
First, as shown in FIG. 3A, an insulating substrate 1 having a wiring layer 2 on its surface is prepared.

【0023】前記絶縁基体1は、例えば、酸化アルミニ
ウム質焼結体から成る場合、酸化アルミニウム、酸化珪
素、酸化カルシウム、酸化マグネシウム等の原料粉末に
適当な有機バインダー、溶剤を添加混合して泥漿状のセ
ラミックスラリーとなすとともに該セラミックスラリー
を従来周知のドクターブレード法やカレンダーロール法
等のシート成形技術を採用してシート状のセラミックグ
リーンシート(セラミック生シート)を得、しかる後、
前記セラミックグリーンシートに切断加工や打ち抜き加
工等を施して適当な形状とするとともにこれを複数枚積
層し、最後に前記積層されたセラミックグリーンシート
を還元雰囲気中、約1600℃の温度で焼成することに
よって製作される。
When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, an appropriate organic binder and a solvent are added to a raw material powder of aluminum oxide, silicon oxide, calcium oxide, magnesium oxide or the like, and the mixture is mixed to form a slurry. And a sheet-shaped ceramic green sheet (ceramic green sheet) is obtained by employing a sheet forming technique such as a doctor blade method or a calendar roll method, which is well known in the art.
Cutting and punching the ceramic green sheet into an appropriate shape and laminating a plurality of the sheets, and finally firing the laminated ceramic green sheet at a temperature of about 1600 ° C. in a reducing atmosphere. Produced by

【0024】また前記配線層2は、例えば、タングステ
ン、モリブデン、マンガン等の高融点金属から成る場
合、タングステン等の高融点金属粉末に適当な有機バイ
ンダーや溶剤を添加混合して得た金属ペーストを絶縁基
体1となるセラミックグリーンシートに予め従来周知の
スクリーン印刷法により所定パターンに印刷塗布してお
くことによって、絶縁基体1の所定位置に被着形成され
る。
When the wiring layer 2 is made of, for example, a high melting point metal such as tungsten, molybdenum, or manganese, a metal paste obtained by adding a suitable organic binder or solvent to a high melting point metal powder such as tungsten and mixing. The ceramic green sheet serving as the insulating substrate 1 is printed and applied in a predetermined pattern by a conventionally well-known screen printing method so that the ceramic green sheet is adhered to a predetermined position of the insulating substrate 1.

【0025】なお、前記配線層2は、その露出表面にパ
ラジウム活性を施して触媒活性を付与しておくと、この
配線層2の表面に、後の工程でニッケルめっき層をカ
ケ、ムラ等を生じることなく強固に被着させることがで
きる。従って、前記配線層2は、その露出表面にパラジ
ウム活性を、塩化パラジウム系溶液等により、施してお
くことが好ましい。
If the exposed surface of the wiring layer 2 is subjected to palladium activity to impart catalytic activity, the surface of the wiring layer 2 may be covered with a nickel plating layer in a later step to prevent chipping and unevenness. It can be firmly adhered without generation. Therefore, it is preferable that the wiring layer 2 be subjected to palladium activity on an exposed surface thereof with a palladium chloride solution or the like.

【0026】次に、金属供給源としてニッケル塩、還元
剤としてヒドラジンを用いたニッケルめっき浴を準備す
るとともにこのニッケルめっき浴を用い、図3(b)に
示す如く、前記配線層2の露出表面にニッケルめっき層
6を無電解法により被着形成する。
Next, a nickel plating bath using a nickel salt as a metal supply source and hydrazine as a reducing agent is prepared, and the nickel plating bath is used to form an exposed surface of the wiring layer 2 as shown in FIG. Then, a nickel plating layer 6 is formed by an electroless method.

【0027】前記ニッケルめっき層6は配線層2の露出
表面を被覆し、配線層2の低融点ロウ材に対する濡れ性
を良好なものとするとともに、後の工程で被着形成され
る金めっき層7を配線層2に強固に被着させる下地とし
て作用する。
The nickel plating layer 6 covers the exposed surface of the wiring layer 2 so as to improve the wettability of the wiring layer 2 with respect to the low melting point brazing material and to form a gold plating layer to be formed in a later step. 7 serves as a base for firmly adhering to the wiring layer 2.

【0028】前記ニッケルめっき層6は、ヒドラジンを
還元剤として使用するニッケルめっき浴を用いて形成さ
れ、該ヒドラジンの分解生成物である窒素および水素が
ニッケルめっき層6中に析出することがほとんどないた
め、めっき時、析出形成されたニッケル粒子は高純度の
ニッケルで形成され、その粒成長がニッケル粒子に含有
される共析物によって妨げられることがほとんどなく、
個々のニッケル粒子が大きく成長することができ、この
ためニッケル粒子の平均粒径を20nm以上と大きなも
のとすることができる。
The nickel plating layer 6 is formed by using a nickel plating bath using hydrazine as a reducing agent. Nitrogen and hydrogen which are decomposition products of the hydrazine hardly precipitate in the nickel plating layer 6. Therefore, at the time of plating, the precipitated nickel particles are formed of high-purity nickel, and the grain growth is hardly hindered by the eutectoid contained in the nickel particles,
The individual nickel particles can grow large, so that the average particle size of the nickel particles can be as large as 20 nm or more.

【0029】そしてニッケル粒子の平均粒径が20nm
以上と大きく、粒界が少ないことから、粒界に沿って多
量のニッケルが拡散することはなく、この配線基板に半
導体素子の接合時等の熱が印加されたとき、ニッケルが
金めっき層の表面にまで移動拡散して酸化され、酸化ニ
ッケル層を形成して低融点ロウ材の濡れ性やボンディン
グ性を劣化させる、という問題が発生することを有効に
防ぐことができる。
The average particle size of the nickel particles is 20 nm.
As described above, since a large number of grain boundaries are present, a large amount of nickel does not diffuse along the grain boundaries, and when heat is applied to the wiring board at the time of bonding a semiconductor element or the like, nickel is applied to the gold plating layer. It is possible to effectively prevent the problem of being transferred and diffused to the surface and oxidized to form a nickel oxide layer, thereby deteriorating the wettability and bonding property of the low melting point brazing material.

【0030】またニッケル粒子の平均粒径を、熱処理す
ることなく20nm以上と大きくしていることから、熱
処理に伴う、ニッケルめっき層6のフクレ、ハガレや異
物の焼き付き等の不具合を生じることはなく、外観不良
や配線層間の絶縁性の低下等のない配線基板を得ること
ができる。
Further, since the average particle size of the nickel particles is increased to 20 nm or more without heat treatment, problems such as blistering, peeling, and seizure of foreign matter of the nickel plating layer 6 due to the heat treatment do not occur. In addition, it is possible to obtain a wiring board free from poor appearance and reduced insulation between wiring layers.

【0031】前記ヒドラジンを還元剤として用いたニッ
ケルめっき浴は、例えば、金属供給源である乳酸ニッケ
ルまたは塩化ニッケル等のニッケル塩約0.1モル/リ
ットルと、還元剤であるヒドラジン約1モル/リットル
とを主成分とし、これに錯化剤、pH緩衝剤等を添加混
合した組成の溶液を、約65〜75℃の液温、pH10
〜11程度で用いることができる。
The nickel plating bath using hydrazine as a reducing agent is, for example, about 0.1 mol / liter of a nickel salt such as nickel lactate or nickel chloride as a metal source, and about 1 mol / liter of hydrazine as a reducing agent. Liters as a main component, a complexing agent, a pH buffering agent and the like are added thereto and mixed.
About 11 can be used.

【0032】この場合、前記ヒドラジンを還元剤として
用いたニッケルめっき浴の組成やめっき時の作業条件
は、めっき速度が抑制されるような条件としておくこと
が好ましい。
In this case, it is preferable that the composition of the nickel plating bath using hydrazine as a reducing agent and the working conditions at the time of plating are such that the plating rate is suppressed.

【0033】これは、めっき速度を抑制することにより
ニッケル粒子が粒成長し易く、平均粒径が20nm以上
のニッケル粒子を形成し易くすることができるためであ
り、例えば、めっき浴の組成についてニッケル塩濃度や
還元剤濃度を低くすること、めっき時の作業条件につい
てめっき液温度を低くすること、めっき液のpHを低く
すること、等によりニッケルのめっき速度を抑制するこ
とができる。
This is because nickel particles can easily grow by suppressing the plating rate and nickel particles having an average particle diameter of 20 nm or more can be easily formed. The plating rate of nickel can be suppressed by lowering the salt concentration or the reducing agent concentration, lowering the plating solution temperature for the working conditions during plating, lowering the pH of the plating solution, and the like.

【0034】また、前記ニッケルめっき浴に含有される
pH緩衝剤は、ニッケル塩、還元剤等の分解生成物等に
よってめっき浴のpHが急激に変動することを防ぐ作用
をなし、ホウ酸が好適に用いられる。また前記錯化剤は
めっき浴中でニッケル(イオン)と錯体を形成して安定
させる作用を有し、クエン酸、等の有機酸またはその塩
が好適に用いられる。
The pH buffering agent contained in the nickel plating bath has an effect of preventing the pH of the plating bath from suddenly fluctuating due to decomposition products such as nickel salts and reducing agents, and boric acid is preferred. Used for Further, the complexing agent has a function of forming a complex with nickel (ion) in a plating bath to stabilize it, and an organic acid such as citric acid or a salt thereof is suitably used.

【0035】なお、前記ニッケルめっき層6は、その厚
さが1μm未満となると配線層2の露出表面を完全には
被覆することが困難となるため、後の工程でその表面に
被着される金めっき層の配線層2に対する密着強度を低
いものとしてしまう傾向があり、10μmを超えるよう
になると、めっき層に内在する応力が大きくなりニッケ
ルめっき層6の配線層2に対する密着強度が低下する傾
向がある。従って、前記ニッケルめっき層6は、その厚
さを1μm乃至10μmの範囲としておくことが好まし
い。
When the thickness of the nickel plating layer 6 is less than 1 μm, it is difficult to completely cover the exposed surface of the wiring layer 2. Therefore, the nickel plating layer 6 is deposited on the surface in a later step. The adhesion strength of the gold plating layer to the wiring layer 2 tends to be low, and if it exceeds 10 μm, the stress inherent in the plating layer increases and the adhesion strength of the nickel plating layer 6 to the wiring layer 2 tends to decrease. There is. Therefore, it is preferable that the thickness of the nickel plating layer 6 be in the range of 1 μm to 10 μm.

【0036】そして最後に、前記配線層2にニッケルめ
っき層6が被着された配線層2を金めっき浴中に浸漬
し、図3(c)に示す如く、前記ニッケルめっき層6表
面に金めっき層7を被着させる。
Finally, the wiring layer 2 having the nickel plating layer 6 adhered to the wiring layer 2 is immersed in a gold plating bath, and the surface of the nickel plating layer 6 is coated with gold as shown in FIG. The plating layer 7 is applied.

【0037】前記金めっき層7は、例えば、金化合物で
あるシアン化金カリウムおよび錯化剤であるエチレンジ
アミン四酢酸を主成分とし、シアン化カリウム、リン酸
二水素カリウム等を添加して成る置換型の金めっき浴
と、金化合物であるシアン化金カリウムおよび還元剤で
ある水素化ホウ素ナトリウムを主成分とする還元型の金
めっき浴とを準備し、これに前記ニッケルめっき層6を
被着させた配線層2の露出面を前記置換型の金めっき
液、還元型の金めっき液の順に所定時間浸漬させること
によって、ニッケルめっき層6上に所定厚みに被着され
る。
The gold plating layer 7 is, for example, a substitutional type comprising gold potassium cyanide as a gold compound and ethylenediaminetetraacetic acid as a complexing agent as main components and adding potassium cyanide, potassium dihydrogen phosphate and the like. A gold plating bath and a reduction-type gold plating bath containing gold potassium cyanide as a gold compound and sodium borohydride as a reducing agent as main components were prepared, and the nickel plating layer 6 was applied thereto. The exposed surface of the wiring layer 2 is immersed for a predetermined time in the order of the replacement-type gold plating solution and the reduction-type gold plating solution for a predetermined thickness on the nickel plating layer 6.

【0038】なお前記金めっき層7は、その厚さが0.
05μm未満となると、配線層2(実際には配線層2と
該配線層2の表面に被着されているニッケルめっき層
6)の酸化腐蝕を有効に防止することが困難となり、ま
た1μmを超えて厚くすると配線層2を外部電気回路基
板の配線導体に錫―鉛半田等の錫を含有する低融点ロウ
材を介して接続させたとき、錫と金との間で脆い金属間
化合物が生成し接続信頼性を低いものとするおそれがあ
る。従って、前記金めっき層7はその厚みを0.05μ
m乃至1μmの範囲としておくことが好ましい。
The gold plating layer 7 has a thickness of 0.1 mm.
When the thickness is less than 05 μm, it is difficult to effectively prevent the oxidative corrosion of the wiring layer 2 (actually, the wiring layer 2 and the nickel plating layer 6 deposited on the surface of the wiring layer 2). When the wiring layer 2 is connected to the wiring conductor of the external electric circuit board via a tin-containing low-melting brazing material such as tin-lead solder, a brittle intermetallic compound is generated between tin and gold. Connection reliability may be reduced. Therefore, the gold plating layer 7 has a thickness of 0.05 μm.
It is preferable to set it in the range of m to 1 μm.

【0039】[0039]

【発明の効果】本発明の配線基板の製造方法によれば、
ニッケルめっき層を被着形成させるニッケルめっき液
が、還元剤としてヒドラジン(NH2・NH2)を使用し、該
ヒドラジンの分解生成物(窒素ガス、水素ガス、水等)
は容易に気化またはめっき浴中に溶解し、従来のリンや
ホウ素のようにニッケルめっき層中に析出(共析)する
ことがほとんどないことから、ニッケルめっき中、析出
形成されたニッケル粒子の粒成長が、ニッケル粒子に含
有されるリンやホウ素といった共析物によって妨げられ
ることがなく、ニッケル粒子を粒成長させて20nm以
上と大きくすることができる。
According to the method of manufacturing a wiring board of the present invention,
A nickel plating solution for forming a nickel plating layer uses hydrazine (NH 2 · NH 2 ) as a reducing agent and decomposes the hydrazine (nitrogen gas, hydrogen gas, water, etc.).
Easily evaporates or dissolves in the plating bath and hardly precipitates (eutectoid) in the nickel plating layer unlike conventional phosphorus and boron. The growth is not hindered by eutectoids such as phosphorus and boron contained in the nickel particles, and the nickel particles can be made to grow to 20 nm or more by grain growth.

【0040】そして、ニッケル粒子の平均粒径を20n
m以上と大きくしたことから、ニッケル粒子の粒界が少
なく、配線基板に熱が印加されたとしても多量のニッケ
ルが容易に移動拡散することはなく、ニッケルが金めっ
き層表面に移動拡散し酸化ニッケル層を形成して配線層
への低融点ロウ材の濡れ性を劣化させてしまう、という
問題を有効に防ぐことができる。
The average particle size of the nickel particles is 20 n
m, the grain boundaries of the nickel particles are small, and even if heat is applied to the wiring board, a large amount of nickel does not easily move and diffuse, but the nickel moves and diffuses to the surface of the gold plating layer and is oxidized. It is possible to effectively prevent the problem that the nickel layer is formed to deteriorate the wettability of the low melting point brazing material to the wiring layer.

【0041】また本発明の配線基板の製造方法によれ
ば、ニッケル粒子が20nm以上と大きく、ニッケルめ
っき層に熱処理を施す必要がないことから、熱処理に伴
うニッケルめっき層のフクレ、ハガレや、異物の焼き付
きによる外観不良、配線層間の絶縁性の低下等の不具合
を生じることはない。
Further, according to the method of manufacturing a wiring board of the present invention, since nickel particles are as large as 20 nm or more and it is not necessary to perform heat treatment on the nickel plating layer, blisters, peeling, foreign matters, etc. of the nickel plating layer due to the heat treatment are eliminated. There are no problems such as poor appearance due to image sticking or deterioration in insulation between wiring layers.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の製造方法で製作された配線基板を半導
体素子を収容する半導体素子収納用パッケージに適用し
た場合の一実施例を示す断面図である。
FIG. 1 is a cross-sectional view showing an embodiment in which a wiring board manufactured by a manufacturing method of the present invention is applied to a semiconductor element housing package for housing a semiconductor element.

【図2】図1に示す配線基板の要部拡大断面図である。FIG. 2 is an enlarged sectional view of a main part of the wiring board shown in FIG.

【図3】(a)乃至(c)は本発明の配線基板の製造方
法を説明するための工程毎の要部拡大断面図である。
FIGS. 3A to 3C are enlarged cross-sectional views of main parts in each step for explaining a method of manufacturing a wiring board according to the present invention.

【符号の説明】[Explanation of symbols]

1・・・・絶縁基体 1a・・・半導体素子搭載部 2・・・・配線層 3・・・・半導体素子 4・・・・配線基板 5・・・・金属バンプ 6・・・・ニッケルめっき層 7・・・・金めっき層 8・・・・蓋体 DESCRIPTION OF SYMBOLS 1 ... Insulating base 1a ... Semiconductor element mounting part 2 ... Wiring layer 3 ... Semiconductor element 4 ... Wiring board 5 ... Metal bump 6 ... Nickel plating Layer 7: Gold plating layer 8: Lid

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】(1)絶縁基体に配線層を形成した配線基
板を準備する工程と、(2)前記配線基板を、金属供給
源としてニッケル塩、還元剤としてヒドラジンを用いた
ニッケルめっき浴中に浸漬し、配線基板の配線層の露出
表面に平均粒径が20nm以上のニッケル粒子から成る
ニッケルめっき層を被着させる工程と、(3)前記配線
層にニッケルめっき層が被着された配線基板を金めっき
浴中に浸漬し、前記ニッケルめっき層表面に金めっき層
を被着させる工程とから成る配線基板の製造方法。
(1) a step of preparing a wiring board having a wiring layer formed on an insulating base; and (2) a step of preparing the wiring board in a nickel plating bath using a nickel salt as a metal supply source and hydrazine as a reducing agent. A nickel plating layer made of nickel particles having an average particle diameter of 20 nm or more on the exposed surface of the wiring layer of the wiring board; and (3) a wiring having a nickel plating layer deposited on the wiring layer. Dipping the substrate in a gold plating bath and applying a gold plating layer to the surface of the nickel plating layer.
JP35631399A 1999-12-15 1999-12-15 Manufacturing method of wiring board Pending JP2001177220A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35631399A JP2001177220A (en) 1999-12-15 1999-12-15 Manufacturing method of wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35631399A JP2001177220A (en) 1999-12-15 1999-12-15 Manufacturing method of wiring board

Publications (1)

Publication Number Publication Date
JP2001177220A true JP2001177220A (en) 2001-06-29

Family

ID=18448416

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35631399A Pending JP2001177220A (en) 1999-12-15 1999-12-15 Manufacturing method of wiring board

Country Status (1)

Country Link
JP (1) JP2001177220A (en)

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