JP2001166765A - Image data processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate the need for using a high-speed operative RAM for a color palette RAM. SOLUTION: A pixel bus latch 1 latches two pieces of 32-bit image data supplied in parallel; color multiplexers 2-1, 2-2 convert the respective 32-bit image data into 24-bit image data; and a data selector 3 alternately select each image data by changing them over to each other at every one frame time. The color palette RAMs 4-1 through 4-3 sequentially convert the image data values, and the converted image data are sequentially stored in any of the memory 6-1 through 6-4. The stored image data are read by data multiplexers 7-1, 7-2 at a double speed, and supplied to D-A converters 9-1 through 9-3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image data processing apparatus for converting predetermined N image data supplied in parallel to one display screen into one image data for one display screen. .

[0002]

2. Description of the Related Art FIG. 7 shows, for example, "TVP3026 Vid
eo Interface Palette Data
Manual "(Texas Instrument)
FIG. 2 is a block diagram showing a conventional image data processing device described in (Company S). In the figure, reference numeral 101 denotes a pixel bus latch which supplies and latches 32-bit image data in two parallel and simultaneously, and 102 denotes a 2: 1 multiplexing of the image data latched by the pixel bus latch 101, and a one-series image data. 103 is a color multiplexer for converting 32-bit image data into 8-bit image data of a total of 24 bits for each color.
A color pallet RAM that outputs a value stored at an address using bit data as an address, converts the value of image data, and adjusts color characteristics.
105-3 is an R (red) component of the image data, G
DA conversion for DA (Digital-to-Analog) conversion of 8-bit image data of each of a (green) component and a B (blue) component, and outputting image signals (IOR, IOG, IOB) as analog signals to the outside It is a vessel.

Next, the operation will be described. The pixel bus latch 101 is supplied with the supplied two series of image data in two parallels, and stores and latches the data in the two parallels. The multiplexer 102 multiplexes two lines of image data latched by the pixel bus latch 101 into one line of image data in synchronization with a clock that is at least twice the clock of the pixel bus latch 101.

The color multiplexer 103 is connected to the multiplexer 102
32 bits of image data from each color, 8 bits for each color, total 2
It is converted to 4-bit image data. The 24-bit image data is supplied to the color palette RAM 104. The color palette RAM 104 uses the 24-bit image data as an address and outputs the value stored at that address as the value of the image data. At this time, the color multiplexer 103 and the color palette RAM 104 operate in synchronization with a clock of at least twice the clock of the pixel bus latch 101.

The R, G, and B component 8-bit image data output from the color palette RAM 104 are DA-converted by DA converters 105-1 to 105-3, respectively, and are converted into analog image signals (IOR). ,
(IOG, IOB).

[0006]

Since the conventional image data processing apparatus is configured as described above, two parallel image data are converted by one color palette RAM.
The color pallet RAM must be operated at least twice as many clocks, and a high-speed operable RAM is used for the color pallet RAM, which makes it difficult to reduce the cost of the apparatus. . Further, depending on the clock of the image data, there is a problem that the frequency is too high with the clock twice as high and the color palette RAM may not operate normally.

It is also conceivable to provide a color palette RAM for each of two parallel image data as in the apparatus described in Japanese Patent Application Laid-Open No. 5-80719, for example. Two expensive color pallet RAMs are required, and it is difficult to reduce the cost of the apparatus.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problem, and sequentially selects respective image data of predetermined N image data supplied in parallel, and determines the value of the selected image data. Are sequentially converted by data conversion means, the converted image data is sequentially stored, and the stored image data is
It is an object of the present invention to provide a low-cost image data processing apparatus in which reading is performed at double speed and only one color pallet RAM (data conversion means) having a low operation clock frequency is required.

[0009]

An image data processing apparatus according to the present invention comprises: a data selecting means for sequentially selecting each of predetermined N pieces of image data supplied in parallel; and a data selecting means. Data conversion means for sequentially converting the value of the selected image data, data storage means for sequentially storing the image data whose values have been converted by the data conversion means, and image conversion means for converting the image data stored in the data storage means into data conversion means. And data reading means for reading data in 1 / N of the time required for storage.

[0010] In the image data processing apparatus according to the present invention, the data selection means sequentially selects each of the predetermined N pieces of image data supplied in parallel for each frame time. is there.

In the image data processing apparatus according to the present invention, the image data whose values have been sequentially converted by the data conversion means in the data storage means are sequentially written in the storage section, and the writing of the image data is executed by the data reading means. The image data is read from a storage unit that is not stored.

[0012] The image data processing apparatus according to the present invention is characterized in that N
The image data whose values are sequentially converted by the data conversion means in the data storage means having twice as many storage units as the above are sequentially written into the storage parts, and the image data is written into the N storage parts by the data reading means. Is executed, the image data is read from the remaining N storage units.

An image data processing apparatus according to the present invention multiplexes predetermined N pieces of image data supplied in parallel to one piece of image data, and outputs the multiplexed image data at N times speed. A multiplexing means and a second data selecting means for selecting and outputting any one of the image data from the multiplexing means and the image data read by the data reading means.

An image data processing apparatus according to the present invention includes a third data selecting means for selecting and outputting any one color image data among the image data read by the data reading means. It is.

In the image data processing device according to the present invention, the data conversion means converts the value of the number of bits larger than the predetermined number of bits of the image data selected by the data selection means into the value of the number of bits. It was done.

An image data processing device according to the present invention comprises:
A color for receiving each image data of predetermined N image data supplied in parallel to the display screen with a first bit number and converting it into image data of a second bit number smaller than the first bit number A multiplexing means is provided.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. Embodiment 1 FIG. FIG. 1 is a block diagram showing an image data processing apparatus according to Embodiment 1 of the present invention. In the drawing, reference numeral 1 denotes a pixel bus latch for simultaneously supplying and latching 32-bit image data in two parallel lines. 2-1 and 2-2 denote upper and lower 32 bits of 64-bit data latched by the pixel bus latch 1. A color multiplexer (color multiplexing means) for converting image data of (first number of bits) into image data of a total of 24 bits (second number of bits) of 8 bits for each color, and 3 is color multiplexing A data selector (data selecting means) for sequentially selecting 24-bit image data from the color multiplexer 2-1 or 24-bit image data from the color multiplexer 2-2.

Reference numeral 4-1 designates an output for a value stored at the address, using the input 8-bit R-component image data as an address, and converting the value of the image data to adjust color characteristics and the like. Color palette RAM, 4-2
Is a color palette RAM for G which outputs the value stored at the address using the input 8-bit G component image data as an address, converts the value of the image data, and adjusts the color characteristics and the like. Reference numeral 4-3 denotes a color pallet RAM for B which outputs a value stored at the address using the input 8-bit B component image data as an address, converts the value of the image data, and adjusts color characteristics and the like.
It is. That is, the R color palette RAM4-1,
The G color palette RAM 4-2 and the B color palette RAM 4-3 constitute data conversion means for 24-bit image data.

Reference numerals 5-1 to 5-4 denote color pallets RA for R.
A buffer for sequentially writing 24-bit image data from M4-1, G color palette RAM 4-2, and B color palette RAM 4-3 into any one of the memories 6-1 to 6-4. , 6-1 to 6-4 are memories (data storage means, storage units) each having a storage capacity corresponding to at least one frame of image data.

7-1 multiplexes the outputs of the memory 6-1 and the memory 6-2 to form an R color palette RAM4-1, G
A data multiplexer (data reading means) for outputting in synchronism with a clock having a frequency twice as high as that of the color palette RAM 4-2 for RAM and the color palette RAM 4-3 for B.
2 multiplexes the outputs of the memory 6-3 and the memory 6-4,
A data multiplexer (data reading means) 8 outputs in synchronization with a clock having a frequency twice as high as that of the R color palette RAM 4-1, G color palette RAM 4-2, and B color palette RAM 4-3. Data multiplexer 7
-1 or a data selector for selecting the output of the data multiplexer 7-2.

9-1 to 9-3 convert the 8-bit image data of each of the R component, the G component and the B component of the image data from DA to D / A, respectively, and output an image signal (IO) as an analog signal.
R, IOG, IOB) for outputting to an external display or the like.

Next, the operation will be described. 2 and 3 are timing charts for explaining the operation of the image data processing device according to the first embodiment.

For example, as shown in FIG. 2, the pixel bus latch 1 converts 64-bit image data (D1i to D8i, i = 1, 2,... In FIG. 2) supplied from the outside into a predetermined clock. The data is latched in synchronization, and the upper 32-bit image data is supplied to the color multiplexer 2-1 and the lower 32-bit image data is supplied to the color multiplexer 2-2. The color multiplexer 2-1 converts the upper 32 bits of image data into a total of 24 bits of image data (R1i, G1i, B) of 8 bits for each color.
1i), and supplies the converted image data to the data selector 3. The color multiplexer 2-2 converts the lower 32 bits of the image data to 8 bits of each color for a total of 24 bits of image data (R2i, G2i, B2i), and supplies the converted image data to the data selector 3.

The data selector 3 switches at every time (one frame time) when 64-bit image data is supplied from the outside for one frame (time T1 and T3), and the image data (color data) from the color multiplexer 2-1 is changed. R1i, G1i, B1i) or image data (R2i, G2) from the color multiplexer 2-2.
i, B2i) are sequentially selected, and the 8-bit image data of each color component of the selected image data is stored in the color palette R for R.
AM4-1, G color palette RAM4-2 and B
For each color pallet RAM 4-3. Accordingly, the R color palette RAM4-1, the G color palette RAM4-2, and the B color palette RA
To M4-3, 24-bit image data corresponding to one frame of 64-bit image data is supplied over two frame times (time T2 to time T5).

The R color palette RAM 4-1 stores the R component 8-bit image data (R1i or R2i) of the 24-bit image data output from the data selector 3.
With i) as an address, the 8-bit value stored at that address is used as R component image data (r1i or r2i).
Output as The G color palette RAM4-2 is
With the G-component 8-bit image data (G1i or G2i) of the 24-bit image data output from the data selector 3 as an address, the 8-bit value stored at that address is used as the G-component image data (g1i). Or g2
Output as i). RAM 4-3 for color palette for B
Is a B-component image data (B1i or B2i) of the 24-bit image data output from the data selector 3 as an address, and the 8-bit value stored at the address is used as the B-component image data. (B1i or b2i).

The buffer 5-1 is provided next to the buffer 5-4. The buffer 5-1 has an R color palette RAM4-1, a G color palette RAM4-2, and a B color palette RAM4-.
The image data of a total of 24 bits from No. 3 is written into the memory 6-1 for one frame time, and thereafter the operation is stopped for three frame times. RAM4-1, G color palette RAM4-2 and B color palette RAM4
-3 from the memory 6-2.
Is written for one frame time, and then the operation is stopped for three frame times.

The buffer 5-3 is provided next to the buffer 5-2, with an R color palette RAM4-1, a G color palette RAM4-2, and a B color palette RAM4.
-3 is stored in the memory 6-3.
Is written for one frame time, and thereafter the operation is stopped for three frame times.
The color palette RAM 4-1 for R, the color palette RAM 4-2 for G, and the color palette RAM for B
The total 24-bit image data from 4-3 is stored in the memory 6-
4 is written for one frame time, and then the operation is stopped for three frame times.

That is, the color palette RAM for R4-
1. The image data from the G color palette RAM 4-2 and the B color palette RAM 4-3 are switched every frame time and stored in one of the memories 6-1 to 6-4 in order.

Then, the data multiplexer 7-1 is, for example, as shown in FIG. 3, for a period during which image data is being written to the memories 6-3 and 6-4 (time T5 to time T7).
The image data for one frame stored in the memories 6-1 and 6-2 is read out, and the color palette RAM for R is read out.
4-1. The output is multiplexed with a clock having a frequency twice as high as the clock of the G color palette RAM 4-2 and the B color palette RAM 4-3. On the other hand, the data multiplexer 7-2 stores one frame of the image stored in the memories 6-3 and 6-4 during the period when the image data is being written to the memories 6-1 and 6-2. Read the data, R
Color palette RAM4-1, G color palette R
The output is multiplexed with a clock having a frequency twice as high as the clock of the AM 4-2 and the color pallet RAM 4-3 for B.

From time T6 to time T7, image data is output from the data multiplexer 7-1 in the same manner as from time T5 to time T6.

The data selector 8 switches every two frame times to select the output of the data multiplexer 7-1 or the output of the data multiplexer 7-2, and outputs the 24-bit image data constituting the selected output. The 8-bit image data of the R component is supplied to the DA converter 9-1, the 8-bit image data of the G component is supplied to the DA converter 9-2, and the 8-bit image data of the B component is supplied to the DA converter 9-1. It is supplied to the converter 9-3.
The D / A converters 9-1 to 9-3 perform D / A conversion on the supplied 8-bit image data of each color component, and output image signals (IOR, IOG, IOB) as analog signals to an external display or the like.

As described above, according to the first embodiment, each of the predetermined two sets of image data supplied in parallel is selected in order, and the value of the selected image data is set to R.
Color palette RAM4-1, G color palette R
Since the image data is sequentially converted by the AM 4-2 and the B color palette RAM 4-3, the converted image data is sequentially stored, and the stored image data is read out at twice the speed, the image data of each frame is converted. Need only be provided with a single set of color pallet RAMs having a low operating clock frequency, and the effect that the cost of the apparatus can be reduced can be obtained.

According to the first embodiment, the R color palette RAM 4-1 and the G color palette RAM
4-2 and B color palette RAM 4-3 and data multiplexers 7-1 and 7-2 operate in parallel.
Until the image data for one frame is converted and output by the color palette RAM, the image converted before can be displayed continuously, and the effect of smoothly switching the images can be obtained.

Further, according to the first embodiment, since the memories 6-1 and 6-2 and the memories 6-3 and 6-4 are switched to read out the image data, the switching control is simplified. The effect that it can be obtained is obtained.

In the first embodiment, the pixel bus latch 1 is supplied with 2-parallel (N = 2) 64-bit data. For example, the pixel bus latch 1 is supplied with 4-parallel (N = 2). When the 128-bit data of 4) is supplied, four color multiplexers similar to the color multiplexers 2-1 and 2-2 and four memories similar to the memories 6-1 to 6-4 are provided. Eight and four data multiplexers similar to the data multiplexers 7-1 and 7-2 are provided.

In the first embodiment, when the image content of the supplied image data changes, the change is reflected in the analog image signal two frames later, so that the image content frequently changes like a moving image. However, this is not a problem when displaying a still image or when there is not much change in image content.

Embodiment 2 The image data processing apparatus according to the second embodiment of the present invention can be used only when necessary.
The values of the image data are converted by the 4-2 and B color palette RAMs 4-3, and in other cases, the conversion of the image data values is not executed.

FIG. 4 is a block diagram showing an image data processing apparatus according to the second embodiment of the present invention. In the figure,
Numeral 21 multiplexes 24-bit image data of the 24-bit image data from the color multiplexer 2-1 and 24-bit image data from the color multiplexer 2-2 into 24-bit image data. The subsequent image data is converted to a color multiplexer 2-1.
A multiplexer (multiplexing means) for outputting at twice the speed of the output of 2-2. Either the output of the multiplexer 21 or the image data from the data selector 8 according to a predetermined control signal. Is a data selector (second data selecting means) for selecting the data. At this time, when the image content changes frequently like a moving image, the output of the color multiplexers 2-1 and 2-2, that is, the image data not passing through the color palette RAMs 4-1 to 4-3 is selected. Is done. In this case, the control signal to the data selector 22 may be set by the user, or may be set based on the result of comparing images between frames. The other components in FIG. 4 are the same as those according to the first embodiment, and a description thereof will not be repeated.

Next, the operation will be described. Multiplexer 21
Is a total of 4 bits of the 24-bit image data from the color multiplexer 2-1 and the 24-bit image data from the color multiplexer 2-2.
The 8-bit image data is multiplexed to the 24-bit image data, and the multiplexed image data is converted to the color multiplexers 2-1 and 2-2-1.
2 is supplied to the data selector 22 at twice the speed of the output. The data selector 22 selects one of the output of the multiplexer 21 and the image data from the data selector 8 based on a control signal (not shown), and converts the selected image data into DA converters 9-1 to 9-1. -3. Note that the other operations are the same as those according to the first embodiment, and a description thereof will be omitted.

As described above, according to the second embodiment, the data selector 22 converts the same image data as the image data supplied to the data selector 3 and converts the value using the color palette RAM from the data selector 8. One of the selected image data, the output of the color multiplexers 2-1 and 2-2 is output to the multiplexer 21 when the image content changes frequently like a moving image. By selecting the multiplexed image data in step (1), an effect is obtained that an image can be displayed smoothly for each frame.

Embodiment 3 The image data processing device according to the third embodiment of the present invention is capable of selecting any one of the three color image data and outputting an image signal of the selected color component.

FIG. 5 is a block diagram showing an image data processing apparatus according to Embodiment 3 of the present invention. In the figure,
Numeral 31 designates, as an address, a total of 16-bit data of 8-bit image data of the R component and 8-bit image data of the G component among the 24-bit image data from the data selector 3, and stores the 8 bits stored in the address. This is a luminance signal color palette RAM (data conversion means) that outputs bit values as R component image data. Reference numeral 32 denotes a data selector for selecting one of the R component 8-bit image data from the output of the data selector 3 and the R component 8-bit image data from the luminance signal color palette RAM 31.

Reference numeral 33 denotes a data selector (third data selection means) for selecting 8-bit image data of the R component or 8-bit image data of the G component and supplying the selected data to the DA converter 9-2. A data selector (third data selection unit) that selects 8-bit image data of the R component or 8-bit image data of the B component and supplies the selected data to the DA converter 9-3.

The other components are the same as those according to the first embodiment, and a description thereof will be omitted.

Next, the operation will be described. FIG. 6 is a timing chart illustrating the operation of the image data processing device according to the third embodiment.

The color pallet RAM 31 for luminance signal uses a total of 16-bit data of 8-bit image data of the R component and 8-bit image data of the G component among the 24-bit image data from the data selector 3 as an address. , And outputs the 8-bit value stored at that address as R-component image data.

The data selector 32 outputs the R component of the output of the data selector 3 based on a control signal (not shown).
One of the bit image data and the R component 8-bit image data from the luminance signal color palette RAM 31 is selected. The selected 8-bit image data of the R component is supplied to the buffers 5-1 to 5-4 together with the G component and B component image data of the output of the data selector 3 as 24-bit image data.

This image data is written to the memories 6-1 to 6-4 in the same manner as in the first embodiment, and is multiplexed and read by a double clock.

The data selector 8 selects the selected 24
The 8-bit image data of the R component of the bit image data is supplied to the DA converter 9-1, the data selector 33, and the data selector 34, and the 8-bit image data of the G component is supplied to the data selector 33, The 8-bit image data of the B component is supplied to the data selector 34. The data selector 33 and the data selector 34 convert the R component image data or the G component or B component image data based on a control signal (not shown) into a DA converter 9.
-2 and 9-3, respectively. As a result, as shown in FIG. 6, all the D / A converters 9-1 to 9-3 output R
Only the component image signal (r1i or r2i) is output.

Therefore, the control signal to the data selectors 33 and 34 selects whether to output an image signal of three colors of RGB or an image signal of one color (R). The signal selects which of the R component image data output from the data selector 3 and the output from the luminance signal color palette RAM 31 is to be the R component of the image data.

The other operations are the same as those in the first embodiment, and the description thereof is omitted.

As described above, according to the third embodiment, the value of 9 bits or more of the image data is converted into the value of 8 bits, and further, any one color of the image data is converted. Since image data is selected and an image signal corresponding to the selected image data is output, image data of a luminance signal having a data length of 16 bits per pixel as well as image data of each of three colors RGB (8 bits) (currently, If
It is possible to obtain an effect that an image signal corresponding to 16-bit R-component and G-component image data) can also be output.

The image data of 9 bits or more of only such a luminance signal is often a still image such as an X-ray photograph, and the image content does not change from frame to frame. Therefore, the present apparatus can be used sufficiently. . Further, in the third embodiment, it is possible to switch between normal RGB image data and image data such as a medical image including only a luminance signal.
Convenience is improved.

In the third embodiment, the R component of the three colors is selected, but the G component or the B component may be selected in the same manner.

[0055]

As described above, according to the present invention, the data selecting means for sequentially selecting each of the predetermined N pieces of image data supplied in parallel and the data selecting means for selecting the image data are selected by the data selecting means. A data conversion means for sequentially converting the values of the image data, a data storage means for sequentially storing the image data whose values have been converted by the data conversion means, and a data conversion means for storing the image data stored in the data storage means. And a data reading means for reading out the image data in one-Nth of the calculated time, so that only one set of a color palette RAM (data converting means) having a low operation clock frequency to convert the image data of each frame is provided. This has the effect that the cost of the apparatus can be reduced.

According to the present invention, the image data whose values have been sequentially converted by the data conversion means in the data storage means are sequentially written in the storage section, and the data read means can use the data read means.
Since the image data is read from the storage unit where the writing of the image data has not been executed, the image data for one frame is converted before being output by the color palette RAM (data conversion means) before being converted. There is an effect that the displayed image can be continuously displayed, and the image can be switched smoothly.

According to the present invention, the image data whose values have been sequentially converted by the data conversion means in the data storage means having the storage parts twice as many as N are sequentially written in the storage part, and the N data is read by the data reading means. Since the image data is read from the remaining N storage units during the period in which the image data is being written to the storage units, the switching control can be simplified.

According to the present invention, predetermined N pieces of image data supplied in parallel are multiplexed into one piece of image data.
A multiplexing unit that outputs the multiplexed image data at N times speed, and a second unit that selects and outputs one of the image data from the multiplexing unit and the image data read by the data reading unit. Since the data selection unit is provided, when the image content changes frequently such as a moving image, the output of the multiplexing unit is selected, so that the image can be displayed smoothly for each frame. This has the effect.

According to the present invention, the data converter converts the value of the number of bits larger than the predetermined number of bits of the image data selected by the data selector into the value of the number of bits. There is an effect that an image signal corresponding to image data having a bit number larger than a predetermined bit number can also be output.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an image data processing device according to a first embodiment of the present invention.

FIG. 2 is a timing chart (1) for explaining the operation of the image data processing device according to the first embodiment;

FIG. 3 is a timing chart (2) for explaining the operation of the image data processing device according to the first embodiment;

FIG. 4 is a block diagram showing an image data processing device according to a second embodiment of the present invention.

FIG. 5 is a block diagram showing an image data processing device according to a third embodiment of the present invention.

FIG. 6 is a timing chart illustrating the operation of the image data processing device according to the third embodiment.

FIG. 7 is a block diagram showing a conventional image data processing device.

[Explanation of symbols]

2-1 and 2-2 color multiplexer (color multiplexing means), 3 data selector (data selecting means), 4-1 R color palette RAM (data conversion means), 4-2G color palette RAM (data Conversion means), 4-3B color palette RAM (data conversion means), 6-1 to 6-4
Memory (data storage means, storage unit), 7-1 to 7-2
Data multiplexer (data reading means), 21 multiplexer (multiplexing means), 22 data selector (second data selecting means), 33, 34 data selector (third data selecting means).

Claims (8)

[Claims] 1. An image data processing apparatus for converting predetermined N image data supplied in parallel to one display screen into one image data for one display screen, wherein the image data is supplied in parallel. Data selecting means for sequentially selecting each of the predetermined N pieces of image data, data converting means for sequentially converting the values of the image data selected by the data selecting means, and converting the values by the data converting means Data storing means for sequentially storing the converted image data, and data reading means for reading out the image data stored in the data storing means in 1 / N of the time required for storing by the data converting means. An image data processing apparatus characterized by the above-mentioned. 2. The image data processing apparatus according to claim 1, wherein said data selection means sequentially selects each of the predetermined N pieces of image data supplied in parallel for each frame time. apparatus. 3. The data storage unit has a plurality of storage units, and sequentially writes the image data whose values have been sequentially converted by the data conversion unit into the storage unit, and the data reading unit stores the image data. 2. The image data processing apparatus according to claim 1, wherein the image data is read from the storage unit where writing has not been performed. 4. The data storage means has storage units twice as many as N, and sequentially writes the image data whose values have been sequentially converted by the data conversion means into the storage unit. 4. The image data processing apparatus according to claim 3, wherein the image data is read from the remaining N storage units during a period in which the writing of the image data to the N storage units is being executed. . 5. A multiplexing means for multiplexing predetermined N pieces of image data supplied in parallel to one piece of image data, and outputting the multiplexed image data at N times speed, and 2. The image data processing apparatus according to claim 1, further comprising a second data selection unit that selects and outputs any one of the image data from the unit and the image data read by the data reading unit. 6. The image data according to claim 1, further comprising third data selection means for selecting and outputting any one color image data among the image data read by the data reading means. Processing equipment. 7. A data conversion means for converting a value of a bit number larger than a predetermined number of bits of the image data selected by the data selection means into a value of the predetermined number of bits. 2. The image data processing device according to 1. 8. A method for receiving each image data of predetermined N image data supplied in parallel to one display screen with a first bit number, and a second bit number smaller than the first bit number 2. The image data processing apparatus according to claim 1, further comprising a color multiplexing unit that converts the image data into image data.