JP2001160605A - Electromagnetic shielding structure of semiconductor packaged board, semiconductor package board and electromagnetic shield cap - Google Patents
Electromagnetic shielding structure of semiconductor packaged board, semiconductor package board and electromagnetic shield capInfo
- Publication number
- JP2001160605A JP2001160605A JP34237299A JP34237299A JP2001160605A JP 2001160605 A JP2001160605 A JP 2001160605A JP 34237299 A JP34237299 A JP 34237299A JP 34237299 A JP34237299 A JP 34237299A JP 2001160605 A JP2001160605 A JP 2001160605A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor package
- electromagnetic wave
- electromagnetic
- substrate
- package substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32153—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/32175—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
- H01L2224/32188—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic the layer connector connecting to a bonding area protruding from the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体パッケージ
基板の電磁シールド構造、半導体パッケージ基板及び電
磁シールドキャップに関するものである。The present invention relates to an electromagnetic shield structure for a semiconductor package substrate, a semiconductor package substrate, and an electromagnetic shield cap.
【０００２】[0002]
【従来の技術】近年、ＣＰＵの動作周波数の高周波数化
が進み、５００ＭＨｚ以上のものも登場している。この
ため、ＣＰＵ用の半導体チップ（ＬＳＩ等）を収容する
半導体パッケージ基板から放射される電磁波による電磁
波障害が顕著になってきている。つまり電磁波は半導体
パッケージ基板から放射される電磁波がその回りの他の
電子部品（コイル等）に電磁波障害をもたらす。また、
電子部品の小型化に伴い、基板上に実装される電子部品
が密集して電子部品間の距離が短くなって、他の電子部
品が電磁波障害を受けやすい実装構造ともなってきてい
る。2. Description of the Related Art In recent years, the operating frequency of CPUs has been increasing, and those having a frequency of 500 MHz or more have appeared. Therefore, electromagnetic interference caused by electromagnetic waves radiated from a semiconductor package substrate accommodating a semiconductor chip (such as an LSI) for a CPU has become remarkable. That is, the electromagnetic wave radiated from the semiconductor package substrate causes electromagnetic wave disturbance to other electronic components (coils and the like) therearound. Also,
With the miniaturization of electronic components, the electronic components mounted on a substrate are densely packed, the distance between the electronic components is shortened, and other electronic components are becoming a mounting structure that is susceptible to electromagnetic interference.
【０００３】例えば特開平５−２７５５５４号公報に
は、電磁波障害を防止するための図１２に示すような半
導体デバイスが開示されている。同図に示す半導体デバ
イスでは、フェライト製支持枠５１のスルーホールにリ
ードフレーム５２を通し、リードフレーム５２を保護し
ていた。フェライト製支持枠５１の上面に絶縁材５３に
て封止された状態でフェライト製キャップ５４が配置さ
れることで、ＬＳＩチップ５５は被覆されていた。リー
ドフレーム５２はフェライト製支持枠５１の裏面に露出
しており、裏面に露出して外側に折り曲げたリードフレ
ーム５２の下面を半田５６により実装用基板５７に接合
する構造であった。このため、外部端子であるリードフ
レーム５２と実装用基板５７との接合部分はフェライト
製支持枠５１の下方から露出していた。For example, Japanese Patent Application Laid-Open No. 5-275554 discloses a semiconductor device as shown in FIG. 12 for preventing electromagnetic interference. In the semiconductor device shown in the figure, the lead frame 52 is protected by passing the lead frame 52 through the through hole of the support frame 51 made of ferrite. The LSI chip 55 was covered by disposing the ferrite cap 54 in a state of being sealed with the insulating material 53 on the upper surface of the ferrite support frame 51. The lead frame 52 is exposed on the back surface of the support frame 51 made of ferrite, and has a structure in which the lower surface of the lead frame 52 exposed on the back surface and bent outward is joined to the mounting board 57 by solder 56. For this reason, the joint between the lead frame 52 and the mounting substrate 57, which are external terminals, was exposed from below the ferrite support frame 51.
【０００４】近年、ＣＰＵの動作速度の高速化が進むに
連れて外部端子が短く済む例えばＢＧＡ（Ball Grid Ar
ray ）などのエリアパッケージが使用されてきている。
ＢＧＡタイプでは、図１３に示すように半導体パッケー
ジ基板６１はその基板本体６２の下面に外部端子として
半田ボール６３が固着され、半田ボール６３を溶かして
半導体パッケージ基板６１をプリント基板などの実装用
基板６４に実装する。In recent years, external terminals have become shorter as the operating speed of CPUs has increased.
ray) and other area packages have been used.
In the BGA type, as shown in FIG. 13, the semiconductor package substrate 61 has a solder ball 63 fixed as an external terminal on the lower surface of the substrate main body 62 and melts the solder ball 63 so that the semiconductor package substrate 61 is mounted on a mounting board such as a printed board. 64.
【０００５】[0005]
【発明が解決しようとする課題】ところで、半導体チッ
プ（ＣＰＵ等）６５の動作信号の周波数が例えば５００
ＭＨｚ以上に高くなってくると、半導体パッケージ基板
６１の外部端子６３と実装用基板６４との接合部分か
ら、周囲の電子部品への電磁波障害の点から無視できな
い程度の電磁波が放射されるようになってきた。これ
は、外部端子６３と実装用基板６４との接合部分は半田
の溶融によるので、その接合状態（半田形状や化学結合
状態など）がばらつき易く、この接合状態の不安定性が
原因で接合部分から比較的多くの電磁波が放射されるこ
とになる。また、この接合部分は基板本体６２など他の
部分に比べ劣化しやすいため、長期使用による接合部分
の劣化によっても多くの電磁波が放射されることにな
る。The frequency of the operation signal of the semiconductor chip (CPU or the like) 65 is, for example, 500.
When the frequency becomes higher than MHz, electromagnetic waves that cannot be ignored from the point of electromagnetic wave interference to surrounding electronic components are radiated from the joint between the external terminal 63 of the semiconductor package substrate 61 and the mounting substrate 64. It has become. This is because the bonding portion between the external terminal 63 and the mounting board 64 is caused by melting of the solder, so that the bonding state (solder shape, chemical bonding state, etc.) tends to vary, and the bonding state is unstable due to the instability of the bonding state. Relatively many electromagnetic waves will be emitted. Further, since this joint portion is more likely to deteriorate than other portions such as the substrate body 62, a large amount of electromagnetic waves are radiated even when the joint portion deteriorates due to long-term use.
【０００６】図１２に示す半導体デバイスは、外部端子
５２と実装用基板５７との接合部分がフェライト製支持
枠５１から露出していたため、フェライト製支持枠５１
は外部端子５２と実装用基板との接合部分から放射され
る電磁波をシールドする構造ではなかった。また特開平
５−２７５５５４号公報には図１２の構造の他にもいく
つかの構造が開示されているが、いずれもリードフレー
ムの接合部分は外部に露出していた。このため、従来技
術は、ＣＰＵの動作信号の高周波数化および電子部品の
密集化が進んだことにより、外部端子と実装用基板との
接合部分から放射される電磁波に起因する電磁波障害を
対策できるものではなかった。この対策の必要性は、本
願出願人が見出した新規な課題である。なお、リードフ
レームタイプやＰＧＡ（Pin Grid Array）でも半田を用
いた接合方法を採るので、信号が高周波数化された半導
体チップを実装するのに使用される場合は、接合部分が
電磁波の主要な発生源となり、上記問題が同様に起こ
る。In the semiconductor device shown in FIG. 12, since the joint between the external terminal 52 and the mounting board 57 is exposed from the ferrite support frame 51, the ferrite support frame 51
Does not have a structure that shields electromagnetic waves radiated from the joint between the external terminal 52 and the mounting substrate. Japanese Patent Application Laid-Open No. 5-275554 discloses several structures in addition to the structure shown in FIG. 12, but in each case, the joining portion of the lead frame is exposed to the outside. For this reason, in the prior art, as the frequency of operation signals of the CPU increases and the density of electronic components increases, it is possible to take measures against electromagnetic interference caused by electromagnetic waves radiated from the joint between the external terminal and the mounting board. It was not something. The necessity of this measure is a new problem found by the present applicant. In addition, since the bonding method using solder is adopted also in a lead frame type or a PGA (Pin Grid Array), when a signal is used to mount a semiconductor chip with a high frequency, a bonding portion is a main part of an electromagnetic wave. The source is the source, and the above-mentioned problem occurs similarly.
【０００７】本発明は前記課題を解決するためになされ
たものであって、その目的は、外部端子と実装用基板と
の接合部分から放射される電磁波をシールドすることが
できる半導体パッケージ基板の電磁シールド構造、半導
体パッケージ基板及び電磁シールドキャップを提供する
ことにある。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor package substrate capable of shielding electromagnetic waves radiated from a joint between an external terminal and a mounting substrate. An object of the present invention is to provide a shield structure, a semiconductor package substrate, and an electromagnetic shield cap.
【０００８】[0008]
【課題を解決するための手段】上記目的を達成するため
に請求項１に記載の発明では、半導体パッケージ基板が
実装される実装用基板と前記半導体パッケージ基板の外
部端子との接合部分から放射される電磁波を遮蔽する状
態に、金属以外の材質からなる電磁波吸収材を設けた。
なお、半導体パッケージ基板は、半導体チップが複数個
実装されるモジュールタイプのものを含む。In order to achieve the above object, according to the first aspect of the present invention, radiation is radiated from a joint portion between a mounting substrate on which a semiconductor package substrate is mounted and an external terminal of the semiconductor package substrate. An electromagnetic wave absorber made of a material other than metal was provided in a state of shielding electromagnetic waves.
Note that the semiconductor package substrate includes a module type substrate on which a plurality of semiconductor chips are mounted.
【０００９】従って、実装用基板と外部端子との接合部
分から放射される電磁波は、それを遮蔽する状態に設け
られた金属以外の材質からなる電磁波吸収材によって吸
収される。よって、その周囲にある他の電子部品に電磁
波障害を与えない。Therefore, the electromagnetic wave radiated from the joint portion between the mounting board and the external terminal is absorbed by the electromagnetic wave absorbing material made of a material other than metal provided to shield the electromagnetic wave. Therefore, it does not cause electromagnetic interference to other electronic components around it.
【００１０】請求項２に記載の発明では、請求項１に記
載の発明において、前記電磁波吸収材は、前記半導体パ
ッケージ基板の基板本体に固定されるとともに前記基板
本体の外周に沿って配置されて前記外部端子を外側から
包囲する環状の遮蔽部分を備え、前記遮蔽部分の下端面
が前記実装用基板の実装面にほぼ当接した状態にある。
なお、ほぼ当接した状態とは、実際に当接した状態と、
接合部分から放射される電磁波の外部への漏出を事実上
防止できる程度の隙間がある状態との両方を含む概念で
ある。According to a second aspect of the present invention, in the first aspect of the present invention, the electromagnetic wave absorbing member is fixed to a substrate body of the semiconductor package substrate and is disposed along an outer periphery of the substrate body. An annular shielding portion surrounding the external terminal from outside is provided, and a lower end surface of the shielding portion is substantially in contact with a mounting surface of the mounting substrate.
In addition, the state in which the contact is almost complete is the state in which the contact is actually made,
This is a concept that includes both a state where there is a gap enough to effectively prevent leakage of electromagnetic waves radiated from the joint portion to the outside.
【００１１】従って、半導体パッケージ基板の基板本体
に固定された電磁波吸収材の環状の遮蔽部分は、基板本
体の外周に沿って配置されて外部端子を外側から包囲す
る。そして遮蔽部分の下端面が実装用基板の実装面にほ
ぼ当接した状態にあるので、接合部分から放射された電
磁波は遮蔽部分に吸収される。Therefore, the annular shielding portion of the electromagnetic wave absorbing material fixed to the substrate body of the semiconductor package substrate is arranged along the outer periphery of the substrate body and surrounds the external terminals from outside. Since the lower end surface of the shield portion is substantially in contact with the mounting surface of the mounting substrate, the electromagnetic wave radiated from the joint portion is absorbed by the shield portion.
【００１２】請求項３に記載の発明では、請求項１に記
載の発明において、前記電磁波吸収材は電磁波吸収性樹
脂であり、前記半導体パッケージ基板の外部端子と前記
実装基板との接合部分を少なくとも覆っている。According to a third aspect of the present invention, in the first aspect of the invention, the electromagnetic wave absorbing material is an electromagnetic wave absorbing resin, and at least a joining portion between an external terminal of the semiconductor package substrate and the mounting substrate is formed. Covering.
【００１３】従って、接合部分は電磁波吸収性樹脂に覆
われているので、接合部分から放射される電磁波は電磁
波吸収性樹脂に吸収されて外部に漏れない。請求項４に
記載の発明では、請求項３に記載の発明において、前記
電磁波吸収性樹脂は、前記外部端子を包囲するように基
板本体の周縁部分を実装用基板に至るまで覆っている。Therefore, since the joining portion is covered with the electromagnetic wave absorbing resin, the electromagnetic wave radiated from the joining portion is absorbed by the electromagnetic wave absorbing resin and does not leak to the outside. According to a fourth aspect of the present invention, in the third aspect of the invention, the electromagnetic wave absorbing resin covers a peripheral portion of the substrate main body so as to surround the external terminal up to the mounting substrate.
【００１４】従って、基板本体の周縁部分が外部端子を
包囲するように実装用基板に至るまで電磁波吸収性樹脂
によって覆われているため、接合部分を含め外部端子か
ら放射される電磁波は電磁波吸収性樹脂に吸収されて外
部に漏れない。特に基板本体の下面に外部端子がある場
合に有効である。Therefore, since the peripheral portion of the substrate main body is covered with the electromagnetic wave absorbing resin up to the mounting substrate so as to surround the external terminal, the electromagnetic wave radiated from the external terminal including the joint portion is electromagnetic wave absorbing. It is absorbed by the resin and does not leak outside. This is particularly effective when there are external terminals on the lower surface of the substrate body.
【００１５】請求項５に記載の発明では、請求項３又は
４に記載の発明において、前記電磁波吸収材は電磁波吸
収性樹脂であり、該電磁波吸収性樹脂はテープである。
従って、請求項３又は４の発明の作用に加え、電磁波吸
収性樹脂からなるテープであるため、取付ける（貼りつ
ける）ときの作業性がよくなる。According to a fifth aspect of the present invention, in the third or fourth aspect, the electromagnetic wave absorbing material is an electromagnetic wave absorbing resin, and the electromagnetic wave absorbing resin is a tape.
Therefore, in addition to the effect of the third or fourth aspect of the invention, since the tape is made of an electromagnetic wave absorbing resin, the workability when mounting (sticking) is improved.
【００１６】請求項６に記載の発明では、請求項１〜５
のいずれか一項に記載の発明において、前記半導体パッ
ケージ基板はエリアパッケージタイプである。従って、
エリアパッケージタイプの半導体パッケージ基板は高速
で動作するチップの実装に使用される。このため、外部
端子と実装用基板との接合部分から放射される電磁波を
無視できなくなるが、電磁波吸収材を使う電磁シールド
構造を採用することで、電磁波障害を避けられる。ま
た、請求項２の電磁波吸収材を基板本体に固定するとき
に、基板本体に電磁波吸収材を嵌め込む嵌め込み方式を
採用し易い。According to the sixth aspect of the present invention, the first to fifth aspects are provided.
In the invention described in any one of the above, the semiconductor package substrate is an area package type. Therefore,
Area package type semiconductor package substrates are used for mounting chips that operate at high speed. For this reason, the electromagnetic wave radiated from the joint between the external terminal and the mounting board cannot be ignored. However, by employing an electromagnetic shield structure using an electromagnetic wave absorbing material, electromagnetic wave interference can be avoided. Further, when the electromagnetic wave absorbing material of the second aspect is fixed to the substrate main body, it is easy to adopt a fitting method of fitting the electromagnetic wave absorbing material into the substrate main body.
【００１７】請求項７に記載の発明では、請求項１〜６
のいずれか一項に記載の発明において、前記電磁波吸収
材を構成する電磁波吸収物質はフェライトである。従っ
て、フェライトにより電磁波が効果的に吸収される。ま
た吸収した電磁波を熱に変える原理を使うので、金属を
材質とするときのようにアースの必要がなく、電磁波吸
収材の組付容易性が高まる。In the invention described in claim 7, claims 1 to 6 are provided.
In the invention according to any one of the above, the electromagnetic wave absorbing substance constituting the electromagnetic wave absorbing material is ferrite. Therefore, the electromagnetic waves are effectively absorbed by the ferrite. Further, since the principle of converting the absorbed electromagnetic wave into heat is used, there is no need for grounding as in the case of using metal as a material, and the ease of assembling the electromagnetic wave absorbing material is improved.
【００１８】請求項８に記載の発明では、半導体パッケ
ージ基板には、請求項２に記載の前記電磁波吸収材が、
実装状態において実装用基板の表面にほぼ当接可能な状
態に配置できるような位置関係で基板本体に一体に固定
されている。According to the invention described in claim 8, the semiconductor package substrate is provided with the electromagnetic wave absorbing material according to claim 2;
In the mounted state, the light emitting device is integrally fixed to the substrate main body in such a positional relation that it can be arranged so as to be almost in contact with the surface of the mounting substrate.
【００１９】従って、半導体パッケージ基板に予め電磁
波吸収材が一体に固定されているので、電磁波吸収材を
基板本体に後付けする必要がなくなる。請求項９に記載
の発明では、電磁シールドキャップは、請求項２に記載
の前記電磁波吸収材であって、半導体パッケージ基板の
基板本体に嵌め込み可能な嵌め込み式である。Therefore, since the electromagnetic wave absorbing material is fixed to the semiconductor package substrate in advance, it is not necessary to attach the electromagnetic wave absorbing material to the substrate body. According to a ninth aspect of the present invention, the electromagnetic shield cap is the electromagnetic wave absorbing material according to the second aspect, and is a fitting type that can be fitted into a substrate body of the semiconductor package substrate.
【００２０】従って、電磁シールドキャップを基板本体
に嵌め込むだけなので、その組付作業が簡単となる。Therefore, since the electromagnetic shield cap is merely fitted into the substrate main body, the assembling operation is simplified.
【００２１】[0021]
【発明の実施の形態】（第１の実施形態）以下、第１の
実施形態を図１〜図４に基づいて説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) A first embodiment will be described below with reference to FIGS.
【００２２】図３は半導体パッケージ基板の実装構造を
示す分解斜視図、図４は同じく実装後の状態を示す斜視
図である。図３，４に示すように、半導体パッケージ基
板実装構造は、半導体パッケージ基板１と、実装用基板
としてのプリント基板２と、電磁波吸収材及び電磁シー
ルドキャップとしてのキャップ３とを備える。キャップ
３はフェライトからなる。FIG. 3 is an exploded perspective view showing a mounting structure of the semiconductor package substrate, and FIG. 4 is a perspective view showing a state after mounting. As shown in FIGS. 3 and 4, the semiconductor package substrate mounting structure includes a semiconductor package substrate 1, a printed circuit board 2 as a mounting substrate, and a cap 3 as an electromagnetic wave absorbing material and an electromagnetic shielding cap. The cap 3 is made of ferrite.
【００２３】半導体パッケージ基板１は、背面に金属ベ
ース１１が全面に固着された樹脂製の基板本体１２を備
える。基板本体１２の表面（下面）には、図２に示すよ
うに中央にキャビティ１３が凹設され、キャビティ１３
を除くその表面全体にマトリクス状（縦横）に配列され
た外部端子としての多数の半田ボール１４が固着されて
いる。半田ボール１４は基板本体１２の下面に形成され
た多数の端子用金属部（例えばバンプ）（図示せず）に
接合されている。半導体チップ４はキャビティ１３の底
面中央にワイヤボンディングされた状態で実装されてい
る。基板本体１２には、半導体チップ４と半田ボール１
４とを電気的に接続する配線パターン（図示せず）が複
数層形成されている。また、プリント基板２の実装面に
は、図２，３に示すようにキャビティ１３と相対する部
位にキャビティ１３より若干面積の大きい四角形状の金
属薄板２ａが形成されている。金属薄板２ａはグランド
（ＧＮＤ）に接地されているキャップ３は図３，４に示
すように四角リング形状で、半導体パッケージ基板１の
基板本体１２に緩く嵌合可能に形成されている。キャッ
プ３は、基板本体１２の背面周縁部と相対するように配
置される四角リング板状の蓋部３ａと、蓋部３ａの周縁
から垂直に延びる四角筒状の脚部３ｂとからなる。脚部
３ｂの内面は、基板本体１２の側面と緩く嵌合できる寸
法に設定されている。図１，２に示すように、実装後の
状態では、キャップ３の脚部３ｂの下端面（底面）がプ
リント基板２の表面（実装面）に当接している。またキ
ャップ３には蓋部３ａの中央に四角形状の孔３ｄが開い
ている。The semiconductor package substrate 1 includes a resin-made substrate main body 12 having a metal base 11 fixed on the entire back surface. A cavity 13 is formed in the center of the surface (lower surface) of the substrate body 12 as shown in FIG.
A large number of solder balls 14 as external terminals arranged in a matrix (vertical and horizontal) are fixed to the entire surface except for. The solder balls 14 are joined to a number of terminal metal parts (for example, bumps) (not shown) formed on the lower surface of the substrate body 12. The semiconductor chip 4 is mounted on the center of the bottom surface of the cavity 13 in a state of being wire-bonded. The semiconductor chip 4 and the solder ball 1 are provided on the substrate body 12.
A plurality of wiring patterns (not shown) for electrically connecting the wiring pattern 4 to the wiring pattern 4 are formed. As shown in FIGS. 2 and 3, a rectangular metal thin plate 2 a having a slightly larger area than the cavity 13 is formed on the mounting surface of the printed circuit board 2 at a position facing the cavity 13. The thin metal plate 2a is grounded to the ground (GND). The cap 3 has a square ring shape as shown in FIGS. 3 and 4, and is formed so as to be loosely fitted to the substrate body 12 of the semiconductor package substrate 1. The cap 3 includes a square ring plate-shaped lid 3a that is arranged to face the rear edge of the substrate body 12, and a quadrangular cylindrical leg 3b that extends vertically from the edge of the lid 3a. The inner surface of the leg 3b is set to a size that can be loosely fitted to the side surface of the substrate body 12. As shown in FIGS. 1 and 2, in a state after mounting, the lower end surface (bottom surface) of the leg 3 b of the cap 3 is in contact with the surface (mounting surface) of the printed circuit board 2. The cap 3 has a rectangular hole 3d at the center of the lid 3a.
【００２４】キャップ３はフェライト焼結体とすること
もできるし、フェライト粉を樹脂やゴムで固めたフェラ
イト樹脂（またはフェライトゴム）とすることもでき
る。キャップ３をフェライト焼結体とした場合、リフロ
ー炉を通すときに使用する治具にキャップ３を半導体パ
ッケージ基板１と一緒にセットすることが可能である。The cap 3 can be a ferrite sintered body or a ferrite resin (or ferrite rubber) obtained by solidifying ferrite powder with resin or rubber. When the cap 3 is made of a ferrite sintered body, the cap 3 can be set together with the semiconductor package substrate 1 on a jig used when the cap 3 is passed through a reflow furnace.
【００２５】キャップ３を治具にセットして使用する場
合、図１に示すような寸法設計をする。すなわち、半導
体パッケージ基板１の実装時には半田ボール１４が溶け
て基板本体１２が自重でプリント基板２に近づくためそ
の分を見込んで、蓋部３ａの内面（下面）からの脚部３
ｂの長さ（高さ）Ｌは、キャップ３の底面がプリント基
板２に当接し得る長さに設定されている。基板本体１２
が自重で下降する量にはばらつきがあるので、脚部３ｂ
の底面がプリント基板２に当接してからでも基板本体１
２が自重で下降できる程度に基板本体１２に対する脚部
３ｂの嵌合強さが設定されており、半田ボール１４の溶
融による接合が確実になされるようにしている。また、
半田ボール１４が溶けて接合するときの基板本体１２の
下降量のばらつきを吸収するために、蓋部３ａの内面と
基板本体１２の背面（金属ベース）との間に若干の隙間
ｔが設定されている。このため、キャップ３の脚部３ｂ
がプリント基板２に当接する状態で、半田ボール１４が
巧く接合されることになる。なお、キャップ３の固定方
法はどんな方法でもよく、例えばキャップ３を半導体パ
ッケージ基板１あるいはプリント基板２に接着剤で接着
する方法でもよい。またキャップ３が外れない使用状態
であれば、あえて固定しなくてもよい。When the cap 3 is used by setting it on a jig, the dimensions are designed as shown in FIG. That is, when the semiconductor package substrate 1 is mounted, the solder balls 14 are melted, and the substrate body 12 approaches the printed circuit board 2 by its own weight.
The length (h) L of b is set to such a length that the bottom surface of the cap 3 can contact the printed circuit board 2. Substrate body 12
Since there is a variation in the amount of lowering due to its own weight, the leg 3b
Board body 1 even after the bottom of
The fitting strength of the leg 3b to the board body 12 is set to such an extent that the solder ball 14 can be lowered by its own weight, so that the solder ball 14 can be reliably joined by melting. Also,
A slight gap t is set between the inner surface of the lid 3a and the back surface (metal base) of the substrate body 12 in order to absorb variations in the amount of lowering of the substrate body 12 when the solder balls 14 are melted and joined. ing. For this reason, the leg 3b of the cap 3
Is in contact with the printed circuit board 2, and the solder balls 14 are skillfully joined. The cap 3 may be fixed by any method, for example, a method of bonding the cap 3 to the semiconductor package substrate 1 or the printed circuit board 2 with an adhesive. If the cap 3 does not come off, it need not be fixed.
【００２６】キャップ３の材質をフェライト樹脂やフェ
ライトゴムとした場合は、プリント基板２に実装後の半
導体パッケージ基板１の基板本体１２にキャップ３を嵌
める構成とする。キャップ３の脚部３ｂの長さＬは図１
に同様とし、基板本体１２の下降量に多少ばらつきがあ
っても確実に脚部３ｂがプリント基板２に当接するよう
にする。もちろん、フェライト焼結体からなるキャップ
３を半導体パッケージ基板１の実装後に嵌めることもで
きるし、フェライト樹脂のマトリクス樹脂に耐熱性樹脂
を使用した場合には、キャップ３を一緒に治具にセット
してリフロー炉に通すこともできる。なお、図１〜図４
では、プリント基板２の表面に設けられた配線パターン
が省略されている。When the material of the cap 3 is a ferrite resin or a ferrite rubber, the cap 3 is fitted to the board body 12 of the semiconductor package board 1 after being mounted on the printed board 2. The length L of the leg 3b of the cap 3 is shown in FIG.
The leg portion 3b is surely brought into contact with the printed circuit board 2 even if the amount of lowering of the board body 12 is slightly varied. Of course, the cap 3 made of a ferrite sintered body can be fitted after the semiconductor package substrate 1 is mounted. When a heat-resistant resin is used as the matrix resin of the ferrite resin, the cap 3 is set together with the jig. Through a reflow oven. 1 to 4
In FIG. 1, the wiring pattern provided on the surface of the printed circuit board 2 is omitted.
【００２７】この半導体パッケージ基板の電磁シールド
構造によれば、半導体チップ４に例えば約５００ＭＨｚ
の動作周波数の電気信号が流れる。電気信号が高周波数
であるため、半田ボール１４とプリント基板２との接合
部分は、その接合状態のばらつき（不安定さ）に起因し
電磁波の主要な放射源となる。According to the electromagnetic shielding structure of the semiconductor package substrate, the semiconductor chip 4 has, for example, about 500 MHz.
An electric signal having an operating frequency of? Since the electric signal has a high frequency, the joint between the solder ball 14 and the printed circuit board 2 becomes a main radiation source of an electromagnetic wave due to a variation (instability) in the joint state.
【００２８】しかし、半導体パッケージ基板１の基板本
体１２に嵌められたキャップ３によって、基板本体１２
とプリント基板２との間の隙間が四角円筒状の脚部３ｂ
により外側から完全に包囲された状態にある。しかも脚
部３ｂの底面はプリント基板２に当接しているため、脚
部３ｂは電磁波の放射源である接合部分を完全に遮蔽す
る。つまり、基板本体１２とプリント基板２との間に存
在する半田ボール１４の配置空間は、基板本体１２の下
面とプリント基板２の上面と脚部３ｂの内周面とにより
完全に囲まれる。半田ボール１４とプリント基板２との
接合部分から放射される電磁波はそれを遮蔽するキャッ
プ３に吸収される。この結果、半田ボール１４の接合部
分から放射された電磁波が外部に漏れることが抑えられ
る。However, the cap 3 fitted to the substrate body 12 of the semiconductor package substrate 1 causes the substrate body 12
The gap between the printed circuit board 2 and the rectangular cylindrical leg 3b
Is completely surrounded from the outside. In addition, since the bottom surface of the leg 3b is in contact with the printed circuit board 2, the leg 3b completely shields a joint portion that is a radiation source of electromagnetic waves. That is, the arrangement space of the solder balls 14 existing between the board body 12 and the printed board 2 is completely surrounded by the lower surface of the board body 12, the upper face of the printed board 2, and the inner peripheral surface of the leg 3b. Electromagnetic waves radiated from the joint between the solder ball 14 and the printed board 2 are absorbed by the cap 3 that shields the electromagnetic wave. As a result, leakage of the electromagnetic wave radiated from the joint portion of the solder ball 14 to the outside is suppressed.
【００２９】金属ベース１１は上方へ放射される電磁波
をシールドする。この際、基板本体１２の内部のグラン
ド（ＧＮＤ）パターンによっても、半導体チップ４及び
半田ボール１４の接合部分から上方へ放射される電磁波
がシールドされる。また、金属薄板２ａにより半導体チ
ップ４から下方へ放射される電磁波がシールドされ、プ
リント基板２の内部に設けられたグランド（ＧＮＤ）パ
ターン２ｂによって、半田ボール１４の接合部分から下
方へ放射される電磁波がシールドされる。The metal base 11 shields electromagnetic waves radiated upward. At this time, the electromagnetic wave radiated upward from the joint between the semiconductor chip 4 and the solder ball 14 is also shielded by the ground (GND) pattern inside the substrate body 12. Electromagnetic waves radiated downward from the semiconductor chip 4 are shielded by the thin metal plate 2a, and electromagnetic waves radiated downward from the joint portion of the solder balls 14 by a ground (GND) pattern 2b provided inside the printed circuit board 2. Is shielded.
【００３０】従って、この実施形態では以下の効果を得
ることができる。 （１）半田ボール１４の接合部分がある空間がその周囲
をキャップ３の脚部３ｂにより覆われているため、半田
ボール１４の接合部分から放射される電磁波の外部への
漏れを小さく抑えることができる。従って、他の電子部
品への電磁波障害を防ぐことができる。Therefore, in this embodiment, the following effects can be obtained. (1) Since the space where the joint portion of the solder ball 14 is located is covered with the leg 3b of the cap 3, the leakage of the electromagnetic wave radiated from the joint portion of the solder ball 14 to the outside is suppressed. it can. Therefore, it is possible to prevent electromagnetic wave disturbance to other electronic components.
【００３１】（２）外部端子（半田ボール）１４が基板
本体１２の下面領域内に配置されるエリアパッケージの
１種であるＢＧＡに適用したので、キャップ３を基板本
体１２に嵌める嵌め込み式の取付構造を採用しやすい。
つまり、リードフレームタイプであると、リードフレー
ムが基板本体の側面から延びているので、キャップの嵌
合面を基板本体側面に確保し難い。これに対し、ＢＧＡ
は基板本体１２の側面全体を嵌合面とすることができる
ので、キャップ３の嵌め込み式取付構造を採用し易い。
また、例えば５００ＭＨｚ以上の高周波数の信号を使う
半導体チップの実装に使われる高速化対応のエリアパッ
ケージに電磁波吸収材としてのキャップ３を適用してい
るので、信号の高周波数化で問題になってきた外部端子
１４の接合部分から放射される電磁波を確実に吸収し、
電磁波障害を小さく抑えることができる。(2) Since the external terminals (solder balls) 14 are applied to a BGA, which is a kind of area package arranged in the lower surface area of the substrate main body 12, a fitting type in which the cap 3 is fitted to the substrate main body 12 Easy to adopt structure.
That is, in the case of the lead frame type, since the lead frame extends from the side surface of the substrate main body, it is difficult to secure the fitting surface of the cap on the side surface of the substrate main body. In contrast, BGA
Since the entire side surface of the substrate body 12 can be used as the fitting surface, it is easy to adopt the fitting type mounting structure of the cap 3.
In addition, since the cap 3 as an electromagnetic wave absorbing material is applied to a high-speed compatible area package used for mounting a semiconductor chip that uses a signal of a high frequency of 500 MHz or more, a problem arises in increasing the frequency of the signal. Electromagnetic waves radiated from the joint of the external terminals 14
Electromagnetic interference can be reduced.
【００３２】（３）電磁波吸収物質として電磁波を吸収
して熱に変換するフェライトを使用し、金属を用いた電
磁シールド構造に必要なアースが不要なので、電磁波吸
収材の取付構造をかなり簡単にすることができる。(3) Ferrite which absorbs electromagnetic waves and converts it into heat is used as the electromagnetic wave absorbing material, and the earth required for the electromagnetic shielding structure using metal is not required, so that the mounting structure of the electromagnetic wave absorbing material is considerably simplified. be able to.
【００３３】（４）キャップ３には蓋部３ａに孔３ｄが
開いているので、キャップ３を被せる際、空気抜けとな
って作業が容易である。また基板本体１２の背面にある
金属ベース１１が電磁シールド機能を有するので、孔３
ｄが開いていても電磁波が外部に漏れることがない。さ
らに金属ベース１１の形状・サイズに合わせて孔３ｄの
開口面積を電磁シールドと蓋の各機能が損なわれない範
囲で広く形成したので、キャップ３の材料を少量に節約
でき、キャップ３の部品コストを安価にできる。(4) Since the cap 3 has a hole 3d in the lid 3a, when the cap 3 is put on the cap 3, air escapes and the work is easy. Since the metal base 11 on the back of the substrate body 12 has an electromagnetic shielding function, the holes 3
Electromagnetic waves do not leak outside even if d is open. Further, since the opening area of the hole 3d is formed wide according to the shape and size of the metal base 11 as long as the functions of the electromagnetic shield and the lid are not impaired, the material of the cap 3 can be reduced in a small amount, and the cost of parts of the cap 3 can be reduced. Can be inexpensive.
【００３４】（５）キャップ３をフェライト焼結体とし
た場合には、予め治具にキャップ３を一緒にセットした
状態でリフロー炉に通すことができる。実装後のキャッ
プの取付けが不要である。また、フェライト焼結体であ
る方がフェライト含有率が高く（１００％に近い値）、
電磁波吸収能が高いので、電磁波を効果的に吸収でき
る。(5) When the cap 3 is a ferrite sintered body, the cap 3 can be passed through a reflow furnace with the cap 3 set together in a jig in advance. There is no need to attach a cap after mounting. Further, the ferrite sintered body has a higher ferrite content (a value close to 100%),
Since the electromagnetic wave absorbing ability is high, electromagnetic waves can be effectively absorbed.
【００３５】（６）キャップ３の寸法Ｌ，ｔの合わせ込
みにより、キャップ３の脚部３ｂの底面をプリント基板
２に当接させることができ、しかも半田ボール１４が溶
けるときの基板本体１２の下降量のばらつきを基板本体
１２が脚部３ｂの内面を摺接することで吸収し、半田ボ
ール１４を確実に接合することができる。(6) By adjusting the dimensions L and t of the cap 3, the bottom surface of the leg 3 b of the cap 3 can be brought into contact with the printed circuit board 2, and the board body 12 when the solder balls 14 are melted. Variations in the descending amount are absorbed by the board body 12 slidingly contacting the inner surfaces of the legs 3b, so that the solder balls 14 can be securely joined.
【００３６】（７）キャップ３をフェライト樹脂やフェ
ライトゴムとした場合は、キャップ３の脚部３ｂを長め
に設定しておくことで脚部３ｂの変形（塑性変形や弾性
変形）によりプリント基板２に確実に当接できる。ま
た、キャップ３を基板本体１２に嵌め込んだときの密着
力を確保でき、キャップ３を外れ難くすることができ
る。(7) When the cap 3 is made of ferrite resin or ferrite rubber, the length of the leg 3b of the cap 3 is set to be longer so that the leg 3b is deformed (plastic deformation or elastic deformation). Can be reliably contacted. In addition, the adhesion force when the cap 3 is fitted into the substrate main body 12 can be secured, and the cap 3 can be hardly removed.
【００３７】（第２の実施形態）次に、第２の実施形態
を図５に基づいて説明する。電磁波吸収材をキャップと
したが、この実施形態では電磁波吸収性樹脂を用いてモ
ールド構造とした点が前記第１の実施形態と異なる。な
お、前記第１の実施形態と同様の構成については、同一
の符号を付して説明を省略し、特に異なる構成について
のみ説明する。(Second Embodiment) Next, a second embodiment will be described with reference to FIG. Although the electromagnetic wave absorbing material is used as the cap, this embodiment is different from the first embodiment in that the cap is made of an electromagnetic wave absorbing resin. The same components as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted. Only different components will be described.
【００３８】図５（ａ）は電磁シールド構造の斜視図、
（ｂ）は電磁波吸収性樹脂の要部側断面を示す。図５に
示すように、ＢＧＡタイプの半導体パッケージ基板１は
プリント基板２の実装面に実装されている。基板本体１
２の周縁部にはプリント基板２との間の隙間を周囲から
覆うように、電磁波吸収性樹脂としてのフェライト樹脂
２０が固着されている。フェライト樹脂２０はフェライ
ト粉を樹脂に混ぜたもので、フェライト樹脂２０を流動
性のある状態で基板本体１２の周縁に沿って流し、その
後樹脂を硬化させている。硬化した状態でフェライト樹
脂２０は弾力があってもなくてもよい。また、フェライ
ト樹脂２０はある程度形状保持されるのであれば流動性
のある状態のままでもよい。FIG. 5A is a perspective view of an electromagnetic shield structure.
(B) shows a main part side cross section of the electromagnetic wave absorbing resin. As shown in FIG. 5, a BGA type semiconductor package substrate 1 is mounted on a mounting surface of a printed circuit board 2. Substrate body 1
A ferrite resin 20 as an electromagnetic-wave-absorbing resin is fixed to the peripheral portion of the cover 2 so as to cover a gap between the printed circuit board 2 and the surroundings. The ferrite resin 20 is a mixture of a ferrite powder and a resin. The ferrite resin 20 is caused to flow along the periphery of the substrate body 12 in a fluid state, and then the resin is cured. In the cured state, the ferrite resin 20 may or may not have elasticity. The ferrite resin 20 may be kept in a fluid state as long as the shape of the ferrite resin 20 is maintained to some extent.
【００３９】従って、この実施形態によれば、前記
（１），（３）の効果が同様に得られる。その他、以下
の効果が得られる。 （８）流動性樹脂を半導体パッケージ基板１の周縁に沿
って流すだけなので、、どのような形状・サイズの半導
体パッケージ基板に対しても対応できる。前記第１の実
施形態のようなキャップ３であると、半導体パッケージ
基板１の形状・サイズに応じたキャップを多数種用意す
る必要があるが、そのような必要がない。Therefore, according to this embodiment, the effects (1) and (3) can be similarly obtained. In addition, the following effects can be obtained. (8) Since the flowable resin only flows along the peripheral edge of the semiconductor package substrate 1, it can be applied to a semiconductor package substrate of any shape and size. In the case of the cap 3 as in the first embodiment, it is necessary to prepare a large number of caps according to the shape and size of the semiconductor package substrate 1, but such a cap is not required.
【００４０】（９）フェライト樹脂を流し込むので、電
磁波漏出経路を隙間なくフェライト樹脂で覆うことがで
きる。よって、電磁波の隙間からの漏れを一層確実に防
ぐことができる。但し、電磁波吸収特性については、フ
ェライト粉濃度に依存するためフェライト焼結体の方が
勝るが、必要な電磁波吸収能は得られるので問題はな
い。(9) Since the ferrite resin is poured, the electromagnetic wave leakage path can be covered with the ferrite resin without any gap. Therefore, leakage of the electromagnetic wave from the gap can be more reliably prevented. However, regarding the electromagnetic wave absorption characteristics, the ferrite sintered body is superior because it depends on the ferrite powder concentration, but there is no problem because the required electromagnetic wave absorption ability can be obtained.
【００４１】なお、実施の形態は上記に限定されず、以
下の態様でも実施できる。 ○ 電磁波吸収性樹脂を、樹脂やゴムにフェライト粉を
混ぜたフェライト樹脂またはフェライトゴムから成形し
たテープ（フェライトテープ）とすることもできる。図
６に示すように、フェライトテープ２１を半導体パッケ
ージ基板１の周囲に、外部端子としての半田ボール１４
の配置空間を完全に遮蔽する状態に貼り付ける。またリ
ードフレームタイプであっても、リード先端部にフェラ
イトテープ２１を貼り付けたり、リード全体を覆う状態
にフェライトテープ２１を貼り付けることもできる。フ
ェライトテープ２１はマトリクス材にゴムや硬化したと
きに弾力のある樹脂を使用し、弾性に富むフェライトテ
ープ２１とすることが好ましい。フェライトテープ２１
を使用すれば、モールド構造と同様にどんな形状・サイ
ズの半導体パッケージ基板にも対応できるとともに、モ
ールド構造のような樹脂の調製が不要である。さらにテ
ープ貼り付け作業がし易いうえ、被貼着面に対する密着
性がよく外部端子１４の接合部分を隙間なく覆うことが
できる。The embodiment is not limited to the above, but can be implemented in the following modes. ○ The electromagnetic wave absorbing resin may be a tape (ferrite tape) formed from a ferrite resin or a ferrite rubber in which ferrite powder is mixed with resin or rubber. As shown in FIG. 6, a ferrite tape 21 is provided around the semiconductor package substrate 1 around the solder balls 14 as external terminals.
Paste in a state where the placement space of is completely shielded. Further, even in the case of a lead frame type, the ferrite tape 21 can be attached to the tip of the lead, or the ferrite tape 21 can be attached so as to cover the entire lead. As the ferrite tape 21, it is preferable to use a rubber or a resin which is elastic when cured for the matrix material, so that the ferrite tape 21 is rich in elasticity. Ferrite tape 21
By using the same, it is possible to cope with a semiconductor package substrate having any shape and size as in the case of the mold structure, and it is not necessary to prepare a resin as in the case of the mold structure. Further, the tape attaching operation is easy, and the adhesiveness to the surface to be adhered is good, so that the joint portion of the external terminal 14 can be covered without any gap.
【００４２】○ 図７に示すように、キャップ３を予め
一体に組付けた半導体パッケージ基板１を製品とするこ
ともできる。この場合、キャップ３は必ずリフロー炉を
通ることになるのでフェライト焼結体とする。もちろ
ん、リフロー炉の熱に耐えられる耐熱性樹脂をマトリク
ス樹脂とするフェライト樹脂を使用することもできる。
キャップ３の脚部３ｂの高さ寸法は、半田ボール１４の
溶けたときの確実な接合を得るために必要な基板本体１
２の下降量を考慮し、実装後における脚部３ｂの底面が
プリント基板２になるべく当接するよう設定してある。
また、基板本体１２が金属ベースを背面に備えない構成
なので、基板本体１２の上面全体を覆うように蓋部３ｃ
を設け、基板本体１２から上方へ放射される電磁波を蓋
部３ｃにより吸収するようにしている。As shown in FIG. 7, the semiconductor package substrate 1 in which the cap 3 is previously assembled integrally can be used as a product. In this case, since the cap 3 always passes through the reflow furnace, a ferrite sintered body is used. Of course, it is also possible to use a ferrite resin whose matrix resin is a heat-resistant resin that can withstand the heat of the reflow furnace.
The height of the leg 3b of the cap 3 is the same as that of the board main body 1 necessary for obtaining reliable bonding when the solder ball 14 is melted.
The bottom of the leg 3b after mounting is set so as to come in contact with the printed circuit board 2 as much as possible in consideration of the amount of downward movement of the printed circuit board 2.
In addition, since the substrate body 12 does not have a metal base on the back surface, the cover 3c covers the entire upper surface of the substrate body 12.
Is provided so that the electromagnetic wave radiated upward from the substrate body 12 is absorbed by the lid 3c.
【００４３】また、図８は、基板本体１２が金属ベース
を背面に備えない半導体パッケージ基板１に電磁波吸収
性樹脂のモールド構造を適用する場合で、電磁波吸収性
樹脂としてのフェライト樹脂２０を半導体パッケージ基
板１の全体を覆う状態にモールドしている。FIG. 8 shows a case where a mold structure of an electromagnetic wave absorbing resin is applied to the semiconductor package substrate 1 in which the substrate body 12 does not have a metal base on the back surface. Molding is performed so as to cover the entire substrate 1.
【００４４】○ エリアパッケージにも限定されない。
例えば図９に示すようなリードフレームタイプの半導体
パッケージ基板３０に適用することもできる。半導体パ
ッケージ基板３０の周縁に沿ってフェライト樹脂３１を
流し、外部端子としての全てのリード３２をフェライト
樹脂３１でモールドする。図９（ｂ）に示すように、リ
ード３２はプリント基板２との半田３３による接合部分
に至るまで完全にフェライト樹脂３１でモールドされて
いるので、接合部分を放射源とする電磁波の外部への漏
れを確実に防ぐことができる。なお、半導体パッケージ
基板３０を図８と同様にフェライト樹脂で完全にモール
ドすることもできる。The present invention is not limited to the area package.
For example, the present invention can be applied to a lead frame type semiconductor package substrate 30 as shown in FIG. The ferrite resin 31 flows along the periphery of the semiconductor package substrate 30, and all the leads 32 as external terminals are molded with the ferrite resin 31. As shown in FIG. 9B, the lead 32 is completely molded with the ferrite resin 31 up to the joint portion of the printed circuit board 2 with the solder 33, so that the electromagnetic wave having the joint portion as a radiation source is transmitted to the outside. Leakage can be reliably prevented. The semiconductor package substrate 30 can be completely molded with a ferrite resin as in FIG.
【００４５】○ リードフレームタイプにおいて、図１
０に示すようにリード３２の先端部の接合部分だけをフ
ェライト樹脂３１でモールドする。この場合、リード３
２の半田接合部分を放射源とする電磁波をフェライト樹
脂３１により吸収できるので、電磁波障害を防ぐことが
できる。In the lead frame type, FIG.
As shown at 0, only the joint at the tip of the lead 32 is molded with the ferrite resin 31. In this case, lead 3
Since the ferrite resin 31 can absorb the electromagnetic wave having the solder joint portion 2 as a radiation source, electromagnetic wave interference can be prevented.
【００４６】○ リードフレームタイプにおいて、図１
１に示すようにフェライトからなるキャップ３５を使用
することもできる。キャップ３５はその蓋部３５ａが基
板本体３６の上面に例えば接着剤を用いて接着され、基
板本体３６の周囲をリード３２まで含めて覆う（囲む）
ように脚部３５ｂがプリント基板２に当接している。接
着剤に耐熱性樹脂を使用すればリフロー炉を通すことも
できる。またキャップ３５を基板本体３６に嵌合させる
構成を採用することもでき、この場合、蓋部３５ａに孔
３５ｃを開けておくことで、リフロー炉を通す前の治具
へのセット作業時に孔３５ｃが空気抜けとなってキャッ
プ３５のセット作業が容易である。もちろん、半導体パ
ッケージ基板の実装後にキャップ３５を嵌める場合も、
孔３５ｃが空気抜けとなって作業が容易である。In the lead frame type, FIG.
As shown in FIG. 1, a cap 35 made of ferrite can be used. The cap 35 has its lid 35 a adhered to the upper surface of the substrate body 36 using, for example, an adhesive, and covers (surrounds) the periphery of the substrate body 36 including the leads 32.
Legs 35b are in contact with printed circuit board 2 as described above. If a heat-resistant resin is used for the adhesive, it can be passed through a reflow furnace. In addition, a configuration in which the cap 35 is fitted to the substrate main body 36 can be adopted. In this case, by opening the hole 35c in the lid 35a, the hole 35c can be set at the time of setting the jig before passing through the reflow furnace. The air escapes, and the setting operation of the cap 35 is easy. Of course, when the cap 35 is fitted after the mounting of the semiconductor package substrate,
The hole 35c evacuates the air to facilitate the work.
【００４７】○ 半導体パッケージ基板自身の端部周辺
に連続してＬ字状に曲がるようにフェライト樹脂を成形
し、キャップの代わりにしてもよい。またフェライト焼
結体を半導体パッケージ基板自身の端部周辺に連続して
Ｌ字状に曲がるように接着剤で固着してもよい。A ferrite resin may be formed so as to bend continuously in an L-shape around the end of the semiconductor package substrate itself, and may be used instead of the cap. Further, the ferrite sintered body may be fixed to the periphery of the end of the semiconductor package substrate itself with an adhesive so as to bend continuously in an L-shape.
【００４８】○ キャップ、基板、キャップの孔の各形
状は四角形状に限定されず、三角、丸、他の多角形等、
種々の形状であってもよい。また孔はキャップの中央で
ある必要はなく、偏った位置であってもよいし、数も１
個に限らず、複数箇所設けてもよい。○ Each shape of the cap, the substrate, and the hole of the cap is not limited to a square shape, but may be a triangle, a circle, another polygon, or the like.
Various shapes may be used. Also, the hole need not be at the center of the cap, but may be at a biased position,
The number is not limited to two, and may be provided at a plurality of locations.
【００４９】○ リフロー炉を通すときは、フェライト
焼結体からなるキャップ３を、複数の部品から組み立て
る構造とする。炉を通るときの熱による半導体パッケー
ジ基板１との熱膨張差を部品間の組付隙間により吸収で
きる。When passing through a reflow furnace, the cap 3 made of a ferrite sintered body is assembled from a plurality of parts. The difference in thermal expansion between the semiconductor package substrate 1 and the semiconductor package substrate 1 due to heat when passing through the furnace can be absorbed by the assembly gap between the components.
【００５０】○ 四角筒状のキャップとすることもでき
る。つまり、第１の実施形態におけるキャップにおい
て、蓋部３ａを廃止し、四角筒状の脚部３ｂのみを残し
た筒形構造とする。○ It is also possible to form a square cylindrical cap. That is, the cap according to the first embodiment has a tubular structure in which the lid 3a is eliminated and only the quadrangular tubular leg 3b is left.
【００５１】○ 前記各実施形態では電磁波吸収物質と
してフェライトを使用したが、電磁波吸収能を有するそ
の他の物質を使用することもできる。要するに電磁波を
吸収することができるものであればよい。特にフェライ
トのように電磁波を吸収して熱に変換する物質が好まし
い。このような特性をもつ電磁波吸収物質であれば、金
属による電磁シールドのようにアースが不要で簡単な取
付構造を採用できる。In the above embodiments, ferrite is used as the electromagnetic wave absorbing material, but other materials having electromagnetic wave absorbing ability can be used. In short, any material that can absorb electromagnetic waves may be used. In particular, a substance that absorbs electromagnetic waves and converts it into heat, such as ferrite, is preferable. As long as the electromagnetic wave absorbing substance has such characteristics, a simple mounting structure that does not require grounding like an electromagnetic shield made of metal can be adopted.
【００５２】○ ＢＧＡタイプの半導体パッケージ基板
への適用に限定されない。エリアパッケージであるＬＧ
Ａ（Land Grid Array ）タイプの半導体パッケージ基板
に適用することもできる。この場合、実装される半導体
チップの信号周波数が例えば２００〜３００ＭＨｚ程度
のものであってもよい。The present invention is not limited to application to a BGA type semiconductor package substrate. LG which is an area package
It can also be applied to an A (Land Grid Array) type semiconductor package substrate. In this case, the signal frequency of the semiconductor chip to be mounted may be, for example, about 200 to 300 MHz.
【００５３】○ 半導体パッケージ基板は、エリアパッ
ケージやリードフレームタイプに限定されない。例えば
ＰＧＡ（Pin Grid Array）に採用することもできる。ま
たセラミック製の半導体パッケージ基板にも適用でき
る。The semiconductor package substrate is not limited to the area package or the lead frame type. For example, it can be adopted in a PGA (Pin Grid Array). Further, the present invention can be applied to a semiconductor package substrate made of ceramic.
【００５４】○ 半導体パッケージ基板は、半導体チッ
プが複数個実装されるモジュールタイプのものであって
もよい。また半導体パッケージ基板は樹脂製に限定され
ず、セラミック製でもよい。The semiconductor package substrate may be of a module type on which a plurality of semiconductor chips are mounted. Further, the semiconductor package substrate is not limited to resin, but may be ceramic.
【００５５】前記実施形態及び別例から把握できる請求
項以外の技術的思想について、以下にその効果とともに
記載する。 （１）請求項１〜９のいずれかにおいて、前記電磁波吸
収材は、電磁波を熱に変換する材質である。この場合、
金属による電磁シールド構造に必要なアースのための接
続が不要なので、電磁波吸収材の取付構造を簡単にする
ことができる。The technical ideas other than the claims which can be grasped from the embodiment and other examples will be described below together with their effects. (1) In any one of the first to ninth aspects, the electromagnetic wave absorbing material is a material that converts electromagnetic waves into heat. in this case,
Since the connection for grounding required for the electromagnetic shield structure made of metal is unnecessary, the mounting structure of the electromagnetic wave absorbing material can be simplified.
【００５６】（２）請求項１において、前記電磁波吸収
材は、電磁波吸収焼結体である。従って、電磁波吸収物
質の焼結体であるので、高い電磁波吸収能力が得られ
る。 （３）請求項１において、前記電磁波吸収材は、電磁波
吸収性樹脂である。従って、電磁波吸収性樹脂なので、
加工性に富み、安価な電磁波吸収材を提供可能である。
また接合部分や外部端子などをモールドすることも可能
で、流動状の樹脂を使って少なくとも接合部分を遮蔽
し、後で硬化すれば、どんな形状・サイズの半導体パッ
ケージ基板にも適用可能となる。また嵌め込み式として
採用すれば基板本体に嵌め込んだときの密着性がよく外
れ難くなる。(2) In claim 1, the electromagnetic wave absorbing material is an electromagnetic wave absorbing sintered body. Therefore, since it is a sintered body of an electromagnetic wave absorbing substance, a high electromagnetic wave absorbing ability can be obtained. (3) In claim 1, the electromagnetic wave absorbing material is an electromagnetic wave absorbing resin. Therefore, since it is an electromagnetic wave absorbing resin,
It is possible to provide an inexpensive electromagnetic wave absorbing material which is rich in processability.
It is also possible to mold the joints and the external terminals, etc. If at least the joints are shielded using a fluid resin and cured later, it can be applied to semiconductor package substrates of any shape and size. Further, if it is adopted as a fitting type, the adhesiveness when fitted into the substrate main body is good and it is difficult to come off.
【００５７】[0057]
【発明の効果】以上詳述したように請求項１〜９に記載
の発明によれば、外部端子と実装用基板との接合部分か
ら放射される電磁波は電磁波吸収材により吸収されて電
磁シールドされるので、例えば半導体チップの信号高周
波数化により接合部分が電磁波の主要な放射源となって
も、その周囲にある他の電子部品に電磁波障害が及ぶこ
とを回避できる。As described above in detail, according to the first to ninth aspects of the present invention, the electromagnetic wave radiated from the joint between the external terminal and the mounting board is absorbed by the electromagnetic wave absorbing material and is shielded. Therefore, for example, even if the junction portion becomes a main radiation source of the electromagnetic wave due to the increase in the frequency of the signal of the semiconductor chip, it is possible to prevent electromagnetic wave interference from affecting other electronic components around the junction.
【００５８】請求項２、８、９に記載の発明によれば、
半導体パッケージ基板の基板本体に固定されて下端面が
実装用基板の実装面にほぼ当接した状態にある環状の遮
蔽部分により外部端子を外側から包囲する構造なので、
接合部分から放射された電磁波の外部への漏れを小さく
抑えることができる。According to the second, eighth and ninth aspects of the invention,
Since it is a structure that surrounds the external terminals from the outside by an annular shielding part that is fixed to the substrate body of the semiconductor package substrate and whose lower end surface is almost in contact with the mounting surface of the mounting substrate,
The leakage of the electromagnetic wave radiated from the joint portion to the outside can be suppressed to a small value.
【００５９】請求項３に記載の発明によれば、接合部分
は電磁波吸収性樹脂により覆われているので、接合部分
から放射される電磁波の外部への漏出を防ぐことができ
る。請求項４に記載の発明によれば、実装後の半導体パ
ッケージ基板の周囲を電磁波吸収性樹脂にて外部端子を
包囲するように実装用基板に至るまで覆うので、基板本
体の下面に外部端子があるタイプの半導体パッケージ基
板にも、接合部分を含め外部端子から放射される電磁波
の外部への漏出を効果的に防ぐことができる。According to the third aspect of the present invention, since the joint portion is covered with the electromagnetic wave absorbing resin, it is possible to prevent the electromagnetic wave radiated from the joint portion from leaking to the outside. According to the invention described in claim 4, the periphery of the semiconductor package substrate after mounting is covered with the electromagnetic wave absorbing resin to the mounting substrate so as to surround the external terminals. Even for a certain type of semiconductor package substrate, leakage of electromagnetic waves radiated from external terminals including the joint portion to the outside can be effectively prevented.
【００６０】請求項５に記載の発明によれば、請求項
３、４の発明の効果に加え、電磁波吸収性樹脂がテープ
であるため、どんな形状・サイズの半導体パッケージ基
板にも簡単に取付けることができる。According to the fifth aspect of the invention, in addition to the effects of the third and fourth aspects, since the electromagnetic wave absorbing resin is a tape, it can be easily attached to a semiconductor package substrate of any shape and size. Can be.
【図１】 第１の実施形態におけるキャップを用いた電
磁シールド構造を示す要部側断面図。FIG. 1 is an essential part cross-sectional view showing an electromagnetic shield structure using a cap according to a first embodiment.
【図２】 同じく側断面図。FIG. 2 is a side sectional view of the same.
【図３】 同じく実装前の状態を示す分解斜視図。FIG. 3 is an exploded perspective view showing a state before mounting.
【図４】 同じく実装後の状態を示す斜視図。FIG. 4 is a perspective view showing a state after mounting.
【図５】 第２の実施形態における電磁シールド構造を
示し、（ａ）は全体斜視図、（ｂ）は要部側断面図。5A and 5B show an electromagnetic shield structure according to a second embodiment, wherein FIG. 5A is an overall perspective view, and FIG.
【図６】 別例におけるフェライトテープを用いた電磁
シールド構造を示す斜視図。FIG. 6 is a perspective view showing another example of an electromagnetic shield structure using a ferrite tape.
【図７】 図６と異なる別例における電磁シールド構造
を示す側断面図。FIG. 7 is a side sectional view showing an electromagnetic shield structure in another example different from FIG. 6;
【図８】 図７と異なる別例における電磁シールド構造
を示す側断面図。FIG. 8 is a side sectional view showing an electromagnetic shield structure in another example different from FIG. 7;
【図９】 図８と異なる別例における半導体パッケージ
基板の電磁シールド構造を示し、（ａ）は全体斜視図、
（ｂ）は要部側断面図。9A and 9B show an electromagnetic shield structure of a semiconductor package substrate in another example different from FIG. 8, wherein FIG.
(B) is a sectional side view of a main part.
【図１０】 図９と異なる別例の電磁シールド構造を示
す側断面図。FIG. 10 is a side sectional view showing another example of an electromagnetic shield structure different from FIG. 9;
【図１１】 図１０と異なる別例の電磁シールド構造を
示す側断面図。FIG. 11 is a side sectional view showing another example of the electromagnetic shield structure different from FIG. 10;
【図１２】 従来の電磁シールド構造を示す側断面図。FIG. 12 is a side sectional view showing a conventional electromagnetic shield structure.
【図１３】 従来のＢＧＡタイプ半導体パッケージ基板
の側断面図。FIG. 13 is a side sectional view of a conventional BGA type semiconductor package substrate.
１…半導体パッケージ基板、２…実装用基板、３…電磁
波吸収材及び電磁シールドキャップとしてのキャップ、
３ｂ…遮蔽部分としての脚部、１２…基板本体、１４…
外部端子としての半田ボール、２０…電磁波吸収材とし
てのフェライト樹脂、２１…電磁波吸収材及びテープと
してのフェライトテープ、３１…電磁波吸収材としての
フェライト樹脂、３２…外部端子としてのリード。DESCRIPTION OF SYMBOLS 1 ... Semiconductor package board, 2 ... Mounting board, 3 ... Cap as electromagnetic wave absorbing material and electromagnetic shielding cap,
3b: legs as shielding parts, 12: substrate body, 14 ...
Solder balls as external terminals, 20: ferrite resin as electromagnetic wave absorbing material, 21: ferrite tape as electromagnetic wave absorbing material and tape, 31: ferrite resin as electromagnetic wave absorbing material, 32: lead as external terminal.
Claims (9)
用基板と前記半導体パッケージ基板の外部端子との接合
部分から放射される電磁波を遮蔽する状態に、金属以外
の材質からなる電磁波吸収材を設けた半導体パッケージ
基板の電磁シールド構造。An electromagnetic wave absorbing material made of a material other than metal is provided so as to shield electromagnetic waves radiated from a joint portion between a mounting substrate on which a semiconductor package substrate is mounted and an external terminal of the semiconductor package substrate. Electromagnetic shield structure of semiconductor package substrate.
ージ基板の基板本体に固定されるとともに前記基板本体
の外周に沿って配置されて前記外部端子を外側から包囲
する環状の遮蔽部分を備え、前記遮蔽部分の下端面が前
記実装用基板の実装面にほぼ当接した状態にある請求項
１に記載の半導体パッケージ基板の電磁波シールド構
造。2. The semiconductor device according to claim 2, wherein the electromagnetic wave absorbing material includes an annular shielding portion fixed to a substrate body of the semiconductor package substrate and arranged along an outer periphery of the substrate body to surround the external terminals from outside. 2. The electromagnetic wave shielding structure of a semiconductor package substrate according to claim 1, wherein a lower end surface of the shielding portion is substantially in contact with a mounting surface of the mounting substrate.
あり、前記半導体パッケージ基板の外部端子と前記実装
基板との接合部分を少なくとも覆っている請求項１に記
載の半導体パッケージ基板の電磁シールド構造。3. The electromagnetic shield structure of a semiconductor package substrate according to claim 1, wherein the electromagnetic wave absorbing material is an electromagnetic wave absorbing resin, and covers at least a joint between an external terminal of the semiconductor package substrate and the mounting substrate. .
を包囲するように基板本体の周縁部分を実装用基板に至
るまで覆っている請求項３に記載の半導体パッケージ基
板の電磁シールド構造。4. The electromagnetic shield structure of a semiconductor package substrate according to claim 3, wherein the electromagnetic wave absorbing resin covers a peripheral portion of the substrate body so as to surround the external terminal up to a mounting substrate.
あり、該電磁波吸収性樹脂はテープである請求項３又は
４に記載の半導体パッケージ基板の電磁シールド構造。5. The electromagnetic shielding structure of a semiconductor package substrate according to claim 3, wherein the electromagnetic wave absorbing material is an electromagnetic wave absorbing resin, and the electromagnetic wave absorbing resin is a tape.
ケージタイプである請求項１〜５のいずれか一項に記載
の半導体パッケージ基板の電磁シールド構造。6. The electromagnetic shielding structure for a semiconductor package substrate according to claim 1, wherein said semiconductor package substrate is of an area package type.
物質はフェライトである請求項１〜６のいずれか一項に
記載の半導体パッケージ基板の電磁シールド構造。7. The electromagnetic shield structure for a semiconductor package substrate according to claim 1, wherein the electromagnetic wave absorbing material constituting the electromagnetic wave absorbing material is ferrite.
実装状態において実装用基板の表面にほぼ当接可能な状
態に配置できるような位置関係で基板本体に一体に固定
されている半導体パッケージ基板。8. The electromagnetic wave absorbing material according to claim 2,
A semiconductor package substrate integrally fixed to a substrate body in a positional relationship such that the semiconductor package can be disposed so as to be substantially in contact with a surface of a mounting substrate in a mounted state.
って、半導体パッケージ基板の基板本体に嵌め込み可能
な電磁シールドキャップ。9. The electromagnetic shielding material according to claim 2, wherein the electromagnetic shielding cap is fittable into a substrate body of the semiconductor package substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34237299A JP2001160605A (en) | 1999-12-01 | 1999-12-01 | Electromagnetic shielding structure of semiconductor packaged board, semiconductor package board and electromagnetic shield cap |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34237299A JP2001160605A (en) | 1999-12-01 | 1999-12-01 | Electromagnetic shielding structure of semiconductor packaged board, semiconductor package board and electromagnetic shield cap |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001160605A true JP2001160605A (en) | 2001-06-12 |
Family
ID=18353229
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP34237299A Pending JP2001160605A (en) | 1999-12-01 | 1999-12-01 | Electromagnetic shielding structure of semiconductor packaged board, semiconductor package board and electromagnetic shield cap |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001160605A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7425757B2 (en) | 2003-12-22 | 2008-09-16 | Fuji Electric Device Technology Co., Ltd. | Semiconductor power module |
| US7719092B2 (en) | 2005-06-20 | 2010-05-18 | Fuji Electric Device Technology Co., Ltd. | Power semiconductor module |
| TWI382519B (en) * | 2008-04-21 | 2013-01-11 | Advanced Semiconductor Eng | Electronic element packaging module by using a cap |
| US8829667B2 (en) | 2012-08-17 | 2014-09-09 | Samsung Electronics Co., Ltd. | Electronic devices including EMI shield structures for semiconductor packages and methods of fabricating the same |
| WO2016047880A1 (en) * | 2014-09-23 | 2016-03-31 | 제너셈(주) | Method for treating semiconductor package with emi shield |
| US9355977B2 (en) | 2012-08-31 | 2016-05-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump structures for semiconductor package |
| US9508657B2 (en) | 2014-06-26 | 2016-11-29 | Samsung Electronics Co., Ltd. | Semiconductor package |
| US20170245404A1 (en) * | 2016-02-19 | 2017-08-24 | Alpha Assembly Solutions Inc. | Rf shield with selectively integrated solder |
-
1999
- 1999-12-01 JP JP34237299A patent/JP2001160605A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7425757B2 (en) | 2003-12-22 | 2008-09-16 | Fuji Electric Device Technology Co., Ltd. | Semiconductor power module |
| US7719092B2 (en) | 2005-06-20 | 2010-05-18 | Fuji Electric Device Technology Co., Ltd. | Power semiconductor module |
| DE102006028358B4 (en) | 2005-06-20 | 2018-12-27 | Fuji Electric Co., Ltd. | The power semiconductor module |
| TWI382519B (en) * | 2008-04-21 | 2013-01-11 | Advanced Semiconductor Eng | Electronic element packaging module by using a cap |
| US8829667B2 (en) | 2012-08-17 | 2014-09-09 | Samsung Electronics Co., Ltd. | Electronic devices including EMI shield structures for semiconductor packages and methods of fabricating the same |
| US9355977B2 (en) | 2012-08-31 | 2016-05-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump structures for semiconductor package |
| US9508657B2 (en) | 2014-06-26 | 2016-11-29 | Samsung Electronics Co., Ltd. | Semiconductor package |
| WO2016047880A1 (en) * | 2014-09-23 | 2016-03-31 | 제너셈(주) | Method for treating semiconductor package with emi shield |
| US9583447B2 (en) | 2014-09-23 | 2017-02-28 | Genesem Inc. | EMI shielding method of semiconductor packages |
| US20170245404A1 (en) * | 2016-02-19 | 2017-08-24 | Alpha Assembly Solutions Inc. | Rf shield with selectively integrated solder |
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