JP2001160122A - Non-contact ic card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stabilize the action of a non-contact IC card and to improve its reliability without bringing about its capability deterioration. SOLUTION: This non-contact IC card ICC which is provided with a card side antenna ANTC that is electromagnetically coupling with a reader/writer side antenna ANTR, a capacity means which is provided parallel with the antenna ANTC and constitutes a tuning circuit for a carrier together with the antenna ANTC and a bridge circuit BRGC which rectifies the carrier and generates a DC power supply voltage VCC and receives the supply of operation power by electromagnetic coupling, is provided with a plurality of capacities C1 to C3 which, e.g. are parallelly connected as the capacity means, receive the effective levels of corresponding voltage control signals CS1 to CS3 and are selectively made effective and also a power supply voltage control circuit VC which monitors the voltage VCC and selectively makes the signals CS1 to CS3 an effective level in accordance with its electric potential.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a non-contact IC (integrated circuit) card, and more particularly to a non-contact IC card which is supplied with power by electromagnetic coupling via an antenna and to stabilize the operation and improve the reliability of the card. It concerns particularly effective technologies.

[0002]

2. Description of the Related Art For example, a non-volatile memory device which includes a predetermined integrated circuit including a memory and has a write / read function, that is, a device which transmits and receives data without being directly electrically connected to a read / writer via a connector or the like. There is a contact IC card. These non-contact IC cards have a card-side antenna that is electromagnetically coupled to an antenna (or a coil) on the read / writer side, transmit and receive data via the card-side antenna, and use the carrier (carrier wave) based on the data. A DC power supply voltage serving as an operation power supply is generated.

[0003]

Prior to the present invention, the present inventors have studied a non-contact IC card having a power supply path as shown in FIG. 9 and have noticed the following problems. That is, this non-contact IC card uses a read / writer R / W
And a card-side antenna ANTC that is electromagnetically coupled to an antenna ANTR provided on the card-side antenna ANTR.
The TC, together with the parasitic capacitance Cs, forms a tuning circuit having a frequency characteristic as shown in FIG. Read / Writer R
/ W transmits data to the non-contact IC card via a carrier whose frequency is fc and supplies operating power. The tuning circuit including the parasitic capacitance Cs sets the frequency fc of the carrier to the tuning frequency at which the gain is maximized, and the integrated circuit IC mounted on the non-contact IC card rectifies the AC signal serving as the carrier to rectify the DC power. Includes a bridge circuit BRGC that generates voltage VCC.

As is well known, the maximum gain of the tuning circuit including the card antenna ANTC of the non-contact IC card is determined by the read / writer antenna ANTR and the card antenna A.
It changes with the distance between NTCs. Therefore, when the distance between both antennas becomes extremely short, the DC power supply voltage V
The potential of CC becomes unnecessarily high, and in some cases, there is a possibility that the performance of the integrated circuit IC is degraded due to breakdown voltage or heat generation.

To cope with this, the inventors of the present invention monitor the potential of the DC power supply voltage VCC and selectively set the control voltage Vm as an output signal to a high level when the potential exceeds a predetermined value. Voltage control circuit VC and control voltage Vm
The N-channel MOSFET N1, which is selectively turned on in response to the high level and flows a shunt current between the power supply voltage supply point VCC and the ground potential of the circuit, is provided, and a method of controlling the potential of the DC power supply voltage VCC was studied. As shown in FIG. 12, when the input voltage of power supply voltage control circuit VC, that is, the potential of DC power supply voltage VCC exceeds predetermined value Vi, a relatively large shunt current flows through MOSFET N1. Thus, the output voltage of the bridge circuit BRGC, that is, the potential of the DC power supply voltage VCC is clamped at the predetermined value VCC0 as shown in FIG. 11, and does not become higher than necessary.

However, when the thickness of the non-contact IC card is reduced, and particularly when the lamination process of the integrated circuit IC is performed, the amount of heat generated by the integrated circuit IC increases due to the shunt current flowing through the MOSFET N1. As a result, the performance of the integrated circuit IC, that is, the contactless IC card is rather deteriorated, and the reliability is reduced.

An object of the present invention is to stabilize the operation of a non-contact IC card without deteriorating its performance and improve its reliability.

[0008] The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[0009]

The following is a brief description of an outline of a typical invention among the inventions disclosed in the present application. That is, a card-side antenna electromagnetically coupled to a read / writer-side antenna, a capacitor provided in parallel with the card-side antenna and constituting a tuning circuit for the carrier, and a predetermined DC power supply And a rectifier circuit for generating a power supply. The non-contact IC card receives operation power by electromagnetic coupling. In addition to providing a variable capacitance diode that is changed, the DC power supply voltage is monitored and the plurality of capacitances are selectively enabled according to the potential, or the capacitance value of the variable capacitance diode is changed to tune the tuning circuit. A power supply voltage control circuit for changing a frequency is provided.

According to the above means, the potential of the DC power supply voltage is controlled without increasing the amount of heat generated by the integrated circuit mounted on the non-contact IC card, and the read / writer and the non-contact IC are controlled.
Even when the distance between the C cards becomes extremely short, it is possible to prevent the potential from becoming unnecessarily high. As a result, the non-contact I which has been particularly thinned without performance degradation
The operation of the C card can be stabilized, and its reliability can be improved.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a first power supply path for a non-contact IC card to which the present invention is applied.
The connection diagram of the embodiment is shown. FIG. 2 is a circuit diagram of an embodiment of the power supply voltage control circuit VC included in the integrated circuit IC of the non-contact IC card ICC in FIG. Further, FIGS. 3 and 4 show frequency characteristic diagrams of the card antenna ANTC provided in the non-contact IC card ICC of FIG. 1, that is, the first and second embodiments of the tuning circuit including the card antenna ANTC. Are shown respectively,
FIG. 5 shows a power supply voltage output characteristic diagram of one embodiment of the non-contact IC card ICC of FIG. With reference to these figures, the configuration and operation of the non-contact IC card ICC of this embodiment, particularly the power supply path, and the features thereof will be described.

FIG. 1 shows a non-contact IC card ICC.
A read / writer R / W provided as an external device and an antenna ANTR on the read / writer side are also shown. Also, an integrated circuit IC mounted on a non-contact IC card ICC
Includes functional blocks such as a memory and a microcomputer in addition to the illustrated blocks. However, since they are not directly related to the present invention, illustration and description thereof are omitted. The circuit elements constituting each block of the integrated circuit IC are not particularly limited, but are known MOSFETs (metal oxide semiconductor type field effect transistors; in this specification, MOSFE
It is formed on a single semiconductor substrate surface, such as single crystal silicon, by an integrated circuit manufacturing technique (T is a generic name of insulated gate field effect transistors). After being laminated with a predetermined protective film, the integrated circuit IC is mounted on a card surface serving as a base of the non-contact IC card ICC, and further subjected to a coating process.

In FIG. 1, the non-contact IC card ICC of the present embodiment is not particularly limited, but is a so-called close contact type non-contact IC card, and is formed in a coil shape on the card surface using, for example, copper foil. Card side antenna ANTC
And an integrated circuit IC coupled to the card-side antenna ANTC via a predetermined wiring layer. Among them, a predetermined parasitic capacitance Cs that is parasitic on the card-side antenna ANTC itself and related wirings is coupled in parallel to the card-side antenna ANTC.

On the other hand, an integrated circuit IC of a non-contact IC card
Is a bridge circuit BRGC (rectifying circuit) formed by bridge-connecting four diodes, and the bridge circuit BR
The transmission / reception circuit TS provided in a substantially parallel form with the GC. Among them, the bridge circuit BRGC rectifies an AC signal, that is, a carrier, transmitted as a power source from the read / writer antenna ANTR of the read / writer R / W to the card antenna ANTC of the non-contact IC card ICC by electromagnetic coupling. A predetermined DC power supply voltage VCC is generated and supplied to each functional block of the integrated circuit IC as operating power.

The transmitting / receiving circuit TS receives and demodulates data transmitted from the read / writer R / W, for example, by frequency-modulating a carrier, and receives the internal input data Din.
And transmits the data output as internal output data Dout from these functional blocks to the read / writer R / W by frequency modulating the carrier.

The non-contact IC card ICC further monitors the DC power supply voltage VCC, and selectively sets the voltage control signals CS1 to CS3 as output signals to an effective level or an invalid level according to the potential. And three capacitors C1 to C3, which are coupled in parallel with the card-side antenna ANTC via corresponding switch means, that is, switches S1 to S3, and constitute a tuning circuit for the carrier together with the card-side antenna ANTC and the parasitic capacitance Cs.
Of these switches, the switches S1 to S3 are selectively turned on when the corresponding voltage control signals CS1 to CS3 are set to the effective level, and selectively enable the corresponding capacitors C1 to C3.

In this embodiment, the voltage control signal CS1
To CS3 are non-contact IC cards ICC as described later.
Are in the initial state, that is, when the potential of the DC power supply voltage VCC is lower than a predetermined value, all are set to the low-level valid level. Is done. Each of the switches S1 to S3 is a so-called normally-on switch, and a corresponding voltage control signal C
Each of S1 to CS3 is selectively turned on when the low level is set to the valid level, and is selectively turned off when each is set to the high level. Further, in this non-contact IC card ICC, an initial state in which all three switches S1 to S3 are on is referred to as a tap a, and a state in which two switches S1 and S2 are on is referred to as a tap b. A state where only the switch S1 is in the on state is referred to as a tap c.

Needless to say, the antenna ANT on the card side
The total capacitance value as the capacitance means coupled in parallel to C is such that when all the switches S1 to S3 are in the ON state,
That is, the value becomes the maximum value at the tap a, and becomes the minimum value when all the switches are turned off, that is, at the tap c. As is well known, when the inductance of the card-side antenna ANTC is L and the total capacitance value of the capacitance means coupled in parallel to the card-side antenna ANTC is C, the tuning frequency ft of the tuning circuit is ft∝1 / 1 / (LC) ^1/2 , which is inversely proportional to the half of the total capacitance value C.

Further, in this embodiment, although not particularly limited, as shown in FIG. 3, the tap a, that is, all three capacitors C1 to C3 are valid and the total capacitance value C is the maximum value. Tuning frequency ft of the tuning circuit when
Is set to the same frequency as the carrier frequency fc. When the tap b, that is, the two capacitors C1 and C2 are valid and the total capacitance value C is an intermediate value, the tuning frequency ft is slightly higher than the carrier frequency fc, and the tap c, that is, the capacitance C1 When only the total capacitance value C is set to the minimum value and only the effective value is set to the minimum value, the tuning frequency ft is set to the highest value. As a result, the gain of the tuning circuit is controlled, and as a result, the potential of the DC power supply voltage VCC is controlled. This will be described in detail later.

Here, the power supply voltage control circuit VC is not particularly limited, but, as shown in FIG. 2, receives a DC power supply voltage VCC at its non-inverting input terminal + and a predetermined reference voltage at its inverting input terminal-. Voltage comparison circuit CP receiving VREF
And three set-reset type flip-flops FF1
To FF3. Among them, the output signal of the voltage comparison circuit CP is supplied to the second input terminal of the AND (AG) gate AG1 (in this specification, the input terminal of each AND gate is connected to the first or second or first or second or 1 to 3 input terminals, the same applies hereinafter).
After the logical inversion, the signal is supplied to the first input terminal of the AND gate AG2. These AND gates AG1 and AG
A predetermined internal clock signal FC is commonly supplied to the other input terminal 2 from a control logic circuit (not shown) of the integrated circuit IC.

The voltage comparison circuit CP compares the potential of the DC power supply voltage VCC supplied to the non-inverting input terminal + thereof with the potential of the reference voltage VREF supplied to the inverting input terminal thereof thereof. VCC potential is the reference voltage VREF
When the voltage is higher, the output signal is set to a high level, and when the potential of the DC power supply voltage VCC is lower than the reference voltage VREF, the output signal is set to a low level. Further, the internal clock signal FC is repeatedly set to the high level at a predetermined cycle and for a sufficiently short period, for example.

As a result, the set enable signal SE, which is the output signal of the AND gate AG1, is set such that the output signal of the voltage comparison circuit CP is at a high level and the internal clock signal FC
Is at a high level, in other words, selectively at a high level in synchronization with the internal clock signal FC on condition that the potential of the DC power supply voltage VCC becomes higher than the reference voltage VREF. Also, And Gate AG
The reset enable signal RE, which is the output signal of No. 2, is provided when the output signal of the voltage comparison circuit CP is at a low level and the internal clock signal FC is at a high level, in other words, the potential of the DC power supply voltage VCC is lower than the reference voltage VREF. On the condition that this has occurred, the signal is selectively set to the high level in synchronization with the internal clock signal FC.

On the other hand, the set input terminal S of the flip-flop FF1 is supplied with the output signal of the AND gate AG3, and the reset input terminal R thereof is connected to the AND gate AG4.
Are supplied. Also, flip-flop FF
The output signal of the AND gate AG5 is supplied to the set input terminal S2, and the output signal of the AND gate AG6 is supplied to the reset input terminal R. Further, an output signal of the AND gate AG7 is supplied to a set input terminal S of the flip-flop FF3, and an output signal of the AND gate AG8 is supplied to a reset input terminal R thereof.
The non-inverted output signal Q of the flip-flop FF1 is supplied to the switch S1 as the voltage control signal CS1, and the non-inverted output signal Q of the flip-flops FF2 and FF3 is
It is supplied to switches S2 and S3 as voltage control signals CS2 and CS3.

AND gates AG3, AG5 and AG
7, a set enable signal SE, which is an output signal of the AND gate AG1, is commonly supplied to the first input terminal. The first input terminals of the AND gates AG4, AG6, and AG8 are output signals of the AND gate AG2. The reset enable signal RE is commonly supplied.

A second input terminal of the AND gate AG3 provided corresponding to the flip-flop FF1 is supplied with an inverted signal of the non-inverted output signal Q, that is, an inverted output signal thereof. The non-inverted output signal Q of the flip-flop FF1 is supplied to the second input terminal of the AND gate AG4, and the inverted output signal of the flip-flop FF2 at the subsequent stage is supplied to the third input terminal.

As a result, the flip-flop FF1 becomes
On condition that it is in the reset state and the set enable signal SE is at the high level, in other words, all the flip-flops FF1 to FF3 are in the reset state, and the potential of the DC power supply voltage VCC is first set to the reference voltage. On the condition that the voltage becomes higher than VREF, it is set in synchronization with the internal clock signal FC. Also,
Flip-flop FF1 is in the set state,
In addition, on condition that the flip-flop FF2 of the next stage is already in the reset state and the reset enable signal RE is at the high level, in other words, only this flip-flop FF1 is in the set state and the DC power supply voltage VCC The reset state is set in synchronization with the internal clock signal FC, provided that the potential has become lower than the reference voltage VREF.

Next, the second input terminal of the AND gate AG5 provided corresponding to the flip-flop FF2 is
The non-inverted output signal Q of the preceding flip-flop FF1 is supplied, and the flip-flop F
An inverted output signal of F2 itself is supplied. A flip-flop F is connected to a second input terminal of the AND gate AG6.
The non-inverted output signal Q of F2 is supplied, and its third input terminal is supplied with the inverted output signal of the subsequent flip-flop FF3.

Thus, the flip-flop FF2 becomes
On condition that it is in the reset state, the preceding flip-flop FF1 is already in the set state, and the set enable signal SE is at the high level, that is, only the flip-flop FF1 is in the set state,
And the potential of the DC power supply voltage VCC is again changed to the reference voltage VREF.
On the condition that it becomes higher, it is set in synchronization with the internal clock signal FC. Also, it is in the set state, the flip-flop FF3 at the subsequent stage is already in the reset state, and the reset enable signal RE
Is high level, that is, on the condition that the flip-flops FF1 and FF2 are in the set state and the potential of the DC power supply voltage VCC is lower than the reference voltage VREF again. To be reset.

Further, the second input terminal of the AND gate AG7 provided corresponding to the flip-flop FF3 is connected to the non-inverted output signal Q of the preceding flip-flop FF2.
And an inverted output signal of the flip-flop FF3 itself is supplied to a third input terminal thereof. The non-inverted output signal Q of the flip-flop FF3 is supplied to a second input terminal of the AND gate AG8.

As a result, the flip-flop FF3 becomes
It is in the reset state, the previous flip-flop FF2 is already in the set state, and the set enable signal SE is at the high level, that is, the two flip-flops FF1 and FF2 have already been set.
Are set in synchronization with the internal clock signal FC on condition that the DC power supply voltage VCC becomes higher than the reference voltage VREF again. The flip-flop FF3 is in a reset state and the reset enable signal RE is at a high level, that is, all the flip-flops FF1 to FF3 are in a set state and the DC power supply voltage VCC is low. The reset state is established in synchronization with the internal clock signal FC, provided that the potential first becomes lower than the reference voltage VREF.

From these, the power supply voltage control circuit VC
The voltage control signals CS1 to CS3, which are the output signals of the above, are all set to the effective level of the low level when the potential of the DC power supply voltage VCC is in the initial state lower than the reference voltage VREF and all the flip-flops FF1 to FF3 are in the reset state. , The potential of the DC power supply voltage VCC is equal to the reference voltage VR.
Every time it becomes higher than EF, the flip-flop FF1 shifts to the set state in the order of FF2 and FF3.
After the flip-flops FF1 to FF3 are all set, the flip-flop FF3 shifts to the reset state in the order of FF2 and FF1 each time the potential of the DC power supply voltage VCC becomes lower than the reference voltage VREF. Such flip-flops FF1 to FF3
It is needless to say that the direction of transition to the set state or the reset state can be reversed even in an intermediate state in which all of them are not in the reset state or the set state.

As shown in FIG. 3, the flip-flop F
When F1 to FF3 are all in the reset state and the voltage control signals CS1 to CS3 are all at the low effective level, the tuning circuit including the card-side antenna ANTC is at the tap a, and the tuning frequency ft is the carrier frequency f
The frequency is the same as c. For this reason, the gain of the tuning circuit becomes the maximum value Ga, and the potential of the DC power supply voltage VCC increases in proportion to the magnitude of the power due to the input voltage, that is, the carrier, as shown in FIG.

When the potential of the DC power supply voltage VCC rises and first exceeds the reference voltage VREF, as described above, first, the flip-flop FF1 of the power supply voltage control circuit VC is set to the set state, and the voltage as the non-inverted output signal Q Control signal C
S1 becomes a high-level invalid level. As a result, the switch S1 is turned off, and the card-side antenna ANTC
Tuned to tap b and its tuning frequency f
As is clear from FIG. 3, t becomes higher by a predetermined value than in the case of tap a. Therefore, the gain of the tuning circuit at the carrier frequency fc is the maximum value Ga at the tap a.
Gb becomes lower by a predetermined value, and the potential of the DC power supply voltage VCC obtained by rectifying the carrier decreases linearly by a corresponding amount as shown in FIG.

Thereafter, each time the potential of the DC power supply voltage VCC rises again and exceeds the reference voltage VREF, the above operation is repeated, and the tuning circuit including the card-side antenna ANTC shifts from tap b to tap c. Then, the transition stops at a tap corresponding to the power provided by the carrier. Then, the potential of the DC power supply voltage VCC is changed to the reference voltage VR.
When it becomes lower than EF, the tuning circuit shifts from tap c to tap b and tap a in the opposite direction to the above, and stops the shift at a predetermined tap.

As a result, the potential of the DC power supply voltage VCC changes stepwise as is apparent from FIG. 5, and the average potential is set to the potential VCC0 lower than the reference voltage VREF by a predetermined value. You. In addition, since such a potential control is performed by controlling the tuning frequency ft of the tuning circuit including the card-side antenna ANTC, no new power is consumed and no heat is generated. For this reason, even when the distance between the read / writer R / W and the non-contact IC card ICC becomes extremely short, it is possible to prevent the potential from becoming unnecessarily high. The operation of the contact IC card can be stabilized and its reliability can be improved.

In the above embodiment, the tuning frequency ft at the tap a is set to the carrier frequency fc, and the normally-on type switches S1 to S3 are sequentially turned off, so that the tuning frequency ft is higher than the carrier frequency fc. The tap is switched to the tap b and the tap c. In this tap switching, as shown in FIG. 4, the switches S1 to S3 are replaced with normally-off switches, and these switches are sequentially turned on. By doing so, the tuning frequency ft is changed to the carrier frequency f
A method of switching from the tap a to be c to the tap a and the tap c whose tuning frequency ft is lower than the carrier frequency fc may be adopted.

FIG. 6 shows a non-contact I to which the present invention is applied.
The connection diagram of the second embodiment for explaining the power supply path of the C card ICC is shown. FIG. 7 shows FIG.
FIG. 5 shows a frequency characteristic diagram of one embodiment of a card-side antenna ANTC provided in the non-contact IC card ICC, that is, a tuning circuit including the card-side antenna ANTC.
6 shows a power supply voltage output characteristic diagram of one embodiment of the non-contact IC card ICC of FIG. In this example,
Since the embodiment basically follows the embodiment of FIG. 1 to FIG. 5, only the different parts will be described.

In FIG. 6, the integrated circuit IC of the contactless IC card ICC of this embodiment is the same as the capacitors C1 to C of FIG.
3 and one variable capacitance diode Cv whose capacitance value changes linearly in accordance with the potential of the bias voltage Vs, which is the output voltage of the power supply voltage control circuit VC, in place of the switches S1 to S3. The potential of the bias voltage Vs output from the power supply voltage control circuit VC linearly changes according to the potential of the DC power supply voltage VCC output from the bridge circuit BRGC, and includes the card-side antenna ANTC and the variable capacitance diode Cv. Tuning frequency ft of the tuning circuit
Is, as shown in FIG. 7, from a tap d having the carrier frequency fc as its tuning frequency ft, the carrier frequency f
It also changes linearly between a tap e having a frequency higher than c by a predetermined value as its tuning frequency ft.

As a result, the potential of the DC power supply voltage VCC becomes
As shown in FIG. 8, once the potential reaches the target potential VCC0, the control is performed without leaving the target potential VCC0, so that the potential of the DC power supply voltage VCC is stabilized, and the drift is suppressed. The same operation and effect as those of the embodiment shown in FIGS.
Can be further stabilized, and its reliability can be further improved.

The operation and effect obtained from the above embodiment are as follows. (1) a card-side antenna electromagnetically coupled to a read / writer-side antenna, a capacitor provided in parallel with the card-side antenna and constituting a tuning circuit for the carrier, And a rectifier circuit for generating a DC power supply voltage, wherein the non-contact IC card receives operating power by electromagnetic coupling. By providing a variable capacitance diode whose capacitance value is changed, monitoring the DC power supply voltage and selectively enabling the plurality of capacitances according to the potential, or changing the capacitance value of the variable capacitance diode, An integrated circuit mounted on a non-contact IC card by providing a power supply voltage control circuit for changing the tuning frequency of the tuning circuit Thus, the effect that the potential of the DC power supply voltage can be controlled without increasing the amount of heat generated by the DC power supply can be obtained.

(2) According to the above item (1), even when the distance between the read / writer and the non-contact IC card becomes extremely short, the potential can be prevented from becoming unnecessarily high. Is obtained. (3) According to the above items (1) and (2), it is possible to obtain an effect of stabilizing the operation of a non-contact IC card which is particularly thin and improving its reliability without deteriorating performance. .

Although the invention made by the inventor has been specifically described based on the embodiment, the invention is not limited to the above embodiment, and various modifications can be made without departing from the gist of the invention. Needless to say, there is. For example, in FIG. 1, the switches S1 to S3 provided corresponding to the capacitors C1 to C3 can be replaced with normally-off switches that are controlled to be turned on from the beginning. The capacitors C1 to C3 can be replaced with a plurality of capacitors each of which is coupled in parallel, and the number of these capacitors and the number of switches can be set arbitrarily. The effective levels of the voltage control signals CS1 to CS3 can be arbitrarily set according to the type of switch and the control form thereof, and the specific configuration of the non-contact IC card ICC can take various embodiments. This is the same for FIG.

In FIG. 2, the specific configuration of the power supply voltage control circuit VC can take various embodiments as long as its logical condition does not change.
The same applies to the control mode.

In FIG. 3, FIG. 4, and FIG. 5, the frequency characteristics at each tap and the output characteristics of DC power supply voltage VCC are merely examples, and do not affect the gist of the present invention. This is the same for FIGS. 7 and 8.

In FIG. 6, the integrated circuit IC of the non-contact IC card ICC can be replaced with another variable capacitance means capable of linearly controlling the capacitance value, instead of the variable capacitance diode Cv.

In the above description, the case where the invention made mainly by the present inventor is applied to a close contact type non-contact IC card which is a field of application as the background has been described. However, the present invention is not limited to this. For example, the present invention can be applied to a proximity type non-contact IC card and a long distance type non-contact IC card. INDUSTRIAL APPLICABILITY The present invention can be widely applied to a non-contact IC card that transmits operating power by electromagnetic coupling including at least radio waves.

[0047]

The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows. That is, a card-side antenna that is electromagnetically coupled to the read / writer-side antenna, a capacitance means that is provided in parallel with the card-side antenna and forms a tuning circuit for the carrier, and rectifies the carrier to generate a predetermined DC power supply voltage. A non-contact IC card which is supplied with operating power by electromagnetic coupling, for example, a plurality of capacitances coupled in parallel, or a capacitance value thereof changes according to a bias voltage. A variable capacitance diode is provided, and the DC power supply voltage is monitored and the plurality of capacitances are selectively enabled according to the potential, or the capacitance value of the variable capacitance diode is changed to adjust the tuning frequency of the tuning circuit. And a power supply voltage control circuit for changing the power supply voltage.

As a result, the potential of the DC power supply voltage is controlled without increasing the heat generation of the integrated circuit mounted on the non-contact IC card, and the distance between the read / writer and the non-contact IC card becomes extremely short. In this case, the potential can be prevented from becoming unnecessarily high. As a result, it is possible to stabilize the operation of the particularly thin contactless IC card without deteriorating the performance and to enhance the reliability thereof.

[Brief description of the drawings]

FIG. 1 is a diagram showing a first embodiment for describing a power supply path of a non-contact IC card to which the present invention is applied.

FIG. 2 is a circuit diagram showing one embodiment of a power supply voltage control circuit included in the integrated circuit of the contactless IC card of FIG.

FIG. 3 is a frequency characteristic diagram showing one embodiment of a tuning circuit including a card side antenna of the non-contact IC card of FIG. 1;

FIG. 4 is a frequency characteristic diagram showing one embodiment of a tuning circuit including a card side antenna of the non-contact IC card of FIG. 1;

FIG. 5 is a power supply voltage output characteristic diagram showing one embodiment of the non-contact IC card of FIG. 1;

FIG. 6 is a diagram showing a second embodiment for describing a power supply path of a non-contact IC card to which the present invention is applied.

7 is a frequency characteristic diagram showing one embodiment of a tuning circuit including a card side antenna of the non-contact IC card of FIG. 6;

FIG. 8 is a power voltage output characteristic diagram showing one embodiment of the non-contact IC card of FIG. 6;

FIG. 9 is a connection diagram showing an example for describing a power supply path of a non-contact IC card studied by the present inventors prior to the present invention.

10 is a frequency characteristic diagram illustrating an example of a tuning circuit including a card-side antenna of the non-contact IC card of FIG. 9;

FIG. 11 is a power voltage output characteristic diagram showing an example of the non-contact IC card of FIG. 9;

FIG. 12 is a shunt current characteristic diagram showing an example of the non-contact IC card of FIG. 9;

[Explanation of symbols]

R / W: read / writer, ICC: non-contact IC card,
IC: integrated circuit, ANTR: read / writer antenna, ANTC: card antenna, Cs: parasitic capacitance, C
1 to C3: capacitance, S1 to S3: switch, BRGC: bridge circuit, VCC: DC power supply voltage, VC: power supply voltage control circuit, CS1 to CS3: voltage control signal, TS: transmission / reception circuit, Din: internal input data, Dout ... Internal output data. CP: voltage comparison circuit, VREF: reference voltage, FC
... internal clock signals, AG1 to AG8 ... AND (AN
D) Gate, SE: set enable signal, RE: reset enable signal, FF1 to FF3: flip-flop. Ga to Gf: gain, fc: carrier frequency. VCC
0: target voltage, Va to Vc, Ve, Vi: input voltage potential. Cv: variable capacitance diode; Vs: bias voltage.
N1 ... N-channel MOSFET, Vm ... control voltage.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Shigeru Kadokawa 5-2-2-1, Josuihoncho, Kodaira-shi, Tokyo F-term in Hitachi Cho SII Systems Co., Ltd. (reference) 2C005 MA39 MA40 NA08 QA15 5B035 BB09 CA12 CA23

Claims (3)

[Claims] 1. A card-side antenna that receives an AC signal serving as a power source by being electromagnetically coupled to an antenna of an external device, and is provided in parallel with the card-side antenna. A capacitance means constituting a tuning circuit; a rectifier circuit for rectifying the AC signal to generate a predetermined DC power supply voltage; monitoring the DC power supply voltage and changing a capacitance value of the capacitance means according to the potential; And a power supply voltage control circuit for controlling the potential of the DC power supply voltage. 2. The capacitor according to claim 1, wherein said capacitance means are coupled in parallel with each other via corresponding switch means, and a corresponding bit of a voltage control signal output from said power supply voltage control circuit is set to an effective level. A non-contact IC card comprising a plurality of capacitors selectively enabled by turning on the switch means. 3. The device according to claim 1, wherein the capacitance means includes a variable capacitance diode whose capacitance value is selectively changed according to a potential of a bias voltage output from the power supply voltage control circuit. Contactless IC card.