JP2001159659A - Dc measuring circuit for ic tester - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a protective circuit for protecting a guard buffer connected to a guard line in a DC measuring circuit for an IC tester. SOLUTION: With forward direction voltage of diodes D1-D4 in a guard buffer protective circuit 8 being VF, when the relationship between power-source voltages VA and VB and an external voltage VG is VB<VG, a forward- direction current (VG-VF-VB)/R2 flows in the diode D4, so that the output voltage of a voltage amplifier 5 which is a guard buffer is kept at VS=VO. If VA>VG, the forward-direction current (VA-VF-VG)/R1 flows in the diode D2 so that the output voltage of the voltage amplifier 5 which is a guard buffer is kept at VS=VO.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a protection line for protecting a signal line connected to an IC to be measured and a DC measurement circuit for an IC tester in which a protection buffer is connected to the protection line.

[0002]

2. Description of the Related Art In a DC measurement of a conventional IC tester, a DC measurement shown in FIG. 3 is performed on a protection line for protecting a signal line connected to an IC to be measured and a protection buffer connected for protecting the protection line. Description will be given with reference to the circuit configuration of the circuit 10.

In the DC measuring circuit 10 shown in FIG. 3, reference numeral 1 denotes a variable DC power supply, which outputs a set voltage V1;
Is an operational amplifier, 3 is a buffer, 6 and 7 are floating power supplies, and 8 is an IC to be measured.

The variable DC power supply 1 inputs the set voltage VS to a non-inverting input terminal (+) of an operational amplifier 2, the operational amplifier 2 inputs the output voltage to a buffer 3, and the buffer 3 outputs The voltage is connected to the floating power supplies 6, 7 and a force line L1 for applying a voltage to the IC under test 100, and a voltage VO is applied from the force line L1 to the IC under test 100.

From the force line L1 to the IC under test 100
Is input to the inverting input terminal (-) of the operational amplifier 2 via the sense line L2 and the operational amplifier 4 forming the sense buffer, and the output voltage of the operational amplifier 4 as a sense buffer is output. Is a guard line L for protecting the force line L1 and the sense line L2.
Operational amplifier 5 which forms a guard buffer connected to 3
Are connected to the non-inverting input terminal (+).

The power supply terminals of the operational amplifiers 2, 4, and 5 receive an applied voltage VO based on the set voltage VS and power supply voltages VA and VB floating by the power supply voltages VZ1 and VZ2 of the floating power supplies 6 and 7, respectively. It is connected. Therefore, the DC measurement circuit 10 is configured to operate in a floating state by the floating power supplies 6, 7 and the guard line L3.

In the DC measurement circuit 10 of the IC tester shown in FIG. 3, the output of the operational amplifier 4 serving as a sense buffer is input to the non-inverting input terminal (+) of the operational amplifier 5 serving as a guard buffer. Is applied as a voltage follower to the guard line L3 to offset the potential difference between the force line L1 and the guard line L3,
The guard line L3 prevents external noise from being mixed into the force line L1 and the sense line L2, thereby maintaining the measurement accuracy when performing DC measurement on the IC under test 100.

[0008]

However, in the conventional DC measurement circuit 10 shown in FIG. 3, the power supply voltage range (VA-VB) of the operational amplifier 5 which is a guard buffer connected to the guard line L3 is limited. If an unexpected external voltage VG exceeding the voltage is applied to the guard line L3, the operational amplifier 5 may be damaged, and the DC measurement accuracy cannot be maintained.

It is an object of the present invention to provide a protection circuit for protecting a guard buffer connected to a guard line in a DC measurement circuit for an IC tester.

[0010]

According to the first aspect of the present invention,
A measurement voltage application circuit (for applying a measurement DC voltage according to the input DC voltage to an IC to be measured (for example, the IC to be measured 100 in FIG. 1) via a signal application line (for example, the force line L1 in FIG. 1). For example, the operational amplifier 2 and the buffer 3 in FIG. 1) and the DC voltage for measurement applied to the IC under test are transmitted via a signal detection line (for example, the sensor line L2 in FIG. 1) connected to the IC under test. An applied voltage detection circuit (for example, the operational amplifier 4 in FIG. 1)
A protection voltage application circuit (e.g., a protection voltage application circuit) that applies a detection voltage detected by the application voltage detection circuit to a protection line (e.g., a guard line L3 in FIG. 1) that electrically protects the signal application line and the signal detection line. An operational amplifier 5 of FIG. 1) and a DC measuring circuit for an IC tester (for example,
In the DC measurement circuit 20 of FIG. 1, a protection circuit (for example, FIG. 1) that protects the protection voltage application circuit from a voltage (for example, VG of FIG. 1) externally applied to the protection line.
Is connected between the protection voltage applying circuit and the protection line.

According to the first aspect of the present invention, a measuring voltage applying circuit for applying a measuring DC voltage corresponding to an input DC voltage to an IC to be measured via a signal applying line, An applied voltage detection circuit for detecting the applied measurement DC voltage via a signal detection line connected to the IC to be measured, and detecting the detected voltage detected by the applied voltage detection circuit with the signal application line and the signal detection And a protection voltage application circuit for applying a protection voltage to a protection line that electrically protects the protection line from a voltage externally applied to the protection line. A circuit is connected between the protection voltage application circuit and the protection line.

In this case, as in the second aspect of the present invention, in the DC measurement circuit for an IC tester according to the first aspect, the protection circuit is configured such that an externally applied voltage to the protection line is the protection voltage application circuit. It is effective that the diode bridge circuit is configured by connecting a plurality of diodes (for example, diodes D1 to D4 in FIG. 1) so as not to be transmitted to the output stage.

Further, as in the invention described in claim 3,
3. The DC measurement circuit for an IC tester according to claim 2, wherein the diode bridge circuit has a predetermined configuration at each diode connection other than an input stage connected to the protection voltage application circuit and an output stage connected to the protection line. Floating power supplies (for example, floating power supplies 6 and 7 in FIG. 1) are connected to each other, and the potential difference between each floating power supply voltage and the externally applied voltage to the protection line causes the diode bridge circuit to move in the floating power supply direction or the externally applied voltage direction. It is effective to prevent the external applied voltage from being transmitted to the output stage of the protection voltage applying circuit by causing a current to flow through the protection voltage applying circuit.

Therefore, even if an unexpected external voltage is applied to the protection line, the protection voltage application circuit can be prevented from being destroyed.
Since the C measurement operation is also maintained, the reliability of the DC test circuit for the IC tester can be improved.

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings. 1 and 2 are diagrams showing an embodiment of a DC measurement circuit 20 for an IC tester to which the present invention is applied. First, the configuration will be described. FIG. 1 is a diagram showing a circuit configuration of a DC measurement circuit 20 according to the present embodiment, and the same circuit components as those of the DC measurement circuit 10 shown in FIG.

The DC measuring circuit 20 shown in FIG.
DC power supply 1 that supplies a voltage, an operational amplifier 2 that outputs a voltage corresponding to the set voltage VS, a buffer 3 that shapes and outputs a voltage waveform output from the operational amplifier 2, and an operational amplifier that constitutes a sense buffer 4, an operational amplifier 5 constituting a guard buffer, floating power supplies 6 and 7 for supplying a power supply voltage to the operational amplifiers 2, 4 and 5, a guard buffer protection circuit 9 for protecting the guard buffer, and measurement for the IC under test 8. Line L1 for applying the DC voltage VO for use and a sense line L2 for detecting the applied voltage VO
And a guard line L3 for protecting the force line L1 and the sense line L2.

The operational amplifier 2 outputs an output voltage corresponding to the set voltage VS input from the variable DC power supply 2 to the non-inverting input terminal (+) to the buffer 3, and outputs an inverting input from the operational amplifier 4 as a sense buffer. The differential amplification operation is performed based on the applied voltage VO and the set voltage VS that are fed back to the terminal (−).

The buffer 3 shapes the voltage waveform input from the operational amplifier 2, and applies the output voltage as a voltage VO to the IC under test 100 via the force line L1 to which the floating power supplies 6 and 7 are connected.

The floating power supplies 6 and 7
DC voltage V is applied to the force line L1 to which the output stage is connected.
Z1 and DC voltage VZ2 are connected respectively. With these floating power supplies 6, 7, the power supply voltages VA, VB connected to the operational amplifiers 2, 4, 5 are VA = VO + VZ1, and VB = VO-VZ2.

The operational amplifier 4 constitutes a sense buffer, and its non-inverting input terminal (+) is connected to the sense line L2, and its output stage is connected to the inverting input terminal (-) of the operational amplifier 2 and to the non-inverting terminal of the operational amplifier 5. Connected to inverting input terminal (+). The operational amplifier 4 serving as a sense buffer shapes and outputs the waveform of the applied voltage VO input from the sense line L2.

The operational amplifier 5 forms a guard buffer, and its non-inverting input terminal (+) is connected to the output stage of the operational amplifier 4, and its output stage is connected to the guard buffer protection circuit 8. Operational amplifier 5 which is a guard buffer
Operates as a voltage follower, shapes and outputs the waveform of the applied voltage VO input from the operational amplifier 4.

The guard buffer protection circuit 8 comprises diodes D1 to D4 and resistors R1 and R2. The connection point between the cathode of the diode D1 and the anode of the diode D3 is used as an input stage, and the cathode of the diode D2 and the anode of the diode D4. Is connected to the output stage of the operational amplifier 5, and the output stage is connected to the guard line L3. Further, one end of a resistor R1 is connected to the anode connection point of the diodes D1 and D2, the power supply voltage VA is connected to the other end of the resistor R1, and one end of the resistor R2 is connected to the cathode connection point of the diodes D3 and D4. The power supply voltage VB is connected to the other end of the resistor R2.

When an unexpected external voltage VG is applied to the guard line L3, the guard buffer protection circuit 8 generates a current corresponding to the potential difference generated between the external voltage VG and the power supply voltages VA and VB. D4 to prevent the external voltage VG from being applied to the operational amplifier 5 which is a guard buffer.

Next, the operation of this embodiment will be described. In FIG. 1, when a set voltage VS is input from a variable DC power supply 2 to an operational amplifier 2, the operational amplifier 2 outputs an output voltage corresponding to the set voltage VS input to its non-inverting input terminal (+) to a buffer 3. Is output to In the buffer 3, the voltage waveform input from the operational amplifier 2 is shaped, and the output voltage is applied to the IC under test 100 as the voltage VO via the force line L1 to which the floating power supplies 6 and 7 are connected.

At this time, when the voltage VO applied to the IC under test 100 becomes VS, and the resistance value of the force line L1 is 0 ohm (Ω), the output voltage of the buffer 3 also becomes VO, and the power supply voltage VA becomes VA. = VO + VZ1, and the power supply voltage VB is VB = VO-VZ2.

The detection voltage fed back from the operational amplifier 4 as a sense buffer to the operational amplifier 2 and the operational amplifier 5 as a guard buffer via the sense line L2 also becomes VO. In the operational amplifier 2, a differential amplification operation is performed based on the set voltage VS and the detection voltage VO fed back.

In the operational amplifier 5 which is a guard buffer,
Since the detection voltage VO operates as a voltage follower with respect to the feedback input detection voltage VO, the detection voltage VO is output to the output stage as it is, and the voltage VO is also applied to the guard line L3 via the buffer protection circuit 8.

Therefore, unless an unexpected voltage VG is applied to the guard line L3 from the outside, the potential difference between the force line L1 and the guard line L3 is maintained at 0 by the above-described circuit operations, and the force line L1 and the sense line L2 is protected from external noise and D2
C measurement accuracy is maintained.

Next, the operation of the guard buffer protection circuit 8 when an unexpected voltage VG is externally applied to the guard line L3 as shown in FIG. 1 will be described with reference to FIG.

As shown in FIG. 2, the forward voltage of each of the diodes D1 to D4 in the guard buffer protection circuit 8 is VF, and the relationship between the power supply voltages VA and VB and the unexpected external voltage VG is VB <VG. At this time, (VG-V
A forward current of F−VB) / R2 flows, and the output voltage of the voltage amplifier 5 serving as a guard buffer is maintained at VS = VO.

When VA> VG, the diode D2
, A forward current of (VA−VF−VG) / R1 flows,
The output voltage of the voltage amplifier 5 as a guard buffer is VS =
VO is maintained.

For example, VS = 10V, VZ1 = VZ2 =
10V, VF = 0.7V, VG = 20V, R1 = R2 =
Assuming that 19.3 kΩ, VB <VG, the forward current flowing from the outside to the diode D4 is (20−0.7
−0) /19.3 kΩ = 1 mA, and the power supply voltage VA = 20 applied to the operational amplifier 5 as a guard buffer
When V and VB = 0V, the output voltage becomes 10V.

If VG = -40V, VA> V
G, the forward current flowing from the diode D2 to the outside is (20−0.7 + 40) /19.3 kΩ = about 3 m
A, and the output voltage of the operational amplifier 5, which is a guard buffer, becomes 10V.

That is, even if an unexpected voltage VG is externally applied to the guard line L3, the output voltage of the operational amplifier 5 as a guard buffer does not change due to the operation of the guard buffer protection circuit 8, and the operational amplifier 5 is protected. You.

As described above, in the DC measuring circuit 20 for an IC tester according to the present embodiment, the guard buffer protection circuit 8 is connected to the output stage of the voltage amplifier 5 as the guard buffer, and the unexpected voltage VG is externally applied. When the voltage is applied to the guard line L3, a current according to the voltage level of the external voltage VG flows in the guard buffer protection circuit 8, and the output voltage of the voltage amplifier 5 is kept constant.

Therefore, even when an unexpected external voltage VG is applied to the guard line L3, the voltage amplifier 5 serving as a guard buffer can be prevented from being destroyed, and the DC measurement operation is maintained, so that the reliability of the DC measurement circuit 20 is improved. it can.

The power supply voltage value and the external voltage value set in the above embodiment are examples, and the operating conditions of the guard buffer protection circuit 8 are not particularly limited.

[0038]

According to the DC measurement circuit for an IC tester of the present invention, even if an unexpected external voltage is applied to the protection line, the protection voltage application circuit can be prevented from being destroyed and the DC measurement operation can be maintained. The reliability of the tester DC measurement circuit can be improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing a circuit configuration of a DC measurement circuit 20 for an IC tester in one embodiment to which the present invention is applied.

FIG. 2 is a diagram for explaining operations in an operational amplifier 5 and a guard buffer protection circuit 8 of FIG.

FIG. 3 is a diagram showing a circuit configuration of a conventional DC measurement circuit 10 for an IC tester.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Variable DC power supply 2, 4, 5 Operational amplifier 3 Buffer 6, 7 Floating power supply 8 Guard buffer protection circuit 100 IC under test D1 to D4 Diode R1, R2 Resistance L1 Force line L2 Sense line L3 Guard line

Claims (3)

[Claims] A measuring voltage applying circuit for applying a measuring DC voltage corresponding to the input DC voltage to an IC to be measured via a signal applying line; An applied voltage detection circuit for detecting via a signal detection line connected to the IC to be measured, and protection for electrically protecting the detection voltage detected by the applied voltage detection circuit between the signal application line and the signal detection line A DC voltage measuring circuit for an IC tester, comprising: a protective voltage applying circuit applied to a line; and a protection circuit for protecting the protective voltage applying circuit from a voltage externally applied to the protective line. A DC measurement circuit for an IC tester, wherein the DC measurement circuit is connected between a protection line. 2. The protection circuit according to claim 1, wherein the protection circuit is a diode bridge circuit configured by connecting a plurality of diodes so that an externally applied voltage to the protection line is not transmitted to an output stage of the protection voltage application circuit. A DC measurement circuit for an IC tester according to claim 1. 3. The diode bridge circuit connects a predetermined floating power supply to each diode connection other than an input stage connected to the protection voltage application circuit and an output stage connected to the protection line. The potential difference between each floating power supply voltage and the externally applied voltage to the protection line causes a current to flow from the diode bridge circuit in the floating power supply direction or the externally applied voltage direction, and the externally applied voltage is output from the protection voltage application circuit. 3. The DC measurement circuit for an IC tester according to claim 2, wherein the signal is not transmitted to a stage.