JP2001157222A - Color signal generating circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently generate a plurality of color signals. SOLUTION: An R-Y storage section 18, a B-Y storage section 20 and a Y storage section 22 store data on a plurality of display colors. Then the data are read in response to a display color from them and the read data by each 90-degree of a color reference signal are incremented or decremented to obtain a color signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color signal generating circuit for generating a plurality of color signals.

[0002]

2. Description of the Related Art Conventionally, on a reservation screen of a video deck or the like, characters of a plurality of colors are displayed on a background of a predetermined color.
It is necessary to generate a color signal for such a screen display. In the NTSC system and the PAL system, a color signal represents a color by a phase difference from a color reference signal. For example, in NTSC, the color reference signal is set to 180 °,
Blue if the color signal phase is 347.6 °, magenta if 60.6 °, red if 103.4 °, 167.6
° indicates yellow.

[0003] Therefore, a color reference signal is delayed by a predetermined amount to generate a color signal of each color. When digitally generating a color signal, the color reference signal must be at least 16 bits.
A doubled clock is used to generate a color signal obtained by delaying the color reference signal by a predetermined amount. In the case of a 16 times clock,
The unit is 22.5 °, and the yellow color is 157.5 °, which is different from the complete yellow color, but is within the usable range.

[0004]

When a delay circuit is used, a plurality of colors can be accurately represented by setting the delay amount accurately. However, this requires a large delay circuit of 20 nsec or more,
When this is integrated into an integrated circuit, a large element area is required, and it is difficult to suppress variations in the circuit.

When a clock 16 times (or more) than the color reference signal is used, the color reference signal is 3.58 MHz in NTSC and 4.43 MHz in PAL, and the clock becomes considerably faster. Such a high-speed clock has a problem that it is likely to be a noise source and it is difficult to secure element operation.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above problems, and has as its object to provide a color signal generation circuit that can effectively generate a plurality of colors using a relatively low-speed clock.

[0007]

According to the present invention, there is provided a storage unit for storing values of color difference signals RY and BY having a predetermined phase difference with respect to a color reference signal for a plurality of predetermined colors. Reading means for reading the color difference signals RY and BY for the color from the storage unit in response to the signal for the display color, and read color difference signals RY and BY for the color.
And an adding / subtracting means for obtaining a color signal.

As described above, according to the present invention, the data for RY and BY of each color is stored in the storage unit.
Therefore, it is only necessary to read these when displaying each color, and a delay circuit or the like can be omitted, and the element area can be reduced when an integrated circuit is manufactured. In particular, when only a relatively small number of colors are used as color signals, the storage capacity may be small and the circuit area is advantageous. Further, since the phase is not shifted, a high-speed clock is not required.

The reading means reads RY during a period of -45 ° to + 45 ° when the phase of the color reference signal is 180 °, and reads B-Y during a period of 45 ° to 135 °.
Y is read, RY is read during a period of 135 ° to 225 °, BY is read during a period of 225 ° to 315 °, and the addition / subtraction means adds during the period of −45 ° to 135 °,
It is preferable to perform the subtraction during the period of 135 ° to 315 °.

With such a configuration, a clock having a frequency four times the frequency of the basic eight-color, color reference signal can be used, and a relatively low-speed clock can be used.

[0011]

Embodiments of the present invention (hereinafter referred to as embodiments) will be described below with reference to the drawings.
FIG. 1 is a diagram illustrating an overall configuration of a color signal generation circuit according to an embodiment. The display such as the reservation screen is performed based on the vertical and horizontal synchronization signals on the display device.
Occurs. The display controller 10 includes a VRAM
12 are connected. The VRAM 12 stores code data of display character data (for example, character data) at an address corresponding to the screen display. Further, the display controller 10 is connected to a font ROM 14 that stores a dot pattern (font data) corresponding to the code of each display character.

The display controller 10 reads out the code data from the VRAM 12 based on the vertical and horizontal synchronization signals, and outputs the corresponding font data in synchronization with the horizontal synchronization signal. Here, the display controller 10 outputs a color selection signal in synchronization with the vertical and horizontal synchronization signals. The color selection signal is a signal indicating a color to be displayed at that time, and is a signal indicating any one of the eight colors.

The color selection signal is supplied to the read control circuit 16
Are supplied to the RY storage unit 18, the BY storage unit 20, and the Y storage unit 22. The read control circuit 16 outputs read addresses of the RY storage unit 18, the BY storage unit 20, and the Y storage unit 22, which are determined in advance in accordance with the color selection signal. The color data is output.

Here, the display color is usually indicated by RGB,
The luminance Y is determined by Y = 0.3R + 0.59G + 0.11B. In a normal case, the color difference signals RY, BY, and Y are used for band compression of the color signal. In this case, RY = 0.7R-0.59G, -0.11G, B
-Y = -0.3R + 0.59G + 0.89B. Therefore, RY, BY, and Y for one display color are as follows.
The RY, BY, and Y values of each color are uniquely determined and the RY storage unit 18, the BY storage unit 20, and the Y storage unit 22
Respectively. Therefore, according to the color selection signal output from the display controller 10, the values of RY, BY, and Y of the display color are output.

In this embodiment, the color reference signal 4
Using the double clock, the data read from the three storage units is added or subtracted to create a composite signal. That is, one of the outputs of the RY storage unit 18 and the BY storage unit 20 is selected by the switching circuit 24 and supplied to a +/- circuit 26 for converting the sign of + or-. Then, a color signal of each color is generated.

When the phase of the color reference signal is 180 °,
Since the phase of BY is 0 ° and the phase of RY is 90 °, the switching circuit 24 selects RY during the period of −45 ° to + 45 °, and selects 45 ° to 135 °. BY during the period
, And select signals every 90 ° such that RY is selected during a period of 135 ° to 225 ° and BY is selected during a period of 225 ° to 315 °. And
The +/− circuit 26 has +1, −45 ° to 135 ° during the period.
The period from 35 ° to 315 ° is represented by −, BY or R
-Y is output.

As a result, as shown in FIG. 2, when the phase of the color reference signal is 180 °, a color signal in which the values of BY and RY change every 90 ° is obtained. Since the RY and BY values of each display color are stored in the RY storage unit 18 and the BY storage unit 20 in advance, the values are different for each display color at every 90 °. Is obtained.

Then, the luminance signal Y corresponding to each color is added to the obtained color signal in the adding circuit 28 to obtain a composite signal. The data so far is all digital,
A digital composite signal is obtained at the output of the adding circuit 28. The clock of the digital signal has a frequency that is four times the frequency of the color reference signal.

The output of the adder circuit 28 is converted into an analog signal by the D / A converter 30, so that a normal composite signal supplied to the display device is obtained.
Thus, according to the present embodiment, the RY storage unit 18,
Data corresponding to each color is stored in the BY storage unit 20 and the Y storage unit 22. Therefore, a delay circuit and the like can be eliminated, and the element area can be reduced when an integrated circuit is manufactured. Further, a clock having a frequency four times the frequency of the color reference signal can be used, and a relatively low-speed clock can be used. In particular, when only a relatively small number of colors are used as color signals, the storage capacity may be small and the circuit area is advantageous.

[0020]

As described above, according to the present invention,
The storage unit stores data on RY and BY of each color. Therefore, it is only necessary to read these when displaying each color, and a delay circuit or the like can be omitted, and the element area can be reduced when an integrated circuit is manufactured. In particular, when only a relatively small number of colors are used as color signals,
The storage capacity may be small and the circuit area is advantageous.
Further, since the phase is not shifted, a high-speed clock is not required.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an overall configuration of a circuit according to an embodiment.

FIG. 2 is a diagram showing color signals.

[Explanation of symbols]

Reference Signs List 10 display controller, 12 VRAM, 14 font ROM, 16 read control circuit, 18 RY storage unit, 20 BY storage unit, 22 Y storage unit, 24 switching circuit, 26 +/- circuit, 28 addition circuit, 30
D / A converter.

Claims (2)

[Claims] A storage unit for storing values of color difference signals RY and BY having a predetermined phase difference with respect to a color reference signal for a plurality of predetermined colors; Reading means for reading the color difference signals YR and YB for the color from the storage unit; and adding and subtracting the read color difference signals RY and BY,
A color signal generation circuit, comprising: an addition / subtraction means for obtaining a color signal. 2. The circuit according to claim 1, wherein when the phase of the color reference signal is 180 °, the readout unit reads RY during a period of −45 ° to + 45 °, and reads the RY during a period of 45 ° to 45 °. BY is read during a period of 135 °, and 13 is read.
RY is read out during the period of 5 ° to 225 °,
BY is read during the period of 315 °, and the addition / subtraction means adds during the period of −45 ° to 135 °, and 13
A color signal generation circuit wherein subtraction is performed during a period of 5 ° to 315 °.