JP2001156606A - Controller for switch - Google Patents

Abstract

PROBLEM TO BE SOLVED: To ingeniously generate a gate voltage for a controller for a switch that electronically switches a load. SOLUTION: This switch has a field effect transistor T3 that is placed in series between an operating voltage source and a load, a half bridge circuit HB and a charge pump L are provided to generate a gate voltage for the T3, an input connection terminal E1 of a half bridge is connected to an output connection terminal A1 of a processor P, a clock signal CK is generated from the terminal A1 and the clock signal is applied to the half bridge circuit and the charge pump, which generate a gate voltage to switch the conduction of the transistor T3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a control device for a switch for electronically switching a load.

[0002]

2. Description of the Related Art From DE-A-195 48 612, 2
Electronic switches for temporarily connecting two connection terminals are known. The switch has at least two electrically controllable switching elements. These elements are arranged on one line between two connection terminals. At least one of the electrically controllable switching elements is a field-effect transistor or another bidirectional element externally provided with or integrated with an overload interrupt.

[0003] Furthermore, it is already known to use relays or so-called smart power modules (PROFETs) to electronically switch on the load in a 12 V on-board power supply network. Such a module has only a limited voltage and current usage area. For relatively high working voltages, electronic switching is only possible with power semiconductors. These power semiconductors include a gate driver stage that charges the gate quickly.

[0004] The gate driver stage may be a so-called high side switch. A high side switch of this type is provided for switching a load which is connected on one side to ground, for example to the body of the vehicle. This switch, which is advantageously an N-channel power MOSFET, is between the operating voltage and the load. For switching on, this transistor requires a gate voltage above the supply voltage of, for example, + 12V. This gate voltage can be generated using a charge pump and an oscillator.

[0005] Furthermore, charge pumps according to the Greinacher principle are known for the 12V range ("Greinacher circuits" are also called half-wave voltage doublers). This is voltage 2
It operates with a doubling or tripling unit.

[0006]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for effectively generating a gate voltage in a control device of the type described at the outset.

[0007]

According to the present invention, this object is attained by an arrangement according to claim 1. With the control device according to the invention having the configuration of claim 1, the generation of the gate voltage required for the connection or conduction of the switch always depends on the presence of a clock signal which is taken at the output of the processor. It is done. If a clock signal is present, the required gate voltage is formed and maintained using a half-bridge circuit and a charge pump. When the clock signal is cut off, the gate of the field effect transistor is rapidly discharged, thereby blocking the switch. Therefore, control of the switch is performed only depending on the clock signal provided by the processor. No unique oscillator is needed to generate the clock signal. Furthermore, according to the present invention, there is no need for a connection terminal capable of supplying a cutoff signal to the control device. However, additional connection terminals of this type may be provided to increase the reliability of the disconnection.

The voltage range of the control device according to the invention is not restricted to the input voltage. The existing first supply voltage, which is preferably 12 volts, is raised to the voltage level of the existing second supply voltage, which is preferably 42 volts, and the positive potential required for the through connection of the input switch It just makes it possible to use.

The device according to the invention has a reduced component cost compared to the known device, in which case the voltage range of the circuit is also higher than in previous charge pumps, due to the permissible voltage range of the transistors used. Has been raised.

Another advantage of the invention is that the magnitude of the supply voltage, which is advantageously 12 volts, allows the value of the control voltage for the input switch to be set directly, where the output of the charge pump is set. The value is 42V
+ 12V = 54V is set.

[0011]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.

The load V is supplied with a power supply voltage of 42 V from a vehicle-mounted power supply network via an input-side switch. This power supply voltage is provided at the connection terminal K2.

The input switch has one or more field effect transistors T3. The space between the drain and the source is arranged between the connection terminal K2 and the load V.
In the embodiment shown, a field-effect transistor of this type is provided. The drain connection terminal of this field effect transistor is connected to the connection terminal K2 and the source connection terminal is connected to the load V.

In order to switch on or switch on the field effect transistor T3 and to maintain the switched on operation, a sufficiently large voltage is required at the gate connection G. This voltage is generated using a controller. The control device is a half bridge circuit HB and a charge pump L
have.

The control of the half bridge circuit HB is performed by a clock signal CK. The clock signal is taken from the processor P at its output A1. This processor is, for example, a DC voltage converter microcontroller. The clock signal CK provided at the output A1 of the processor P is advantageously a rectangular signal having a frequency in the order of 100 kHz.

The emergency shutoff signal NA can be extracted from the connection terminal A2 of the processor P when necessary.

The clock signal CK is supplied from the output A1 of the processor P to the input connection terminal E1 of the half bridge circuit HB. From there, it reaches the gate connection terminal of the switching transistor T6 via a voltage divider. The switching transistor is turned on and off at the timing of the clock signal.

A power supply voltage connection terminal to which a power supply voltage of 5 V is applied is connected to the gate of the field effect transistor T2 via a resistor. Further, this gate is connected to the gate of the field effect transistor T1 via one diode and two resistors. A Zener diode is interposed between the ground and the gate of the field effect transistor T2. The gate of the field effect transistor T1 is connected to the connection terminal K3 via one resistor and a zener diode in parallel with the resistor.

The drain connection terminals of the field effect transistors T1 and T2 are connected to the circuit point P via one resistor.
1 connected. This circuit point forms the output side of the half-bridge circuit HB. Half bridge high
The source connection terminal of the field effect transistor T1, which is a side switch, is connected to the connection terminal K3. The source connection terminal of the field effect transistor T2, which is the low side switch of the half bridge, is connected to the ground potential.

Since the field effect transistors T1 and T2 are controlled like a push-pull control when the clock signal CK is present, the two transistors alternately conduct and shut off. By this alternating operation, a potential jumping to the circuit point P1 is generated.

When the transistor T2 is conducting, the circuit point P1 is connected to ground via a resistor provided at the drain connection terminal of T2. As a result, the charging capacitor C1 of the charge pump L can be charged via the diode D1 to the supply voltage of 12 V provided at the connection terminal K1.

When the transistor T1 is conducting, the circuit point P1 is connected to the potential applied to the terminal K3 via a resistor provided at the drain connection terminal of T1. This blocks diode D1 and charging capacitor C1 conducts its charge at diode D2
Through the storage capacitor C2.

The next time the transistor T2 conducts, the circuit point P1 is newly connected to ground via the drain resistance of T2. As a result, the charging capacitor C1 is again charged via the diode D1 to the supply voltage of 12 V provided at the connection terminal K1.
2 is blocked.

Thereafter, when T2 shifts to the blocking state and T1 shifts to the conductive state, the charge stored in the charging capacitor C1 is newly transferred to the storage capacitor C2.

The storage capacitor C2 is connected to the gate G of the field effect transistor T3 via the resistor R2.
As a result, the voltage or potential at the gate connection of transistor T3 is increased by the above-described pumping process while T3 is conducting and is maintained in that state.

In the conducting state of T3, the supply voltage, preferably 42 V, applied to terminal K2 reaches the load V from the vehicle's on-board power supply network. The load is connected to the source connection terminal of the field effect transistor T3. Since the source connection of T3 is connected to the egg K3, a voltage of 12V + 42V = 54V with respect to ground is formed at the gate connection of T3 in the circuit shown, while the source connection of T3 is connected. A voltage of 42 V is applied between the power supply and the ground. This potential difference between the gate and the source of field effect transistor T3 ensures that T3 is continuously conductive during operation while processor P is sending clock signal CK to its output terminal. I have.

When the processor P terminates the supply of the clock signal CK to the half-bridge circuit HB, the charge pump L performs the operation based on the parallel resistances R1 and R3.
A rapid drop in the charge at the storage capacitor C2 or at the gate connection of the transistor T3 occurs. As a result, the field effect transistor T3 transitions to and stays in the blocking state based on the absence of the clock signal CK.

As shown, the emergency shut-off device N can increase the certainty of the blocking of the transistor T3. This emergency shut-off device has an input connection adapted to be able to use the emergency shut-off signal NA generated by the processor P. This emergency cutoff signal reaches the gate of the field effect transistor T4 via the voltage divider. Its source is connected to ground and its drain is connected via a resistor to the gate G of another field effect transistor T5. This other field effect transistor T5 is switched to the conducting state when an emergency cutoff signal occurs, so that the potential compensation between the gate and the source of the field effect transistor T3 via the conducting transistor T5 and the resistor. Is performed. As a result, the gate of T3 becomes necessary for switching the conduction of T3.
3 has no higher potential than the source connection terminal.

Another series circuit of a Zener diode and a resistor is provided between the gate connection terminal of T3 and the gate connection terminal of T5.

[Brief description of the drawings]

FIG. 1 is a schematic circuit diagram of a control device of the present invention.

[Explanation of symbols]

T3 field effect transistor, L charge pump,
HB half bridge circuit, P, A1 processor, CK clock signal, K1, K2 power supply input connection terminal, V load, N emergency shutoff device, NA emergency shutoff signal

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Bernd Dittmer, Germany Ludwigsbourg-Osweil Mühlhauser Sturase 50 (72) Inventor Reinhard Rieger Germany Germany Schuttgart-e-Mother Strasse 6

Claims (15)

[Claims] 1. A control device for a switch for electronically switching a load, the switch comprising one or more field-effect transistors arranged in series between an operating voltage source and the load. T3),
To generate the gate voltage of a field effect transistor,
A half bridge circuit (HB) and a charge pump (L) are provided, and the half bridge circuit (H
The input connection terminal (E1) of B) is connected to the output connection terminal (A1) of the processor (P), and a clock signal (CK) is generated at the output connection terminal, and the clock signal is used to generate the clock signal (CK). A control device for a switch that uses a half-bridge circuit (HB) and a charge pump (L) to generate a gate voltage that switches conduction of one or more field-effect transistors (T3). 2. The control device according to claim 1, wherein the clock signal (CK) is a rectangular signal having a frequency on the order of 100 kHz. 3. The clock signal (CK) is supplied to two field effect transistors (T1, T1) of a half bridge circuit (HB).
3. The switch according to claim 1, wherein the switch is used for push-pull control of T2), wherein one of the two field-effect transistors (T1) is a high-side switch and the other is a low-side switch. Control device against. 4. The charge pump (L) has a first power supply voltage connection terminal (K1), and the first power supply voltage can be supplied to the charge pump via the connection terminal. The control device according to any one of claims 1 to 3. 5. The first power supply voltage is 12V.
The control device as described. 6. The first power supply voltage connection terminal (K1) is a first power supply voltage connection terminal (K1).
Capacitor (C1) via the diode (D1)
Is connected to a first connection terminal (P2) of the charging capacitor, and a second connection terminal of the charging capacitor is connected to a half bridge circuit (H
5. The output connection terminal (P1) of (B) is connected to the output connection terminal (P1).
Or the control device according to 5. 7. A first connection terminal (P2) of the charging capacitor (C1) is connected to a first connection terminal (P3) of the storage capacitor (C2) via a second diode (D2), 7. The control device according to claim 6, wherein a second connection terminal of the storage capacitor is connected to a source connection terminal of the field effect transistor (T3). 8. A first capacitor connected in parallel with the storage capacitor (C2).
Zener diode (Z1) and first resistor (R
8. The control device according to claim 7, wherein 1) is connected. 9. The storage capacitor according to claim 1, wherein a first connection terminal of the storage capacitor is connected to a gate connection terminal of the field-effect transistor via a second resistor. 8. The control device according to 8. 10. A gate connection terminal (G) of the field effect transistor (T3) is connected to a second Zener diode (Z1).
10. The control device according to claim 1, wherein the control device is connected to the source connection terminal (S) of the field effect transistor (T3) via a resistor (R3) connected in parallel to the control device. 11. An emergency shut-off device (N) is provided between a gate connection terminal (G) of a field effect transistor (T3) and a source connection terminal (S) of the transistor. The control device according to claim 1. 12. An emergency cut-off device (N) for an emergency cut-off signal (N
A) has an input connection terminal for A) and a switching transistor, which switches to a conductive state when an emergency cutoff signal is generated, and connects the gate connection terminal and the source connection terminal of the field effect transistor (T3) The control device according to claim 11, wherein a potential difference between the two is reduced. 13. The control device according to claim 12, wherein the emergency shutoff signal (NA) can be extracted at an output (A3) of the processor (P). 14. A drain connection terminal (D) of the field effect transistor (T3) is connected to a second power supply voltage connection terminal (K2).
14. The control device according to claim 1, wherein the field-effect transistor is connected to the second power supply voltage via the connection terminal. 15. The control device according to claim 14, wherein the second power supply voltage is 42V.