JP2001156063A - Method and apparatus for manufacturing semiconductor device - Google Patents
Method and apparatus for manufacturing semiconductor deviceInfo
- Publication number
- JP2001156063A JP2001156063A JP33329299A JP33329299A JP2001156063A JP 2001156063 A JP2001156063 A JP 2001156063A JP 33329299 A JP33329299 A JP 33329299A JP 33329299 A JP33329299 A JP 33329299A JP 2001156063 A JP2001156063 A JP 2001156063A
- Authority
- JP
- Japan
- Prior art keywords
- film
- btbas
- sio
- quartz
- silicon oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02219—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置の製造
方法および半導体製造装置に関し、特に、酸化シリコン
（ＳｉＯ２）膜の熱ＣＶＤ（Chemical Vapor Depositio
n）法による製造工程を備える半導体装置の製造方法お
よび半導体製造装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device and a semiconductor manufacturing apparatus, and more particularly, to a thermal CVD (Chemical Vapor Depositio) of a silicon oxide (SiO 2 ) film.
The present invention relates to a semiconductor device manufacturing method and a semiconductor manufacturing apparatus having a manufacturing process according to the n) method.
【０００２】[0002]
【従来の技術】従来、半導体装置に使用されるＳｉＯ２
膜は、ＴＥＯＳ（テトラエトキシシラン）より形成する
方法が一般的である。2. Description of the Related Art Conventionally, SiO 2 used in semiconductor devices
The film is generally formed from TEOS (tetraethoxysilane).
【０００３】ＳｉＯ２膜を形成するには、ＴＥＯＳを、
６５０℃〜７００℃に保たれた炉の石英反応管内へ送り
込む。炉内に導入されたＴＥＯＳは熱分解し半導体ウェ
ーハ上または石英反応管内壁にＳｉＯ２膜を形成する。
このときのＳｉＯ２膜の特性を示す屈折率は１．４５で
ある。In order to form a SiO 2 film, TEOS is
It is fed into a quartz reaction tube of a furnace maintained at 650 ° C to 700 ° C. TEOS introduced into the furnace is thermally decomposed to form an SiO 2 film on the semiconductor wafer or on the inner wall of the quartz reaction tube.
The refractive index indicating the characteristics of the SiO 2 film at this time is 1.45.
【０００４】この従来技術には、次の問題点がある。す
なわち、半導体素子寸法が小さくなるにつれて、浅い不
純物の拡散層が必要とされるが、従来のように、６５０
℃〜７００℃といった高温でＳｉＯ２膜を形成すると浅
い拡散層内の不純物が熱により深く拡散してしまうとい
う問題がある。This conventional technique has the following problems. That is, as the size of the semiconductor element becomes smaller, a shallow impurity diffusion layer is required.
When the SiO 2 film is formed at a high temperature of from 700 ° C. to 700 ° C., there is a problem that impurities in the shallow diffusion layer are diffused deeply by heat.
【０００５】[0005]
【発明が解決しようとする課題】本発明の主な目的は、
従来技術の高温成膜という問題点を解決し、低温成膜が
可能な酸化シリコン膜の製造方法および製造装置を提供
することにある。SUMMARY OF THE INVENTION The main object of the present invention is to:
An object of the present invention is to provide a method and an apparatus for manufacturing a silicon oxide film capable of forming a low-temperature film by solving the problem of high-temperature film formation of the related art.
【０００６】[0006]
【課題を解決するための手段】本発明によれば、ＳｉＨ
２（ＮＨ（Ｃ４Ｈ９））２（ビス ターシャル ブチル
アミノ シラン：ＢＴＢＡＳ：Bis tertial butyl am
ino silane）とＯ２とを原料ガスとして用いて酸化シリ
コン（ＳｉＯ２）膜を形成する工程を備えることを特徴
とする半導体装置の製造方法が提供される。According to the present invention, SiH
2 (NH (C 4 H 9 )) 2 (bis tertiary butyl amino silane: BTBAS: Bis tertial butyl am
A method for manufacturing a semiconductor device, comprising: forming a silicon oxide (SiO 2 ) film using ino silane) and O 2 as source gases.
【０００７】このようにすれば、６００℃以下の低温で
ＳｉＯ２膜を成膜可能である。In this way, a SiO 2 film can be formed at a low temperature of 600 ° C. or less.
【０００８】好ましくは、熱ＣＶＤ法によりＳｉＯ２膜
を形成し、さらに好ましくは、縦型ＬＰ−ＣＶＤ装置を
用いてＳｉＯ２膜を形成する。Preferably, the SiO 2 film is formed by a thermal CVD method, and more preferably, the SiO 2 film is formed by using a vertical LP-CVD apparatus.
【０００９】また、好ましくは、ビス ターシャル ブ
チル アミノ シランガス：Ｏ２ガスの値を１：１以上
として酸化シリコン膜を形成する。Preferably, a silicon oxide film is formed by setting the value of bis-tert-butylaminosilane gas: O 2 gas to 1: 1 or more.
【００１０】また、好ましくは、ＳｉＯ２膜を形成する
前または後に反応炉内をＯ２でガスパージし、さらに好
ましくは、ＳｉＯ２膜を形成する前および後に反応炉内
をＯ ２でガスパージする。Preferably, SiO 2 is used.2Form a film
Before and after O2Gas purge with
Preferably, SiO2Before and after film formation in reactor
O 2And purge with gas.
【００１１】また、本発明によれば、ビス ターシャル
ブチル アミノ シランとＯ２とを原料ガスとして用
いて熱ＣＶＤ法により酸化シリコン膜を形成することを
特徴とする半導体製造装置が提供される。Further, according to the present invention, there is provided a semiconductor manufacturing apparatus characterized in that a silicon oxide film is formed by a thermal CVD method using bis-tert-butylaminosilane and O 2 as source gases.
【００１２】[0012]
【発明の実施の形態】次に、図面を参照して本発明の一
実施の形態を説明する。Next, an embodiment of the present invention will be described with reference to the drawings.
【００１３】本発明において使用するＢＴＢＡＳは常温
では液体であるので、図２、図３に示すようなＢＴＢＡ
Ｓ供給装置を用いて炉内へ導入する。Since BTBAS used in the present invention is liquid at room temperature, it is difficult to use BTBAS as shown in FIGS.
It is introduced into the furnace using an S supply device.
【００１４】図２に示すＢＴＢＡＳ供給装置は、恒温槽
と気体流量制御の組合せである。図３に示すＢＴＢＡＳ
供給装置は、液体流量制御と気化器との組合せにより流
量制御を行うものである。The BTBAS supply device shown in FIG. 2 is a combination of a thermostat and gas flow control. BTBAS shown in FIG.
The supply device controls the flow rate by a combination of the liquid flow rate control and the vaporizer.
【００１５】図２を参照すれば、ＢＴＢＡＳ供給装置４
においては、ＢＴＢＡＳ液体原料４２を備えた恒温槽４
１内を１００℃程度に加熱し、ＢＴＢＡＳの蒸気圧を高
くすることによりＢＴＢＡＳを気化し、その後気化した
ＢＴＢＡＳは、マスフローコントローラ４３により流量
制御されて、ＢＴＢＡＳ供給口４４より図１に示す縦型
ＬＰＣＶＤ（減圧ＣＶＤ）成膜装置のノズル２１の供給
口２２に供給される。なお、このＢＴＢＡＳ供給装置４
においては、ＢＴＢＡＳ液体原料４２からＢＴＢＡＳ供
給口４４に至るまでの配管は、配管加熱部材４５によっ
て覆われている。Referring to FIG. 2, the BTBAS supply device 4
In the thermostat 4 provided with the BTBAS liquid raw material 42
1 is heated to about 100 ° C. to evaporate the BTBAS by increasing the vapor pressure of the BTBAS, and thereafter the vaporized BTBAS is flow-controlled by the mass flow controller 43, and the vertical type shown in FIG. It is supplied to a supply port 22 of a nozzle 21 of an LPCVD (low pressure CVD) film forming apparatus. The BTBAS supply device 4
In, the piping from the BTBAS liquid raw material 42 to the BTBAS supply port 44 is covered by a piping heating member 45.
【００１６】図３を参照すれば、ＢＴＢＡＳ供給装置５
においては、ＢＴＢＡＳ液体原料５２を備えたＢＴＢＡ
Ｓタンク５１内に、押し出しガス導入口５３から導入さ
れた押し出しガスＨｅ、Ｎ２を配管５４を介して導入す
ることにより、ＢＴＢＡＳ液体原料３２を配管５５に押
し出し、その後ＢＴＢＡＳ液体原料は、液体流量制御装
置５６により流量制御されて気化器５７に送られ、気化
器５７で気化されてＢＴＢＡＳ供給口５８より図１に示
す縦型ＬＰＣＶＤ（減圧ＣＶＤ）成膜装置のノズル２１
の供給口２２に供給される。なお、このＢＴＢＡＳ供給
装置５においては、気化器５７からＢＴＢＡＳ供給口５
８に至るまでの配管は、配管加熱部材５９によって覆わ
れている。Referring to FIG. 3, the BTBAS supply device 5
BTBA with the BTBAS liquid raw material 52
The BTBAS liquid raw material 32 is extruded into the pipe 55 by introducing the extruded gas He, N 2 introduced from the extruded gas inlet 53 through the pipe 54 into the S tank 51, and thereafter, the BTBAS liquid raw material is supplied at the liquid flow rate. The flow rate is controlled by the control device 56 and sent to the vaporizer 57, vaporized by the vaporizer 57 and passed through the BTBAS supply port 58 through the nozzle 21 of the vertical LPCVD (low pressure CVD) film forming apparatus shown in FIG.
Is supplied to the supply port 22. In the BTBAS supply device 5, the vaporizer 57 supplies the BTBAS supply port 5
The pipe up to 8 is covered with a pipe heating member 59.
【００１７】次に、本実施の形態で好適に使用できる縦
型ＬＰＣＶＤ成膜装置を図１を参照して説明する。Next, a vertical LPCVD film forming apparatus which can be suitably used in this embodiment will be described with reference to FIG.
【００１８】縦型ＬＰＣＶＤ成膜装置１においては、石
英反応管１１の外部にヒータ１３を備えており、石英反
応管１１内を均一に加熱できる構造となっている。石英
反応管１１内には石英インナーチューブ１２が設けられ
ている。石英インナーチューブ１２内には、複数の半導
体ウェーハを垂直方向に積層して搭載する石英ボート１
４が設けられている。この石英ボート１４は、キャップ
１５上に搭載されており、キャップ１５を上下させるこ
とにより、石英インナーチューブ１２内に挿入され、ま
た石英インナーチューブ１２から取り出される。石英反
応管１１および石英インナーチューブ１２の下部は開放
された構造となっているが、キャップ１５を上昇させる
ことにより、キャップ１５の底板２４により閉じられ気
密な構造となる。石英インナーチューブ１２の下部に
は、石英ノズル１８、２１が連通して設けられている。
石英インナーチューブ１２の上部は開放されている。石
英インナーチューブ１２と石英反応管１１との間の空間
の下部には、排気口１７が連通して設けられている。排
気口１７は真空ポンプ（図示せず）に連通しており、石
英反応管１１内を減圧できる。石英ノズル１８、２１か
ら供給された原料ガスは、各々の噴出口２０、２３から
石英インナーチューブ１２内に噴出され、その後、石英
インナーチューブ１２内を下部から上部まで移動し、石
英インナーチューブ１２と石英反応管１１との間の空間
を通って下方に流れ、排気口１７から排気される。In the vertical LPCVD film forming apparatus 1, a heater 13 is provided outside the quartz reaction tube 11, so that the inside of the quartz reaction tube 11 can be heated uniformly. A quartz inner tube 12 is provided in the quartz reaction tube 11. A quartz boat 1 in which a plurality of semiconductor wafers are vertically stacked and mounted in a quartz inner tube 12.
4 are provided. The quartz boat 14 is mounted on a cap 15, and is inserted into and taken out of the quartz inner tube 12 by moving the cap 15 up and down. Although the lower portions of the quartz reaction tube 11 and the quartz inner tube 12 are open, when the cap 15 is raised, it is closed by the bottom plate 24 of the cap 15 to form an airtight structure. In the lower part of the quartz inner tube 12, quartz nozzles 18 and 21 are provided in communication.
The upper part of the quartz inner tube 12 is open. An exhaust port 17 communicates with a lower portion of the space between the quartz inner tube 12 and the quartz reaction tube 11. The exhaust port 17 is connected to a vacuum pump (not shown) and can reduce the pressure inside the quartz reaction tube 11. The raw material gas supplied from the quartz nozzles 18 and 21 is ejected from the respective ejection ports 20 and 23 into the quartz inner tube 12 and thereafter moves from the lower part to the upper part in the quartz inner tube 12, and The gas flows downward through the space between the quartz reaction tube 11 and is exhausted from the exhaust port 17.
【００１９】次に、この縦型ＬＰＣＶＤ成膜装置１を使
用してＳｉＯ２膜を製造する方法について説明する。Next, a method of manufacturing an SiO 2 film using the vertical LPCVD film forming apparatus 1 will be described.
【００２０】まず、多数枚の半導体ウェーハ１６を保持
した石英ボート１４を６００℃以下の温度に保たれた石
英インナーチューブ１２内に挿入する。First, the quartz boat 14 holding a large number of semiconductor wafers 16 is inserted into the quartz inner tube 12 maintained at a temperature of 600 ° C. or lower.
【００２１】次に、真空ポンプ（図示せず）を用いて排
気口１７より真空排気する。ウェーハの面内温度安定効
果を得るため、１時間程度排気することが好ましい。Next, vacuum exhaust is performed from the exhaust port 17 using a vacuum pump (not shown). In order to obtain the in-plane temperature stabilizing effect of the wafer, it is preferable to evacuate for about one hour.
【００２２】次に、石英ノズル１８の注入口１９よりＯ
２ガスを注入し、石英反応管１１内を、ＢＴＢＡＳを流
す前にＯ２でパージする。Next, O is injected through the injection port 19 of the quartz nozzle 18.
2 gas is injected, and the inside of the quartz reaction tube 11 is purged with O 2 before flowing BTBAS.
【００２３】次に、石英ノズル１８の注入口１９よりＯ
２ガスを注入し続けると共に、石英ノズル２１の注入口
２２よりＢＴＢＡＳを注入して、半導体ウェーハ１６上
にＳｉＯ２膜を成膜する。Next, O is injected from the injection port 19 of the quartz nozzle 18.
While continuously injecting the two gases, BTBAS is injected from the injection port 22 of the quartz nozzle 21 to form an SiO 2 film on the semiconductor wafer 16.
【００２４】次に、石英ノズル１８の注入口１９よりＯ
２ガスを注入したまま、ＢＴＢＡＳの供給を停止して、
石英反応管１１内をＯ２でパージする。Next, O is injected from the injection port 19 of the quartz nozzle 18.
Stop supplying BTBAS while injecting 2 gases,
The inside of the quartz reaction tube 11 is purged with O 2 .
【００２５】ＢＴＢＡＳのみ流すとＳｉＯ２膜とは異な
る膜ができるため、デポジション前後にＯ２によるパー
ジを行うことが好ましい。If only BTBAS is flowed, a film different from the SiO 2 film is formed. Therefore, it is preferable to purge with O 2 before and after the deposition.
【００２６】次に、石英ノズル１８よりＮ２を石英反応
管１１内に流入させてＮ２パージを行い、石英反応管１
１内のＯ２を除去する。Next, N 2 is introduced into the quartz reaction tube 11 from the quartz nozzle 18 to perform N 2 purging.
Removing O 2 in 1.
【００２７】その後、Ｎ２の供給を止めて石英反応管１
１内を真空にする。Ｎ２パージとその後の石英反応管１
１内の真空排気は数回セットで実施する。Thereafter, the supply of N 2 was stopped and the quartz reaction tube 1 was stopped.
1 is evacuated. N 2 purge followed by quartz reaction tube 1
The evacuation in 1 is performed several times as a set.
【００２８】その後、石英反応管１１内を真空状態から
大気圧状態へ戻し、その後、石英ボート１４を下げて、
石英反応管１１より引き出し、その後、石英ボート１４
および半導体ウェーハ１６を室温まで下げる。Thereafter, the inside of the quartz reaction tube 11 is returned from the vacuum state to the atmospheric pressure state, and then the quartz boat 14 is lowered to
Pulled out from the quartz reaction tube 11, and then the quartz boat 14
And lower the semiconductor wafer 16 to room temperature.
【００２９】[0029]
【実施例】次に、上記縦型ＬＰＣＶＤ成膜装置１を使用
して、ＳｉＯ２膜を作成した。この際には、図３に示し
たＢＴＢＡＳ供給装置５を使用した。Next, an SiO 2 film was formed using the vertical LPCVD film forming apparatus 1 described above. In this case, the BTBAS supply device 5 shown in FIG. 3 was used.
【００３０】炉温５６５℃にてＢＴＢＡＳおよびＯ２を
石英反応管１１内に同時導入すると膜屈折率が１．４６
〜１．４８であり、従来のＳｉＯ２膜と同等の膜が得ら
れた。When BTBAS and O 2 are simultaneously introduced into the quartz reaction tube 11 at a furnace temperature of 565 ° C., the film refractive index becomes 1.46.
To 1.48, and a film equivalent to the conventional SiO 2 film was obtained.
【００３１】これに対して、炉温５６５℃にてＢＴＢＡ
Ｓのみを石英反応管１１内に導入すると膜屈折率が１．
７８であり、従来のＳｉＯ２膜と異なる膜が形成され
る。On the other hand, at a furnace temperature of 565 ° C., BTBA
When only S is introduced into the quartz reaction tube 11, the film refractive index becomes 1.
78, a film different from the conventional SiO 2 film is formed.
【００３２】図４に、成膜温度とＳｉＯ２膜の屈折率と
の関係を示す。ＢＴＢＡＳ流量１００ｓｃｃｍ、Ｏ２流
量４００ｓｃｃｍ、圧力６５ｐａを固定条件として成膜
温度を５６５℃、５８０℃、５９５℃と変化させた時の
膜屈折率データである。成膜温度によらず、膜特性を表
す屈折率は１．４７で一定している。ＴＥＯＳによるＳ
ｉＯ２の屈折率（グラフ右端参照）は１．４４であり同
程度と言える。FIG. 4 shows the relationship between the film forming temperature and the refractive index of the SiO 2 film. These are the film refractive index data when the film forming temperature is changed to 565 ° C., 580 ° C., and 595 ° C. under the fixed conditions of a BTBAS flow rate of 100 sccm, an O 2 flow rate of 400 sccm, and a pressure of 65 pa. Regardless of the film forming temperature, the refractive index indicating the film characteristics is constant at 1.47. S by TEOS
The refractive index of iO 2 (see the right end of the graph) is 1.44, which is almost the same.
【００３３】またＨＦによるウェット・エッチングを行
った。成膜温度を５６５℃、５８０℃、５９５℃と変化
させて成膜したＳｉＯ２膜のエッチングレートの結果を
図５に示す。ＴＥＯＳによるＳｉＯ２のエッチングレー
ト（グラフ右端参照）とＢＴＢＡＳとＯ２によるＳｉＯ
２のエッチングレートは同程度と言える。Further, wet etching with HF was performed. FIG. 5 shows the results of the etching rate of the SiO 2 film formed by changing the film forming temperature to 565 ° C., 580 ° C., and 595 ° C. Etching rate of SiO 2 by TEOS (see right end of graph) and SiO by BTBAS and O 2
It can be said that the etching rate of No. 2 is almost the same.
【００３４】従って成膜温度は５６５℃〜５９５℃が望
ましい。Therefore, the film forming temperature is preferably from 565 ° C. to 595 ° C.
【００３５】図６に、ガス比（ＢＴＢＡＳ：Ｏ２）とＳ
ｉＯ２膜の屈折率との関係を示す。ガス比によらず屈折
率は１．４７〜１．４９が得られ、ＴＥＯＳによるＳｉ
Ｏ２の屈折率（グラフ右端参照）は１．４４であり同程
度と言える。FIG. 6 shows the gas ratio (BTBAS: O 2 ) and S
4 shows the relationship with the refractive index of the iO 2 film. Regardless of the gas ratio, a refractive index of 1.47 to 1.49 was obtained, and Si
The refractive index of O 2 (see the right end of the graph) is 1.44, which is almost the same.
【００３６】またＨＦによるウェット・エッチングを行
った。ガス比（ＢＴＢＡＳ：Ｏ２）を変化させて成膜し
たＳｉＯ２膜のエッチングレートの結果を図７に示す。
ＴＥＯＳによるＳｉＯ２のエッチングレート（グラフ右
端参照）とＢＴＢＡＳとＯ２によるＳｉＯ２のエッチン
グレートは同程度と言える。Further, wet etching with HF was performed. FIG. 7 shows the result of the etching rate of the SiO 2 film formed by changing the gas ratio (BTBAS: O 2 ).
It can be said that the etching rate of SiO 2 by TEOS (see the right end of the graph) and the etching rate of SiO 2 by BTBAS and O 2 are almost the same.
【００３７】従ってガス比はＢＴＢＡＳ：Ｏ２が１：１
以上が望ましい。Accordingly, the gas ratio of BTBAS: O 2 is 1: 1.
The above is desirable.
【００３８】なお、図４、図６で、頂部とは、１２５枚
のウェーハを処理した場合の下から１１５枚目をいい、
中央部とは、下から６６枚目をいい、底部とは下から１
６枚目をいう。また、図５、図７のエッチングレートの
データは中央部の半導体ウェーハを用いて得られたもの
である。In FIGS. 4 and 6, the top means the 115th wafer from the bottom when 125 wafers are processed.
The central part is the 66th sheet from the bottom, and the bottom part is 1st from the bottom.
The sixth sheet. The data of the etching rates in FIGS. 5 and 7 are obtained using the semiconductor wafer at the center.
【００３９】[0039]
【発明の効果】ＢＴＢＡＳにＯ２を添加することにより
得られたＳｉＯ２膜は従来より低温である６００℃以下
で成膜可能であり、半導体デバイスに必要な薄い拡散層
にダメージを与えない。The SiO 2 film obtained by adding O 2 to BTBAS can be formed at a temperature lower than 600 ° C., which is lower than before, and does not damage a thin diffusion layer required for a semiconductor device.
【図１】本発明の一実施の形態で使用する縦型ＬＰＣＶ
Ｄ成膜装置を説明するための概略断面図である。FIG. 1 is a vertical LPCV used in an embodiment of the present invention.
FIG. 2 is a schematic sectional view for explaining a D film forming apparatus.
【図２】本発明の一実施の形態で使用する成膜装置にお
いて好適に使用されるＢＴＢＡＳ供給装置を説明するた
めの概略図であるFIG. 2 is a schematic diagram illustrating a BTBAS supply device suitably used in a film forming apparatus used in an embodiment of the present invention.
【図３】本発明の一実施の形態で使用する成膜装置にお
いて好適に使用されるＢＴＢＡＳ供給装置を説明するた
めの概略図であるFIG. 3 is a schematic diagram for explaining a BTBAS supply device suitably used in a film forming apparatus used in an embodiment of the present invention.
【図４】本発明の一実施例における成膜温度とＳｉＯ２
膜の屈折率との関係を示すグラフである。FIG. 4 shows a film forming temperature and SiO 2 in one embodiment of the present invention.
5 is a graph showing a relationship with a refractive index of a film.
【図５】本発明の一実施例における成膜温度とＳｉＯ２
膜のエッチングレートとの関係を示すグラフである。FIG. 5 shows a film forming temperature and SiO 2 in one embodiment of the present invention.
4 is a graph showing a relationship with a film etching rate.
【図６】本発明の一実施例におけるガス比（ＢＴＢＡ
Ｓ：Ｏ２）とＳｉＯ２膜の屈折率との関係を示すグラフ
である。FIG. 6 shows a gas ratio (BTBA) in one embodiment of the present invention.
5 is a graph showing the relationship between S: O 2 ) and the refractive index of a SiO 2 film.
【図７】本発明の一実施例におけるガス比（ＢＴＢＡ
Ｓ：Ｏ２）とＳｉＯ２膜のエッチングレートとの関係を
示すグラフである。FIG. 7 shows a gas ratio (BTBA) in one embodiment of the present invention.
5 is a graph showing the relationship between S: O 2 ) and the etching rate of a SiO 2 film.
１…縦型成膜装置 ４、５…ＢＴＢＡＳ供給装置 １１…石英反応管 １２…石英インナーチューブ １３…ヒータ １４…石英ボート １５…キャップ １６…半導体ウェーハ １７…排気口 １８、２１…石英ノズル ４１…恒温槽 ５１…ＢＴＢＡＳ原料タンク ４２ 、５２…ＢＴＢＡＳ液体原料 ５３…キャリアガス導入口 ５４、５５…配管 ４３…マスフローコントローラ ４４、５８…ＢＴＢＡＳ供給口 ５６…液体流量制御装置 ５７…気化器 ４５、５９…配管加熱部材 DESCRIPTION OF SYMBOLS 1 ... Vertical film-forming apparatus 4, 5 ... BTBAS supply apparatus 11 ... Quartz reaction tube 12 ... Quartz inner tube 13 ... Heater 14 ... Quartz boat 15 ... Cap 16 ... Semiconductor wafer 17 ... Exhaust port 18, 21 ... Quartz nozzle 41 ... Constant temperature bath 51 BTBAS raw material tank 42, 52 BTBAS liquid raw material 53 Carrier gas inlet 54, 55 Piping 43 Mass flow controller 44, 58 BTBAS supply port 56 Liquid flow controller 57 Vaporizer 45, 59 Pipe heating member
Claims (6)
ンとＯ２とを原料ガスとして用いて酸化シリコン膜を形
成する工程を備えることを特徴とする半導体装置の製造
方法。1. A method for manufacturing a semiconductor device, comprising a step of forming a silicon oxide film using bis-tert-butylaminosilane and O 2 as source gases.
成することを特徴とする請求項１記載の半導体装置の製
造方法。2. The method according to claim 1, wherein said silicon oxide film is formed by a thermal CVD method.
ンガス：Ｏ２ガスの値を１：１以上として前記酸化シリ
コン膜を形成することを特徴とする請求項１または２記
載の半導体装置の製造方法。3. The method for manufacturing a semiconductor device according to claim 1, wherein the silicon oxide film is formed by setting a value of bis-tert-butylaminosilane gas: O 2 gas to 1: 1 or more.
に反応炉内をＯ２でガスパージすることを特徴とする請
求項１乃至３のいずれかに記載の半導体装置の製造方
法。4. The method of manufacturing a semiconductor device according to claim 1, wherein the inside of the reaction furnace is gas-purged with O 2 before or after the formation of the silicon oxide film.
に反応炉内をＯ２でガスパージすることを特徴とする請
求項１乃至３のいずれかに記載の半導体装置の製造方
法。5. The method of manufacturing a semiconductor device according to claim 1, wherein the inside of the reaction furnace is gas-purged with O 2 before and after the formation of the silicon oxide film.
ンとＯ２とを原料ガスとして用いて熱ＣＶＤ法により酸
化シリコン膜を形成することを特徴とする半導体製造装
置。6. A semiconductor manufacturing apparatus, wherein a silicon oxide film is formed by thermal CVD using bis-tert-butylaminosilane and O 2 as source gases.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33329299A JP2001156063A (en) | 1999-11-24 | 1999-11-24 | Method and apparatus for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33329299A JP2001156063A (en) | 1999-11-24 | 1999-11-24 | Method and apparatus for manufacturing semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001156063A true JP2001156063A (en) | 2001-06-08 |
Family
ID=18264475
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33329299A Pending JP2001156063A (en) | 1999-11-24 | 1999-11-24 | Method and apparatus for manufacturing semiconductor device |
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| Country | Link |
|---|---|
| JP (1) | JP2001156063A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006351694A (en) * | 2005-06-14 | 2006-12-28 | Fujitsu Ltd | Semiconductor device and its manufacturing method |
| US7166516B2 (en) | 2002-10-31 | 2007-01-23 | Fujitsu Limited | Method for fabricating a semiconductor device including the use of a compound containing silicon and nitrogen to form an insulation film of SiN or SiCN |
| JP2008283051A (en) * | 2007-05-11 | 2008-11-20 | Toshiba Corp | Semiconductor storage device and manufacturing method of semiconductor storage device |
| US7875312B2 (en) | 2006-05-23 | 2011-01-25 | Air Products And Chemicals, Inc. | Process for producing silicon oxide films for organoaminosilane precursors |
| US7875556B2 (en) | 2005-05-16 | 2011-01-25 | Air Products And Chemicals, Inc. | Precursors for CVD silicon carbo-nitride and silicon nitride films |
| US8530361B2 (en) | 2006-05-23 | 2013-09-10 | Air Products And Chemicals, Inc. | Process for producing silicon and oxide films from organoaminosilane precursors |
| US8771807B2 (en) | 2011-05-24 | 2014-07-08 | Air Products And Chemicals, Inc. | Organoaminosilane precursors and methods for making and using same |
| US8912353B2 (en) | 2010-06-02 | 2014-12-16 | Air Products And Chemicals, Inc. | Organoaminosilane precursors and methods for depositing films comprising same |
-
1999
- 1999-11-24 JP JP33329299A patent/JP2001156063A/en active Pending
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7166516B2 (en) | 2002-10-31 | 2007-01-23 | Fujitsu Limited | Method for fabricating a semiconductor device including the use of a compound containing silicon and nitrogen to form an insulation film of SiN or SiCN |
| US8932675B2 (en) | 2005-05-16 | 2015-01-13 | Air Products And Chemicals, Inc. | Methods for depositing silicon carbo-nitride film |
| US9640386B2 (en) | 2005-05-16 | 2017-05-02 | Versum Materials Us, Llc | Precursors for CVD silicon carbo-nitride films |
| US7875556B2 (en) | 2005-05-16 | 2011-01-25 | Air Products And Chemicals, Inc. | Precursors for CVD silicon carbo-nitride and silicon nitride films |
| US7932413B2 (en) | 2005-05-16 | 2011-04-26 | Air Products And Chemicals, Inc. | Precursors for CVD silicon carbo-nitride films |
| US8383849B2 (en) | 2005-05-16 | 2013-02-26 | Air Products And Chemicals, Inc. | Precursors for CVD silicon carbo-nitride films |
| JP2006351694A (en) * | 2005-06-14 | 2006-12-28 | Fujitsu Ltd | Semiconductor device and its manufacturing method |
| US7875312B2 (en) | 2006-05-23 | 2011-01-25 | Air Products And Chemicals, Inc. | Process for producing silicon oxide films for organoaminosilane precursors |
| US8530361B2 (en) | 2006-05-23 | 2013-09-10 | Air Products And Chemicals, Inc. | Process for producing silicon and oxide films from organoaminosilane precursors |
| CN103225070A (en) * | 2006-05-23 | 2013-07-31 | 气体产品与化学公司 | Process for producing silicon oxide films from organoaminosilane precursors |
| US8940648B2 (en) | 2006-05-23 | 2015-01-27 | Air Products And Chemicals, Inc. | Process for producing silicon and oxide films from organoaminosilane precursors |
| JP2008283051A (en) * | 2007-05-11 | 2008-11-20 | Toshiba Corp | Semiconductor storage device and manufacturing method of semiconductor storage device |
| US8912353B2 (en) | 2010-06-02 | 2014-12-16 | Air Products And Chemicals, Inc. | Organoaminosilane precursors and methods for depositing films comprising same |
| US8771807B2 (en) | 2011-05-24 | 2014-07-08 | Air Products And Chemicals, Inc. | Organoaminosilane precursors and methods for making and using same |
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