JP2001148819A - Automatic gain control circuit in television receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an automatic gain control circuit in a television receiver with excellent transient response by preventing a video detection output from being distorted or being a faulty image such as a noise in a transient state caused at channel selection switching or the like. SOLUTION: A discrimination circuit 39 discriminates a state that a signal received by a turner circuit or a gain variable amplifier circuit 22 is suddenly changed, an AGC time constant (only a capacitor 35 or a parallel configuration consisting of capacitors 35, 37) of an AGC circuit 29 is switched on the basis of a discrimination output from the circuit 39. Thus, the AGC can trace a transient state caused at channel selection switching or the like or a sudden change state of antenna input electric field or the like so that the television receiver can always display an image with small disturbance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic television receiver having an excellent transient response so that the screen is not disturbed even when a transient phenomenon such as a channel change occurs or an input electric field suddenly changes. The present invention relates to a gain control circuit.

[0002]

2. Description of the Related Art Generally, in a television receiver,
If the intensity of the radio wave input to the antenna changes, the image detection output also changes, and the contrast of the screen changes. In order to compensate for this, an automatic gain control circuit (hereinafter, referred to as an AGC circuit) is used to control the gain of the amplifier circuit at the preceding stage of the video detection circuit and to always obtain a constant video detection output. I have.

The AGC circuit generates a control voltage according to the strength of an input radio wave by using a video signal which has been amplified by a tuner circuit or an intermediate frequency amplifier circuit and then video-detected, and the amplification gain of the receiver is accordingly adjusted. Control. In other words, when the input radio wave is strong, the gains of the high frequency amplifier circuit and the video intermediate frequency amplifier circuit are reduced, and when the input radio wave is weak, the gain is increased so that the fluctuation due to the radio wave intensity does not appear in the video detection output. I have.

In the television broadcasting system, there is a system (for example, SECAM-L) in which, when a carrier is modulated with a video signal, the amplitude of the carrier is modulated with the video signal.

[0005] The positive modulation method is a modulation method in which the amplitude of a carrier is minimized in a portion of a synchronization signal, and the amplitude of the carrier is increased in a portion where a video signal is increased. A carrier wave positively modulated by a tuner circuit is received, converted into an intermediate frequency (hereinafter, IF) signal, amplified by an intermediate frequency amplifier circuit, and video-detected by a next-stage video detection circuit. The intermediate frequency amplifying circuit has a variable gain amplifying circuit whose gain is controlled by the IF AGC voltage. In a receiver of a positive modulation signal, the IF AGC voltage is obtained by, for example, a peak AGC circuit. The peak AGC circuit detects a change in the signal peak level (above or below the reference level) of the video signal output from the video detection circuit during a specific period, and detects the IF AGC.
Output as C voltage. In this case, the time constant of the capacitor that outputs the IF AGC voltage is set to be considerably long. For this reason, the IF AGC cannot follow the transient response of a sudden change that occurs at the time of channel selection switching or the like, causing a problem such as a temporary disturbance of the screen.

FIG. 4 is a block diagram of a conventional peak AGC circuit used for a positive modulation signal.

In FIG. 4, an IF signal from a tuner circuit (not shown) is input to an input terminal 21 and supplied to a variable gain amplifier (AGC-controllable amplifier) 22. The output of the variable gain amplifier 22 is detected by a video detector 23. As the video detection 23, envelope detection using a detection diode is used. The peak AGC circuit 29 detects the fluctuation of the video detection output and sets the AG so that the video detection output becomes constant.
The C voltage 36 is generated and supplied to the control terminal of the variable gain amplifier 22. The peak AGC circuit 29 includes the video detection circuit 2
VITS (Vertical Interval Test Signa) inserted in the vertical blanking period of the video signal
l) A variation of an all white signal of a signal is detected by comparison with a reference voltage to generate an AGC voltage,
A comparator 30 for comparing the video detection output with the reference voltage of the reference voltage source 31; the comparator output is supplied to the base; the collector is connected to the DC voltage source Vcc via the constant current source 33; The transistor 32 includes a transistor 32 connected to the reference potential point, and a charging / discharging capacitor 35 connected between the collector of the transistor 32 and the reference potential point. Then, the voltage of the capacitor 35 is supplied to the control terminal of the variable gain amplifier 22 as the AGC voltage 36.

As shown in FIG. 5A, a VITS signal is inserted in a vertical blanking period in one vertical scanning period (1 V) of a video signal. The peak AGC circuit 29 compares the all-white signal of the VITS signal and the reference voltage inserted in the vertical blanking period by the comparator 30. If the reference voltage is higher than the reference voltage, the output of the comparator 30 becomes "H" level and the transistor 32 turns on, the capacitor voltage 36 is discharged through the resistor 34, and the transistor 32
When turned on, the AGC voltage 36 decreases as shown in FIG. 5B, and the gain of the variable gain amplifier 22 decreases.

Therefore, the capacitor 35 and the transistor 3
The discharge time constant of the AGC voltage 36 determined by the emitter resistor 34 is set short to discharge during the short white signal period, and the discharge time constant of the AGC voltage 36 determined by the capacitor 35 and the constant current source 33 is set. The constant is one vertical scanning period (1
V) for a long time (ie, constant current source 3).
3 is set as small as several μA).

For this reason, if the video detection output changes abruptly, for example, when the tuning is switched, the response of the AGC voltage cannot follow such a transient response, and the video detection output is distorted or noise is reduced. Was temporarily output to the screen.

[0011]

As described above, the conventional A
In the GC circuit, there is a problem that the AGC cannot follow the transient response of the video detection output at the time of channel selection switching or a sudden change in the antenna input electric field, and a distorted image is output.

Therefore, the present invention has been made in view of such a problem,
Distortion that occurs in video detection output during transient phenomena such as tuning,
An object of the present invention is to provide an automatic gain control circuit in a television receiver having excellent transient response so as to prevent output of an abnormal screen such as noise.

[0013]

In the automatic gain control circuit of the television receiver according to the present invention, the intermediate frequency signal from the tuner circuit is input and the gain control signal is supplied, and the gain is controlled. A variable gain amplifier circuit capable of outputting a signal, a video detection circuit connected to an output of the variable gain amplifier circuit, for detecting a video signal from the intermediate frequency signal, and a video detection output level for a specific period from the video detection circuit And a capacitor that is charged and discharged in response to a result of the comparison by the comparator, and supplies a voltage generated in the capacitor as the gain control signal, and calculates an AGC time constant by the capacitor. An AGC circuit for controlling the gain of the variable gain amplifier circuit; and a change in the level of the output signal from the tuner circuit. A judging circuit for outputting a determination signal,
Switching means for switching an AGC time constant of the AGC circuit in response to the determination signal.

According to the first aspect of the present invention, the change in the received signal level of the tuner circuit is determined by the determination circuit, and the AGC time constant of the AGC circuit is switched in response to the determination output. It is possible to prevent a situation in which a stable AGC control cannot be performed and a distorted image is displayed due to a distortion in a video detection output during a transient phenomenon or a sudden change in an antenna input electric field.

An automatic gain control circuit in a television receiver according to a second aspect of the present invention is configured such that an intermediate frequency signal from a tuner circuit is input, a gain control signal is supplied, and a gain-controlled signal can be output. A variable amplifier circuit, a voltage-controlled oscillator, a phase comparator for comparing the phase of an oscillation signal from the voltage-controlled oscillator with an intermediate frequency signal from the variable gain amplifier circuit, and a phase-comparison output from the phase comparator. And a means for controlling the voltage controlled oscillator, and multiplying an intermediate frequency signal from the variable gain amplifier circuit and an oscillation signal from the voltage controlled oscillator of the PLL circuit to detect a video signal. A video detection circuit, a comparator for comparing a video detection output level from the video detection circuit for a specific period with a reference voltage, and a response to a comparison result by the comparator. It includes a capacitor which is charged and discharged Te, and the AGC circuit a voltage generated in the capacitor is supplied as the gain control signal to control the gain of the variable gain amplifier circuit in the AGC time constant by the capacitor, the P
A determination circuit for determining whether a voltage controlled oscillator of an LL circuit is in phase with the intermediate frequency signal and outputting a determination signal indicating a reception state in the tuner circuit; and responding to a determination signal from the determination circuit. Switching means for switching the AGC time constant of the AGC circuit.

According to the second aspect of the present invention, when a video detection circuit of a PLL synchronous detection system is employed, it is detected whether or not the PLL circuit is phase-synchronized (locked), and when the tuning is switched or the antenna is switched. In a state where the received signal changes abruptly (such as when the input electric field suddenly changes) (that is, the PLL is unlocked),
The time constant of GC is set short so that it can follow the transient response at the time of channel selection switching. Thus, it is possible to prevent the image detection output from being distorted and causing the screen to be disturbed.

According to a third aspect of the present invention, in the automatic gain control circuit of the television receiver according to the first or second aspect, the switching means for switching the AGC time constant includes the step of switching the tuner circuit in response to the determination signal. The AGC time constant is increased in a stable reception state, and the switching is performed so as to decrease the AGC time constant in an unstable state such as when channel selection is switched.

According to a fourth aspect of the present invention, in the automatic gain control circuit of the television receiver according to the first or second aspect, the switching means for switching the AGC time constant includes a capacitance of the capacitor for determining the AGC time constant. Characterized in that it is constituted by a means for switching.

According to a fifth aspect of the present invention, in the automatic gain control circuit of the television receiver according to the first or second aspect, the switching means for switching the AGC time constant is provided to the capacitor for determining the AGC time constant. It is characterized by comprising a means for switching the amount of charging current.

According to a sixth aspect of the present invention, in the automatic gain control circuit of the television receiver according to the first or second aspect, the switching means for switching the AGC time constant further includes a time constant circuit. When the reception state shifts from the unstable state to the stable state, the determination signal is changed with a predetermined time delay by the time constant circuit, and after the reception state of the tuner circuit is stabilized for a predetermined time, The AGC time constant is switched.

According to the sixth aspect of the present invention, when an abrupt change in the received signal is detected at the time of channel selection switching or the like, the AGC time constant is switched so as to be shortened, and then the reception state enters a stable state. In some cases, the time constant is returned to the stable time constant after a certain period of time (time until complete stabilization). As a result, it is possible to return to the normal time constant after the unstable period in which the screen is disturbed has completely passed.

[0022]

Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing an automatic gain control circuit in a television receiver according to one embodiment of the present invention. Portions having the same functions as those in FIG. 4 are denoted by the same reference numerals.

The difference from the conventional circuit of FIG. 4 is that in FIG. 4, the video detection circuit performs envelope detection using a detection diode or the like, but in FIG. 1, the video detection circuit for synchronous detection is constituted by a multiplication circuit. A circuit 231 and a PLL circuit 25 that generates an oscillation signal corresponding to the frequency of the input IF signal and supplies the oscillation signal to the video detection circuit 231 constitute a PLL synchronous detection circuit, and furthermore, a series circuit of a capacitor 37 and a switch transistor 38. A lock determination circuit 39 for determining whether or not the PLL circuit 25 is locked, and for turning on / off the switching transistor 38 based on the determination output;
When the lock determination output of the lock determination circuit 39 changes from the unlocked state to the locked state, a resistor 41 for giving a time constant (delay) to the rise of the lock determination signal.
And a second time constant circuit comprising a capacitor 42 and a diode 43 for sharpening the fall of the lock determination signal when the lock determination signal changes from the locked state to the unlocked state. That is. The variable gain amplifier 22 and the peak AGC circuit 29 are the same as those in FIG.

1 will be described in detail. An IF signal is input to an input terminal 21 from a tuner circuit (not shown), and the IF signal is supplied to a variable gain amplifier circuit (AGC-controllable amplifier) 22. Variable gain amplifier circuit 22
The IF signal amplified in is supplied to the video detection circuit 231 and is also supplied to the PLL circuit 25 at the same time. The video detection circuit 231 and the PLL circuit 25 constitute a PLL synchronous detection circuit. The video detection circuit 231 includes a multiplication circuit, and the PLL circuit 25 includes a phase comparator 26, a voltage controlled oscillator (hereinafter, VCO) 27, and a low-pass filter (hereinafter, LP).
F) 28.

In the PLL synchronous detection circuit, the IF signal output from the variable gain amplification circuit 22 is input to respective input terminals of the video detection circuit 231 and the phase comparator 26.
In the phase comparator 26, the IF signal and the VC from the VCO 27
The phase with the O oscillation signal is compared, a comparison voltage corresponding to the phase difference is taken out, converted to DC through the LPF 28, and the DC converted voltage is supplied to the control terminal of the VCO 27 as a control voltage. As a result, the VCO 27 always outputs an oscillation signal that matches the frequency of the IF signal, and inputs the oscillation signal to the other input terminal of the video detection circuit 23 including a multiplication circuit. In the video detection circuit 23, the amplitude-modulated IF
The signal is multiplied by a VCO oscillation signal having a frequency that matches the frequency of the IF signal to detect the signal.
The baseband video-detected video signal is output.

On the other hand, the video detection output of the video detection circuit 231 is supplied to the peak AGC circuit 29. Peak AG
The C circuit 29 supplies the AGC voltage 36 to the control terminal of the variable gain amplifier 22 so that the video detection output becomes constant. The peak AGC circuit 29 is a signal of a specific period inserted in the vertical blanking period of the video signal detected by the video detection circuit 231, for example, a VITS (Vertical Interva).
l Test Signal) A variation of the all white signal of the signal is detected by comparison with a reference voltage to generate an AGC voltage.
The VITS signal is a test signal within a vertical blanking period used as a signal for measuring waveform distortion or the like.

The peak AGC circuit 29 is a comparator 3 for comparing the video detection output with the reference voltage of the reference voltage source 31.
0, a comparator 32 output is supplied to the base, a collector is connected to the DC voltage source Vcc via the constant current source 33, and an emitter is connected to the reference potential point via the resistor 34. And a capacitor 35 for AGC time constant (for charging / discharging) connected between the collector and the reference potential point. Then, the voltage of the capacitor 35 is supplied to the control terminal of the variable gain amplifier 22 as the AGC voltage 36.

Further, a series circuit of a capacitor 37 and a switch transistor 38 is connected in parallel with the capacitor 35, and the switch transistor 38 is turned on or off based on a determination result from a lock determination circuit 39. The capacitor 35 can be connected or disconnected in parallel with the capacitor 35.

That is, the connection point A between the collector of the transistor 32 and the capacitor 35 is connected to the second point for switching the AGC time constant.
Of the transistor 37 and the collector-emitter path of the transistor 38 in series. The capacity value of the capacitor 37 is larger than that of the capacitor 35.

The lock determination circuit 39 is a circuit for determining whether or not the oscillation signal of the VCO 27 in the PLL circuit 25 is phase-locked (locked) to the input IF signal. P
Since the output of the LPF 28 in the LL circuit 25 indicates a phase shift (that is, a frequency shift) with the IF signal, the lock determination circuit 39 compares the DC voltage from the LPF 28 with a reference value to determine whether or not the lock has been performed. Judgment signal 40
Can be output as The determination signal 40 is, for example, an “H” level signal in a locked state and an “L” level signal in an unlocked state.

The judgment signal 40 from the lock judgment circuit 39
Is supplied to the base of the switching transistor 38 via a second time constant circuit of a resistor 41 and a capacitor 42. Further, a diode 43 is connected in parallel with the resistor 41. The diode 43 is connected in parallel to the resistor 41 such that the anode is on the capacitor 42 side.

Next, the operation of the circuit of FIG. 1 will be described. The IF signal supplied as an input is input to the variable gain amplifier circuit 22. The output of the variable gain amplifier 22 is the video detector 2
At 31, the gain of the variable gain amplifier circuit 22 is controlled by the output voltage of the peak AGC circuit 29 so that the detection output is constant. At this time, VCO2 supplied to the other input terminal of the video detection circuit 231
The phase of the oscillation signal from 7 is compared with the input IF signal in the phase comparator 26, and the oscillation signal is phase-locked to the IF signal.
The lock determination circuit 39 outputs the “H” level as a lock determination signal when the VCO 27 locks to the input IF signal, and turns on the transistor 38. The AGC time constant at the time of locking is determined by the sum of the capacitance of the capacitor 35 and the capacitance of the capacitor 37.

In a normal reception state, the PLL circuit 25 locks to the input IF signal. At this time, the transistor 38 is turned on based on the lock determination result, and the capacitors 35 and 37 are connected in parallel. It is set large and can receive stable video. At the time of channel selection switching, channel switching is performed by a tuner circuit (not shown).
Since the VCO 27 is unlocked (unlocked) without locking to the F signal, the lock determination result becomes the “L” level and the transistor 38 is turned off. At this time, the AGC time constant is determined only by the capacitor 35 and is set to be short, so that the AGC can respond to a transient phenomenon such as a time when a tuning is switched. As a result, AGC control can be performed quickly in response to a sudden change in detection output at the time of channel selection switching, and a phenomenon in which the screen is disturbed like noise can be prevented.

When the judgment output 40 of the lock judgment circuit 39 becomes "L" level (at the time of unlocking), the diode 43 is turned on and the charge of the capacitor 42 is immediately discharged, so that the transistor 38 is immediately turned on. Off, A
The GC time constant is set short.

When the tuner circuit (not shown) receives a normal television signal after the channel selection, when the judgment output 40 of the lock judgment circuit 39 becomes "H" level (lock state), the diode 43 is turned off. The output of the capacitor 42 (base voltage of the transistor 38) has a time delay determined by the resistor 41 and the capacitor 42, and the rising of the output is delayed as shown in FIG. 2 (b). , The switch 38 is not turned on until a certain time (time until the reception state becomes stable) elapses, and A
The state where the time constant of GC is short (that is, the state of the time constant only by the capacitor 35) can be maintained. Therefore, A having an extremely excellent transient response to the period of the transient change
A GC circuit can be realized.

FIG. 3 is a circuit diagram showing an automatic gain control circuit in a television receiver according to another embodiment of the present invention. Portions having the same functions as those in FIG. 4 are denoted by the same reference numerals.

4 is different from the conventional circuit of FIG. 4 in that the video detection circuit of FIG. 4 uses envelope detection using a detection diode or the like. In FIG. 3, however, the video detection circuit 231 for synchronous detection constituted by a multiplier circuit. And a PL that generates an oscillation signal that matches the frequency of the input IF signal and supplies the oscillation signal to the video detection circuit 231.
The L circuit 25 constitutes a PLL synchronous detection circuit, and is further connected in parallel to a lock determination circuit 39 for determining whether the PLL circuit 25 is locked and a constant current source 33 in the peak AGC circuit 29. , A series circuit composed of the second constant current source 51 and the switching transistor 52, and whether or not the PLL circuit 25 is locked, and a lock determination for turning on and off the switching transistor 52 based on the determination output. The circuit 39 is provided. The transistor 52 uses a PNP transistor.
The variable gain amplifier circuit 22 and the peak AGC circuit 29 are the same as those in FIG.

In the above configuration, when tuning is switched by a tuner circuit (not shown), the locked state of the PLL circuit 25 is released, and the determination output of the lock determination circuit 39 becomes "L" level (unlocked). State), transistor 52
Is turned on, and the charging current to the time constant capacitor 35 is supplied as the sum of the current from the constant current source 33 and the current from the second constant current source 51, so that the charging time constant is shortened. When the channel selection is completed and a normal television signal is output from a tuner circuit (not shown), the determination output of the lock determination circuit 39 becomes “H” level (locked state), and the transistor 52 is turned off. Is only the constant current source 33, and the charging time constant becomes longer.

In FIG. 3, as in the circuit of FIG.
C can follow and respond to transient phenomena such as channel selection switching, and AGC can follow and respond to transient phenomena such as channel selection switching. As a result, AGC control can be performed quickly in response to a sudden change in detection output at the time of channel selection switching, and a phenomenon in which the screen is disturbed like noise can be prevented.

In the above-described embodiment, a PLL synchronous detection circuit is used as a video detection circuit, and an AG is determined by using the result of determining the lock / unlock state of the PLL circuit.
Although the C time constant switching is performed, the present invention is not limited to this, and when the received signal electric field changes abruptly at the time of channel selection switching or the like, the abrupt change state is detected, whereby the AGC time constant is detected. It is needless to say that the present invention is within the scope of the present invention as long as it is switched to at least two stages.

[0041]

As described above, according to the present invention, AGC control with excellent transient response can be performed at the time of transient phenomena such as at the time of channel selection switching or at the time of a sudden change in the input electric field of the antenna.
The disadvantage that a distorted image is displayed due to distortion in the video detection output can be eliminated.

[Brief description of the drawings]

FIG. 1 is an exemplary circuit diagram showing an automatic gain control circuit in a television receiver according to an embodiment of the present invention.

FIG. 2 is a waveform chart illustrating the operation of the circuit in FIG. 1;

FIG. 3 is a circuit diagram showing an automatic gain control circuit in a television receiver according to another embodiment of the present invention.

FIG. 4 is a circuit diagram showing an automatic gain control circuit in a conventional television receiver.

FIG. 5 is a waveform chart illustrating the operation of a peak AGC circuit.

[Explanation of symbols]

 21 IF signal input terminal 22 Variable gain amplifier 231 Video detection circuit 24 Video detection output terminal 25 PLL circuit 26 Phase comparator 27 Voltage controlled oscillator (VCO) 28 Low-pass filter (LPF) 29 Peak AGC circuit 30 Comparator 31 Reference voltage source 32 Transistor 33 Constant current source 34 Resistor 35 Capacitor for AGC time constant 37 Second capacitor for switching AGC time constant 38 Transistor for switching AGC time constant 39: Lock determination circuit 40: Lock determination signal 41: Resistor 42: Capacitor 43: Diode 44: Output signal of the capacitor 42

Continued on the front page F term (reference) 5C026 BA02 BA04 BA05 BA19 5C066 AA03 BA05 CA23 DA01 EA04 GA04 GA08 GB01 KB02 KB03 KC14 KC16 KD02 KD06 KL08 KL09 LA02 5J106 AA04 BB04 CC01 CC21 CC38 EE08 KK12

Claims (6)

[Claims] 1. A variable gain amplifier circuit that receives an intermediate frequency signal from a tuner circuit and is supplied with a gain control signal, and that can output a gain-controlled signal, and is connected to an output of the variable gain amplifier circuit. A video detection circuit for detecting a video signal from the intermediate frequency signal, a comparator for comparing a video detection output level from the video detection circuit for a specific period with a reference voltage, and a comparator in response to a comparison result by the comparator. An AGC circuit including a capacitor to be discharged, supplying a voltage generated in the capacitor as the gain control signal, and controlling a gain of the variable gain amplifier circuit with an AGC time constant by the capacitor; and an output signal level from the tuner circuit. A determination circuit for determining a change in the AGC time and outputting a determination signal indicating a reception state; and an AGC time constant of the AGC circuit in response to the determination signal. An automatic gain control circuit in a television receiver, comprising switching means for switching. 2. A variable gain amplifier circuit to which an intermediate frequency signal is input from a tuner circuit and a gain control signal is supplied to output a gain-controlled signal; a voltage controlled oscillator; A phase comparator for comparing the phase of the oscillation signal with the intermediate frequency signal from the variable gain amplifier circuit; and a means for controlling the voltage controlled oscillator according to the phase comparison output from the phase comparator.
LL circuit, an intermediate frequency signal from the variable gain amplifier circuit, and the PLL
A video detection circuit for multiplying an oscillation signal from a voltage-controlled oscillator of the circuit to detect a video signal, and a comparator for comparing a video detection output level and a reference voltage for a specific period from the video detection circuit, and An AGC circuit including a capacitor charged and discharged in response to a comparison result by a comparator, supplying a voltage generated in the capacitor as the gain control signal, and controlling a gain of the variable gain amplifier circuit with an AGC time constant of the capacitor; A determination circuit that determines whether a voltage controlled oscillator of the PLL circuit is in phase synchronization with the intermediate frequency signal and outputs a determination signal indicating a reception state in the tuner circuit; and a determination from the determination circuit. Switching means for switching an AGC time constant of the AGC circuit in response to a signal. Control circuit. 3. The switching means for switching the AGC time constant increases the AGC time constant when the tuner circuit is in a stable reception state in response to the determination signal, and the AGC time constant when the tuning is switched or the like. 3. The automatic gain control circuit in a television receiver according to claim 1, wherein switching is performed so as to reduce a time constant. 4. The switching means for switching the AGC time constant comprises means for switching the capacitance of the capacitor for determining the AGC time constant.
An automatic gain control circuit in the television receiver according to 2. 5. The television receiver according to claim 1, wherein said switching means for switching the AGC time constant comprises means for switching a charge current to said capacitor for determining said AGC time constant. Automatic gain control circuit in the machine. 6. The switching means for switching the AGC time constant further includes a time constant circuit, and when the reception state of the tuner circuit shifts from an unstable state to a stable state, the determination signal is determined by the time constant circuit. 3. The television according to claim 1, wherein the AGC time constant is switched after the reception state of the tuner circuit is stabilized for a predetermined time after the change of the AGC time constant. Automatic gain control circuit in John receiver.