JP2001144016A - Producing method for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To decrease the concentration of metal elements in a crystalline silicon film, for which the metal element for promoting the crystallization of silicon is utilized. SOLUTION: After a nickel element is led into an amorphous silicon film 103, first heating treatment for crystallization is executed. After a crystalline silicon film 105 is obtained, the heating treatment is executed again with the same heating method as first heating treatment. At such a time, HCl or the like is added into an atmosphere and gettering of the nickel element residual in the crystalline silicon film 105 is executed. Thus, the crystalline silicon film 105 having the low concentration of metal elements and high crystallinity can be provided. While using the crystalline silicon film provided like this, a semiconductor device is produced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD [0001] The invention disclosed in the present specification is:
The present invention relates to a method for manufacturing a semiconductor device represented by a thin film transistor. In particular, the present invention relates to a method for manufacturing a semiconductor device using a crystalline silicon thin film formed over a glass substrate or a quartz substrate.

[0002]

2. Description of the Related Art Conventionally, a thin film transistor using a silicon film has been known. This is done by using a silicon film (thickness several hundred to several thousand) on a glass substrate or quartz substrate.
It constitutes a thin film transistor.

[0003] Glass substrates and quartz substrates are used for
This is because the thin film transistor is used for an active matrix liquid crystal display.

At present, when a glass substrate is used, a technique for forming a thin film transistor using an amorphous silicon film is generally used. Further, when a quartz substrate is used, a technique of heating an amorphous silicon film to obtain a crystalline silicon film has been put to practical use.

A thin film transistor using a crystalline silicon film can perform a high-speed operation of two digits or more compared to a thin film transistor using an amorphous silicon film. Therefore, a peripheral drive circuit of an active matrix type liquid crystal display device, which has been constituted by an external IC circuit, can be formed on a glass substrate or a quartz substrate with a thin film transistor.

Such a configuration is very advantageous for reducing the size of the entire apparatus and simplifying the manufacturing process. In addition, the structure leads to a reduction in manufacturing cost.

As a technique for obtaining a crystalline silicon film by heat treatment, a technique described in JP-A-6-232059 is known. This technique is a technique in which a metal element (for example, nickel) which promotes crystallization of silicon is introduced into an amorphous silicon film, and a crystalline silicon film is obtained by a heat treatment at a lower temperature than in the related art.

By using this technique, an inexpensive glass substrate can be used as the substrate, and the obtained crystalline silicon film can have practically usable crystallinity over a wide area.

However, since the metal element is contained in the film, the control of the amount of the metal element is delicate, and there is a problem in reproducibility and stability (electrical stability of the obtained device). It is clear.

[0010]

SUMMARY OF THE INVENTION An object of the present invention disclosed in this specification is to solve the above-mentioned problems and to provide a crystalline silicon film obtained by using a metal element which promotes crystallization of silicon. To provide a technique for reducing the concentration of a metal element.

[0011]

One of the inventions disclosed in the present specification is to intentionally introduce a metal element which promotes crystallization of silicon into an amorphous silicon film and to perform the first heat treatment on the non-crystalline silicon film. A step of crystallizing the amorphous silicon film, and a step of intentionally removing the metal element by performing a second heat treatment in an atmosphere containing a halogen element, wherein the first heat treatment and the second heat treatment are performed. Is performed by the same heating means.

In the above configuration, the first heating means and the second heating means
It is important that the heating means is the same heating means. This allows metal elements to diffuse into the silicon film,
This is because the first heat treatment for performing crystallization and the second heat treatment for removing the metal element diffused in the silicon film are performed in the same manner, so that the removal of the metal element is more successful.

For example, nickel is used as a metal element, the first heat treatment is performed by heating with a heater, and the second heat treatment is heated with an infrared lamp (RTA: called rapid thermal annealing). It has been found that the effect of removing nickel from the silicon film is lower than in the case where both heating methods are performed by a heater.

According to another aspect of the present invention, there is provided a step of contacting and holding a metal element which promotes crystallization of silicon by contacting the front surface or the back surface of the amorphous silicon film; A step of crystallizing at least a part of the silicon film, and a step of intentionally removing the metal element by performing a second heat treatment in an atmosphere containing a halogen element. The second heat treatment is performed by the same heating means.

The metal elements that promote crystallization of silicon include Fe, Co, Ni, Ru, Rh, Pd, Os, and I.
One or more selected from r, Pt, Cu, and Au can be used.

In particular, it is most preferable to use the Ni (nickel) element in view of its effect and reproducibility.

As an atmosphere containing a halogen element, A
HCl, HF, HBr, Cl2 in an atmosphere of one or more gases selected from r, N2, He, and Ne.
, F2, or Br2 may be used. here,
The halogen element functions to remove the metal element.

The atmosphere containing a halogen element includes HCl, HF, HBr, CBr in an atmosphere of one or more kinds of gases selected from Ar, N 2, He, and Ne.
A gas to which one or more gases selected from l2, F2 and Br2 and oxygen are added can be used.

Oxygen is formed by simultaneously forming an oxide film on the surface of the silicon film in the step of removing the metal element.
It has a function of suppressing the surface of the silicon film from being roughened by the action of a halogen element.

The heat treatment for removing the metal element is as follows:
It can be performed at a temperature of 450C to 1050C.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS By intentionally introducing a metal element represented by nickel, an amorphous silicon film is crystallized by a first heat treatment. Then, by performing the second heat treatment in an atmosphere containing a halogen element,
The metal element intentionally introduced earlier is removed from the film. At this time, the first heat treatment and the second heat treatment are performed by the same means.

[0022]

[Embodiment 1] In this embodiment, a technique for obtaining a crystalline silicon film on a glass substrate by using nickel element will be described.

FIG. 1 shows a manufacturing process of this embodiment. First,
Corning 1737 glass substrate (strain point 667 ° C) 101
A silicon oxynitride film 102 having a thickness of 3000 is formed thereon as a base film.

The silicon oxynitride film 102 is formed by a plasma CVD method using silane, N 2 O gas and oxygen as source gases. Alternatively, a film is formed by a plasma CVD method using a TEOS gas and a N2O gas.

The silicon oxynitride film 102 has a function of preventing diffusion of impurities from a glass substrate (a large amount of impurities is contained in a glass substrate at a semiconductor manufacturing level) in a later step.

In order to maximize this function,
Although a silicon nitride film is optimal, it is not practical because the silicon nitride film comes off the glass substrate due to stress. Further, a silicon oxide film can be used as the base film. However, a silicon oxide film has an insufficient barrier effect against impurities as compared with a silicon oxynitride film.

It is important that the undercoat film has as high a hardness as possible. This means that in the durability test of the finally obtained thin film transistor,
It can be concluded from the fact that the higher the hardness of the base film (that is, the lower the etching rate), the higher the reliability. From this, it is inferred that the hardness of the base film is related to prevention of entry of impurities from the glass substrate.

Next, an amorphous silicon film 103 to be a crystalline silicon film later is formed to a thickness of 500 by a low pressure thermal CVD method.
The low pressure thermal CVD method is used because the crystalline silicon film obtained later has better film quality. As a method other than the low pressure thermal CVD method, a plasma CVD method can be used.

The thickness of the amorphous silicon film 103 is 2000
-It is preferable to set the following. This is because, in the step of removing a metal element which promotes crystallization of silicon later, if the film thickness is 2,000 or more, the removal becomes difficult.

The lower limit of the thickness of the amorphous silicon film 103 is determined by how thin a film can be formed. In general, the lower limit is about 100 to 200.

At this stage, it is important to pay close attention to prevent impurities from entering the film. Specifically, it is important to pay attention to the purity of the gas used for film formation and the cleaning of the apparatus. Thus, FIG.
The state shown in is obtained.

Next, a nickel acetate solution containing 10 ppm (weight conversion) of nickel element is applied to the surface of the amorphous silicon film 103.

Specifically, as shown in FIG. 1B, first, a water film 104 of a nickel acetate solution is formed on the surface of the amorphous silicon film 103. The excess solution is then blown off using a spin coater. That is, spin drying is performed.

By doing so, a state is obtained in which the nickel element in the water film 104 is held in contact with the surface of the amorphous silicon film 103.

In consideration of the residual impurities in the subsequent heating step, it is preferable to use nickel sulfate instead of using the nickel acetate salt solution. This is because the nickel acetate salt solution contains carbon, which may be carbonized in the subsequent heating step and remain in the film.

The introduction amount of the nickel element can be adjusted by adjusting the concentration of the nickel element in the solution. It can also be controlled by the conditions for performing the spin dry and the holding time of the solution on the amorphous silicon film 103.

Then, in the state shown in FIG.
Heat treatment at a temperature of 450 ° C. to 650 ° C. is performed to crystallize the amorphous silicon film 103.

Here, in a nitrogen atmosphere, 600
C. for 4 hours. As a result of this step, a crystalline silicon film 105 is obtained.

It is important to determine the upper limit of this heat treatment in consideration of the heat resistance of the substrate to be used. In this embodiment, a Corning 1737 glass substrate having a strain point of 667 ° C. is used, so the upper limit of the heating temperature is about 650 ° C. Experiments have shown that crystallization requires a temperature of 450 ° C. or higher.

When a quartz substrate or another material having high heat resistance is used as the substrate, the heating temperature for the crystallization can be further increased. For example, when a quartz substrate is used, the heating temperature can be increased to about 1000 ° C.

When the temperature is increased, there is an advantage that the time of the heat treatment can be shortened and higher crystallinity can be obtained.

In the above crystallization step, the nickel element held in contact with the surface of the amorphous silicon film 103 diffuses into the film. And, it greatly contributes to the crystallization of the amorphous silicon film 103.

Next, as shown in FIG. 1D, a heat treatment for removing nickel elements remaining in the crystalline silicon film 105 used for crystallization is performed. This heat treatment is performed at a temperature of 600 ° C. in a nitrogen atmosphere containing a halogen element.

Here, heat treatment is performed at 600 ° C. for 10 minutes in an atmosphere in which HCl is added at 3% in a nitrogen atmosphere.

The concentration of HCl in the atmosphere is 1 to 1
It is preferably set to 0%. Care must be taken that if the concentration is higher than this, the surface of the silicon film is roughened. If the concentration is lower than this, the gettering effect is weakened.

It is also useful to add oxygen to the atmosphere of the heat treatment. In this case, the effect of flattening the roughness of the silicon film surface due to the halogen element by forming the oxide film can be obtained. The amount of added oxygen may be adjusted so that the concentration of oxygen in the atmosphere is 20 to 50%.

The lower limit of the heat treatment temperature is preferably 450 ° C. or more in view of the effect and reproducibility. It is important that the upper limit is set to be equal to or lower than the strain point of the glass substrate 101 used.

Therefore, if a quartz substrate is used, an additional 10
The heating temperature can be further increased to about 00 ° C. In this case, the effect of removing the nickel element can be further enhanced. Further, the processing time can be shortened.

However, since the etching effect on the silicon film becomes remarkable, it is necessary to reduce the concentration of the halogen element and to add oxygen.

In addition to the nitrogen atmosphere, a gas generally called an inert gas can be used. Specifically, one or a plurality of gases selected from Ar, He, and Ne can be used.

As a gas for introducing a halogen element, HF, HBr, Cl2, F2, Br
One, two or more kinds selected from 2, NF3 and ClF3 can be used. These gases have a content (volume content) in the atmosphere of 0.3 to 0.3 if it is HF.
10%, 1-20% for HBr, and 1% for Cl2
It is preferably 0.3 to 5%, 0.1 to 3% for F2, and 0.3 to 10% for Br2.

By performing the heat treatment again in the atmosphere containing the halogen element, the concentration of the nickel element can be reduced to 1/10 or less of the initial concentration. This means that the nickel element can be reduced to 1/10 or less as compared with the case where no gettering by the halogen element is performed. This effect can be obtained even when another metal element that promotes crystallization of silicon is used.

For example, in a crystalline silicon film crystallized by a heat treatment in a nitrogen atmosphere using a nickel element, 1 × 10 19 cm −3 to 5 × 10 19 cm is measured by SIMS (secondary ion analysis method). At a concentration of about -3, nickel element is observed.

On the other hand, when the method described in this embodiment is adopted, the detected nickel concentration is 1 × 10 18 cm.
-3 to 5 x 1018 cm-3. Of course, the conditions for introducing nickel are the same.

In this embodiment, an example is shown in which a nickel element is introduced using a solution because of its good controllability and simplicity. However, a method of forming nickel or a film containing nickel by a CVD method or a sputtering method may be used. Alternatively, a method in which the nickel element is held in contact with the surface of the amorphous silicon film by an adsorption method may be used.

The same applies to the case where another metal element which promotes crystallization of silicon is used.

[Embodiment 2] The present embodiment relates to an example in which crystal growth of a form different from that of Embodiment 1 is performed. The present embodiment relates to a method of performing crystal growth in a direction parallel to a substrate called lateral growth using a metal element that promotes crystallization of silicon.

FIG. 2 shows the manufacturing process of this embodiment. First,
A silicon oxynitride film 202 is formed on a Corning 1737 glass substrate (a quartz substrate may be used) as a base film to a thickness of 3000.

Next, an amorphous silicon film 203 is formed to a thickness of 500 by the low pressure thermal CVD method.

Next, a silicon oxide film (not shown) is formed to a thickness of 1500.
A mask indicated by 04 is formed. An opening is formed in a region indicated by 205 of the mask 204, and the underlying amorphous silicon film 203 is exposed in the opening 205.

The opening 205 has an elongated rectangular shape having a longitudinal direction in the depth direction and the near side direction in the drawing. The width of the opening 205 may be 20 μm or more. The length in the longitudinal direction may be arbitrarily determined.

Then, 10 p in terms of weight shown in Example 1
A nickel acetate solution containing pm of nickel element is applied. Then, excess solution is blown off using a spin coater.

In this way, as shown by the dotted line 206, a state is obtained in which the nickel element is held in contact with the surface of the exposed amorphous silicon film 203 and the surface of the mask 204 made of a silicon oxide film. (Fig. 2 (A))

Next, heat treatment is performed at 600 ° C. for 4 hours in a nitrogen atmosphere containing as little oxygen as possible. Then, crystal growth parallel to the substrate as indicated by an arrow 207 in FIG. 2B proceeds. This crystal growth proceeds from the region of the opening 205 into which the nickel element has been introduced toward the periphery. The crystal growth in the direction parallel to the substrate is called lateral growth or lateral growth.

This lateral growth can be performed over 100 μm. Thus, a silicon film 208 having a laterally grown region is obtained. In this state, a lateral growth region and a region that has not reached crystal growth (having an amorphous state) are present in the silicon film 208. (FIG. 2 (B))

Then, the mask 204 made of a silicon oxide film for selectively introducing a nickel element is removed, and FIG.
The state shown in (C) is obtained.

In this state, 600% of HCl, 5% of oxygen, and 90% of nitrogen are added.
Heat treatment at 10 ° C. for 10 minutes.

In this manner, the concentration of the nickel element in the silicon film 208 can be reduced as described in the first embodiment.

Next, patterning is performed to form a pattern 209 consisting of a lateral growth region. Here, it is important that the pattern 209 does not have a starting point and an ending point of crystal growth.

This is because the nickel element is contained at a relatively high concentration at the starting point and the ending point of the crystal growth.

The concentration of the nickel element remaining in the pattern 209 of the lateral growth region obtained in this manner can be further reduced as compared with the case shown in the first embodiment.

This is because the concentration of the metal element contained in the lateral growth region is lower than that of the crystalline silicon film obtained by the crystal growth method as shown in the first embodiment. Then, by performing heat treatment in an atmosphere containing a halogen element, the concentration can be further reduced.
Specifically, the concentration of the nickel element in the pattern 209 in the lateral growth region can be set to the order of 1017 cm-3.

The device is designed so that the lateral growth direction and the carrier moving direction are substantially the same.
A device having higher mobility can be obtained as compared with the case where the crystal growth method as shown in Embodiment 1 is used.

[Embodiment 3] In this embodiment, a thin film transistor to be arranged in a pixel region of an active matrix type liquid crystal display device or an active matrix type EL display device is manufactured using the invention disclosed in this specification. An example is shown below.

FIG. 3 shows a manufacturing process of this embodiment. First,
A crystalline silicon film is formed on a glass substrate by the steps described in Embodiment 1 or 2. Then, by patterning it, the state shown in FIG. 3A is obtained.

In the state shown in FIG. 3A, 301 is a glass substrate, 302 is a base film, and 303 is a semiconductor layer formed of a crystalline silicon film. Here, the base film 302 is preferably formed using a silicon oxynitride film. It is preferable that the silicon oxynitride film contain a halogen element. This is because the gettering action of metal ions and mobile ions by the halogen element is used.

After obtaining the state shown in FIG. 3A, a silicon oxynitride film 304 constituting a gate insulating film is formed to a thickness of 1000. The film formation method is a plasma CVD method using a mixed gas of oxygen, silane, and N 2 O, or TEOS.
A plasma CVD method using a mixed gas of N 2 and N 2 O is used.

The inclusion of a halogen element in the silicon oxynitride film is caused by the effect of the nickel element (other metal elements that promote crystallization of silicon) in the semiconductor layer 303, which causes This is useful in the sense of preventing the function from being lowered.

The use of a silicon oxynitride film is significant in that a metal element is less likely to enter the gate insulating film due to its dense film quality. When a metal element enters the gate insulating film, its function as an insulating film is reduced, which causes instability and variation in characteristics of the thin film transistor.

As the gate insulating film, a commonly used silicon oxide film can be used.

After forming the silicon oxynitride film 304 functioning as a gate insulating film, an aluminum film (not shown) functioning as a gate electrode is formed later by a sputtering method. The aluminum film contains scandium at 0.2% by weight.

The reason why scandium is contained in the aluminum film is to suppress generation of hillocks and whiskers in a later step. Hillocks and whiskers are needle-like or stab-like projections generated by heating. Hillocks and whiskers are thought to be due to abnormal growth of aluminum.

After forming the aluminum film, an anodic oxide film having a dense film quality (not shown) is formed. This anodic oxide film is formed by using an ethylene glycol solution containing 3% tartaric acid as an electrolytic solution.

In this electrolytic solution, anodic oxidation is performed by using the aluminum film as an anode and platinum as a cathode to form an anodic oxide film having a dense film quality on the surface of the aluminum film.

The thickness of the anodic oxide film having a dense film quality (not shown) is about 100. The anodic oxide film has a role of improving the adhesion to a resist mask to be formed later.

The thickness of the anodic oxide film can be controlled by the voltage applied during anodic oxidation.

Next, a resist mask 306 is formed. Then, the aluminum film is patterned into a pattern indicated by 305. Thus, the state shown in FIG. 3B is obtained.

Here, anodic oxidation is performed again. here,
A 3% oxalic acid aqueous solution is used as the electrolytic solution. By performing anodic oxidation using the aluminum pattern 305 as an anode in this electrolytic solution, a porous anodic oxide film 308 is formed.

In this step, the anodic oxide film 308 is selectively formed only on the side surfaces of the aluminum pattern 305 due to the presence of the resist mask 306 having high adhesion on the top.
Is formed.

The anodic oxide film 308 has a thickness of several μm.
Can grow up to. Here, the film thickness is 6
000. The growth distance can be controlled by the anodic oxidation time.

Then, a dense anodic oxide film is formed again. That is, anodic oxidation using the ethylene glycol solution containing 3% tartaric acid as the electrolytic solution is performed again. Then, an anodic oxide film having a dense film quality is formed as indicated by 309 because the electrolytic solution enters the porous anodic oxide film 308. The thickness of the dense anodic oxide film 309 is 1000. (FIG. 3 (C))

Here, the exposed portions of the silicon oxynitride film 3
04 is etched. It is useful to use dry etching for this etching. Further, a porous anodic oxide film 3 is formed using a mixed acid obtained by mixing acetic acid, nitric acid and phosphoric acid.
08 is removed. Thus, the state shown in FIG. 3D is obtained.

When the state shown in FIG. 3D is obtained, impurity ions are implanted. Here, P (phosphorus) ions are implanted by a plasma doping method in order to manufacture an N-channel thin film transistor.

In this step, the heavyly doped regions 311 and 315 and the lightly doped 312
And 314 are formed. This is because part of the remaining silicon oxide film 310 functions as a semi-transparent mask, and part of the implanted ions is shielded there.

By irradiating laser light or strong light, the region into which the impurity ions have been implanted is activated. Thus, the source region 311, the channel formation region 313, the drain region 315, the low concentration impurity region 312
And 314 are formed in a self-aligned manner.

Here, what is indicated by 314 is LDD.
This is a region called a (lightly doped drain) region.
(FIG. 3 (D))

The thickness of the dense anodic oxide film 309 is 2
When the thickness is set to 000 · or more, an offset gate region can be formed outside the channel formation region 313 with the thickness.

Although an off-gate region is also formed in this embodiment, its contribution is small due to its small size, and the drawing is complicated, so that it is not shown in the drawing.

Next, a silicon oxide film is used as the interlayer insulating film 316,
Alternatively, a silicon nitride film or a stacked film thereof is formed. Alternatively, as the interlayer insulating film 316, a layer made of a resin material may be formed over a silicon oxide film or a silicon nitride film.

Then, a contact hole is formed, and a source electrode 317 and a drain electrode 318 are formed. Thus, the thin film transistor shown in FIG. 3E is completed.

[Embodiment 4] This embodiment relates to a method for forming a gate insulating film 304 in the structure shown in the practical example 3. When a quartz substrate or a glass substrate having high heat resistance is used as the substrate, it is preferable to use a thermal oxidation method as a method for forming the gate insulating film.

An oxide film formed by the thermal oxidation method is one of the most suitable as a gate insulating film because there is no dense and movable electric charge as an insulating film.

As a method for forming a thermal oxide film, an example in which a treatment is performed in an oxidizing atmosphere at a temperature of 950 ° C. can be given.

At this time, it is effective to mix HCl or the like in an oxidizing atmosphere. By doing so, the metal element existing in the semiconductor layer 303 can be removed at the same time as the formation of the thermal oxide film.

It is also effective to mix N 2 O gas in an oxidizing atmosphere to form a thermal oxide film containing a nitrogen component. Here, by optimizing the mixing ratio of the N2O gas, it is possible to obtain a silicon oxynitride film by a thermal oxidation method.

Here, an example in which the gate insulating film is formed by the thermal oxidation method has been described. However, as another method, heat C
A gate insulating film can be formed by the VD method.
Also in this case, it is effective to use N2O or ammonia to contain a nitrogen component.

[Embodiment 5] This embodiment shows an example in which a thin film transistor is manufactured by a process different from that of the embodiment 3 shown in FIG.

FIG. 4 shows a manufacturing process of this embodiment. First,
A crystalline silicon film is formed on a glass substrate by the steps described in Embodiment 1 or 2. Then, by patterning it, the state shown in FIG. 4A is obtained.

In the state shown in FIG. 4A, reference numeral 401 denotes a glass substrate, 402 denotes a base film, and 403 denotes a semiconductor layer formed of a crystalline silicon film. Here, the base film 402 is preferably formed using a silicon oxynitride film.

After the state shown in FIG. 4A is obtained, a silicon oxynitride film 404 constituting a gate insulating film is formed to a thickness of 1000. The film formation method is a plasma CVD method using a mixed gas of oxygen, silane, and N 2 O, or TEOS.
A plasma CVD method using a mixed gas of N 2 and N 2 O is used.

As the gate insulating film, a commonly used silicon oxide film can be used.

After forming the silicon oxynitride film 404 functioning as a gate insulating film, an aluminum film (not shown) functioning as a gate electrode is formed later by a sputtering method. The aluminum film contains scandium at 0.2% by weight.

After forming the aluminum film, a dense anodic oxide film (not shown) is formed. This anodic oxide film is 3%
An ethylene glycol solution containing tartaric acid is used as an electrolytic solution. That is, in this electrolytic solution, by performing anodization using the aluminum film as an anode and platinum as a cathode,
An anodic oxide film having dense film quality is formed on the surface of the aluminum film.

The thickness of the anodic oxide film having a dense film quality (not shown) is about 100. The anodic oxide film has a role of improving the adhesion to a resist mask to be formed later.

The thickness of the anodic oxide film can be controlled by the voltage applied during anodic oxidation.

Next, a resist mask 405 is formed. Then, the aluminum film is patterned into a pattern indicated by 406.

Here, anodic oxidation is performed again. here,
A 3% oxalic acid aqueous solution is used as the electrolytic solution. By performing anodic oxidation using the aluminum pattern 406 as an anode in this electrolytic solution, a porous anodic oxide film 407 is formed.

In this step, the anodic oxide film 407 is selectively formed on the side surface of the aluminum pattern 406 due to the presence of the resist mask 405 having high adhesion on the upper part.

The anodic oxide film 407 has a thickness of several μm.
m can be grown. Here, the film thickness is 6000 ·. The growth distance can be controlled by the anodic oxidation time.

Thus, the state shown in FIG. 4B is obtained. Then, a dense anodic oxide film is formed again. That is, anodic oxidation using the ethylene glycol solution containing 3% tartaric acid as the electrolytic solution is performed again. Then, since the electrolytic solution enters into the porous anodic oxide film 407, the surface of the pattern 406 made of aluminum is oxidized, and as shown by 408, an anodic oxide film having a dense film quality is formed. (FIG. 4 (C))

In the state shown in FIG. 4C, the first implantation of impurity ions is performed. This step may be performed after the resist mask 405 is removed.

By the implantation of the impurity ions, a source region 409 and a drain region 411 are formed. No impurity ions are implanted into the region 410.

Next, the porous anodic oxide film 407 is removed using a mixed acid obtained by mixing acetic acid, nitric acid and phosphoric acid. Thus, the state shown in FIG. 4D is obtained.

After the state shown in FIG. 4D is obtained, impurity ions are implanted again. The impurity ions are formed under light doping conditions from the initial impurity ion implantation conditions.

In this step, the lightly doped region 41
2 and 413 are formed. Then, a channel formation region indicated by 414 is formed. (FIG. 4 (D))

By irradiating laser light or strong light, the region into which the impurity ions have been implanted is activated. Thus, the source region 409, the channel formation region 414, the drain region 411, and the low concentration impurity region 412
And 413 are formed in a self-aligned manner.

Here, what is indicated by 413 is LDD.
This is a region called a (lightly doped drain) region.
(FIG. 4 (D))

Next, a silicon oxide film is used as the interlayer insulating film 415,
Alternatively, a silicon nitride film or a stacked film thereof is formed. The interlayer insulating film 415 may be formed by forming a layer made of a resin material on a silicon oxide film or a silicon nitride film.

Then, a contact hole is formed, and a source electrode 416 and a drain electrode 417 are formed. Thus, the thin film transistor shown in FIG. 4E is completed.

[Embodiment 6] This embodiment relates to an example in which an N-channel thin film transistor and a P-channel thin film transistor are configured to be complementary.

The configuration shown in this embodiment can be used, for example, for various thin film integrated circuits integrated on an insulating surface. Further, for example, it can be used for a peripheral driving circuit of an active matrix type liquid crystal display device.

First, as shown in FIG.
A silicon oxide film or a silicon oxynitride film is formed as a base film 502 over the substrate 01. Preferably, a silicon oxynitride film is used.

Further, an amorphous silicon film (not shown) is formed by a plasma CVD method or a low pressure thermal CVD method. Further, the amorphous silicon film is transformed into a crystalline silicon film by the method described in the first or second embodiment.

Then, the obtained crystalline silicon film is patterned to obtain semiconductor layers 503 and 504. FIG.
The state shown in FIG.

Further, a silicon oxynitride film 505 constituting a gate insulating film is formed. Here, if quartz is used as the substrate, it is preferable to use the above-described thermal oxidation method.
(FIG. 5 (A))

Thereafter, an aluminum film (not shown) for forming a gate electrode is formed to a thickness of 4000. Other than the aluminum film, an anodizable metal (for example, tantalum) can be used.

After forming the aluminum film, an extremely thin and dense anodic oxide film is formed on the surface by the above-described method.

Next, a resist mask (not shown) is arranged on the aluminum film, and the aluminum film is patterned to form patterns 506 and 507. Then, anodic oxidation is performed using the obtained aluminum patterns 506 and 507 as anodes to form porous anodic oxide films 508 and 509.
To form The porous anodic oxide films 508 and 509
Is 5000.

Further, anodic oxidation is performed again under the conditions for forming a dense anodic oxide film, and dense anodic oxide films 510 and 511 are formed.
To form Here, the thickness of the dense anodic oxide films 510 and 511 is 800. Thus, the state shown in FIG. 5B is obtained.

Further, the exposed portions of the silicon oxide film 505 are removed by dry etching to obtain gate insulating films 512 and 513 as shown in FIG.

Next, as shown in FIG. 5D, the porous anodic oxide films 508 and 509 are removed using a mixed acid obtained by mixing acetic acid, nitric acid and phosphoric acid.

Here, resist masks are alternately arranged so that P ions are implanted into the left semiconductor layer 503 and B ions are implanted into the right semiconductor layer 504.

By implanting the impurity ions, a source region 514 and a drain region 517 having a high concentration of N-type are formed.
Are formed in a self-aligned manner.

Further, a region 515 having a weak N-type doped with P ions at a low concentration is simultaneously formed. Also,
The channel formation region 516 is formed at the same time.

A region having a weak N-type shown by 515 is formed because the gate insulating film 512 exists. That is, part of P ions passing through the gate insulating film 512 is shielded by the gate insulating film 512.

According to the same principle, a source region 521 and a drain region 518 having a strong P type are formed in a self-aligned manner. Further, the low concentration impurity region 520 is formed at the same time. Further, a channel formation region 519 is formed at the same time.

When the dense anodic oxide films 510 and 511 are as thick as 2000.multidot., The offset gate regions can be formed in contact with the channel forming regions 516 and 519 with such thicknesses.

In the case of this embodiment, the dense anodic oxide film 51
Since the film thicknesses of 0 and 511 are as thin as 1000 * or less, their existence can be ignored.

Then, laser light or strong light irradiation is performed to anneal the region into which the impurity ions have been implanted.

As shown in FIG. 5E, a silicon nitride film 522 and a silicon oxide film 523 are formed as interlayer insulating films. Each film thickness is 1000. Note that the silicon oxide film 523 may not be formed.

Here, the thin film transistor is covered with the silicon nitride film 522. Since the silicon nitride film is dense and has good interface characteristics, with such a structure, the reliability of the thin film transistor can be increased.

Further, an interlayer insulating film 524 made of a resin material is formed by spin coating. Here, the thickness of the interlayer insulating film 524 is 1 μm at the minimum. (FIG. 5
(E))

Then, a contact hole is formed, and the source electrode 52 of the N channel type thin film transistor on the left side is formed.
5 and a drain electrode 526 are formed. At the same time, the drain electrode 526 and the source electrode 5 of the right thin film transistor
27 are formed. Here, the electrode 526 is arranged commonly to the two thin film transistors.

In this manner, a thin film transistor circuit having a complementary CMOS structure can be formed.

In the structure shown in this embodiment, a structure is obtained in which the thin film transistor is covered with a nitride film and further covered with a resin material. With this configuration, it is possible to make the structure highly durable, in which mobile ions and moisture do not easily enter.

[Embodiment 7] In this embodiment, the crystalline silicon film obtained in the embodiment 1 or 2 is further irradiated with a laser beam so that a single crystal or substantially a single crystal is obtained. The present invention relates to a configuration for forming a region that can be considered.

First, as shown in Embodiment 1, a crystalline silicon film is obtained by utilizing the action of the nickel element. Then, the film is irradiated with an excimer laser (for example, a KrF excimer laser) to further promote its crystallinity.

The film whose crystallization was greatly promoted by such a method has an electron spin density of 3 × 10 1 measured by ESR.
7 cm −3 or less, and the nickel element concentration was 3 × 10 17 cm −3 as the lowest value measured by SIMS.
It has a region which can be regarded as a single crystal as described below.

In this region, there is substantially no crystal grain boundary, and high electrical characteristics comparable to a single crystal silicon wafer can be obtained.

The region which can be regarded as a single crystal contains 5 atomic% or less to about 1 × 10 15 cm −3 of hydrogen.
This value is clarified by measurement by SIMS (secondary ion analysis method).

By manufacturing a thin film transistor using such a single crystal or a region that can be regarded as a single crystal, a transistor comparable to a MOS transistor manufactured using a single crystal wafer can be obtained.

[Embodiment 8] This embodiment shows an example in which a gate insulating film is formed by a thermal CVD method in the process of manufacturing a thin film transistor as shown in FIGS.
When a gate insulating film is formed by a thermal CVD method, it is necessary to heat the gate insulating film at a high temperature. Therefore, it is preferable to use quartz as a substrate.

Here, an example is shown in which a gate insulating film is formed by a reduced pressure thermal CVD method at 850 ° C. using an oxygen gas containing 3% by volume of HCl. The gate insulating film obtained by such a method can be made such that its electrical characteristics are unlikely to change due to entry of a metal element present in the active layer.

[Embodiment 9] This embodiment shows an example in which a nickel element is directly introduced into the surface of the base film 102 shown in FIG. In this case, the nickel element is held in contact with the lower surface of the amorphous silicon film 103.

[0165]

By utilizing the invention disclosed in this specification, a technique for reducing the concentration of a metal concentration element in a crystalline silicon film obtained by using a metal element that promotes crystallization of silicon is provided. Can be provided.

By utilizing this technique, a thin film semiconductor device having higher reliability and excellent performance can be obtained.

[Brief description of the drawings]

FIG. 1 is a view showing a step of obtaining a crystalline silicon film.

FIG. 2 is a view showing a step of obtaining a crystalline silicon film.

FIG. 3 illustrates a process for manufacturing a thin film transistor.

FIG. 4 is a diagram showing a process for manufacturing a thin film transistor.

FIG. 5 is a diagram showing a process for manufacturing a thin film transistor.

[Explanation of symbols]

Reference Signs List 101 glass substrate or quartz substrate 102 base film (silicon oxide film or silicon oxynitride film) 103 amorphous silicon film 104 water film of a solution containing nickel 105 crystalline silicon film 201 glass substrate or quartz substrate 202 base film (oxidation (Silicon film or silicon oxynitride film) 203 Amorphous silicon film 204 Mask made of silicon oxide film 205 Opening 206 Nickel held in contact with 207 Crystal growth direction parallel to substrate 207 Silicon film 209 Patterned Silicon film

 ──────────────────────────────────────────────────の Continued on the front page (72) Inventor Shoji Miyanaga 398 Hase, Atsugi-shi, Kanagawa Prefecture Inside Semi-Conductor Energy Laboratory Co., Ltd.

Claims (17)

[Claims] An amorphous silicon film is formed on an insulating surface, a first heat treatment is performed on the amorphous silicon film, and the amorphous silicon film is crystallized to form a crystalline silicon film. A method for manufacturing a semiconductor device in which a second heat treatment is performed on the crystalline silicon film in an atmosphere having an inert gas, wherein the second heat treatment is performed at a higher temperature than the first heat treatment, After performing the second heat treatment, the crystalline silicon film is 3 ×
A method for manufacturing a semiconductor device, having a spin density of 10 ¹⁷ cm ⁻³ or less. 2. The method according to claim 1, wherein the inert gas is Ar, N ₂ , He or Ne. 3. The atmosphere is HCl, HF, HBr, Cl.
_2, according to claim 1 or 2, characterized in that it has a simple halogen or a halogen compound consisting F ₂ or Br ₂
3. The method for manufacturing a semiconductor device according to 1. 4. The method for manufacturing a semiconductor device according to claim 1, wherein said amorphous silicon film contains a metal element for promoting crystallization. 5. The method according to claim 4, wherein after the second heat treatment, the crystalline silicon film contains a metal element at a concentration of 3 × 10 ¹⁷ cm ⁻³ or less. . 6. The method according to claim 4, wherein the second heat treatment is performed for gettering the metal element from the crystalline silicon film. 7. The method according to claim 4, wherein said metal element is reduced to 1/10 or less by said second heat treatment.
The method for manufacturing a semiconductor device according to any one of the above. 8. The hydrogen concentration in the crystalline silicon film is 2.5 ×
The method for manufacturing a semiconductor device according to claim 1, wherein the thickness is 10 ²¹ to 1 × 10 ¹⁵ cm ⁻³ . 9. The method for manufacturing a semiconductor device according to claim 1, wherein the first heat treatment and the second heat treatment are performed by the same method. 10. An amorphous silicon film is formed on an insulating surface, the amorphous silicon film is crystallized to form a crystalline silicon film, and the crystalline silicon film is formed in an atmosphere containing an inert gas. A method for manufacturing a semiconductor device, comprising performing heat treatment and irradiating a laser beam to the crystalline silicon film, wherein the crystalline silicon film has a spin density of 3 × 10 ¹⁷ cm ⁻³ or less. Method of manufacturing. 11. The method according to claim 10, wherein said inert gas is Ar, N ₂ , He or Ne. 12. The atmosphere is HCl, HF, HBr, C
The method for manufacturing a semiconductor device according to claim 10, further comprising a halogen alone or a halogen compound made of l ₂ , F _2, or Br ₂ . 13. The method according to claim 10, wherein the amorphous silicon film contains a metal element that promotes crystallization. 14. After the heat treatment, the crystalline silicon film becomes 3%.
The method for manufacturing a semiconductor device according to claim 13, comprising a metal element at a concentration of × 10 ¹⁷ cm ⁻³ or less. 15. The method according to claim 15, wherein the metal element is subjected to 1 /
13. The method according to claim 13, wherein the number is reduced to 10 or less.
5. The method for manufacturing a semiconductor device according to item 4. 16. The crystalline silicon film has a hydrogen content of 2.5 × 10
^The method for manufacturing a semiconductor device according to claim 10, wherein the concentration is ²¹ to 1 × 10 ¹⁵ cm ⁻³ . 17. The method according to claim 10, wherein the crystallization and the heating are performed by the same method.