JP2001136405A - Video signal display device of reciprocating deflection type - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a video signal display device of reciprocating deflection type that offers simple and inexpensive adjustment in the case that the number of scanning lines per field is an odd number or in the case of the interlaced scanning. SOLUTION: The video signal display device of reciprocating deflection type is provided with a reciprocating scanning video signal conversion means that converts a input video signal formed according to the unidirectional horizontal deflection scanning into a video signal according to the reciprocating horizontal deflection scanning, the reciprocating scanning video signal conversion means delays a video signal according to the reciprocating horizontal deflection scanning for one horizontal scanning period for one field or at an interval of one frame, outputs the delayed signal when the number of scanning lines per one field of video signal is an odd number or the number of the scanning lines per one frame of video image consisting of a plurality of video fields and formed through the interlaced scanning is an odd number and scans the position of the corresponding scanning line before one field or one frame with the video signal delayed by one horizontal scanning period and outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal display device using a cathode ray tube and, more particularly, to a reciprocating deflection type video signal display device for performing video scanning by reciprocal horizontal deflection, which is suitable for displaying high definition video information. Things.

[0002]

2. Description of the Related Art In recent years, image quality has been improved with the enlargement of television screens. As means for improving the image quality of a television, means for converting a conventional interlaced scanning video into a progressive scanning video and displaying the converted video is often used. When the number of scanning lines is doubled by the above processing, the horizontal scanning frequency is changed from 15.73 kHz of the conventional video to 31.5 kHz. Further, high-definition horizontal scanning is required for high-definition televisions and displays that display images of personal computers that are currently under consideration.

In general, a television of a unidirectional scan system requires a switching element having a high withstand voltage capable of withstanding a high voltage of a horizontal deflection pulse generated during a horizontal flyback period. The power loss of the switching element also increases.

As a method for solving the above-mentioned problem associated with the increase in the horizontal scanning frequency, a reciprocating deflection type video signal display device in which horizontal video scanning is reciprocated is disclosed in Japanese Patent Application Laid-Open No. H8-17254.
No. 3 publication.

[0005]

As described in the above publication, the use of a reciprocating deflection type horizontal deflection output circuit eliminates the high voltage horizontal deflection pulse generated during the horizontal flyback period. A switching element having a low withstand voltage can be used. Thereby, power loss in the switching element can be reduced.

Although the reciprocating deflection type video signal display device has the above-mentioned advantages, if the horizontal deflection is simply set to the reciprocating deflection type, the number of scanning lines per field in the interlaced scanning is odd. A phenomenon occurs in which the horizontal scanning direction of the scanning line is inverted every other frame or every other field.

For example, a progressive scan format (one field 52) in which the NTSC video signal is doubled in speed is used.
In a five-field scanning line structure), if the first scanning line in a certain field is left-to-right scanning, then in the next field, the first scanning line is right-to-left scanning.
The scanning direction is reversed every other field. Actually, since the horizontal linearity, the horizontal deflection phase, and the like are different between going and returning scanning, fine adjustment means for each pixel is required. As the fine adjustment means, there is a digital convergence used in a projection display device. However, there is a problem that the memory for storing the correction waveform data is increased, and adjustment between frames or fields, which becomes an expensive circuit, becomes necessary, and the adjustment process becomes complicated.

It is an object of the present invention to provide a reciprocating deflection type video signal display device which is inexpensive and has a simple adjustment process even when the number of scanning lines per field is odd in interlaced scanning.

[0009]

The reciprocating deflection type video signal display device of the present invention achieves the above object by the following constitution.

That is, the first invention according to claim 1 of the present invention provides a cathode ray tube, a cathode ray tube driving circuit thereof, a horizontal deflection coil, scanning for deflecting the electron beam from left to right, and right scanning for the electron beam. Horizontal deflection coil driving circuit, vertical deflection coil and its driving circuit for supplying a deflection current to the horizontal deflection coil for performing reciprocal horizontal deflection scanning for alternately performing scanning to deflect from left to right, and unidirectional horizontal deflection scanning And a reciprocal scanning video signal converting means for converting a video input signal formed corresponding to the reciprocating horizontal deflection scanning into a video signal corresponding to the reciprocating horizontal deflection scanning. A video signal corresponding to the reciprocating horizontal deflection scanning is output with a delay of one horizontal scanning period every other field and output. It is a place.

According to a second aspect of the present invention, there is provided a cathode ray tube, a cathode ray tube driving circuit thereof, a horizontal deflection coil, scanning for deflecting the electron beam from left to right, and right scanning for the electron beam. Horizontal deflection coil driving circuit, vertical deflection coil and its driving circuit for supplying a deflection current to the horizontal deflection coil for performing reciprocal horizontal deflection scanning for alternately performing scanning to deflect from left to right, and unidirectional horizontal deflection scanning A reciprocating scanning video signal converting means for converting a video input signal formed corresponding to the reciprocating horizontal deflection scanning into a video signal corresponding to the reciprocating horizontal deflection scanning, the reciprocating scanning video signal converting means comprises a plurality of video fields, When the number of scanning lines per frame of an image formed by interlaced scanning is odd,
A reciprocating deflection type video signal display device characterized in that a video signal corresponding to the reciprocating horizontal deflection scanning is output with a delay of one horizontal scanning period every other frame.

According to a third aspect of the present invention, in the reciprocating deflection type video signal display device according to the first or second aspect, the drive circuit for the vertical deflection coil is provided with the first deflection coil.
A means for moving a horizontal scanning line corresponding to a video signal output after being delayed by a horizontal period by one horizontal scanning line on the screen of the cathode ray tube by one horizontal scanning line is provided.

According to a fourth aspect of the present invention, in the reciprocating deflection type video signal display device according to the first or second aspect, the auxiliary vertical deflection coil and the auxiliary vertical deflection coil are driven. An auxiliary vertical deflection coil driving circuit, wherein a horizontal scanning line corresponding to the video signal output after being delayed by the one horizontal period is moved to a position preceding by one horizontal scanning line on the screen of the cathode ray tube. It is a feature.

According to a fifth aspect of the present invention, in the reciprocating deflection type video signal display device according to the first aspect, a field discriminating means for discriminating between an odd field and an even field is provided. It is a feature.

According to a sixth aspect of the present invention, in the reciprocating deflection type video signal display device according to the second aspect, a frame discriminating means for discriminating between odd frames and even frames is provided. It is a feature.

According to a seventh aspect of the present invention, in the reciprocating deflection type video signal display device according to the third aspect, the vertical deflection driving circuit is a DC amplification type amplifier. Is what you do.

[0017]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) A first embodiment of the present invention will be described with reference to FIGS. The reciprocating deflection type video signal display device described in the first embodiment performs the process of reciprocating the horizontal deflection operation and reciprocating the video signal, and also sets the number of horizontal scanning lines to the NTSC skipping used in the current television system. A double-speed scanning line conversion process for converting from 262.5 lines in the scanning system to 525 lines in the sequential scanning system is also performed at the same time.

FIG. 1 is a block diagram for explaining a first embodiment of a reciprocating deflection type video signal display device according to the present invention, and FIG.
FIG. 3 is a block diagram of a reciprocating scanning video conversion circuit according to the first embodiment, FIG. 3 is an operation waveform diagram illustrating the operation of the reciprocating scanning video conversion circuit, FIG. 4 is a circuit configuration diagram of a reciprocating horizontal deflection circuit, and FIG. FIG. 6 is an operation waveform diagram for explaining the operation of the reciprocating horizontal deflection circuit, FIG. 6 is a block diagram of the vertical deflection circuit in the present embodiment, FIG. 7 is an operation waveform diagram for explaining the operation of the vertical deflection circuit, and FIG. FIG. 1 is a schematic diagram showing a structure of a scanning line scanned by a reciprocating deflection type video signal display device to which the present embodiment is applied.

In FIG. 1, reference numeral 21 denotes an input terminal of an NTSC composite video signal, 22 denotes a Y / C separation circuit for separating an NTSC composite video signal into a luminance signal and a chrominance signal, and 19
Is a double speed signal conversion circuit for converting the output of the Y / C separation circuit 22 to a double speed video signal; 17 is a sync separation circuit for generating a vertical synchronizing signal and a horizontal synchronizing signal from the double speed video signal; Reciprocal scanning video conversion circuit for converting to a reciprocal scanning video signal corresponding to the above, 7 is a matrix circuit for creating a primary color signal from a luminance signal and a color difference signal, 12 is a video circuit for amplifying the primary color signal and driving a cathode terminal of a cathode ray tube, 1 Is a reciprocating horizontal deflection circuit, 3 is a vertical deflection circuit,
Reference numeral 15 denotes a horizontal deflection coil, 14 denotes a vertical deflection coil, and 16 denotes a cathode ray tube.

The composite video signal input to the input terminal 21 is separated by a Y / C separation circuit 22 into a luminance signal and a chrominance signal. The double-speed video conversion circuit 19 converts the luminance signal Y and the color difference signal (R−
Y) and (BY) are generated. The synchronization separation circuit 17 converts the double-speed converted luminance signal into a horizontal synchronization signal H.H. SYNC and the vertical synchronizing signal V.V. Generate SYNC.

The reciprocating scanning video conversion circuit 5 includes the luminance signal Y, the color difference signals (RY) and (BY), the vertical synchronizing signal V.V. SYNC and the horizontal synchronizing signal H. From SYNC, a luminance signal Y1 and a color difference signal (R-Y) 1, corresponding to the reciprocal scanning,
(BY) 1 and a horizontal drive signal for driving the reciprocating horizontal deflection circuit. Further, the reciprocating scanning video conversion circuit 5 provides an odd (ODD) field and an even (EDD) field.
An odd (ODD) / even (EVEN) field discrimination signal O / E for discriminating a (VEN) field is generated.

The matrix circuit 7 generates red, green and blue primary color signals R, G and B from the luminance signal Y1, the color difference signals (RY) 1 and (BY) 1. The video circuit 12 amplifies the red, green, and blue primary color signals R, G, and B, and drives the cathode terminal of the cathode ray tube 16. The vertical deflection circuit 3 outputs the vertical synchronization signal V.V. A sawtooth vertical deflection current is supplied to the vertical deflection coil 14 based on the SYN and the odd / even field discrimination signal O / E. The reciprocating horizontal deflection circuit 1 supplies a horizontal deflection current to the horizontal deflection coil 15 for reciprocal horizontal scanning based on the horizontal drive signal.

Next, the operation of the reciprocating scanning video conversion circuit 5 will be described with reference to FIGS. In FIG.
Is an input terminal of the luminance signal Y, and 102 is a color difference signal (RY)
, An input terminal 103 for a color difference signal (BY),
104 is an A / D converter, 105 and 106 are first, second and first
H line memory, 107 and 109 are first and second multiplexers, 108 is a 1H delay circuit, 111 is an output terminal of a reciprocal scanning luminance signal Y1, 112 is a reciprocal scanning color difference signal (R
-Y) 1 output terminal, 113 is a reciprocating scanning color difference signal (B-
Y) 1 output terminal, 118 is a horizontal synchronizing signal H. SYNC
Input terminal 119 is a vertical synchronizing signal V. SYNC input terminals, 120 and 121 are horizontal drive signal output terminals,
Reference numeral 122 denotes an output terminal of a field discrimination signal O / E for discriminating between an odd field and an even field.
132, a Y signal processing circuit, a (RY) signal processing circuit,
(BY) A signal processing circuit.

Reference numeral 134 denotes the write (WRIT) of the Y signal processing circuit 130, the (RY) signal processing circuit 131, and the (BY) signal processing circuit 132, which are signal conversion circuits.
E) REA controlling operation and read (READ) operation
This is a D / WRITE control circuit. In this specification, 1
The horizontal scanning period is referred to as 1H. The read / write control circuit 134 has a horizontal synchronizing signal H.264. SYNC and the vertical synchronizing signal V.V. SYNC is input to generate an odd field / even field discrimination signal O / E (see FIG. 3), perform read / write control of the first 1H line memory 105, and perform first and second two 1H lines. Memory 10
A control signal WR1 for controlling the first multiplexer 107 for selecting any one of the first and the fifth multiplexers 106 (see FIG. 3).
And a control signal WR2 (see FIG. 3) for performing read / write control of the second 1H line memory 106.

(RY) The signal processing circuit 131 and (B-
Y) The operation timing of the signal processing circuit 132 is the same as that of the Y signal processing circuit 130, and the operation of only the Y signal processing circuit 130 will be described.

In the Y signal processing circuit 130, the luminance signal Y inputted from the input terminal 101 is converted by the A / D converter 10.
In step 4, the data is converted into digital data.

First, the operation in the odd field will be described. The second multiplexer 109 includes the 1H delay circuit 10
8 is in a non-selected state. First 1H line memory 10
5 is controlled by a control signal WR1, and performs a write operation when the control signal WR1 is at an H level and performs a read operation when the control signal WR1 is at an L level. The second 1H line memory 106 is controlled by the control signal WR2, and the control signal W
When R2 is at the L level, the write operation is performed and the control signal WR2
Performs a read operation when is at the H level.

The first 1H line memory 105 performs a write operation from the smaller memory address and performs a read operation from the smaller memory address. On the other hand, the second 1H line memory 106 performs a write operation from a memory address having a higher memory address, and performs a read operation from a memory address having a lower memory address.

The first multiplexer 107 controls the control signal W
Controlled by R1, every 1H selects either the first 1H line memory 105 or the second 1H line memory 106.

When the control signal WR1 is at the L level, the first 1
The H line memory 105 is in the read mode, and the video data read therefrom is directly sent to the D / A converter 110 and D / A converted. By these operations, a reciprocating scanning luminance signal Y1 corresponding to the odd-numbered line is obtained.

On the other hand, when the control signal WR1 is at the H level, the second 1H line memory 106 is in the read mode,
The video data read from the D / A converter 110
And is D / A converted. By this operation, a reciprocating scanning luminance signal Y1 corresponding to the even line is obtained.
By these signal processes, the video signal Y1 whose time axis is reversed only in the even-numbered lines is obtained.

Next, the operation in the even field will be described. In the odd field, the video data output from the first and second 1H memories 105 and 106 was directly sent to the D / A converter 110 as described above. On the other hand, in the even field, the second multiplexer 10
9, the 1H delay circuit 108 is selected. 1st, 2nd
The video data from the 1H line memories 105 and 106 are input to the D / A converter 110 with a delay of 1H. Therefore, the even field video signal Y1 is output with a delay of 1H as shown in FIG. 3 with respect to the input luminance signal Y.

A reciprocating horizontal deflection circuit 1 will be described with reference to FIGS.
Will be described. 4, reference numeral 80 denotes an input terminal of a first horizontal drive signal HD1, 81 denotes an input terminal of a second horizontal drive signal HD2, 82 denotes a level shift circuit, and 83 and 84 drive the gates of MOSFETs 85 and 86. Buffer 15 for horizontal deflection coils, 87
Is an output terminal of a reciprocating horizontal deflection circuit, and 88 is an S-shaped correction capacitor for correcting horizontal S-shaped linearity distortion.

The first horizontal drive signal HD1 is applied to the input terminal 80. The horizontal drive signal HD1 is level-shifted by the level shift circuit 82 to the same potential as the output terminal 87, and
Drive 85 gates. On the other hand, a second horizontal drive signal HD2 having a phase opposite to that of the first horizontal drive signal HD1 is applied to the input terminal 81. Horizontal drive signal HD2
Drives the gate of the MOSFET 86 via the buffer 84. As a result, as shown in FIG. OUT appears and the horizontal deflection coil 1
5, a horizontal deflection current IH having a triangular waveform flows. Therefore,
If a certain horizontal scanning line is a scan from the right side to the left side of the screen, the next horizontal scan line is a scan from the left side to the right side of the screen.

Next, the vertical deflection circuit 3 will be described with reference to FIGS.
Will be described. In the reciprocating scanning video conversion circuit 5 described with reference to FIGS. 1 and 2, the video signal output timing is delayed by 1H only in the even field. In the present embodiment, the raster vertical scanning position of the even field is moved upward with respect to the raster vertical scanning position of the odd field.
In FIG. 6, reference numeral 96 denotes a vertical synchronization signal V.V. SYNC input terminal, 90 is a vertical period sawtooth wave. V. SAW1 (see FIG. 7) SAW generator, 91 is an adder, 92 is a vertical deflection output circuit, 93 is a vertical deflection coil, 94 is a detection resistor for converting a vertical deflection current into a voltage, 9
Reference numeral 5 denotes a field discrimination signal O / E input terminal.

The vertical deflection output circuit 92 performs a negative feedback operation by applying the detection voltage of the detection resistor 94 to the inverting input terminal of the vertical deflection output circuit 92. Vertical deflection output circuit 92
Supplies a vertical deflection current proportional to the non-inverting input terminal voltage of the vertical deflection output circuit 92 to the vertical deflection coil 93. V. S
The AW generator 90 outputs a vertical synchronizing signal V.V. Vertical periodic sawtooth wave synchronized with SYNC Generate SAW1.

The adder 91 outputs the vertical period sawtooth wave V.V. An odd field / even field discrimination signal O / E is added to SAW1. The waveform V. SAW2 is applied to the non-inverting input terminal of the vertical deflection output circuit 92. The vertical deflection output circuit 92 outputs the V.V. A vertical deflection current proportional to SAW2 is output.

By the above operation, the raster vertical scanning position of the even field can be moved upward with respect to the raster vertical scanning position of the odd field, so that the vertical scanning positions of the video of the odd field and the even field can be matched.

The vertical position of the raster is corrected as follows.
Instead of the circuit configuration of FIG. 6, an auxiliary deflecting coil and an auxiliary deflecting means for driving the auxiliary deflecting coil are provided, and the vertical position of the raster is set every other field (in the second embodiment described later, 1
A similar effect can be obtained by changing the setting to (frame setting).

FIG. 8 is a schematic diagram showing scanning lines on the screen of the reciprocating deflection type video signal device in the case where the first embodiment is used. 8A shows a scanning line in an odd field, FIG. 8B shows a scanning line in an even field when vertical scanning position correction is not performed by a vertical deflection circuit, and FIG. 8C shows a vertical scanning line in a vertical deflection circuit. This is a scanning line in an even field when the scanning position is corrected.

As shown in FIG. 8A, assuming that the first scanning line of the odd field scans from left to right of the screen, the odd scanning line scans from left to right of the screen. And the even-numbered scanning lines are scanned from right to left on the screen. In the next field, the even field, FIG.
As shown in (b), the first scanning line is scanning from right to left of the screen, and the scanning direction is reversed for odd fields.

In the present embodiment, as described with reference to FIG.
The read timing in the even field is delayed by 1H with respect to the odd field. At this time, in the even field, a blanking signal for performing blanking for 1H period is inserted before the video information V1 (2), and the blanking signal is displayed on the screen by the first scanning line of the even field.

The video information V1 (1) in the odd field is
Although displayed on the screen by the first scanning line L1 (1) in the odd field, the video information V1 (2) in the even field is displayed.
Is displayed on the screen by the second scanning line L2 (2).
The scanning direction when displaying V1 (1) and the scanning direction when displaying V1 (2) are from left to right on the screen, and the scanning directions match. That is, both the scan for displaying the odd-numbered video information in the odd field and the scan for displaying the odd-numbered video information in the even field are in the same direction from left to right on the screen. I have.

However, the vertical scanning positions of the scanning lines of the odd field (see FIG. 8A) and the scanning lines of the even field (see FIG. 8B) do not match. The vertical deflection circuit 3 described with reference to FIG. 6 corrects the vertical scanning position.
By performing the correction of the vertical scanning position of the even-numbered field, the vertical scanning position of the scanning line is outside the screen as shown in FIG. 8C, and the scanning position of the blanking signal is outside the screen. Is the top line. Accordingly, the scanning positions of the scanning lines for the respective pieces of video information in FIGS. 8A and 8C coincide with the scanning positions in the vertical direction.

The projection type display device includes a convergence coil and a convergence coil driving circuit. Even when the convergence coil and the convergence coil driving circuit are used to correct the scanning position in the raster vertical direction between the fields. Good.

According to the first embodiment of the present invention,
Even if the number of scanning lines per field is odd,
The horizontal scanning directions corresponding to the images of the odd field and the even field can be matched. That is, since the scanning direction does not change depending on the field, there is no need to finely adjust the scanning line position between the fields, and the adjustment is simple.

(Second Embodiment) A reciprocating deflection image display apparatus according to a second embodiment of the present invention will be described with reference to FIGS. The reciprocating deflection image display device described in the second embodiment is a high-definition video signal (having one horizontal scanning line).
This is a video display device for displaying 125 lines (interlaced scanning method).

FIG. 9 is a block diagram showing an embodiment of a reciprocating deflection type video display apparatus corresponding to a Hi-Vision signal.
0 is a block diagram of the reciprocating scanning video conversion circuit according to the present embodiment, FIG. 11 is an operation waveform diagram for explaining the operation of the reciprocating deflection video display device of FIG. 9, and FIG. 12 is a vertical deflection circuit according to the present embodiment. FIG. 13 is a schematic diagram showing scanning lines on the screen of the reciprocating deflection type video signal device in the case where the second embodiment is used.

In FIG. 9, reference numeral 31 denotes an input terminal of a luminance signal Y, 32 denotes an input terminal of a color difference signal Pb, 33 denotes an input terminal of a color difference signal Pr, and 144 denotes a reciprocating scan for converting a Hi-Vision video signal into a reciprocal scan video signal. A description of components that are video signal conversion circuits and operate in the same manner as in the first embodiment will be omitted.

The synchronization separating circuit 17 converts the horizontal synchronizing signal H. SYNC and the vertical synchronizing signal V.V. Generate SYNC. The reciprocating scanning video conversion circuit 144 receives the luminance signal Y, the color difference signals Pb and Pr, the horizontal synchronization signal H. SYNC and vertical synchronizing signal SYNC is input, and generates a luminance signal Y1, color difference signals Pb1 and Pr1, and horizontal drive signals HD1 and HD2 for driving a horizontal deflection circuit corresponding to reciprocal scanning. Further, the reciprocating scanning video conversion circuit 144 generates an odd / even frame discrimination signal for discriminating between odd frames and even frames.

The matrix circuit 7 generates primary color signals R, G, B from the luminance signal Y1 and the color difference signals Pb1, Pr1. The video circuit 12 amplifies the primary color signal and drives the cathode terminal of the cathode ray tube 16. Vertical deflection circuit 3
Is the vertical synchronization signal V. A sawtooth vertical deflection current is supplied to the vertical deflection coil 14 based on the SYNC and the odd / even frame discrimination signal. The reciprocating horizontal deflection circuit 1 supplies a horizontal deflection current to the horizontal deflection coil 15 for reciprocal scanning based on the horizontal drive signals HD1 and HD2.

Next, the operation of the reciprocating scanning video conversion circuit 144 will be described with reference to FIGS. In FIG.
Reference numeral 201 denotes an input terminal of the luminance signal Y in the high-definition format, 202 and 203 denote input terminals of the color difference signals Pr and Pb in the high-definition format, 211 denotes an output terminal of the reciprocal scanning luminance signal Y1, and 212 and 213 denote the reciprocal scanning color difference signal Pr1. Pb1 output terminal, 142 is an odd / even frame discrimination signal output terminal, 230, 231, 232
Is a Y signal processing circuit, a Pb signal processing circuit, and a Pr signal processing circuit for converting a Hi-Vision video signal into a reciprocal scanning video signal, 140 is a field discriminating circuit for discriminating odd fields and even fields in interlaced scanning, and 141 is a field discriminating circuit. This is a divide-by-2 circuit that divides the output signal of the field determination circuit 140 by two.

The description of the components that operate in the same manner as in the first embodiment will be omitted. The operation timings of the Pr signal processing circuit 231 and the Pb signal processing circuit 232 are the same as those of the Y signal processing circuit 230, and only the operation of the Y signal processing circuit 230 will be described.

The luminance signal Y input from the input terminal 201
Are converted into digital data in the A / D converter 104.

First, the operation in an odd frame will be described. The second multiplexer 109 is a 1H delay circuit 108
Is in a non-selected state. First 1H line memory 105
Are controlled by WR1, and perform a write operation when WR1 is at H level and perform a read operation when WR1 is at L level. Second
1H line memory 106 is controlled by WR2,
R2 performs a write operation at L level, and WR2 performs a read operation at H level.

The first 1H line memory 105 performs a write operation from the smaller memory address and performs a read operation from the smaller memory address. On the other hand, the second 1H line memory 106 performs a write operation from a memory address having a higher memory address, and performs a read operation from a memory address having a lower memory address.

The first multiplexer 107 controls the control signal W
Controlled by R1, every 1H selects either the first 1H line memory 105 or the second 1H line memory 106.

When the control signal WR1 is at the L level, the first 1
The H line memory 105 is in a read mode, and video data from the H line memory 105 is sent directly to the D / A
A conversion is performed. By this operation, a reciprocating scanning luminance signal Y1 in an odd line is obtained.

When the control signal WR1 is at the H level, the second 1
The H line memory 106 is in the read mode, and the video data from there is sent directly to the D / A converter 110,
/ A conversion. By these operations, a reciprocating scanning luminance signal Y1 on an even line whose time axis is inverted with respect to the input luminance signal Y is obtained.

Next, the operation in an even frame will be described. In the odd-numbered frames, the video data output from the first and second 1H line memories 105 and 106 has been directly sent to the D / A converter 110. On the other hand, in an even frame, 1
The H delay circuit 108 is selected. 1H line memory 105
Video data from and 106 are delayed by 1H
/ A converter 110. Therefore, the reciprocal scanning video signal of the even-numbered frame is output with a delay of 1H with respect to the input luminance signal Y as shown in FIG.

The operation of the vertical deflection circuit 3 according to the second embodiment will be described with reference to FIG. In FIG. 12, the video output timing of the even frame is delayed by 1H. FIG. 7 is an operation waveform diagram for explaining the operation of the directional circuit 3. The configuration of the vertical deflection circuit is the same as that of FIG. 6 described in the first embodiment. In the reciprocating scanning video conversion circuit 144 described with reference to FIGS. 9 and 10, in the present embodiment, the raster vertical scanning position of the even frame is moved upward with respect to the raster vertical scanning position of the odd frame. V. The SAW generator 90 receives the vertical synchronizing signal V.V. Vertical periodic sawtooth wave synchronized with SYNC SAW
Occurs. An odd / even frame discrimination signal O / E2 is applied to the input terminal 95. The adder 91 outputs the vertical period sawtooth wave V.V. SAW1 and the odd / even frame discrimination signal O / E2 are added, and the DC level changes every other frame. Create SAW3. The V. SAW3 becomes the reference signal of the vertical deflection output circuit, and the vertical period sawtooth wave
SAW3 is applied to the non-inverting input terminal of the vertical deflection output circuit 92 to obtain a vertical deflection current IV. Thus, the raster vertical scanning position of the even frame is moved to the upper side of the screen with respect to the raster vertical scanning position of the odd frame, and the vertical scanning positions of the video of the odd frame and the even frame are matched. The projection type display device may include a convergence coil and a convergence coil driving circuit, and may correct the raster vertical scanning position between the frames using the convergence coil and the convergence coil driving circuit.

FIG. 13 is a schematic diagram showing scanning lines on the screen of a reciprocating deflection type video signal device in the case where the second embodiment is used. In FIG. 13, L1 to L1125 denote scanning lines, V1 to V1125 denote video signals, and
Is the frame number. FIG. 13A shows scanning lines in an odd-numbered frame, FIG. 13B shows scanning lines in an even-numbered frame when vertical scanning position correction is not performed by a vertical deflection circuit, and FIG.
Reference numeral 3 (c) denotes a scanning line in an even-numbered frame when the vertical scanning position is corrected by the vertical deflection circuit.

Because of the interlaced scanning, the first scanning line L1 (1) of the odd frame scans from the center of the screen to the right as shown in FIG. At this time, the video signal displayed on the screen is V1 (1). V2
(1) Subsequent video signals are sequentially output, and odd-numbered scanning lines are scanned from left to right on the screen, and even-numbered scanning lines are scanned from right to left on the screen. In the next even-numbered frame (see FIG. 13B), the scanning direction starts from the scanning line L1 (2) scanned leftward from the center of the screen, and the scanning direction is reversed with respect to the odd-numbered frame.

In this embodiment, as described with reference to FIGS. 10 and 11, the read timing of the even frame is delayed by 1H with respect to the odd frame. In the even-numbered frame, a blanking signal BLANK for blanking for 1H period is inserted between the video signals V1 (2) and V2 (2), and the blanking signal BLANK is displayed on the screen by the scanning line L2 (2) of the even-numbered frame. To be displayed. Then,
The screen display of the video signal V2 (2) is performed using the scanning line L3 (2). Both the odd-numbered frame video signal V2 (1) and the even-numbered frame video signal V2 (2) are scanning from right to left on the screen. Therefore, the scanning direction of the video having the same information is the same in the odd frame and the even frame. Further, using the signal described in FIG. 12 and the vertical deflection circuit in FIG. 6, the vertical scanning positions of the scanning lines of the odd-numbered frames (see FIG. 13A) and the scanning lines of the even-numbered frames (see FIG. 13B). Correct the deviation. The vertical scanning position of the even frame is moved upward with respect to the vertical scanning position of the odd frame. The amount of movement is determined by the vertical period sawtooth wave V.V input to the adder 91 described with reference to FIG. It can be optimized by adjusting the addition ratio of SAW1 and odd / even frame discrimination signal O / E2.
Therefore, the scanning direction and the vertical scanning position of the scanning line for each video signal in FIG. 13A and FIG. 13C match.

According to the second embodiment of the present invention, even in the case of a video signal of an interlaced scanning format, the horizontal scanning direction and the vertical direction of a scanning line for displaying a video signal having the same information of an odd frame and an even frame. Scan positions can be matched. Since the direction of horizontal scanning does not change for each frame, there is no need to adjust the raster position between frames, and the adjustment is simple.

[0067]

According to the reciprocating deflection type video signal display device of the present invention, in the video signal of the interlaced scanning format and the format in which the number of scanning lines per field is an odd number, horizontal scanning is performed every other frame or every other field. The direction does not change, and the adjustment process does not become complicated. Furthermore, since the same pixel fine adjustment means as that of the related art can be used, a significant increase in the circuit scale does not occur. Therefore, a reciprocating deflection type video signal display device corresponding to a video signal of an interlaced scanning format or a format in which the number of scanning lines per field is an odd number can be provided at low cost. Further, in the apparatus of the present invention, advantages such as elimination of high-voltage horizontal deflection pulses, reduction of power loss of switching elements, realization of adoption of low-withstand voltage switching elements, etc., which can be obtained by the conventional reciprocating deflection type video signal display apparatus Can be obtained without any loss.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a reciprocating deflection type video signal display device according to the present invention.

FIG. 2 is a block diagram of a reciprocating scanning video conversion circuit shown in FIG.

FIG. 3 is an operation waveform diagram illustrating an operation of the reciprocating scanning video conversion circuit shown in FIG. 2;

FIG. 4 is a block diagram of the reciprocating horizontal deflection circuit shown in FIG. 1;

FIG. 5 is an operation waveform diagram for explaining the operation of the reciprocating horizontal deflection circuit shown in FIG.

FIG. 6 is a block diagram of the vertical deflection circuit shown in FIG.

7 is an operation waveform diagram for explaining an operation of the vertical deflection circuit shown in FIG.

FIG. 8 is a scanning line structure diagram showing a scanning line structure scanned by the reciprocating deflection type video signal display device according to the first embodiment.

FIG. 9 is a block diagram showing a reciprocating deflection type video signal display device according to a second embodiment of the present invention.

FIG. 10 is a block diagram of a reciprocating scanning video conversion circuit shown in FIG. 9;

FIG. 11 is an operation waveform diagram for explaining an operation of the reciprocal scanning video conversion circuit shown in FIG.

12 is an operation waveform diagram for explaining an operation of the vertical deflection circuit shown in FIG.

FIG. 13 is a scanning line structure diagram showing a scanning line structure scanned by the reciprocating deflection type video signal display device according to the second embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Reciprocating horizontal deflection circuit, 3 ... Vertical deflection circuit, 19 ... Double speed signal conversion circuit, 5 ... Reciprocal scanning video conversion circuit, 17 ... Synchronization separation circuit, 7 ... Matrix, 21 ... Y / C separation circuit, 15 ... Horizontal Deflection coil, 14 ... vertical deflection coil, 1
6 Projection tube 104 A / D converter 105 105 106 1
H line memory, 108 1H delay circuit, 110 DA
Converter, 85, 86 MOSFET, 82 level shift circuit, 83, 84 buffer, 90 V. SAW generator, 91: adder, 92: vertical deflection amplifier, L1
L1125: horizontal scanning line, V1 to V1125: video signal

Continued on the front page (72) Inventor Toshimitsu Watanabe 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Digital Media Development Division, Hitachi, Ltd. (72) Inventor Kazuhiko Yoshizawa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture 5C068 AA06 AA18 BA02 LA20 Digital Media Development Division, Hitachi, Ltd.

Claims (7)

[Claims] 1. A reciprocating horizontal deflection scan for alternately performing a scan for deflecting an electron beam from left to right and a scan for deflecting an electron beam from right to left, a cathode ray tube, a cathode ray tube driving circuit thereof, a horizontal deflection coil, and a scan for deflecting the electron beam from right to left. Horizontal deflection coil drive circuit for supplying a deflection current for performing the horizontal deflection coil to the horizontal deflection coil, a vertical deflection coil and its drive circuit, and a video input signal formed corresponding to a unidirectional horizontal deflection scan, the reciprocating horizontal Reciprocating scanning video signal converting means for converting to a video signal corresponding to deflection scanning, wherein the reciprocating scanning video signal conversion means corresponds to the reciprocating horizontal deflection scanning when an odd number of scanning lines per video field is used. A reciprocating deflection type video signal display device which outputs a video signal every other field with a delay of one horizontal scanning period. 2. A reciprocating horizontal deflection scan for alternately performing a scan for deflecting an electron beam from left to right and a scan for deflecting an electron beam from right to left. Horizontal deflection coil drive circuit for supplying a deflection current for performing the horizontal deflection coil to the horizontal deflection coil, a vertical deflection coil and its drive circuit, and a video input signal formed corresponding to a unidirectional horizontal deflection scan, the reciprocating horizontal Reciprocating scanning video signal converting means for converting to a video signal corresponding to deflection scanning, wherein the reciprocating scanning video signal converting means comprises a plurality of video fields and scans one frame of video formed by interlaced scanning In the case where the number of lines is odd, a video signal corresponding to the reciprocating horizontal deflection scanning is output with a delay of one horizontal scanning period every other frame. Deflection-type video signal display apparatus. 3. A driving circuit for driving the vertical deflection coil, comprising:
2. A device according to claim 1, further comprising: means for moving a horizontal scanning line corresponding to a video signal output with a delay of a horizontal period to a position on the screen of said cathode ray tube, which is one horizontal scanning line earlier. 2. The reciprocating deflection type video signal display device according to 2. 4. An auxiliary vertical deflection coil, and an auxiliary vertical deflection coil driving circuit for driving the auxiliary vertical deflection coil, wherein a horizontal scanning line corresponding to the video signal output after being delayed by one horizontal period is replaced with the cathode line. 3. The reciprocating deflection type video signal display device according to claim 1, wherein the video signal display device is moved to a position before by one horizontal scanning line on the screen of the tube. 5. A reciprocating deflection type video signal display device according to claim 1, further comprising field discriminating means for discriminating between odd fields and even fields. 6. The reciprocating deflection type video signal display device according to claim 2, further comprising a frame discriminating means for discriminating between odd frames and even frames. 7. The reciprocating deflection type video signal display device according to claim 3, wherein said vertical deflection driving circuit is a DC amplification type amplifier.