JP2001127338A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device having the epitaxial layer of β-FeSi2 of high quality on an Si substrate on a face (100). SOLUTION: A grooved step part 2 parallel to a [110] direction is formed on the surface of the n-type Si substrate on a face (100). Then, a β-FeSi2 layer is formed on the part. Thus, the crystal growth of the epitaxial layer of β-FeSi2 in a direction rotated by 90 degrees is suppressed, the epitaxial growing layer of β-FeSi2 of high quality can uniformly be obtained and a semiconductor device superior in a luminous characteristic can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a silicon (hereinafter, referred to as silicon)
The present invention relates to a semiconductor device such as a light emitting device and a light receiving device formed on a substrate and a method for manufacturing the same.

[0002]

2. Description of the Related Art A light emitting device on a Si substrate is a current S
i. It is compatible with large-scale integrated circuit (LSI) technology, and has great significance for the realization of optical / electronic integrated devices and optical wiring technology for LSI.

Conventionally, as a light emitting device on a Si substrate,
Porous Si or Si nanoparticles, or GNP or Ga, which is a compound of gallium (hereinafter, referred to as Ga), nitrogen (hereinafter, referred to as N), and phosphorus (hereinafter, referred to as P),
GNA which is a compound of N and arsenic (hereinafter, referred to as As)
There are several reports to date, including III- (N) -V mixed crystal semiconductors such as s, Si doped with erbium (hereinafter referred to as Er), and beta iron silicide (hereinafter referred to as β-FeSi ₂ ). I have.

In porous Si and Si nanoparticles, it is considered that the quantum mechanical effect of the Si microstructure is involved in visible light emission.
The detailed mechanism is still unknown, and it is difficult to control the wavelength.

[0005] III- (N)-such as GaNP and GaNAs
The V mixed crystal semiconductor can lattice match with the Si substrate, but has a large band gap bowing effect, the band gap decreases with the addition of N to GaP or GaAs, and crystal growth is very difficult.

On the other hand, silisa, which is a compound of Si and a metal,
There are many types of ide, but recently,
Β-FeSi as silicide with high quality_TwoAttracted attention
I have. β-FeSi_TwoIs the direct transition band gap
(~ 0.85eV), and epitaxy on Si substrate
Material that can be grown in
Injecting Fe into the pn junction of Si
Β-FeSi prepared by _TwoLEDs have also been reported.
This is for example the case in D.A. Leong et al. , Nat
ure, 387 (1997) P686.
You.

Here, β-FeSi ₂ has an orthorhombic crystal structure, and the following Table 1 shows a (100) plane Si substrate.
In relation crystal plane and the crystal axis as shown in beta-FeSi ₂
Is obtained.

[0008]

[Table 1]

FIG. 19 is a graph showing [1] of (100) Si substrate.
S] when β-FeSi ₂ crystal grows in the [10] direction
3 schematically shows the relationship between the crystal planes of i and β-FeSi ₂ and the crystal axes. Β- shown in FIG.
The lattice constant of each side of the crystal structure of FeSi ₂ is a =
9.86 °, b = 7.79 °, and c = 7.83 °.

As a method of forming a β-FeSi ₂ layer on a Si substrate, Fe is deposited on a Si substrate at room temperature,
Method of forming by solid phase reaction of Fe and Si by annealing (Solid Phase Epitaxy)
Method; SPE method), a method of forming a solid phase reaction between Fe and Si while depositing Fe on a heated Si substrate (Re method).
active Deposition Epitaxy
Method; RDE method), heated Si in an MBE chamber.
M formed by simultaneously depositing Fe and Si on a substrate
The BE method and the like have been reported. This is for example the case in M.S. Tan
aka et al. , Jpn. J. Appl. Phys
s. Vol. 36 (1997) pp 3620-3624
It is described in.

[0011]

However, the SPE
Generally, the method requires a higher temperature heat treatment than the RDE method, and the crystal relations in Table 1 are not uniquely determined by the initial reaction, and the crystal tends to be polycrystalline. In addition, since the RDE method deposits Fe on a heated Si substrate from the beginning, the above-described crystal relationship is more likely to occur than in the SPE method. However, the quality of a grown film depends on the deposition rate (depo rate) of Fe and the substrate temperature. Thus, the film forming conditions are limited.

In the MBE method, as in the SPE method,
It is difficult to uniquely determine the first crystal nucleation. Therefore,
At first, as in the case of the RDE method, only Fe is deposited to a very thin thickness of about 1 nm to form a thin β-FeSi ₂ epitaxial layer, and Fe and Si are simultaneously used at a molar ratio of 1: 2 using this as a template. The template method of vapor deposition is often used. However, the Si substrate of the (100) plane is symmetrical four times, and the directions rotated by 90 degrees are equivalent. In the (100) plane orientation of a Si substrate having a plurality of such equivalent orientations, when β-FeSi ₂ having a different crystal system is grown thereon, in a plane orientation rotated by 90 degrees, which is equivalent to each other. In order to obtain a β-FeSi ₂ epitaxial layer having a large area and a uniform crystal orientation, it is easy to become polycrystalline because crystal grains grow at the same growth rate and the same probability as in the above-mentioned SPE method and RDE method. Even the MBE method is very difficult.

Further, β-FeSi formed on a Si substrate
_In order to obtain a double hetero structure by further forming an Si epitaxial layer on the epitaxial layer of No. ₂ , β-FeSi ₂
Is very difficult because it has an orthorhombic crystal structure.

The conventional β-FeSi ₂ LED also has a β-FeSi ₂ LED.
-Since FeSi ₂ microcrystals are used and no epitaxial film is used, the luminous efficiency is low.

Further, there have been few reports on semiconductors related to optical devices which are lattice-matched with the Si substrate and have good epitaxial crystal growth, except for the above-mentioned GNP and GNAs.

SUMMARY OF THE INVENTION The present invention has been made to solve such problems, and a high-quality β-FeSi
Semiconductor device and manufacturing method thereof having a double hetero structure epitaxial layer of the _second epitaxial layer and _{Si / β-FeSi 2 / Si} , β-FeSi 2 layer semiconductor device and manufacturing method thereof having improved luminous efficiency, on the Si substrate Lattice matched,
It is an object of the present invention to provide a semiconductor device that emits light in an ultraviolet region and a method for manufacturing the same.

[0017]

According to a first aspect of the present invention, there is provided a semiconductor device according to the first aspect of the present invention, wherein a groove-shaped step portion parallel to the [110] direction is provided on a (100) plane.
This is a configuration in which a β-FeSi ₂ layer is formed on an i-substrate.

Thus, the crystal growth of the β-FeSi ₂ layer in the azimuth rotated by 90 degrees is suppressed by the groove-shaped steps provided in parallel with the [110] direction of the (100) Si substrate, and A quality β-FeSi ₂ epitaxial layer can be uniformly obtained, and a semiconductor device having excellent light emission characteristics can be obtained.

Further, in the semiconductor device according to the second aspect of the present invention, β-FeSi ₂ is provided on a (100) plane one conductivity type Si substrate provided with a groove-shaped stepped portion parallel to the [110] direction.
Layer is formed on the β-FeSi ₂ layer.
It has a structure in which a layer is formed.

As a result, the (100) plane of one conductivity type S
The groove-shaped steps provided in parallel with the [110] direction of the i-substrate suppress the crystal growth of the β-FeSi ₂ layer rotated 90 degrees, and make the high-quality β-FeSi ₂ epitaxial layer uniform. Further, by forming a Si layer of the opposite conductivity type on the β-FeSi ₂ epitaxial layer, a semiconductor device having excellent light emission characteristics can be obtained.

Further, in the semiconductor device according to the third aspect of the present invention, [110] is formed on a (100) plane one conductivity type Si substrate.
The step portion of the parallel groove is provided in a direction, beta-FeSi ₂ layer in the form of embedding the stepped portion is formed, the beta-FeSi ₂
In this configuration, a reverse conductivity type Si layer is formed on the layer and the one conductivity type Si substrate.

Thus, one conductivity type S of the (100) plane
The groove-shaped step portion provided in parallel with the [110] direction of the i-substrate suppresses the crystal growth of the β-FeSi ₂ layer in the orientation rotated by 90 degrees, thereby forming a high-quality β-FeSi ₂ epitaxial layer. Part, and β-F
By easily obtaining an epitaxial layer of Si of the opposite conductivity type on the epitaxial layer of eSi ₂ , a semiconductor device having excellent light emission characteristics can be obtained.

Further, according to the method of manufacturing a semiconductor device according to the fourth aspect of the present invention, the [100] plane Si substrate has [110]
A step of forming a groove-shaped step portion parallel to the direction; and a step of forming a β-FeSi ₂ layer on the Si substrate including the step portion.

Thus, the crystal growth of the β-FeSi ₂ layer in the azimuth rotated by 90 degrees is suppressed by the groove-shaped steps provided parallel to the [110] direction of the (100) Si substrate, and A quality β-FeSi ₂ epitaxial layer can be uniformly obtained, and a method for manufacturing a semiconductor device having excellent emission characteristics can be obtained.

In the method for manufacturing a semiconductor device according to the fifth aspect of the present invention, a step of forming a groove-shaped step portion parallel to the [110] direction on a (100) plane one conductivity type Si substrate is provided. .Beta.-F on the one conductivity type Si substrate including the step portion.
a step of forming an eSi ₂ layer and a step of forming a reverse conductivity type Si layer on the β-FeSi ₂ layer.

As a result, the (100) plane of one conductivity type S
The groove-shaped steps provided in parallel with the [110] direction of the i-substrate suppress the crystal growth of the β-FeSi ₂ layer rotated 90 degrees, and make the high-quality β-FeSi ₂ epitaxial layer uniform. Further, by forming a reverse conductivity type Si substrate on the β-FeSi ₂ epitaxial layer, a method of manufacturing a semiconductor device having excellent light emission characteristics can be obtained.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device, a step of forming a groove-shaped step parallel to the [110] direction is formed on the (100) plane one conductivity type Si substrate. Forming a β-FeSi ₂ layer so as to be buried only on the step portion, and forming a reverse conductivity type Si layer on the β-FeSi ₂ layer and the one conductivity type Si substrate. .

Thus, one conductivity type S (100) plane
The groove-shaped step portion provided in parallel with the [110] direction of the i-substrate suppresses the crystal growth of the β-FeSi ₂ layer in the orientation rotated by 90 degrees, thereby forming a high-quality β-FeSi ₂ epitaxial layer. Part, and β-F
Since an epitaxial layer of Si of the opposite conductivity type can be easily formed on the epitaxial layer of eSi _2, a method of manufacturing a semiconductor device having excellent emission characteristics can be obtained.

In a semiconductor device according to a seventh aspect of the present invention, an insulating film is buried in a region of the (100) plane parallel to the [110] direction of the Si substrate, and a region on the Si substrate without the insulating film is provided. In which a β-FeSi ₂ layer is formed.

Due to the stress of the insulating film embedded in a predetermined region of the (100) plane parallel to the [110] direction on the Si substrate, a direction perpendicular to the direction parallel to the [110] direction of the Si substrate is obtained. It is possible to slightly change the lattice constant of Si, and when growing β-FeSi ₂ on the stressed Si substrate, the crystal growth of the β-FeSi ₂ layer in the 90 ° rotated orientation is suppressed. not only because of the beta-FeSi ₂ in the direction of b-axis and c-axis it is possible to crystal growth and selected preferentially, uniform and more high-quality epitaxial layer of beta-FeSi ₂ of As a result, a semiconductor device having excellent emission characteristics can be obtained.

Further, in the semiconductor device according to the eighth aspect of the present invention, [110] on a (100) plane one conductivity type Si substrate.
An insulating film is formed in a region parallel to the direction, a β-FeSi ₂ layer is formed on the Si substrate sandwiched between the insulating films, and a Si layer of the opposite conductivity type is formed on the β-FeSi ₂ layer. It is of the configuration as shown.

Thus, as described above, the insulating film is formed in the predetermined region of the (100) plane parallel to the [110] direction on the Si substrate. A quality β-FeSi ₂ epitaxial layer can be uniformly obtained, and a reverse conductivity type Si layer is
Semiconductor device with excellent light emitting characteristics by forming the -FeSi ₂ epitaxial layer is obtained.

In the method of manufacturing a semiconductor device according to a ninth aspect of the present invention, a step of partially burying an insulating film in a predetermined region of the (100) plane parallel to the [110] direction of the Si substrate; Β-Fe was added to the region of the Si substrate where there was no insulating film.
Forming a Si ₂ layer.

As described above, since the insulating film is buried in the predetermined region of the (100) plane parallel to the [110] direction on the Si substrate as described above, the stress of the insulating film applied to the Si substrate increases the stress. A quality β-FeSi ₂ epitaxial layer can be uniformly obtained, and a method for manufacturing a semiconductor device having excellent light emission characteristics can be obtained.

According to a tenth aspect of the present invention, in the method of manufacturing a semiconductor device, a step of forming an insulating film in a predetermined region parallel to the [110] direction on a (100) plane Si substrate of one conductivity type. Forming a β-FeSi ₂ layer in a region without an insulating film on the one conductivity type Si substrate; removing the insulating film; and forming the β-FeSi ₂ layer on the one conductivity type Si substrate.
Forming a reverse conductivity type Si layer on the FeSi ₂ layer.

As described above, the insulating film is formed in the predetermined region parallel to the [110] direction on the (100) Si substrate as described above. In addition, a high quality β-FeSi ₂ epitaxial layer can be uniformly obtained, and by removing the insulating film, a reverse conductivity type Si layer is formed on a one conductivity type Si substrate. _An Si epitaxial layer can be easily formed on the _second epitaxial layer.

The semiconductor device according to claim 11 of the present invention has a structure in which an Er-doped β-FeSi ₂ layer is provided on a Si substrate.

Thus, the doped Er becomes Er.
³⁺ ions, the level of the f-shell electron system is split by the spin-orbit interaction between the electrons, and the level of the f-shell electron system changes from high energy to low energy.
Light is emitted in the 1.6 μm band. Usually, the doping of Er into Si is very difficult due to segregation and the like.
It has been found that the doping efficiency is increased in the epitaxial layer of -FeSi ₂ , the energy of the band gap transition of β-FeSi ₂ is efficiently converted to the electron transition of Er, and the light emission of the epitaxial layer of β-FeSi ₂ is obtained. Efficiency can be increased.

In the semiconductor device according to the twelfth aspect of the present invention, a β-F doped with Er on a Si substrate of one conductivity type is provided.
An eSi ₂ layer is provided, and a Si layer of the opposite conductivity type is provided on the β-FeSi ₂ layer.

Thus, as described above, β-FeSi
_Since the luminous efficiency of the epitaxial layer ₂ can be increased, and a reverse conductivity type Si layer is provided on the β-FeSi ₂ layer, a semiconductor device with higher luminous efficiency can be provided.

A semiconductor device according to a thirteenth aspect of the present invention is the semiconductor device according to any one of the first to third or seventh and eighth aspects, wherein the β-FeSi ₂ layer is doped with Er. It is.

Thus, one conductivity type S (100) plane
β of the azimuth rotated by 90 degrees by a groove-shaped step portion provided in parallel with the [110] direction of the i-substrate or by an insulating film embedded in a region parallel to the [110] direction.
-High quality β-Fe by suppressing crystal growth of FeSi ₂ layer
A uniform epitaxial layer of Si ₂ can be obtained,
As described above, the effect of doping the β-FeSi ₂ layer with Er can provide a semiconductor device having excellent light emission characteristics.

Further, according to the method of manufacturing a semiconductor device according to the fourteenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising the steps of:
It includes a step of forming an eSi ₂ layer.

Thus, as described above, β-FeSi ₂
Β-Fe due to the effect of doping the layer with Er
The luminous efficiency of the Si ₂ epitaxial layer can be increased.

A method of manufacturing a semiconductor device according to a fifteenth aspect of the present invention includes the step of forming an Er-doped β-FeSi ₂ layer on a one-conductivity-type Si substrate.
forming a reverse conductivity type Si layer on the i ₂ layer.

Thus, as described above, β-FeSi ₂
Β-Fe due to the effect of doping the layer with Er
Since the luminous efficiency of the Si ₂ epitaxial layer can be increased, and the reverse conductivity type Si layer is provided on the β-FeSi ₂ layer, a method of manufacturing a semiconductor device with higher luminous efficiency can be provided.

The method of manufacturing a semiconductor device according to claim 16 of the present invention is the method of manufacturing a semiconductor device according to any one of claims 4 to 6, 9 and 10,
In the step of forming the FeSi ₂ layer, the β-FeSi ₂ layer is doped with Er.

As a result, the (100) plane of one conductivity type S
The β-layer of the azimuth rotated by 90 degrees is formed by a groove-shaped step portion provided in parallel with the [110] direction of the i-substrate or by an insulating film embedded in a region parallel to the [110] direction.
High quality β-FeS by suppressing the crystal growth of the FeSi ₂ layer
The i ₂ epitaxial layer can be uniformly obtained, and the luminous efficiency of the β-FeSi ₂ epitaxial layer can be increased by the effect of doping the β-FeSi ₂ layer with Er as described above.

According to a seventeenth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fourteenth aspect, Fe and Er are simultaneously or alternately deposited on the heated Si substrate. Thus, an Er-doped β-FeSi ₂ layer is formed on the Si substrate.

Thus, while heating the Si substrate, Fe
Is deposited, and β-FeS is formed using a solid-phase reaction between Fe and Si.
During RDE method of forming an epitaxial layer of i _2, F
By simultaneously or alternately depositing e and Er, Er
There are doped in the epitaxial layer efficiently β-FeSi _2, it is possible to enhance the luminous efficiency of the epitaxial layer of β-FeSi _2.

According to a method of manufacturing a semiconductor device according to claim 18 of the present invention, there is provided the method of manufacturing a semiconductor device according to claim 14, wherein Si, Fe, Er is formed on the heated Si substrate.
Are deposited simultaneously or alternately to form the Er on the Si substrate.
Is formed to form a β-FeSi ₂ layer doped with.

Thus, while heating the Si substrate, Fe
Simultaneously or alternately deposits Si to promote the solid-phase reaction between Fe and Si, and at the same time or alternately deposits Er with Fe and Si during the RDE method of forming an epitaxial layer of β-FeSi _2. by, Er is doped into the epitaxial layer efficiently β-FeSi _2, it is possible to enhance the luminous efficiency of the epitaxial layer of β-FeSi _2.

According to a method of manufacturing a semiconductor device according to a nineteenth aspect of the present invention, in the method of manufacturing a semiconductor device of the fourteenth aspect, the method further comprises the step of:
The method deposits Fe while heating the Si substrate to form the Er-doped β-FeSi ₂ layer.

Thus, while heating the Si substrate, Fe
Is deposited, and β-FeS is formed using a solid-phase reaction between Fe and Si.
During RDE method of forming an epitaxial layer of i _2, previously Er by using a Si substrate injected with, Er is doped into the epitaxial layer efficiently β-FeSi _2, emission of the epitaxial layer of beta-FeSi ₂ Efficiency can be increased.

According to a twentieth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a reverse conductivity type Si layer on a one conductivity type Si substrate; A step of ion-implanting Er and Fe in the vicinity of the junction with the Si layer of the opposite conductivity type; and a step of subjecting the Si substrate to high-temperature heat treatment to form the Er-doped β-FeSi ₂ layer. .

As a result, the injected Fe and Si have a high temperature.
Β-FeSi reacts by heat treatment _TwoWhen forming a layer
In addition, the injected Er efficiently converts β-FeSi_TwoDoe on layer
Ping, β-FeSi_TwoIncreasing the luminous efficiency of the layer
Can be.

In the method of manufacturing a semiconductor device according to the twenty-first aspect of the present invention, the (100) plane one-conductivity-type Si substrate surface may be provided with an Er-containing Fe deposition layer on the entire surface or [11].
0] selective burying process in parallel with the direction, and the one conductivity type Si substrate on the side having the Fe deposition layer,
An opposite conductivity type Si substrate is overlaid and heat-treated,
Burying a β-FeSi ₂ layer doped with P between the one conductivity type Si substrate and the opposite conductivity type Si substrate.

Thus, one conductivity type S on which Fe is deposited is formed.
By heat-treating the i-substrate with the reverse conductivity type Si substrate, Fe causes a solid-phase reaction with the Si substrates on both sides, and β-F
An eSi ₂ epitaxial layer is formed to be embedded in the Si layers on both sides. At this time, an Er-doped β-FeSi ₂ epitaxial layer is formed by Er contained in Fe to form two Si substrates. Is bonded to easily form a double hetero structure of Si / Er-doped β-FeSi ₂ / Si.

In the method of manufacturing a semiconductor device according to the twenty-second aspect of the present invention, Er may be formed on the entire surface or the groove-shaped step parallel to the [110] direction on the surface of the one-conductivity-type Si substrate of the (100) plane. Selectively ion-implanting, forming a Fe deposited layer on the Er-implanted region, and forming the one conductive Si substrate on the side having the Fe deposited layer,
An opposite conductivity type Si substrate is overlaid and heat-treated,
Burying a β-FeSi ₂ layer doped with P between the one conductivity type Si substrate and the opposite conductivity type Si substrate.

Thus, the region where Er is ion-implanted is
By forming an Fe deposition layer on top, one conductivity type Si substrate
And heat treatment by overlapping with a reverse conductivity type Si substrate,
Fe in the Fe deposited layer causes a solid-phase reaction with the Si substrates on both sides,
β-FeSi_TwoEmbedded in the Si layers on both sides
It is formed in a form that is embedded
Β-FeSi doped with Er_Two
Is formed and two Si substrates are bonded.
And Si / Er doped β-FeSi _Two/ Si
Can easily form a double heterostructure
You.

Further, in the method of manufacturing a semiconductor device according to claim 23 of the present invention, the one-conductivity-type Si substrate in which Er is ion-implanted in advance is overlapped with the opposite-conductivity-type Si substrate on the side having the Fe deposition layer. And heat treatment to form an Er-doped β-FeSi ₂ layer between the one conductivity type Si substrate and the opposite conductivity type Si substrate.

Thus, by heating the one-conductivity-type Si substrate with the opposite-conductivity-type Si substrate on which Fe is deposited, Fe causes a solid-phase reaction with the Si substrates on both sides, thereby causing β-F
An epitaxial layer of eSi ₂ is formed to be embedded in the Si layers on both sides. At this time, S
By using an i substrate, Er-doped β
-FeSi ₂ epitaxial layer is formed and two S
i substrate is bonded, and Si / Er-doped β-Fe
The double heterostructure Si ₂ / Si can be easily formed.

The semiconductor device according to claim 24 of the present invention is characterized in that a BAlGaN layer is formed on a (100) Si substrate.
This is a configuration in which a PN junction is provided using at least one semiconductor layer of a BGaN layer and a BAlN layer.

As a result, the BAlGaN layer, the BGaN layer, and the BAlN layer were formed on the (100) Si substrate with the [11]
0] direction and can be epitaxially grown with lattice matching.

That is, cubic BN,
As shown in FIG. 20, the relationship between the lattice constants of GaN and AlN and the band gap is shown in FIG.
The GaN layer and the BAlN layer have a lattice constant of about 3.84%, which is 1 / {2} times the lattice constant of 5.43% of Si. In this case, the BGaN layer has a band gap of about 5.6 eV,
The BAlN layer has a band gap of about 6.0 eV,
The aN layer has a band gap therebetween (about 5.6 to about 6.0 eV).

Therefore, with the above configuration, BAlGaN, BGaN, BAl having a lattice constant of about 3.84 °
N is β- on the (100) plane Si substrate shown in FIG.
Similar relationships between the epitaxial layer of the FeSi _2, i.e. as shown in Figure 21, can be grown lattice-matched in a parallel relationship to the [110] direction at the one side (100) plane of the Si substrate is there. These are semiconductor devices having a band gap in the ultraviolet region. Here, FIG.
Is BAl in the [110] direction of the (100) plane Si substrate.
S in crystal growth of GaN, BGaN, and BAlN
FIG. 21 (a) shows the relationship between the crystal plane and the crystal axis of BAlGaN, BGaN, and BAlN, and the cubic crystal shown in FIG. 84 °.

The semiconductor device according to claim 25 of the present invention is the semiconductor device according to claim 24, wherein
The lattice constant of the aN layer, the BGaN layer, or the BAlN layer has a cubic structure that is about 1 / √2 times the lattice constant of Si, and at least one side has AlGaBN (100) in the [110] direction of the Si substrate. ) // Si (100) or B
AlN (100) // Si (100) or BGaN
This is a configuration in which a single crystal is grown in a plane relationship of (100) // Si (100).

Thus, as described above, as shown in FIG. 21, one side of the lattice constant of the BAlGaN layer, BGaN layer, and BAlN layer is [110] on the (100) plane Si substrate.
Crystal growth can be performed with lattice matching in a relationship parallel to the direction.

The semiconductor device according to claim 26 of the present invention is the same as the semiconductor device according to claim 24, except that (10
A groove-shaped or rectangular step portion parallel to the [110] direction is provided on the (0) plane Si substrate.

Thus, the crystal growth in the direction rotated by 90 degrees of the BAlGaN layer, the BGaN layer, or the BAlN layer is caused by the groove-shaped steps provided in parallel with the [110] direction of the (100) plane Si substrate. High quality B suppressed
A semiconductor device in which an epitaxial layer of AlGaN, BGaN, and BAlN is uniformly formed is obtained.

The method of manufacturing a semiconductor device according to the twenty-seventh aspect of the present invention provides a method for manufacturing a semiconductor device comprising:
0] forming a groove-shaped or rectangular step parallel to the direction; and forming a BAlGaN on a Si substrate having the step.
And forming a PN junction using at least one semiconductor layer among the semiconductor layer, the BGaN layer, and the BAlN layer.

As a result, a groove-shaped or rectangular step portion parallel to the [110] direction of the (100) plane Si substrate is formed, so that the BAlGaN having the azimuth rotated by 90 degrees is formed.
It is possible to suppress the crystal growth of the layer, the BGaN layer, and the BAlN layer, and to uniformly form a high-quality epitaxial layer of BAlGaN, BGaN, and BAlN.

Further, in the method of manufacturing a semiconductor device according to claim 28 of the present invention, the method of manufacturing a semiconductor device according to claim 28, wherein [11]
0] forming an insulating film in a predetermined region parallel to the direction, and a BAlGaN layer on the Si substrate between the insulating films;
The method includes a step of forming a PN junction using at least one semiconductor layer of the BGaN layer and the BAlN layer.

As a result, an insulating film is formed in a predetermined area of the (100) plane parallel to the [110] direction of the Si substrate, and a crystal is grown between the insulating films. , BAlN layer to suppress the crystal growth, high quality BAlGaN, BGaN, BAl
The N epitaxial layer can be formed uniformly.

[0075]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor device and a method of manufacturing the same according to the present invention will be described in detail with reference to the drawings.

Embodiment 1 FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention.

This structure, as shown in FIG.
In a predetermined region on the n-type Si substrate 1 on the 0) plane, a groove-shaped stepped portion 2 having a width of 0.1 to 2 μm and a depth of 30 to 50 nm is formed at [110] of the n-type Si substrate 1. Parallel to the direction,
The β-FeSi ₂ epitaxial layer 3 is formed on the n-type Si substrate 1 including the steps 2, which are provided at intervals of 0.1 to 2 μm, and furthermore, the β-FeSi ₂ epitaxial layer 3 is formed on the β-FeSi ₂ epitaxial layer 3. A crystalline p-type Si layer 4 is formed, and ohmic electrodes 5 and 6 made of Al are provided on the p-type Si layer 4 and on the surface of the n-type Si substrate 1 where no step is provided. It is what is being done. Note that β-Fe
Without forming a Si layer 4 of p-type on the epitaxial layer 3 of Si _2, it may be provided an ohmic electrode 5 made of Al on the epitaxial layer 3 of the β-FeSi _2.

Next, the method for fabricating the semiconductor device of the present invention according to the first embodiment will be explained with reference to the process sectional views of FIGS.

First, as shown in FIG.
A stripe pattern of the photoresist film 7 is formed on the n-type Si substrate 1 of the 0) plane by using a normal light exposure method. This stripe-shaped pattern has a (100) plane Si
It has sides parallel to the [110] direction on the substrate 1 and has a width of 0.1 to 2 μm and an interval of 0.1 to 2 μm.
Next, as shown in FIG. 2B, using the photoresist film 7 as a mask, the Si substrate 1 is anisotropically dry-etched to provide a groove-shaped step portion 2 having a depth of about 30 to 50 nm in the Si substrate 1. After that, the photoresist film 7 is removed. Next, FIG.
As shown in (c), in a high vacuum chamber, the substrate temperature was set to 500 to 650 ° C., and Fe atoms were deposited at a rate of 6 to 15 ° / min.
m to a thickness of m. But in this case, S
The Fe atoms deposited on the surface of the i-substrate 1 undergo a solid-phase reaction with the Si atoms due to heat, and a β-FeS
An i ₂ epitaxial layer 3 is formed. Next, FIG.
As shown in (d), β-FeSi
_A single crystal p-type Si layer 4 on the epitaxial layer 3
To form Finally, as shown in FIG. 2E, ohmic electrodes 5 and 6 made of Al are provided on the single crystal p-type Si layer 4 and on the surface of the Si substrate 1 where no step is provided. . Note that, without forming the single-crystal p-type Si layer 4 on the β-FeSi ₂ epitaxial layer 3,
An ohmic electrode 5 may be provided on the β-FeSi ₂ epitaxial layer 3.

(Embodiment 2) FIG. 3 is a cross-sectional view of a semiconductor device according to a second embodiment of the present invention.

This structure, as shown in FIG.
0) plane, a predetermined area on the n-type Si substrate 1 has a width of 0.
A groove-shaped step portion 2 having a thickness of 1 to 2 μm and a depth of 30 to 50 nm is formed in a thickness of 0.1 to 2 μm in parallel with the [100] direction of the Si substrate 1.
Provided at intervals, the Si grooved epitaxial layer 3 of the beta-FeSi ₂ in the form of embedding the stepped portion only on the stepped portion of the substrate 1 is formed, and on further epitaxial layer 3 of the beta-FeSi ₂ A single-crystal p-type Si layer 4 is formed on an n-type Si substrate 1, and the surface of the p-type Si layer 4 and the surface of the Si substrate 1 where no step is provided are made of Al. Ohmic electrodes 5 and 6 are provided. Note that, without forming the p-type Si layer 4 on the β-FeSi ₂ epitaxial layer 3, β-FeS
An ohmic electrode 5 made of Al may be provided on the i ₂ epitaxial layer 3.

Next, the method for fabricating the semiconductor device of the present invention according to the second embodiment will be explained with reference to the process sectional views of FIGS.

First, as shown in FIG.
After the insulating film 8 of SiO ₂ or the like is formed on the entire surface of the n-type Si substrate 1 using the CVD method or the like on the 0) plane, the stripe pattern of the photoresist film 7 is formed using a normal light exposure method. Form. This stripe pattern is (100)
It has sides parallel to the [110] direction on the surface of the Si substrate 1 and has a width of 0.1 to 2 μm and an interval of 0.1 to 2 μm. Next, as shown in FIG. 4B, using the photoresist film 7 as a mask, the insulating film 8 and the Si substrate 1 are anisotropically dry-etched into the Si substrate 1 to a depth of about 30 to 50.
After forming the groove-shaped step portion 2 of nm, the photoresist film 7 is formed.
Is removed. Next, as shown in FIG. 4C, in a high vacuum chamber, the substrate temperature is set to 500 to 650 ° C.
At a deposition rate of Å15 ° / min, Fe atoms are deposited to a thickness of 33 nm by electron beam evaporation, sputtering, or the like. However, since the step formed by the insulating film 8 and the Si substrate 1 is deep, Fe is deposited. The atoms are on the insulating film 8 and the Si substrate 1
Separated above. In this case, the Fe atoms deposited on the surface of the Si substrate 1 cause a solid-phase reaction with the Si atoms due to heat, and the epitaxial layer 3 of β-FeSi ₂ having a thickness of about 100 nm fills the step 2 of the Si electrode 1. It is formed as follows. At this time, the Fe atoms on the insulating film 8 do not react and become the Fe deposited layer 9. Next, as shown in FIG. 4D, when the insulating film 8 is SiO ₂ , the insulating film 8 is removed with dilute hydrofluoric acid or the like. In this case, the Fe deposition layer 9 on the insulating film 8
Is also removed at the same time. Next, as shown in FIG.
A single-crystal p-type Si layer 4 is formed on the entire surface by a CVD method or the like. Finally, as shown in FIG.
Ohmic electrodes 5 and 6 made of Al are provided on the layer 4 and on the surface of the Si substrate 1 where no step is provided.

According to the first or second embodiment, a groove-shaped step parallel to the [110] direction is introduced into the (100) plane of the Si substrate 1 so that the azimuth rotated by 90 degrees can be obtained. crystal growth of beta-FeSi ₂ layer is suppressed, a high-quality epitaxial growth layer beta-FeSi ₂ single crystal having the same orientation is obtained uniformly. However, when the width and the interval of the step portion are too large beyond 2 μm, 9
The range of 0.1 to 2 μm is appropriate because the effect of suppressing the crystal growth of the β-FeSi ₂ layer having the orientation rotated by 0 degrees is weakened. Further, in the second embodiment, since single-crystal Si is formed not only on β-FeSi ₂ but also partially on single-crystal Si, it is also formed on the β-FeSi ₂ epitaxial growth layer. Since an Si epitaxial layer can be more easily obtained, a p-type Si / β-FeSi ₂ / n-type Si double heterostructure epitaxial layer can be formed, and β-Fe
A light emitting diode having excellent light emitting characteristics using the Si ₂ layer as an active layer can be obtained. Note that, without forming the single-crystal p-type Si layer 4 on the β-FeSi ₂ epitaxial layer 3,
_On the epitaxial layer 3 of FeSi ₂ or β-
An ohmic electrode 5 may be provided on the FeSi ₂ epitaxial layer 3 and the Si substrate 1.

(Embodiment 3) FIG. 5 is a sectional view of a semiconductor device according to a third embodiment of the present invention.

This structure, as shown in FIG.
(0) plane, a predetermined area of the n-type Si substrate 1
In parallel with the [110] direction, an insulating film 10 made of SiO ₂ is embedded at a width in the range of 0.1 to ₂ μm and at an interval of 0.1 to ₂ μm, and the Si substrate 1 between the insulating films 10
The β-FeSi ₂ epitaxial layer 3 has a side parallel to the [110] direction of the Si substrate 1 and has a thickness of 0.1 to 2 μm.
m so as to be sandwiched between the insulating films 10 at intervals of m
p-type S single crystal on the epitaxial layer 3 of eSi ₂
An i-layer 4 is formed on the p-type Si layer 4 and the insulating film 1
0 is provided with an ohmic electrode 5 made of Al, and an ohmic electrode 6 made of Al is provided on the back surface of the n-type Si substrate 1. The ohmic electrode 5
May be provided on the β-FeSi ₂ epitaxial layer 3 without forming the p-type Si layer 4.

(Embodiment 4) FIG. 6 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention.

This structure, as shown in FIG.
In a predetermined area on the n-type Si substrate 1 on the 0) plane, SiO is formed in parallel with the [110] direction of the Si substrate 1 at a width of 0.1 to 2 μm and an interval of 0.1 to 2 μm. ₂ is provided, and an Si substrate 1 between the insulating films 10 is provided.
The β-FeSi ₂ epitaxial layer 3 has a side parallel to the [110] direction of the Si substrate 1 and has a thickness of 0.1 to 2 μm.
A single-crystal p-type Si layer 4 is formed on the epitaxial layer 3 of β-FeSi _{2 while} being sandwiched between the insulating films 10 at intervals of m. S
An ohmic electrode 5 made of Al is provided on the i-layer 4 and the insulating film 10, and an ohmic electrode 6 made of Al is provided on the back surface of the n-type Si substrate 1.
Note that, without forming the p-type Si layer 4 on the β-FeSi ₂ epitaxial layer 3, at least β-FeSi ₂
An ohmic electrode 5 made of Al may be provided on the epitaxial layer 3.

(Embodiment 5) FIG. 7 is a process sectional view of a semiconductor device showing a fifth embodiment of the method of manufacturing a semiconductor device of the present invention.

First, as shown in FIG.
After the SiN film 11 is formed on the entire surface of the n-type Si substrate 1 using the CVD method or the like on the 0) plane, a stripe pattern of the photoresist film 7 is formed using a normal light exposure method. This stripe-shaped pattern has a (100) plane Si
It has sides parallel to the [110] direction on the substrate 1 and has a width of 0.1 to 2 μm and an interval of 0.1 to 2 μm.
Next, as shown in FIG. 7B, using the photoresist film 7 as a mask, the SiN film 11 is subjected to anisotropic dry etching to expose the Si substrate 1. Next, as shown in FIG. 7C, after removing the photoresist film 7, the SiN film 11 is removed.
Is used as a mask to thermally oxidize the surface of the Si substrate 1 exposed in an oxygen atmosphere to form an SiO ₂ film 81 having a thickness of about 60 nm
Partially embedded in the substrate. Next, as shown in FIG. 7 (d), after removing the SiN film 11 by dry etching to expose the surface of the unoxidized Si substrate 1, the high vacuum chamber is formed as in the first embodiment. Inside, the substrate temperature is set to 500 to 650 ° C., and Fe atoms are deposited at a rate of 6 to 15 ° / min.
Is deposited to a thickness of However, in this case, Si
The Fe atoms deposited on the surface of the substrate 1 undergo a solid-phase reaction with the Si atoms to form an epitaxial layer 3 of β-FeSi ₂ having a thickness of about 100 nm. On the other hand, Fe atoms on the SiO ₂ film 81 do not react and become the Fe deposition layer 9. Next, as shown in FIG. 7 (e), by removing the SiO ₂ film 81 by a dilute hydrofluoric acid or the like, Fe deposited layer on the SiO ₂ film 81 9
Is also removed. Next, as shown in FIG. 7 (f), C is deposited on the Si substrate 1 and the epitaxial layer 3 of β-FeSi _2.
A single crystal p-type Si layer 4 is formed by a VD method or the like.
Finally, as shown in FIG. 7G, ohmic electrodes 5 and 6 made of Al are provided on the p-type Si layer 4 and on the surface of the Si substrate 1 where no step is provided.

According to the third, fourth or fifth embodiment,
For example, the (100) plane is parallel to the [110] direction of the Si substrate 1.
SiO within a predetermined area_TwoFormed or buried insulating film
By the stress of forming the insulating film.
Of the Si substrate 1 in the direction perpendicular to the [110] direction.
The element constant shrinks slightly compared to the parallel direction, and β
-FeSi_TwoGrows, so the azimuth rotated 90 degrees
β-FeSi_TwoNot only suppress the crystal growth of the layer,
β-FeSi_TwoIn the directions of the b-axis and the c-axis, ie,
The b axis is the direction perpendicular to the [110] direction, and the c axis is the [110] direction.
Crystal growth by selecting a direction parallel to the direction
High quality single crystal β-FeSi _TwoEpitaki
The char layer can be obtained uniformly.

Further, in the fifth embodiment, the p-type Si layer 4 is further formed by removing the SiO ₂ film 81 by the β-FeSi ₂ epitaxial growth similarly to the first to fourth embodiments. Since it is formed not only on the layer 3 but also on the n-type Si substrate 1, a Si epitaxial layer can be more easily obtained on β-FeSi ₂ and p-type Si / β-F
An epitaxial layer having a double hetero structure with good crystal growth of eSi ₂ / n-type Si can be formed. Therefore,
A light emitting diode having excellent light emitting characteristics using a β-FeSi ₂ layer as an active layer can be obtained. The ohmic electrode 5 made of Al may be provided on at least the β-FeSi ₂ epitaxial layer 3 without forming the p-type Si layer 4.

Note that the p-type Si layer 4 may not be formed.

In the description of the third, fourth and fifth embodiments, the case where the SiO ₂ film is formed by oxidizing Si as the insulating film has been described. However, the SiN film is formed by nitriding Si. Needless to say, the same effect can be obtained even if it is performed.

Next, FIGS. 8A and 8B show the β-FeSi ₂ epitaxial layer formed on the Si substrate having the steps shown in the first and fifth embodiments of the present invention. FIG.
(C) compares the results of X-ray diffraction of a β-FeSi ₂ epitaxial layer formed under the same conditions on a conventional Si substrate 1 having no step. The thickness of the β-FeSi ₂ layer is about 100 nm.

FIG. 8 shows the first or fifth embodiment of the present invention.
The sample of the embodiment is β-FeSi _TwoEpitaxial
Single crystal phase on (400), (600), and (800) planes of layer
And a high quality epitaxial film was obtained.
It can be seen that on a conventional Si substrate with no step
Β-FeSi formed in_TwoThe epitaxial layer of (20)
2) and (422) plane peaks are observed, degrading single crystallinity
You can see that it is doing.

Further, (400), (600), (80)
The peak value of the single crystal phase on the 0) plane is larger in the sample of the fifth embodiment than in the sample of the first embodiment, and a higher quality β-FeSi ₂ epitaxial layer is obtained. It can be seen that they are formed.

Note that the sample of the second embodiment is the first sample.
Since almost the same result as the sample of the second embodiment was obtained, the result of X-ray diffraction of the β-FeSi ₂ epitaxial layer of the _second embodiment was omitted.

Next, FIG. 9 shows the electroluminescence intensity of a light emitting diode in which an epitaxial layer of β-FeSi ₂ is used as an active layer and p-type and n-type Si are provided on both sides. in an epitaxial layer of beta-FeSi ₂ formed on the Si substrate having a stepped portion as shown in the embodiment, the epitaxial layer of the formed beta-FeSi ₂ under the same conditions on the Si substrate 1 without conventional stepped portion This is a comparison of the formed samples at the same current density.

FIG. 9 shows that the light emitting intensity of the light emitting diode according to the present invention is improved 5 to 8 times as compared with the conventional one. In particular, the light emitting diode according to the embodiment of FIG. 5 has higher emission intensity than the light emitting diode according to the first embodiment.

As described above, in the first or fifth embodiment,
Although the case where the n-type Si substrate is used has been described, the same operation and effect can be obtained when the p-type Si substrate is used. In the above description, a method of depositing only Fe has been described. However, a similar effect can be obtained when a β-FeSi ₂ epitaxial layer is formed by co-depositing a molar ratio of Fe: Si of 1: 2. .

(Embodiment 6) FIG. 10 is a cross-sectional view of a semiconductor device according to a sixth embodiment of the present invention.

As shown in FIG.
0) plane, a predetermined area on the n-type Si substrate 1 has a width of 0.
A groove-shaped step portion 2 having a thickness of 1 to 2 μm and a depth of 30 to 50 nm is formed in a thickness of 0.1 to 2 μm in parallel with the [110] direction of the Si substrate 1.
Er on the Si substrate 1 including the steps 2
-Doped β-FeSi ₂ epitaxial layer 12
Is formed, and Er-doped β-FeSi ₂
A p-type Si layer 4 is formed on the epitaxial layer 12 of the substrate 1. The ohmic electrodes 5 and 6 made of Al are formed on the p-type Si layer 4 and on the surface of the Si substrate 1 where no step is provided. Is provided. Note that, without forming the p-type Si layer 4, the Er-doped β-F
The ohmic electrode 5 may be provided on the eSi ₂ epitaxial layer 12.

In general, when a semiconductor is doped with Er, Er becomes Er ³⁺ ions, the level of the f-shell electron system is split by spin-orbit interaction between electrons, and the 4f-shell electron system is changed from high energy to low energy. When transitioning to energy, light is emitted at a wavelength in the 1.5 to 1.6 μm band. But,
While doping of Er to the normal Si very difficult for segregation, the present invention, in the epitaxial layer of beta-FeSi _2, the doping efficiency is up, beta-FeSi ₂
It has been found that the energy of the bandgap transition of E. is efficiently converted to the electron transition of Er, and the luminous efficiency of the β-FeSi ₂ epitaxial layer is increased.

Next, the method for fabricating the semiconductor device of the present invention according to the sixth embodiment will be explained with reference to the process sectional views of FIG.

First, as shown in FIG.
A stripe pattern of the photoresist film 7 is formed on the n-type Si substrate 1 of the 0) plane by using a normal light exposure method. This stripe-shaped pattern has a (100) plane Si
On the substrate 1, it has sides parallel to the [110] direction, a width of 0.1 to 2 μm, and an interval of 0.1 to 2 μm. Next, as shown in FIG. 11B, using the photoresist film 7 as a mask, the Si substrate 1 is subjected to anisotropic dry etching to form a groove-shaped step portion 2 having a depth of about 30 to 50 nm in the Si substrate 1. After the formation, the photoresist film 7 is removed.
Next, as shown in FIG. 11C, in a high vacuum chamber, the substrate temperature is set to 500 to 650 ° C., and Fe is set to 6-1 to 1.
At a deposition rate of 5 ° / min, Er is deposited at a deposition rate of 0.1 to 1 ° / min, and Fe and Er are simultaneously or alternately deposited by electron beam evaporation, sputtering, or the like. At this time, the film thickness of Fe to be deposited is 33 nm, and the film thickness of Er is F
e was about 1/100 to 1/20 of the film thickness. in this case,
The Fe deposited on the surface of the Si substrate 1 undergoes a solid-phase reaction with Si due to heat to form an epitaxial layer of β-FeSi ₂ having a thickness of about 100 nm.
Is also taken into the β-FeSi ₂ epitaxial layer,
An epitaxial layer 12 of r-doped β-FeSi ₂ will be formed. Here, the doping concentration of Er was 1 × 10 ¹⁹ to 1 × 10 ²⁰ cm ⁻³ . Next, as shown in FIG. 11D, Er-doped β-FeSi ₂
A p-type Si layer 4 is formed on the epitaxial layer 12 by CVD or the like. Finally, as shown in FIG. 11E, ohmic electrodes 5 and 6 made of Al are provided on the p-type Si layer 4 and on the surface of the Si substrate 1 where no step is provided.

In the above description of the sixth embodiment, the method of depositing Fe and Er has been described. However, when Si is further added to deposit Fe, Si, and Er simultaneously or alternately (however, Fe: Si Has a similar effect.

In the sixth embodiment, the side where the groove-shaped step is provided on the n-type Si substrate has been described. However, even if the step is not provided, a device having higher luminous efficiency than the conventional one can be obtained. can get.

[0109] Figure 12, beta-FeSi ₂ epitaxial layer as an active layer, on both sides p-type and n-type Si light-emitting diode of the Si substrate beta-FeSi ₂ doped with Er in having a step portion provided in Electrolysis of a sample according to the sixth embodiment using an epitaxial layer and a sample using a non-doped β-FeSi ₂ epitaxial layer formed on a plane (100) Si substrate having no conventional step portion were performed. The luminescence intensity is compared.

The doping concentration of Er at this time was about 5 × 10 ¹⁹ cm ⁻³ .

As is clear from FIG. 12, the sample according to the sixth embodiment shows several sharp emission peaks indicating the transition of the 4f-shell electron system, which is one time smaller than the conventional sample.
The emission intensity corresponding to 5 to 20 times was obtained.
The light emission intensity is further increased as compared with the sample described in the first embodiment of the present invention, and it can be seen that the light emission efficiency is increased by doping Er.

(Embodiment 7) Next, a method of manufacturing a semiconductor device according to a seventh embodiment of the present invention will be described with reference to the process sectional views shown in FIGS.

First, as shown in FIG.
A stripe pattern of the photoresist film 7 is formed on the n-type Si substrate 1 of the 0) plane by using a normal light exposure method. This stripe-shaped pattern has a (100) plane Si
On the substrate 1, it has sides parallel to the [110] direction, a width of 0.1 to 2 μm, and an interval of 0.1 to 2 μm. Next, as shown in FIG. 13B, using the photoresist film 7 as a mask, the Si substrate 1 is anisotropically dry-etched to form a groove-shaped step portion 2 having a depth of about 30 to 50 nm in the Si substrate 1. After the formation, the photoresist film 7 is removed.
Next, as shown in FIG.
Acceleration voltage of 200 ke for Er ions on the surface of i-substrate 1
V, implanted at a dose of 5 × 10 ¹³ cm ^-2 and Er
An injection layer 13 is formed. Next, as shown in FIG. 13D, the substrate temperature is set to 500 to 650 in a high vacuum chamber.
At Fe, Fe is deposited by electron beam evaporation or the like at a deposition rate of 6 to 15 ° / min to a thickness of 33 nm. However, in this case, Fe deposited on the surface of the Si substrate 1
Causes a solid-phase reaction with Si by heat and has a thickness of about 100n
m-Er-doped β-FeSi ₂ epitaxial layer 1
2 are formed. In this case, the doping concentration of Er is 1
× 10 ¹⁸ to 1 × 10 ¹⁹ cm ⁻³ . The thickness of the Er injection layer 13 is β-FeSi ₂ formed by a solid-phase reaction.
Is preferably smaller than the thickness of the epitaxial layer. Next, as shown in FIG. 13E, Er-doped β-Fe
A p-type Si layer 4 is formed on the Si ₂ epitaxial layer 12 by a CVD method or the like. Finally, FIG.
As shown in FIG. 5, ohmic electrodes 5 and 6 made of Al are provided on the p-type Si layer 4 and on the surface of the Si substrate 1 where no step is provided. The p-type Si layer 4
, The ohmic electrode 5 may be provided on the Er-doped β-FeSi ₂ epitaxial layer 12.

(Eighth Embodiment) Next, a method of manufacturing a semiconductor device according to an eighth embodiment of the present invention will be described with reference to the cross-sectional views shown in FIGS.

First, as shown in FIG.
On the n-type Si substrate 1 of the 0) plane, p
A mold Si layer 4 is formed. Next, as shown in FIG. 14B, Fe ions and Er ions are ion-implanted from the surface of the p-type Si layer 4 to form an ion-implanted layer 1 of Fe and Er.
4 is formed. In this case, the accelerating voltages of the Fe ions and the Er ions are selected so that the peaks of the implanted ions are both near the pn junction of the Si layer. The dose range is 1 × 10 ^{16 to} 3 × 10 ¹⁶ cm ^{−2 for} Fe and 1 for Er.
× 10 ^{14 to} 5 × 10 ¹⁴ cm ⁻² is appropriate. Next, FIG.
As shown in FIG. 4 (c), using an electric furnace in a nitrogen atmosphere,
Annealing is performed at a temperature of 900 ° C. for 12 hours to activate the ion implantation layer 14 of Fe and Er. At this time, Fe and S
i reacts to form β-FeSi ₂ microcrystals in the vicinity of the pn junction. Simultaneously, the implanted Er is also taken into the microcrystals, forming an Er-doped β-FeSi ₂ microcrystal layer 15. You. Finally, as shown in FIG. 14D, ohmic electrodes 5 made of Al are formed on the p-type Si layer 4 and on the surface of the Si substrate 1 where no step is provided.
6 is provided. Note that, without forming the p-type Si layer 4,
An ohmic electrode 5 may be provided on the r-doped β-FeSi ₂ microcrystalline layer 15.

Ninth Embodiment Next, a method of manufacturing a semiconductor device according to a ninth embodiment of the present invention will be described with reference to the cross-sectional views shown in FIGS.

First, as shown in FIG.
After an insulating film 8 of SiO ₂ or the like is formed on the entire surface of the n-type Si substrate 1 using the CVD method or the like on the 0) plane, the stripe pattern of the photoresist film 7 is formed using a normal light exposure method. Form. This stripe pattern is (100)
On a surface n-type Si substrate, it has sides parallel to the [110] direction, a width of 0.1 to 2 μm, and an interval of 0.1 to 2 μm. Next, as shown in FIG. 15B, using the photoresist film 7 as a mask, the insulating film 8 and the Si substrate 1 are anisotropically dry-etched to a depth of about 30
After forming the groove-shaped step portion 2 having a thickness of about 50 nm, the photoresist film 7 is removed. Next, as shown in FIG. 15C, in a high vacuum chamber, the substrate temperature was set to room temperature and Fe
And Er are simultaneously deposited by electron beam evaporation or the like to form a Fe deposited layer 16 containing Er. In this case, the substrate temperature is desirably 250 ° C. or lower at which Fe and Si do not react. Further, Fe is deposited at a deposition rate of 6 to 15 ° / min, and Er is deposited at a deposition rate of 0.1 to 1 ° / min, so that the thickness of the Fe deposited layer 16 containing Er is substantially the same as the depth of the step portion 2 of the substrate. . Next, as shown in FIG.
Is an SiO ₂ film, the insulating film 8 is removed with dilute hydrofluoric acid. In this case, the Fe-containing layer containing Er on the insulating film 8 is also removed at the same time, so that the surface of the n-type Si substrate 1 and the surface of the Fe-containing layer 16 containing Er become almost the same. Next, as shown in FIG. 15E, the (100) plane p-type Si substrate 17 is infiltrated into an H ₂ O ₂ —H ₂ SO ₄ solution or the like to perform a hydrophilic treatment. The n-type Si substrate 1 on the (100) plane on which the Fe deposited layer 16 is formed is superposed and adhered. Next, FIG.
As shown in FIG.
Heat treatment in a hydrogen gas atmosphere for ~ 2 hours. Due to this heat treatment, the Fe atoms of the Fe-deposited layer 16 containing Er diffuse into both Si substrates to cause a solid-phase reaction, and β-FeSi
₂ epitaxial layers are formed so as to be embedded in the Si substrates 1 and 17 on both sides, and at the same time, Er atoms are also β-FeSi
Incorporated into the _second epitaxial layer, the Er-doped β-
An epitaxial layer 12 of FeSi ₂ is formed. Further, the surfaces of the n-type Si substrate 1 and the p-type Si substrate 17 are simultaneously bonded, and the two substrates are bonded. Then, as shown in FIG. 15 (g), the (100) plane p-type Si substrate 17 is polished to a desired thickness, and then the p-type Si substrate 17 and the n-type Si substrate 17 are polished. Ohmic electrodes 5 and 6 made of Al are provided on the surface where the first step is not provided.

In the eighth embodiment, the Fe-deposited layer 16 containing Er is formed on the stepped portion. However, the Fe-deposited layer containing Er on the entire surface is formed on the n-type Si substrate 1 having no stepped portion. 16 may be formed.

(Embodiment 10) Next, a tenth embodiment of the method of manufacturing a semiconductor device according to the present invention will be described with reference to the process sectional views shown in FIGS.

First, as shown in FIG.
0) On the n-type Si substrate 1 on the surface, the entire surface is
SiO_TwoAfter forming an insulating film 8 such as
The stripe pattern of the photoresist film 7 is formed by using
Form. This stripe pattern has a (100) plane
Side parallel to the [110] direction on the n-type Si substrate 1
Hold with a width of 0.1 to 2 μm and an interval of 0.1 to 2 μm
have. Next, as shown in FIG.
The insulating film 8 and the n-type S
Anisotropic dry etching of i-substrate 1 for n-type Si substrate
1, a groove-shaped step portion 2 having a depth of about 30 to 50 nm was formed.
Then, Er ions were accelerated at an accelerating voltage of 150 keV and a dose of 3
× 10¹³cm^-2To form the Er injection layer 13
I do. Next, as shown in FIG.
After the film 7 is removed, the substrate temperature is set in a high vacuum chamber.
At room temperature and depositing Fe by electron beam evaporation or the like
A deposition layer 9 is formed. At this time, Fe is 6 to 15 ° / min.
The thickness of the Fe deposition layer 9 by the step of
The depth is almost the same as the depth of the part 2. Next, as shown in FIG.
As shown in FIG._TwoIn case of
The edge film 8 is removed. In this case, an Fe deposited layer on the insulating film 8
Is also removed at the same time, so that the surface of the Si substrate 1
The surface of layer 9 is almost the same. Next, as shown in FIG.
As described above, the (100) plane p-type Si substrate 17 is_Two
O_Two-H_TwoSO_FourHydrophilic treatment by infiltrating into solution etc.
Then, an n-type Si-based (100) plane having the Fe deposition layer 9
It is superimposed on the plate 1 and adhered to each other. Next, FIG.
As shown in (f), using an electric furnace, 700-800
C. for 1 to 2 hours in a hydrogen gas atmosphere.
You. By this heat treatment, both Fe atoms in the Fe deposition layer 9 are removed.
Diffuses into the Si substrate to cause a solid-phase reaction, resulting in β-FeSi_Two
Embedded in the Si layer on both sides
Simultaneously with the formation, Er-doped β-FeSi_TwoNo
A epitaxial layer 12 is formed, and both Si substrates 1 and 1
7 surface is also bonded at the same time, and two substrates are bonded.
Is done. The Er injection layer 13 is formed by a solid phase reaction.
Β-FeSi _TwoThinner than the epitaxial layer 12
Enclosures are preferred. Thereafter, as shown in FIG.
The (100) plane p-type Si substrate 17 is polished and
After the thickness, the p-type Si substrate 17 and the n-type S
Each of the surfaces of the i-substrate 1 on which the step portion is not provided has A
1 are provided.

In the tenth embodiment, the Er injection layer 13 and the Fe deposition layer 9 are formed on the step 2 of the Si substrate 1, but are formed on the entire surface of the Si substrate 1 where no step is provided. You may.

As a modification of the tenth embodiment,
An n-type Si substrate into which Er has been ion-implanted and a p-type Si substrate on which Fe has been deposited are superposed and heat-treated to form an Er-doped β-FeSi ₂ layer into an n-type Si substrate and a p-type Si substrate. It may be embedded between the substrate and the substrate.

As described above, the light emitting diode described in the tenth embodiment has characteristics equivalent to those of the light emitting diode described in the fifth embodiment (see FIG. 12), that is, 15 to 20 times that of the conventional sample. Appropriate luminous intensity was obtained, and it was found that doping with Er increased luminous efficiency.

In the ninth and tenth embodiments, it is needless to say that the same characteristics can be obtained even if the n-type Si substrate 1 and the p-type Si substrate 17 are replaced.

(Embodiment 11) FIG. 17 is a sectional view of a semiconductor device according to an eleventh embodiment of the present invention.

This structure, as shown in FIG.
0) plane, a predetermined area on the n-type Si substrate 1 has a width of 0.
A groove-shaped stepped portion 2 having a thickness of 1 to 2 μm and a depth of 30 to 50 nm is formed in a thickness of 0.1 to 2 μm in parallel with the (110) direction of the Si substrate 1.
And an n-type BAlN on the Si substrate 1.
A layer 18, a BAlGaN layer 19, and a p-type BAlN layer 20 are sequentially formed.
An ohmic electrode 21 made of Ti / Al is provided on the surface of the n-type Si substrate 1 where no step is provided.

The crystal structures of these n-type BAlN layer 18, p-type BAlN layer 20 and BAlGaN layer 19 formed on n-type Si substrate 1 are cubic (cubi).
In c), the composition is selected so that the lattice constant has about 3.84Å, which is 1 / {2 times the lattice constant of Si 5.43}. In this case, the BAlN layer has a band gap of about 6.0 eV, and the BAlGaN layer has a smaller band gap of about 5.0 eV.
It has a band gap of 6 eV or more.

Next, a method of manufacturing the semiconductor device according to the eleventh embodiment of the present invention will be described with reference to the process sectional views shown in FIGS.

First, as shown in FIG.
A stripe pattern of the photoresist film 7 is formed on the n-type Si substrate 1 of the 0) plane by using a normal light exposure method. This stripe-shaped pattern has a (100) plane Si
On the substrate 1, it has sides parallel to the [110] direction, a width of 0.1 to 2 μm, and an interval of 0.1 to 2 μm. Next, as shown in FIG. 18B, using the photoresist film 7 as a mask, the Si substrate 1 is anisotropically dry-etched to form a groove-shaped step portion 2 having a depth of about 30 to 50 nm in the Si substrate 1. After the formation, the photoresist film 7 is removed.
Next, as shown in FIG. 18C, the (100) plane n-type Si having the groove-shaped steps 2 was formed by MOCVD.
N-type B on a substrate 1 at a substrate temperature of 800 to 1000 ° C.
An AlN layer 18, a BAlGaN layer 19, and a p-type BAlN layer 20 are sequentially grown. B as B material for MOCVD
₂ H ₆ (diborane), TMAl (trimethylaluminum) as an Al material, TMGa (trimethylgallium) as a Ga material, NH ₃ (ammonia) as an N material, and H ₂ (hydrogen) as a carrier gas were used. Also, SiH ₄ (silane) is used as an n-type dopant, and (C ₅ H ₅ ) ₂ Mg (biscyclopentadie) is used as a p-type dopant.
Nylmagnesium) was used. These n-type BAlN layer 18, p-type BAlN layer 20 and BAlGaN
The crystal structure of the layer 19 is cubic, and its composition is selected so that its lattice constant has about 3.84Å, which is 1 / {2 times the lattice constant of Si, 5.43}. Finally, as shown in FIG. 18D, the p-type BAlN layer 20 is formed.
An ohmic electrode 21 made of Ti / Al is provided thereon, and Ti / A is provided on a surface of the n-type Si substrate 1 where no step is provided.
1 are provided respectively.

According to the eleventh embodiment, the BAlGaN layer 19 serving as an active layer and the n-type BAl
Since the N layer 18 and the p-type BAlN layer 20 have a cubic crystal structure having a lattice constant of about 3.84Å, which is 1 / {2 times the lattice constant of 5.43} of Si, With the same relationship as the β-FeSi ₂ epitaxial layer on the (100) plane Si substrate, that is, with one side parallel to the [110] direction on the (100) plane of the Si substrate,
Crystal growth is possible. Moreover, since the (100) plane Si substrate has a groove-like stepped portion parallel to the [110] direction, the BAlGaN having a 90-degree rotated orientation is used.
Of high quality BAlG by suppressing crystal growth of layer and BAlN layer
An epitaxial growth layer of aN and BAlN can be uniformly obtained, and the band gap is from about 5.6 eV to about 6.
Light emission in the ultraviolet range up to 0 eV is possible. In addition,
Even if a groove-shaped step portion parallel to the [110] direction is not formed in the (100) plane Si substrate, a reasonable characteristic can be obtained.

In the description of the eleventh embodiment, a BAlGaN layer is used as an active layer, and a BAlN layer is used as a cladding layer.
Although the case of using layers has been described, other combinations,
That is, it is needless to say that the same effect is obtained when a BAlGaN layer is used for both the active layer and the cladding layer, and a BGaN layer is used as the active layer and a BAlN layer or a BAlGaN layer is used as the cladding layer. In addition, the (100) plane Si
As for the substrate, as described in the third embodiment,
The same effect can be obtained by using a method in which a predetermined area parallel to the [110] direction is once covered with an insulating film or the like and a BAlN layer is formed between the insulating films. Further, the case where the n-type Si substrate is used has been described.
It is needless to say that the same effect can be obtained also when the i-substrate is used.

In the first to eleventh embodiments, the light emitting diode has been described. However, it goes without saying that the present invention can be similarly applied to other optical devices such as a semiconductor laser, a photodiode, and a photovoltaic device. .

[0133]

According to the present invention, by using a (100) plane Si substrate having a groove-shaped stepped portion parallel to the [110] direction or a buried insulating film, β-FeSi _{2 is formed} thereon. When forming an epitaxial layer of
Suppresses the crystal growth of the β-FeSi ₂ epitaxial layer having the orientation rotated by 90 degrees, and provides a high-quality β-F having the same orientation.
An epitaxial growth layer of eSi ₂ can be uniformly obtained, and a semiconductor device having excellent light emission characteristics and a method for manufacturing the same can be obtained.

Further, Fe and Er are deposited on a heated Si substrate, Fe is deposited by heating an Si substrate into which Er is implanted, or high-temperature heat treatment is performed after ion implantation of Er and Fe on the surface of the Si substrate. , Er at low temperature on Si substrate surface
After depositing Fe containing Fe or depositing Er at a low temperature on a Si substrate implanted with Er in advance, another S
β-Fe
It is possible to obtain a semiconductor device having excellent light emitting characteristics by efficiently doping Er into a Si ₂ epitaxial layer and a method of manufacturing the same.

Further, by using a groove-shaped or rectangular stepped portion parallel to the [110] direction or a (100) plane Si substrate having an insulating film, an Si lattice constant of 5.43 ° is formed thereon. Cubic BAlGaN layer, BGaN layer, B having a lattice constant of about 3.84
A semiconductor device having excellent characteristics of emitting an ultraviolet region having a band gap of about 5.6 to about 6.0 eV by epitaxially growing an AlN layer or the like with high quality and a method of manufacturing the same can be obtained.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a process sectional view of the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 3 is a cross-sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a process sectional view of a method for manufacturing a semiconductor device according to a second embodiment of the present invention;

FIG. 5 is a cross-sectional view of a semiconductor device according to a third embodiment of the present invention.

FIG. 6 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 7 is a process sectional view of a method for manufacturing a semiconductor device according to a fifth embodiment of the present invention.

FIG. 8 is an X-ray diffraction diagram of an epitaxial layer of β-FeSi ₂ .

FIG. 9 is an electroluminescence intensity diagram of a β-FeSi ₂ light emitting diode.

FIG. 10 is a sectional view of a semiconductor device according to a sixth embodiment of the present invention;

FIG. 11 is a process sectional view of the method for manufacturing the semiconductor device according to the sixth embodiment of the present invention;

FIG. 12 is an electroluminescence intensity diagram of an Er-doped β-FeSi ₂ light emitting diode

FIG. 13 is a process sectional view of the method for manufacturing the semiconductor device according to the seventh embodiment of the present invention;

FIG. 14 is a process sectional view of the method for manufacturing the semiconductor device according to the eighth embodiment of the present invention;

FIG. 15 is a process sectional view of the method for manufacturing the semiconductor device according to the ninth embodiment of the present invention;

FIG. 16 is a process sectional view of the method for manufacturing the semiconductor device according to the tenth embodiment of the present invention;

FIG. 17 is a sectional view of a semiconductor device according to an eleventh embodiment of the present invention.

FIG. 18 is a process sectional view of the semiconductor device manufacturing method according to the eleventh embodiment of the present invention.

FIG. 19 is a view showing a relationship between a crystal plane and a crystal axis of a (100) plane Si substrate and a β-FeSi ₂ epitaxial layer.

FIG. 20 is a diagram showing the relationship between the lattice constant and band gap of BN, GaN, and AlN having a cubic structure.

FIG. 21 shows a (100) Si substrate and a cubic structure of BAlGaN, BGaN, and B having a lattice constant of about 3.84 °.
The figure which shows the relationship between the crystal plane and the crystal axis of each epitaxial layer of AlN.

[Explanation of symbols]

Reference Signs List 1 n-type Si substrate 2 stepped portion 3 β-FeSi ₂ epitaxial layer 4 p-type Si layer 5, 6, 21, 22 ohmic electrode 7 photoresist film 8, 10 insulating film 9 Fe deposited layer 11 SiN film 12 Er Doped β-FeSi ₂ epitaxial layer 13 Er injection layer 14 Fe and Er injection layer 15 Er-doped β-FeSi ₂ microcrystalline layer 16 Er-containing Fe deposition layer 17 p-type Si substrate 18 n-type BAlN layer 19 BAlGaN Layer 20 p-type BAlN layer 81 SiO ₂ film

Continued on the front page F term (reference) 5F041 CA33 CA34 CA46 CA50 CA57 CA64 CA65 CA67 CA72 CA74 CA75 5F045 AA14 AA18 AA19 AB40 AF03 AF13 BB02 BB16 CA09 DA65 DB05 HA05 HA06 HA15 HA16 5F052 AA11 CA04 CA07 DA04 DA08 DB07 DB10 DB10 GA10 GB09 GC01 GC03 HA03 HA06 HA07 HA08 JA08 JA10 JB04 JB05 JB10 KA01 KA06 KA08 KB01

Claims (28)

[Claims] 1. A semiconductor device wherein a beta iron silicide layer is formed on a (100) silicon substrate provided with a groove-shaped step portion parallel to the [110] direction. 2. A beta-iron silicide layer is formed on a one-conductivity-type silicon substrate having a (100) plane provided with a groove-like stepped portion parallel to the [110] direction, and an inverted beta-iron silicide layer is formed on the beta-iron silicide layer. A semiconductor device having a conductive silicon layer formed thereon. 3. A groove-shaped step portion parallel to the [110] direction is provided on a (100) plane one conductivity type silicon substrate,
A semiconductor device, wherein a beta iron silicide layer is formed so as to bury the step, and a silicon layer of the opposite conductivity type is formed on the beta iron silicide layer and the silicon substrate of the one conductivity type. 4. A [100] plane silicon substrate having [11]
A method for manufacturing a semiconductor device, comprising: a step of forming a groove-shaped step portion parallel to the [0] direction; and a step of forming a beta iron silicide layer on the silicon substrate including the step portion. 5. A step of forming a groove-shaped step portion parallel to the [110] direction on a (100) plane one-conductivity-type silicon substrate, and forming the groove portion on the one-conductivity-type silicon substrate including the step portion. A method of manufacturing a semiconductor device, comprising: a step of forming a beta iron silicide layer; and a step of forming a reverse conductivity type silicon layer on the beta iron silicide layer. 6. A step of forming a groove-shaped step portion parallel to the [110] direction on a (100) plane silicon substrate of one conductivity type, and forming a beta iron silicide layer so as to be buried only on the step portion. Forming a beta iron silicide layer and forming a reverse conductivity type silicon layer on the one conductivity type silicon substrate. 7. The [11] of the (100) silicon substrate
A semiconductor device, wherein an insulating film is buried in a region parallel to the [0] direction, and a beta iron silicide layer is formed in a region on the silicon substrate where there is no insulating film. 8. An insulating film is formed in a region parallel to the [110] direction on a (100) plane silicon substrate of one conductivity type,
A semiconductor device comprising: a beta iron silicide layer formed on the silicon substrate sandwiched between the insulating films; and a reverse conductivity type silicon layer formed on the beta iron silicide layer. 9. The [11] of the (100) silicon substrate
[0] A semiconductor device comprising: a step of partially burying an insulating film in a predetermined region parallel to the [0] direction; and a step of forming a beta iron silicide layer in a region where the insulating film is not formed on the silicon substrate. Manufacturing method. 10. A step of forming an insulating film in a predetermined region parallel to the [110] direction on a (100) plane one conductivity type silicon substrate, and no insulating film on the one conductivity type silicon substrate. Forming a beta iron silicide layer in the region;
A method of manufacturing a semiconductor device, comprising: a step of removing the insulating film; and a step of forming a silicon layer of the opposite conductivity type on the silicon substrate of the one conductivity type and the beta iron silicide layer. 11. A semiconductor device comprising a silicon substrate and a beta iron silicide layer doped with erbium provided on a silicon substrate. 12. A semiconductor device comprising: a beta-iron silicide layer doped with erbium on a silicon substrate of one conductivity type; and a silicon layer of a reverse conductivity type on the beta-iron silicide layer. 13. The semiconductor device according to claim 1, wherein the beta iron silicide layer is doped with erbium. 14. A method for manufacturing a semiconductor device, comprising the step of forming a beta iron silicide layer doped with erbium on a silicon substrate. 15. A method comprising the steps of: forming a beta iron silicide layer doped with erbium on a silicon substrate of one conductivity type; and forming a silicon layer of the opposite conductivity type on the beta iron silicide layer. Manufacturing method of a semiconductor device. 16. The method according to claim 4, wherein in the step of forming the beta iron silicide layer, the beta iron silicide layer is doped with erbium.
0. The method of manufacturing a semiconductor device according to any one of the above items. 17. The method for manufacturing a semiconductor device according to claim 14, wherein iron and erbium are simultaneously or alternately deposited on a heated silicon substrate, and a beta iron silicide layer doped with erbium is formed on the silicon substrate. Forming a semiconductor device. 18. The method for manufacturing a semiconductor device according to claim 14, wherein silicon is formed on the heated silicon substrate.
A method for manufacturing a semiconductor device, comprising: depositing iron and erbium simultaneously or alternately to form a beta iron silicide layer doped with erbium on the silicon substrate. 19. The method of manufacturing a semiconductor device according to claim 14, wherein erbium is ion-implanted into the surface of the silicon substrate, and then the erbium-doped beta iron silicide layer is deposited while heating the silicon substrate. Forming a semiconductor device. 20. A step of forming a silicon layer of the opposite conductivity type on a silicon substrate of the one conductivity type, and removing erbium and iron near a junction between the silicon substrate of the one conductivity type and the silicon layer of the opposite conductivity type. A method of manufacturing a semiconductor device, comprising: a step of performing ion implantation; and a step of forming a beta iron silicide layer doped with erbium by performing a high-temperature heat treatment on the silicon substrate. 21. A step of selectively embedding an erbium-containing iron deposition layer on the entire surface or in parallel to the [110] direction on the surface of the (100) one conductivity type silicon substrate; The one-conductivity-type silicon substrate is superposed on the one-conductivity-type silicon substrate, and a heat treatment is performed by superposing the erbium-doped beta-iron silicide layer on the one-conductivity-type silicon substrate. A method of manufacturing the semiconductor device, the method comprising: 22. A step of selectively ion-implanting erbium into the entire surface or a groove-shaped step portion parallel to the [110] direction on the surface of the one-conductivity-type silicon substrate of the (100) plane, and ion-implanting the erbium. Forming an iron deposition layer on the region having the iron conductivity layer, a silicon substrate of the opposite conductivity type is superimposed on the silicon substrate of the one conductivity type on the side having the iron deposition layer, and a heat treatment is performed thereon. Forming a silicide layer between the one conductivity type silicon substrate and the opposite conductivity type silicon substrate. 23. A silicon substrate of one conductivity type in which erbium is ion-implanted in advance is superposed on a silicon substrate of the opposite conductivity type on the side having the iron deposition layer, and heat-treated.
A method for manufacturing a semiconductor device, comprising: burying an erbium-doped beta iron silicide layer between the one conductivity type silicon substrate and the opposite conductivity type silicon substrate. 24. On a (100) plane silicon substrate, B
A semiconductor device, wherein a PN junction is provided using at least one semiconductor layer among an AlGaN layer, a BGaN layer, and a BAlN layer. 25. A BAlGaN layer or a BGaN layer,
Alternatively, the BAlN layer has a cubic structure in which the lattice constant is about 1 / √2 times the lattice constant of silicon, and at least one side has AlGaBN (1) in the [110] direction of the silicon substrate.
00) // Si (100) or BAlN (100) /
/ Si (100) or BGaN (100) // Si
25. The semiconductor device according to claim 24, wherein the single crystal is grown in a plane relationship of (100). 26. On a (100) silicon substrate,
25. The semiconductor device according to claim 24, wherein a groove-like or rectangular step portion parallel to the [110] direction is provided. 27. On a (100) silicon substrate,
Forming a groove-shaped or rectangular step portion parallel to the [110] direction, and forming a step on the silicon substrate having the step portion.
A method for manufacturing a semiconductor device, comprising: forming a PN junction using at least one semiconductor layer among an AlGaN layer, a BGaN layer, and a BAlN layer. 28. [1] on a (100) plane silicon substrate
10] forming an insulating film in a predetermined region parallel to the direction, and forming a BAlGaN film on the silicon substrate between the insulating films.
A method of manufacturing a semiconductor device, comprising: forming a PN junction using at least one semiconductor layer among a semiconductor layer, a BGaN layer, and a BAlN layer.