JP2001125809A - Program equipment and method for detecting its failure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily investigate the cause of any failure caused in the using process of equipment functioning according to a software program by a user, and to easily repair the equipment. SOLUTION: Numbers are respectively assigned to each processing on a program. At the time of executing each processing on the program, the CPU of a microcomputer writes the number of the processing in an address indicated by a buffer pointer on a pointer preservation area 5b in a processing path preservation area 5c, and counts up the buffer pointer. When any failure occurs in the equipment, the CPU writes error information encoded according to the failure in an error preservation area 5a, and then reads all the data on the error preservation area 5a, the pointer preservation area 5b, and the processing path preservation area 5c from an RAM 5, and writes the data in an EEPROM. The data held in the EEPROM can be read to the outside part of the equipment.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to various kinds of equipment such as audio equipment and visual equipment having a control unit constituted by a microcomputer and the like, in which a program is installed and each processing on the program is executed by a CPU. , And a method of detecting a malfunction occurring in the device.

[0002]

2. Description of the Related Art Devices having a self-diagnosis function and capable of detecting a fault location have been considered.

[0003] Specifically, Japanese Patent Application Laid-Open No. Hei 8-289176 discloses an image input device (imaging device) using a CCD, a CCD, a sample-hold circuit in a subsequent stage, an automatic gain control circuit in a subsequent stage, and a subsequent stage. One of the output signals of the processing circuit and the subsequent encoder is selected by a selector, converted into digital data by an A / D converter, taken into a microcomputer, and compared with reference data set in advance by the microcomputer. Then, it is determined whether each of the above components of the imaging system is normal or abnormal.
It shows that writing to an EPROM and reading from the EEPROM to the outside detect which part of the imaging system has failed.

[0004]

However, in the conventional method described above, it is determined whether or not a specific device or circuit such as a CCD or a sample and hold circuit of a specific device such as an image input device using a CCD is normal. As much as possible
When an element or a circuit is abnormal, its cause is not always known. For this reason, there is a problem that it takes a long time to find the cause of the failure and a large amount of time and cost for the repair.

[0005] In particular, recently, many devices have been operated by software programs. In such a program device, there are various problems that can occur in the course of executing each process on the program. When it does, it takes time to find out what the cause is, so repairs are time-consuming and expensive. Further, when a problem that cannot be reproduced or is difficult to be reproduced occurs, the cause cannot be specified and the repair may not be performed in some cases.

[0006] Therefore, the present invention enables a user to easily find out the cause of a malfunction in the course of use by a user in a device functioning by a software program and to easily perform repair. It was made.

[0007]

A program device according to the present invention is provided with a program in which a program is assigned a number for each process, and a control unit for executing each process on the program by a CPU. And a non-volatile memory in which, in the order of execution, the number of the process executed by the CPU before the time is written in the order of execution, together with error information indicating that a problem has occurred by the CPU. .

In this case, the number of the processing executed by the CPU can be directly written into a nonvolatile memory such as an EEPROM. However, a processing path storage area having a ring buffer configuration is set on a RAM in the control unit, and the CPU is operated. Once the number of the process executed is written in the process path storage area, and when a device failure occurs, along with error information,
It is more preferable that the processing number written in the processing path storage area at that time is written in the nonvolatile memory.

In the above-configured program device of the present invention, when a failure occurs in the device in the course of use by the user, the non-volatile memory of the device stores the CPU together with the error information immediately before the failure occurs. Are stored in the order in which they were executed.

[0010] Therefore, a person who repairs the device at the request of the user reads out the stored process number from the non-volatile memory to the outside of the device, and repairs the device from the sequence of the numbers. Can know what processes have been executed and in what order just before the trouble occurs, making it easy to find out the cause of the trouble and repair the equipment. Further, even when a defect that cannot be reproduced or is difficult to be reproduced occurs, the cause can be specified and repair can be performed.

[0011]

FIG. 1 shows an example of a program device according to the present invention. The program device of this example includes a device main body 1, a microcomputer 2 constituting a control unit, an EEPROM 6 as a nonvolatile memory, and an operation unit 7.

The device main unit 1 is a main unit of a device such as an audio device or a visual device such as a car stereo device or a car navigation device that functions according to a software program.

The microcomputer 2 includes a CPU 3, a ROM storing the above programs, fixed data, and the like.
4. RAM functioning as a work area for CPU3
5 is provided.

Each process (subroutine, task) on the program stored in the ROM 4 includes, as shown in FIG.
Assign a number for each process.

On the RAM 5, as shown in FIG. 3, an error storage area 5a in which error information to be described later is written, a processing path storage area 5c in which the number of the processing executed by the CPU 3 is written, and a processing path storage area 5c
Pointer storage area 5b in which a buffer pointer indicating the address of the individual area in which the processing number of
Is mapped.

The processing path storage area 5c has a ring buffer configuration as described later. The extent of the area to be reserved as the processing path storage area 5c is determined as appropriate by the manufacturer of the device in consideration of the function of the device and the like.

When a problem occurs in the device in the course of use by the user, the EEPROM 6 stores a RAM as described later.
All the data in the error storage area 5a, the pointer storage area 5b, and the processing path storage area 5c are written and stored, and are connected to the CPU 3.

The operation unit 7 is a key operation unit or a panel operation unit for operating the device, and is provided with a display unit such as a liquid crystal display unit for displaying the operation status and operation state of the device as necessary.
Connect to U3.

Further, the microcomputer 2 has E
An external output line 8 for reading out the data stored in the EPROM 6 to the outside of the device is provided, and an external device 9 such as a display device is connected to the external output line 8.
Imports the data stored in M6 to the external device 9,
It can be displayed on the external device 9.

In the device described above, each time the CPU 3 executes a process on the program, the CPU 3 stores the process number in the RAM.
5 is written in the processing path storage area 5c. For example, as shown in the vertical direction on the left side of FIG.
o. 100, and then as processing 2 2
00, and then as processing 3 No. The processing of No. 300 is executed. It is assumed that the processing of 400 is executed.

In this case, no. Assuming that the buffer pointer on the pointer storage area 5b of the RAM 5 points to the address 7 of the processing path storage area 5c when executing the processing of No. 100, When the processing of No. 100 is executed, 100 is written to the address 7 of the processing path storage area 5c, and the buffer pointer is rewritten from 7 to 8.

Next, no. At the time of execution of the process of 200,
No. 200 is written to the address 8 of the processing path storage area 5c indicated by the buffer pointer on the pointer storage area 5b, and the buffer pointer is rewritten from 8 to 9.

Next, no. When executing the process of 300,
No. 300 is written to the address 9 indicated by the buffer pointer on the pointer storage area 5b in the processing path storage area 5c, and the buffer pointer is changed from 9 to 10
To be rewritten.

Next, no. At the time of execution of the process of 400,
No. 400 is written to the address 10 indicated by the buffer pointer on the pointer storage area 5b of the processing path storage area 5c, and the buffer pointer is rewritten from 10 to 11.

When a number is written to the last address of the processing path storage area 5c, the buffer pointer is rewritten from a value indicating the last address to a value indicating the first address. Is written to the first address of the processing path storage area 5c.

All possible faults in the equipment are shown coded in a defined number. As described above, if a failure occurs in the device in the process of executing each process,
The CPU 3 first writes the error information coded according to the defect in the error storage area 5a on the RAM 5, and then writes all the error information on the error storage area 5a, the pointer storage area 5b, and the processing path storage area 5c. The data is read from the RAM 5 and is read from the RAM 5 shown in FIG.
In the same format as above, EEPRO
Write to M6.

As described above, a problem occurs and the EEPROM 6
When a manufacturer or repairer repairs a device whose data is stored at the request of a user, the external output line 8
Is connected to the external device 9 and the operation unit 7 transmits the EEP
It instructs to read data stored in the ROM 6.

As a result, the CPU 3 operates as an EEPROM.
The error information, the buffer pointer, and the process number stored in the EEPROM 6 are read from the EEPROM 6 and output to the external device 9.

Therefore, the person who repairs the equipment can know from the sequence of the processing numbers immediately before the trouble occurs what kind of processing was executed and in what order, and the trouble occurred. The cause can be easily determined. Therefore, repair of the equipment is facilitated, and repair costs can be reduced. Further, even when a defect that cannot be reproduced or is difficult to be reproduced occurs, the cause can be specified and repair can be performed.

As a specific example, FIG. 278 is shown in FIG. 98, No. 111, No. 150,
No. 367, no. 59 processing are shown respectively.

No. The processing of No. 98 This is a process executed when a_port is normal in the process of 278.
o. The processing of No. 111 A_por in the process of 278
This is a process executed when t is abnormal. The processing of No. 150 No. 278 is a process executed when b_port is normal. The process of 367 is performed by N
o. This is a process executed when b_port is abnormal in the process of 278.

In addition, No. The processing of No. 59 278
When a_port or b_port is abnormal in the above processing, it is determined that a failure has occurred, and the error information is written into the error storage area 5a on the RAM 5 by using the code 23, and the error storage area 5a and the pointer storage area 5 are written.
b and all data on the processing path storage area 5c
This is a process of reading from the RAM 5 and writing to the EEPROM 6.

Accordingly, No. A_p in the process of 278
No. ort and b_port are normal, 27
8 → No. 98 → No. The processing is executed in the order of 150.

On the other hand, it is assumed that a problem occurs and data as shown in FIG. 7 is written from the RAM 5 to the EEPROM 6.

At this time, since the code of the error information is 23, it can be determined that there is an abnormality in a_port or b_port. Further, from the sequence of the process numbers, the No. immediately before the trouble occurs. 278 → No.
98 → No. 367 → No. It can be seen that the processing has been executed in the order of 59, and eventually it can be seen that the cause is that some abnormality has occurred in b_port.

As in the above-described example, the processing path storage area 5c and the like are set on the RAM 5, and the number of the processing executed by the CPU 3 is temporarily written in the processing path storage area 5c. At this time, according to the method of writing to the EEPROM 6 together with the error information, the processing can be performed at high speed. However, the number of the processing executed by the CPU 3 may be directly written to the EEPROM 6.

[0037]

As described above, according to the present invention, in a device functioning by a software program,
When a problem occurs in the process of use by the user, the cause can be easily investigated and repair can be easily performed, and even if a problem that cannot be reproduced or is difficult to reproduce occurs, Can be identified and repaired.

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of a program device according to the present invention.

FIG. 2 is a diagram showing a state of number assignment to each process.

FIG. 3 is a diagram showing a mapping state of each storage area on a RAM.

FIG. 4 is a diagram showing how a processing number is written in a processing path storage area and how a buffer pointer changes.

FIG. 5 is a diagram showing processing of a certain number.

FIG. 6 is a diagram showing processing of another number.

FIG. 7 is a diagram showing a specific example of data on each storage area of a RAM when a problem occurs.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Device main body part 2 ... Microcomputer 3 ... CP
U, 4 ROM, 5 RAM, 5a error storage area, 5b pointer storage area, 5c processing path storage area, 6 EEPROM, 7 operation unit, 8 external output line, 9 external equipment.

Claims (4)

[Claims] 1. A control unit which carries a program assigned a number for each process, and executes each process on the program by a CPU.
A non-volatile memory in which, in addition to error information indicating that a failure has occurred, a number of a process executed by the CPU before that time is written in the order of execution. 2. The program device according to claim 1, wherein a processing path storage area having a ring buffer configuration is set on a RAM in the control unit, and wherein the CPU stores the number of the executed processing in the order of execution. A program device for writing in the processing path storage area and, when a failure occurs in the device, writing the processing number written in the processing path storage area together with the error information to the nonvolatile memory. 3. A method for detecting a problem occurring in a device having a control unit for executing each process on the program by a CPU, wherein the program is installed, and a number is assigned to each process on the program. When a failure occurs in the device, the CPU writes the number of the process executed by the CPU before that time, together with error information indicating that the failure has occurred, in a non-volatile memory in the order of execution. Device failure detection method. 4. The defect detection method according to claim 3, wherein a processing path storage area of a ring buffer configuration is set on a RAM in the control unit, and the number of the processing executed by the CPU is executed by the CPU. In order, when writing in the processing path storage area, and when a problem occurs in the device, the processing number written in the processing path storage area at that time is written to the nonvolatile memory along with the error information. Defect detection method.