JP2001123298A - Electroplating method, multi-layered printed circuit board and its manufacturing method - Google Patents

Electroplating method, multi-layered printed circuit board and its manufacturing method

Info

Publication number
JP2001123298A
JP2001123298A JP30254599A JP30254599A JP2001123298A JP 2001123298 A JP2001123298 A JP 2001123298A JP 30254599 A JP30254599 A JP 30254599A JP 30254599 A JP30254599 A JP 30254599A JP 2001123298 A JP2001123298 A JP 2001123298A
Authority
JP
Japan
Prior art keywords
plated
plating
electrode
potential
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP30254599A
Other languages
Japanese (ja)
Inventor
Masayuki Shibuya
将行 渋谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Sumitomo Metal Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Industries Ltd filed Critical Sumitomo Metal Industries Ltd
Priority to JP30254599A priority Critical patent/JP2001123298A/en
Publication of JP2001123298A publication Critical patent/JP2001123298A/en
Withdrawn legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To facilitate the electroplating at a constant electrolytic current density, and to reduce the dispersion in the thickness of a deposited film of a plating metal even when the area of individual works to be plated is scattered. SOLUTION: The relationship between the electrode potential and the current density is obtained in advance using electrodes formed of the same material as that of a work to be plated, the work to be plated is polarized at an arbitrary electric potential or current value in a plating bath, the current or the electric potential in this condition is obtained, the area of the work to be plated is calculated from the relationship and the current and the electric potential, and the electroplating is performed at a current to achieve the plating of a predetermined film thickness according to on this calculated area.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、主に多層配線基板
といった電子部品の製造における配線形成に利用するた
めの電解めっき方法と、この方法を利用した多層配線基
板の作製方法およびこうして得られた多層配線基板に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrolytic plating method mainly for use in forming wiring in the production of electronic components such as a multilayer wiring board, a method for manufacturing a multilayer wiring board using this method, and a method for producing the same. The present invention relates to a multilayer wiring board.

【0002】本発明における多層配線基板とは、半導体
素子を収納したパッケージ用の基板(例、プラスチック
パッケージ用基板) と、このようなパッケージ製品を搭
載するための多層プリント配線板の両者を包含する。
[0002] The multilayer wiring board in the present invention includes both a package board (for example, a plastic package board) accommodating a semiconductor element and a multilayer printed wiring board for mounting such a package product. .

【0003】説明の都合上、以下の説明では、多層配線
基板として多層銅配線基板を、電解めっきとして電解銅
めっきを例にとるが、電解めっきおよび配線は銅に限ら
れるものではない。
[0003] For convenience of explanation, in the following description, a multilayer copper wiring board is taken as an example of a multilayer wiring board and electrolytic copper plating is taken as an example of electrolytic plating. However, electrolytic plating and wiring are not limited to copper.

【0004】[0004]

【従来の技術】半導体素子は、従来は汎用型のものが少
品種大量生産されることが多かったが、近年では、ASIC
と呼ばれる、特定の用途向けに開発されたものが多品種
少量生産されることが増えている。したがって、これら
の半導体素子を接続するための配線基板にも、多くの種
類が必要となってきている。
2. Description of the Related Art Conventionally, general-purpose semiconductor devices have been often mass-produced in a small number of types, but recently, ASICs have been widely used.
Developed for a specific application, called "products", is increasing in the variety of small-lot production. Therefore, many types of wiring boards for connecting these semiconductor elements are required.

【0005】また、最近のエレクトロニクス分野におけ
る技術進歩の速度は著しく速く、より性能の高いものを
提供するための設計変更は頻繁に実施されている。これ
らの点から、配線基板の製造技術には、多品種少量生産
や頻繁な設計変更等に対して柔軟に対応できることが望
まれている。
[0005] Also, the rate of technological progress in the electronics field in recent years is remarkably high, and design changes to provide higher performance are frequently performed. From these points, it is desired that the wiring board manufacturing technology be able to flexibly cope with high-mix low-volume production and frequent design changes.

【0006】一方、エレクトロニクス機器の急速な進歩
に伴い、これらを構成する多層プリント配線板や、半導
体素子の収納、接続に用いられるプラスチックパッケー
ジには、配線の微細化や高集積化と共に、製品の信頼性
や耐久性および製品の均質性の向上が求められている。
On the other hand, with the rapid progress of electronic equipment, multi-layer printed wiring boards and plastic packages used for housing and connecting semiconductor elements are becoming increasingly finer and more highly integrated as well as products. Improvements in reliability, durability and product homogeneity are required.

【0007】例えば、従来のパッケージ製品では、配線
幅が50μmと比較的大きかったが、現在では配線幅35μ
m以下のものが作製されている。しかし、めっきレジス
トを利用したフォトレジスト技術で配線パターンを作製
した場合、現像液のへたりや露光現像時のタイミングの
ずれなどの原因により、レジストパターンにより形成さ
れた配線幅に2μm程度の誤差が出てしまうのは避けら
れない。従来の製品のように配線幅が大きい場合には、
この誤差は無視し得るが、上述のように配線幅が35μm
以下と小さくなってくると、この配線幅の誤差が被めっ
き対象面積の誤差になり、製品の均質性に大きく影響す
るようになる。
For example, in a conventional package product, the wiring width is relatively large at 50 μm, but at present, the wiring width is 35 μm.
m or less are manufactured. However, when a wiring pattern is manufactured by a photoresist technique using a plating resist, an error of about 2 μm may occur in the width of the wiring formed by the resist pattern due to a settling of a developing solution or a timing shift during exposure and development. It is inevitable that it will come out. When the wiring width is large like the conventional product,
This error can be ignored, but as described above, the wiring width is 35 μm.
When it becomes smaller than the following, the error in the wiring width becomes an error in the area to be plated, which greatly affects the uniformity of the product.

【0008】すなわち、めっきが施される露出部分 (レ
ジストで保護されていない部分) の面積にバラツキが生
じた基板に対して、同じ電解めっき条件で配線を形成す
ると、露出面積が大きい基板にはめっき厚さが薄く、露
出面積が小さい基板にはめっきが厚く析出してしまう。
このようなめっき膜厚 (配線厚み) のバラツキは、製品
の電気特性を劣化させてしまう恐れがあり、また材料の
無駄をもたらす。
That is, if wiring is formed under the same electrolytic plating conditions on a substrate having a variation in the area of an exposed portion to be plated (a portion not protected by the resist), a substrate having a large exposed area can be formed. Plating is deposited thickly on a substrate having a small plating thickness and a small exposed area.
Such variations in the plating film thickness (wiring thickness) may degrade the electrical characteristics of the product and cause waste of materials.

【0009】したがって、配線幅の小さい多層配線基板
について、上述した厳しい要求に確実に応えることが可
能な製品を安定して製造するためには、配線幅にある程
度の変動があっても、配線厚みの誤差が小さくなるよう
な、製造工程の厳密な管理が必須である。
Therefore, in order to stably produce a product capable of reliably meeting the above-mentioned strict requirements for a multilayer wiring board having a small wiring width, even if the wiring width fluctuates to some extent, the wiring thickness may be reduced. Strict control of the manufacturing process is essential so that the error of the process becomes small.

【0010】配線幅が小さく、集積度が比較的高い多層
配線板の製造では、セミアディティブプロセスと呼ばれ
る製造工程が一般に使用されている。このプロセスで
は、下地配線層が設けられた基板上に絶縁樹脂層を形成
し、樹脂表面に対して粗化処理を施し、無電解銅めっき
皮膜を形成する。その上に、めっきレジストを用いて配
線形成用のレジストパターンを形成してから、無電解銅
めっき層を給電層として電解銅めっきを行う。めっきレ
ジストで保護されている部位には電解による銅の析出は
起こらず、無電解銅めっき層が露出している部位だけに
選択的に銅の電解・析出が進行して、必要な厚みの銅配
線パターンが形成される。その後、めっきレジストを剥
離し、クイックエッチング処理によりめっきレジストで
保護されていた無電解銅めっき層を溶解除去すると、独
立した配線が形成される。
In manufacturing a multilayer wiring board having a small wiring width and a relatively high degree of integration, a manufacturing process called a semi-additive process is generally used. In this process, an insulating resin layer is formed on a substrate provided with a base wiring layer, and the surface of the resin is subjected to a roughening treatment to form an electroless copper plating film. After forming a resist pattern for wiring formation using a plating resist thereon, electrolytic copper plating is performed using the electroless copper plating layer as a power supply layer. Copper deposition by electrolysis does not occur in the part protected by the plating resist, and copper electrolysis and deposition proceeds selectively only in the part where the electroless copper plating layer is exposed, and the copper having a required thickness is formed. A wiring pattern is formed. Thereafter, the plating resist is peeled off, and the electroless copper plating layer protected by the plating resist is dissolved and removed by a quick etching process, whereby an independent wiring is formed.

【0011】上述したセミアディティブプロセスでは、
無電解銅めっきは、電解銅めっきのための給電層を確保
するのに必要なごく薄膜に析出させるだけであり、必要
な厚みを持つ銅配線は本質的には電解めっき技術を用い
て形成される。電解めっきでは、ファラディー則で知ら
れるように、一定の電極面における金属の析出量は、電
流密度と電解時間の積に比例する。したがって、電流密
度が一定のときには、所望する膜厚が得られるだけの電
解めっき時間を与えることにより、安定した膜厚の金属
析出皮膜を得ることが可能であるので、銅配線厚みの制
御が容易であり、コストも電解めっきの方が少なくてす
むためである。
In the above-described semi-additive process,
Electroless copper plating is only deposited on the very thin film necessary to secure a power supply layer for electrolytic copper plating, and copper wiring with the required thickness is essentially formed using electrolytic plating technology. You. In electrolytic plating, as known by Faraday's law, the amount of metal deposited on a given electrode surface is proportional to the product of current density and electrolysis time. Therefore, when the current density is constant, it is possible to obtain a metal deposition film having a stable film thickness by giving an electrolytic plating time sufficient to obtain a desired film thickness, and it is easy to control the thickness of the copper wiring. This is because electrolytic plating requires less cost.

【0012】[0012]

【発明が解決しようとする課題】しかし、セミアディテ
ィブプロセスにおいて電解めっきが行われる基板の被め
っき面は、めっきレジストによりパターン化された部位
(めっきレジストで覆われていない露出部位) である。
前述したように、レジストパターンの配線幅は2μm程
度の誤差が避けられないので、この露出部位の面積、つ
まり電解めっき時の電極面積は、個体間や製造ロットに
応じて多少のバラツキがあり、配線幅が小さいほど、こ
のバラツキによるめっき厚みへの影響が大きくなる。
However, the surface to be plated of the substrate on which electrolytic plating is performed in the semi-additive process is a portion patterned by a plating resist.
(Exposed part not covered with plating resist).
As described above, since the wiring width of the resist pattern is inevitably about 2 μm in error, the area of this exposed portion, that is, the electrode area at the time of electrolytic plating, has some variation depending on the individual and the production lot. The smaller the wiring width, the greater the influence of this variation on the plating thickness.

【0013】また、前工程における基板の露出部位の面
積のバラツキが無視できるほど小さかったとしても、上
述のようにめっき対象物が異なるときはいうまでもな
く、設計が変更されたときには、電極面積は変動してし
まう。
Even if the variation in the area of the exposed portion of the substrate in the previous process is so small as to be negligible, not only when the plating object is different as described above but also when the design is changed, the electrode area is not changed. Fluctuates.

【0014】さらには、実際の電解めっき槽では、電流
分布のバラツキをなくし、析出膜厚の均一化を達成する
ために、被めっき対象物の近傍に、ダミー電極と呼ばれ
る製品とは直接関係のない陰極の設置がしばしば行われ
るが、このようなダミー電極にめっき金属が析出するこ
とによってその陰極面積は変動し、その結果、総合的な
電極面積も変動してしまう。
Further, in an actual electrolytic plating tank, in order to eliminate variations in current distribution and to achieve a uniform deposition film thickness, there is a direct relationship with a product called a dummy electrode in the vicinity of an object to be plated. The installation of a non-existent cathode is often performed, but the deposition of the plating metal on such a dummy electrode changes the cathode area, and consequently the overall electrode area also changes.

【0015】このような電極面積の変動は、その製品・
電解めっきチャンスに応じた電解電流密度を与えるか、
あるいは必要なだけの電解めっき時間を与えることがな
い限り、析出金属膜厚のバラツキを生じる原因となる。
Such a change in the electrode area is caused by
Give electrolytic current density according to electrolytic plating chance,
Alternatively, unless the necessary electroplating time is given, this may cause a variation in the deposited metal film thickness.

【0016】しかし、電極面積を簡便かつ正確に把握す
る適切な方法がないために、このような電極面積の変動
に対処し得る手段として、従来は以下の方法が採用され
ていた。すなわち、電解めっき処理を実施する基板のう
ちの幾つかに対して、特定の電流値にて特定の時間だけ
電解めっきを実施し、その析出量を計測することにより
単位時間当たりの析出量を算出し、この値で所望する析
出量を除することにより、電解めっき時間を決定する。
However, since there is no suitable method for easily and accurately grasping the electrode area, the following method has conventionally been adopted as a means capable of coping with such a change in the electrode area. In other words, the amount of deposition per unit time is calculated by performing electrolytic plating at a specific current value for a specific time on some of the substrates on which the electrolytic plating process is performed, and measuring the amount of the deposition. Then, by dividing the desired amount of deposition by this value, the electrolytic plating time is determined.

【0017】このような手法は簡便とは言い難く、析出
量の算出に用いた基板は最終製品として使用することが
できなくなるばかりでなく、個々の被めっき対象物に対
しての電解めっき時間を与えるものではない。
Such a technique is not easy to use, and the substrate used for calculating the amount of deposition cannot be used as a final product, but also requires a long time for electrolytic plating on each of the objects to be plated. It does not give.

【0018】本発明の課題は、電解めっき工程において
被めっき対象物の電極面積を簡便かつ正確に算出可能な
方法を提供することにより、常に一定の電解電流密度に
て電解めっきを実施することを容易に可能とし、被めっ
き対象物におけるめっき金属の析出量を一定にする技術
を開発することである。より具体的には、本発明の課題
は、配線厚みの変動が低減した微細配線を持つ多層配線
基板の効率的かつ簡便な製作技術を開発することであ
る。
An object of the present invention is to provide a method for easily and accurately calculating an electrode area of an object to be plated in an electrolytic plating step, so that an electrolytic plating is always performed at a constant electrolytic current density. It is an object of the present invention to develop a technology which makes it possible to easily deposit a plating metal on an object to be plated. More specifically, an object of the present invention is to develop an efficient and simple manufacturing technique for a multilayer wiring board having fine wiring with reduced variation in wiring thickness.

【0019】[0019]

【課題を解決するための手段】本発明者は、電気化学反
応において、特定の条件下では、反応の活性化エネルギ
ーと電解電流の間には1対1の特定の関係が存在するこ
とに着目し、この関係を用いて被めっき対象物の電極面
積を容易に把握できる方法について検討した結果、本発
明を完成した。
Means for Solving the Problems The present inventors have noticed that, under specific conditions, a specific one-to-one relationship exists between the activation energy of the reaction and the electrolytic current in an electrochemical reaction. The present inventors have completed a study on a method for easily grasping the electrode area of the object to be plated using this relationship.

【0020】すなわち、溶液条件や攪拌条件等が一定で
あれば、電極電位と電解電流密度の間には安定した1対
1の相関関係が認められる。そこで、被めっき対象物と
実質的に同じ材料からなる面積既知の電極を用いて、電
極電位と電解電流密度の関係を調査しておく。一方、被
めっき対象物をめっき浴中において特定の電極電位に定
電位分極し、そのときの電流値を計測する。このときの
分極電位と電流密度の関係は、面積既知の電極を用いて
調査した電極電位と電流密度の関係と等しいので、両者
の電極電位と同一にすれば、計測された電流値をその電
流密度にて除することにより、被めっき対象物の電極面
積が与えられる。
That is, if the solution conditions and the stirring conditions are constant, a stable one-to-one correlation between the electrode potential and the electrolytic current density is recognized. Therefore, the relationship between the electrode potential and the electrolytic current density is investigated using an electrode having a known area made of substantially the same material as the object to be plated. On the other hand, an object to be plated is subjected to constant potential polarization to a specific electrode potential in a plating bath, and a current value at that time is measured. At this time, the relationship between the polarization potential and the current density is equal to the relationship between the electrode potential and the current density investigated using an electrode having a known area. Dividing by the density gives the electrode area of the object to be plated.

【0021】このようにして求めた電極面積に、予定し
ていた所定の電解電流密度を乗ずることにより、通電す
べき全電流値が決定される。このような方法により決定
された電流値にて電解めっきを実施することにより、全
ての製品において一定かつ正確な値の電流密度による電
解めっきが可能となる。
By multiplying the electrode area obtained in this way by a predetermined predetermined electrolytic current density, the total current value to be energized is determined. By performing electrolytic plating at a current value determined by such a method, it becomes possible to perform electrolytic plating with a constant and accurate value of the current density in all products.

【0022】本発明の電解めっき方法は下記工程 (1)〜
(4) を含むことを特徴とする: (1) めっき浴中における、被めっき対象物の分極時の電
流値および電位値を求める工程; (2) 被めっき対象物と実質的に同じ材料からなる面積既
知の電極を用いて得られた電極電位と電流密度との関係
と、前記工程(1) で求めた電流値および電位値とから、
被めっき対象物の被めっき対象面積を算出する工程; (3) 算出された面積値より、被めっき対象物の電流密度
が任意の所望の値になる電流値を算出する工程; および (4) 前記工程(3) で算出された電流値で被めっき対象物
に通電し、めっき金属を析出させる工程。
The electrolytic plating method of the present invention comprises the following steps (1) to
(1) a step of obtaining a current value and a potential value at the time of polarization of an object to be plated in a plating bath; (2) from a material substantially the same as the object to be plated From the relationship between the electrode potential and the current density obtained using an electrode having a known area, and the current value and the potential value obtained in the step (1),
(3) calculating a current value at which the current density of the object to be plated becomes any desired value from the calculated area value; and (4) A step of energizing the object to be plated with the current value calculated in the step (3) to deposit a plated metal;

【0023】本発明の多層配線基板の作製方法は、少な
くとも一部の配線が電解めっき法により形成される多層
配線基板の作製において、該電解めっき法が下記工程
(1)〜(4) を含むことを特徴とする: (1) 被めっき対象部が露出した下地基板について、めっ
き浴中における、被めっき対象部の分極時の電流値およ
び電位値を求める工程; (2) 被めっき対象部と実質的に同じ材料からなる面積既
知の電極を用いて得られた電極電位と電流密度との関係
と、前記工程(1) で求めた電流値および電位値とから、
基板の被めっき対象部の面積を算出する工程; (3) 算出された面積値より、被めっき対象部の電流密度
が任意の所望の値になる電流値を算出する工程; および (4) 前記工程(3) で算出された電流値で被めっき対象部
に通電し、めっき金属を析出させて配線を形成する工
程。
The method of manufacturing a multilayer wiring board according to the present invention is a method of manufacturing a multilayer wiring board in which at least a part of the wiring is formed by electrolytic plating.
(1) A step of obtaining a current value and a potential value at the time of polarization of the portion to be plated in a plating bath with respect to the underlying substrate having the portion to be plated exposed. (2) the relationship between the electrode potential and the current density obtained using an electrode having a known area composed of substantially the same material as the portion to be plated, and the current value and the potential value obtained in the step (1). From
Calculating the area of the portion to be plated of the substrate; (3) calculating a current value at which the current density of the portion to be plated becomes any desired value from the calculated area value; and (4) A step of applying a current to the portion to be plated with the current value calculated in the step (3) to deposit a plating metal and form a wiring.

【0024】本発明により、樹脂層間に配線を有する多
層配線基板であって、前記配線の幅が35μm以下であ
り、配線の少なくとも一部が電解めっきによって形成さ
れており、複数作製された多層配線基板の電解めっきで
形成された配線の膜厚の標準偏差が2.8 %以下であるこ
とを特徴とする多層配線基板もまた提供される。
According to the present invention, there is provided a multilayer wiring board having wiring between resin layers, wherein the width of the wiring is 35 μm or less, and at least a part of the wiring is formed by electrolytic plating. A multilayer wiring board is also provided, wherein the standard deviation of the film thickness of the wiring formed by electroplating the substrate is 2.8% or less.

【0025】[0025]

【発明の実施の形態】本発明の実施の形態について添付
図面を参照して説明する。本発明にあっては、被めっき
対象物と実質的に同一の材質で作製された、電極面積が
既知の電極を用いて、好ましくは被めっき対象物へのめ
っき条件と同じめっき条件下にて、電極電位E(V) と電
解電流密度i(A/m2)の関係を予め求める。補正によって
条件の違いを調整できる程度であれば、多少のめっき条
件の相違は許容される。
Embodiments of the present invention will be described with reference to the accompanying drawings. In the present invention, using an electrode having a known electrode area, made of substantially the same material as the object to be plated, preferably under the same plating conditions as the plating conditions for the object to be plated , The relationship between the electrode potential E (V) and the electrolytic current density i (A / m 2 ) is determined in advance. As long as the difference can be adjusted by the correction, a slight difference in the plating condition is allowed.

【0026】両者の関係を求めることは、特定の電極電
位に対する電解電流密度を求めることであってもよく、
電極電位が変化したときのそれぞれの電解電流密度との
関係式を求めることであってもよい。
Obtaining the relationship between the two may be obtaining the electrolytic current density for a specific electrode potential.
It may be to obtain a relational expression with each electrolytic current density when the electrode potential changes.

【0027】このような両者の関係を求めるための手段
としては、通常の分極測定法が使用可能であり、電極電
位を制御しながら電解電流を測定する電位規制法や電流
を制御しながら電極電位を測定する電流規制法が使用可
能である。また、電位規制法を用いる測定では、定電位
分極法と動電位分極法の何れも採用可能である。
As a means for obtaining such a relationship between the two, a normal polarization measurement method can be used, and a potential regulation method for measuring the electrolytic current while controlling the electrode potential, and an electrode potential method while controlling the current. The current regulation method that measures the current can be used. In the measurement using the potential regulation method, any of the constant potential polarization method and the potentiodynamic polarization method can be adopted.

【0028】以下の説明では、電位規制法について記述
するが、電流規制法を用いても基本的な作用は同等であ
る。
In the following description, the potential regulation method will be described, but the basic operation is the same even if the current regulation method is used.

【0029】図1に、上述のようにして得られた電極電
位E(V) と電流密度i(A/m2)の関係を示したカソード分
極曲線の一例を示す。もちろん、予め決めておいた電極
電位x(V) を印加したときの電流密度を個々に計測して
もよい。このときは、後述するめっき浴での分極時の電
極電位と上記電極電位x(V) とは同じ値に設定する。こ
れらの両者の場合を含めて本発明では、単に電極電位と
電流密度の「関係」を求めるという。
FIG. 1 shows an example of a cathode polarization curve showing the relationship between the electrode potential E (V) and the current density i (A / m 2 ) obtained as described above. Of course, the current density when a predetermined electrode potential x (V) is applied may be measured individually. At this time, the electrode potential at the time of polarization in the plating bath to be described later and the electrode potential x (V) are set to the same value. In the present invention including both of these cases, the "relationship" between the electrode potential and the current density is simply obtained.

【0030】電極電位の計測には照合電極が必要である
が、同じめっき溶液中にて安定した電位を示すものであ
れば、銀/塩化銀照合電極や飽和カロメル照合電極など
公知の照合電極が何れも使用可能である。電解めっき液
中には一定量の第2銅イオンが存在するので、自然浸漬
された銅や白金等の金属片でも安定した自然電極電位を
示すものであれば、これを照合電極として使用すること
も可能である。
A reference electrode is required for measuring the electrode potential. If the electrode shows a stable potential in the same plating solution, a known reference electrode such as a silver / silver chloride reference electrode or a saturated calomel reference electrode can be used. Either can be used. Since a certain amount of cupric ion is present in the electrolytic plating solution, if a metal piece such as copper or platinum naturally immersed exhibits a stable natural electrode potential, use this as a reference electrode. Is also possible.

【0031】別に、被めっき対象面積が未知の被めっき
対象物をめっき浴中に設置し、前述の特定の電極電位
[x(V)]に定電位分極し、そのときの電流値 [y(A)]を
計測する。つまり、予め求めた電極電位と電流値との関
係を実際のめっき浴においても再現し、そのときの電流
値 [y(A)]を求め、先に求めた電流密度値 [z(A/m2)]
と比較するのである。
Separately, an object to be plated whose area is unknown is placed in a plating bath, and the above-described specific electrode potential is set.
The potential is polarized at [x (V)], and the current value [y (A)] at that time is measured. That is, the relationship between the electrode potential and the current value obtained in advance is reproduced in an actual plating bath, the current value [y (A)] at that time is obtained, and the current density value [z (A / m 2 )]
Compare with.

【0032】本発明では、定電位分極を行う電極電位に
ついては、予め求めた前述の関係における電極電位と実
質上同一である限り、特に限定しないが、必要とする精
度での電流計測が可能であれば、次のような理由から、
具体的には、測定される電流値ができるだけ小さくなる
ように電極電位を選定することが望ましい。
In the present invention, the electrode potential for performing the constant potential polarization is not particularly limited as long as it is substantially the same as the previously determined electrode potential in the above-described relationship, but it is possible to measure the current with the required accuracy. If so, for the following reasons:
Specifically, it is desirable to select the electrode potential so that the measured current value is as small as possible.

【0033】すなわち、自然電極電位と分極電位の差で
示される分極過電圧が比較的小さいときには、反応速度
は比較的小さく、物質輸送の遅延に起因した濃度過電圧
の影響が無視し得るので、その反応速度はめっき液の流
動状態には依存しない。このとき、分極過電圧と電流密
度の関係は主として反応の活性化エネルギーによって決
定され、電極電位と電解電流密度の間には、1対1の関
係が成立する。
That is, when the polarization overpotential indicated by the difference between the natural electrode potential and the polarization potential is relatively small, the reaction rate is relatively small, and the influence of the concentration overpotential caused by the delay of mass transport can be neglected. The speed does not depend on the flowing state of the plating solution. At this time, the relationship between the polarization overvoltage and the current density is mainly determined by the activation energy of the reaction, and a one-to-one relationship is established between the electrode potential and the electrolytic current density.

【0034】しかし、分極過電圧が比較的大きくなる
と、その反応速度は大きくなり、反応に見合うだけの反
応種の供給が遅れがちとなり、物質輸送の影響が大きく
なる。このような状態では、めっき液の流動条件に依存
して電極電位と電解電流密度の対応関係が変化してしま
う。そのような状況下で電極電位と電解電流密度の関係
を利用するには、流動条件を完全に一致させる必要があ
るが、工業的に流動条件を一定化することは現実的には
極めて困難である。
However, when the polarization overpotential is relatively large, the reaction speed is high, and the supply of the reactive species sufficient for the reaction tends to be delayed, so that the influence of mass transport is increased. In such a state, the correspondence between the electrode potential and the electrolytic current density changes depending on the flow conditions of the plating solution. In order to utilize the relationship between the electrode potential and the electrolytic current density under such circumstances, it is necessary to completely match the flow conditions. However, it is practically extremely difficult to stabilize the flow conditions industrially. is there.

【0035】また、定電位分極を行うことにより、製品
である被めっき対象物そのものに電流密度に応じた金属
析出が起こるので、大きな電流が流れることは、一定の
電流密度にて安定して電解めっきを実施しようとする本
発明の思想から考えても好ましくない。
Further, by performing the constant potential polarization, metal deposition occurs in accordance with the current density on the object to be plated, which is a product itself, so that the flow of a large current is stable at a constant current density. It is not preferable from the viewpoint of the present invention that the plating is to be performed.

【0036】次に、本発明によれば、上述のようにして
面積既知の電極を用いて求めた電極電位と電流密度の関
係、例えばそれらの分極曲線、を利用して、被めっき対
象物が定電位分極された電位 [x(V)]における電解電流
密度の値 [z(A/m2)] を読み取るか、あるいはそのよう
に決定された電極電位 [x(V)]を印加したときに電解電
流密度 [z(A/m2)] を計測する。
Next, according to the present invention, the object to be plated is determined by utilizing the relationship between the electrode potential and the current density obtained by using the electrode having the known area as described above, for example, their polarization curves. When reading the value [z (A / m 2 )] of the electrolytic current density at the potential [x (V)] polarized at a constant potential, or when applying the electrode potential [x (V)] determined as such. Next, the electrolytic current density [z (A / m 2 )] is measured.

【0037】一方、定電位分極された被めっき対象物に
おける電解電流密度は、例えば上述の分極曲線から読み
取ったか、あるいは同じ電極電位のときに実際に計測し
た電解電流密度と等しいので、被めっき対象物にて分極
時に計測された電流値を、その電解電流密度にて除する
ことにより、被めっき対象物の電極面積 (被めっき対象
面積) [S(m2 )]が算出される。この関係式は、 y÷z=S ・・・ (1) で表される。
On the other hand, the electrolytic current density of the plating object subjected to the constant potential polarization is equal to the electrolytic current density read from the above-mentioned polarization curve or actually measured at the same electrode potential. The electrode area of the object to be plated (area to be plated) [S (m 2 )] is calculated by dividing the current value measured during polarization of the object by the electrolytic current density. This relational expression is represented by y ÷ z = S (1)

【0038】被めっき対象物の電極面積(S) が把握され
たなら、その電極面積に任意の所望の電解電流密度を乗
ずることにより、これから加えるべき電解電流値が直ち
に与えられ、個々の被めっき対象物に対して、常に一定
の電解電流密度での電解めっきが可能となる。
Once the electrode area (S) of the object to be plated has been determined, the electrode area is multiplied by any desired electrolytic current density to immediately give an electrolytic current value to be added from now on. Electroplating with a constant electrolytic current density on the object is always possible.

【0039】また、このようなシステム一式を電解めっ
き装置に予め組み込んでおくことにより、さらに簡便に
一定の電解電流密度での電解めっきが可能となる。
By incorporating such a system in advance in an electrolytic plating apparatus, electrolytic plating at a constant electrolytic current density can be performed more easily.

【0040】本発明にかかる電解めっき方法は、めっき
操作一般に適用が可能であるが、特に被めっき対象面積
を予め求めておくことが困難であって、一定厚さのめっ
きが要求される被めっき対象物の電解めっきや、電解電
流密度に依存して析出皮膜の特性が大きく変化するよう
な電解めっきに適用することが有利である。
The electrolytic plating method according to the present invention can be applied to plating operations in general, but it is particularly difficult to determine the area to be plated in advance, and the plating method requires plating of a certain thickness. It is advantageous to apply the present invention to electrolytic plating of an object or electrolytic plating in which the properties of a deposited film greatly change depending on the electrolytic current density.

【0041】なお、一枚の基板における析出膜厚分布の
均一化を目的としたダミー電極(ダミー基板)が使用さ
れる場合には、算出される電極面積値は、配線部の露出
面積とダミー電極面積との総和で与えられるので、何ら
の問題なく本発明が適用可能である。むしろ、ダミー電
極使用時には、当該電極への金属析出に伴う面積増加の
影響が確実に存在し、この変動要因が本発明により除外
されるので、その効果は絶大となる。
When a dummy electrode (dummy substrate) is used for the purpose of making the distribution of the deposited film thickness uniform on one substrate, the calculated electrode area value is determined by the exposed area of the wiring portion and the dummy area. The present invention can be applied without any problem since it is given by the total sum with the electrode area. Rather, when the dummy electrode is used, the effect of the area increase accompanying the metal deposition on the electrode is definitely present, and this variation factor is excluded by the present invention, so that the effect is enormous.

【0042】本発明は、例えば多層配線基板の作製にお
いて配線の形成に利用される電解めっき方法に適用する
ことが特に有利である。その場合、被めっき対象部が露
出している下地基板 (例、下地配線層が形成されている
未完成パッケージ) に対して、次のようにして電解めっ
きを実施することにより、銅配線を形成することができ
る。
It is particularly advantageous to apply the present invention to an electrolytic plating method used for forming wiring in the production of a multilayer wiring board, for example. In this case, copper wiring is formed by performing electrolytic plating on the underlying substrate (for example, an unfinished package on which the underlying wiring layer is formed) where the plating target portion is exposed, as follows. can do.

【0043】すなわち、前述のようにして、被めっき対
象部と実質的に同じ材料からなる面積既知の電極を用い
て、電極電位と電流密度との関係を予め求めておく。一
方、被めっき対象部が露出している下地基板 (例、未完
成パッケージ) については、予め設定しておいた電極電
位でめっき浴中において分極させた時の電極電位と電流
値を求める。このとき得られた電流値と、前述の関係で
求められる電流密度とを比較して、前記関係式(1) によ
ってこの基板の露出した被めっき対象部の面積を求め
る。この被めっき対象部の面積から、特定の電流密度の
ときに任意の所望のめっき厚さとするための電流値を算
出し、この算出された電流値を通電してめっきを行い、
目的とする厚さの金属を析出させて配線を形成するので
ある。
That is, as described above, the relationship between the electrode potential and the current density is obtained in advance by using an electrode having a known area made of substantially the same material as the portion to be plated. On the other hand, for an underlying substrate (eg, an unfinished package) where the portion to be plated is exposed, the electrode potential and current value when polarized in a plating bath with a preset electrode potential are determined. The current value obtained at this time is compared with the current density obtained by the above-described relationship, and the area of the exposed portion to be plated of the substrate is obtained by the above-mentioned relational expression (1). From the area of the portion to be plated, a current value for obtaining an arbitrary desired plating thickness at a specific current density is calculated, plating is performed by applying the calculated current value,
The wiring is formed by depositing a metal having a desired thickness.

【0044】被めっき材である下地基板の露出面積、つ
まり被めっき対象部の面積が判明した後の電解めっき処
理条件は当業者には良く知られており、これ以上の説明
は要しないであろう。
The electroplating conditions after the exposed area of the substrate to be plated, that is, the area of the portion to be plated is determined, are well known to those skilled in the art, and need not be described further. Would.

【0045】本発明によれば、配線基板の配線の幅が35
μm以下、好ましくは30μm以下と小さく、配線幅のバ
ラツキによるめっき厚みへの影響が相対的に大きくなる
場合でも、露出面積、つまり被めっき対象部の面積が常
に計測可能であり、それに基づいて算出された電流値で
めっき操作を行うことにより、所定厚さを持ち、その厚
さにバラツキのない配線を形成することが可能となる。
According to the present invention, the wiring width of the wiring board is 35
μm or less, preferably 30 μm or less, and even when the influence on the plating thickness due to the variation in the wiring width becomes relatively large, the exposed area, that is, the area of the portion to be plated can always be measured, and the calculation is performed based on that. By performing the plating operation with the set current value, it is possible to form a wiring having a predetermined thickness and a uniform thickness.

【0046】特に、そのような配線厚さのバラツキにつ
いて、膜厚の標準偏差を2.8 %以下とすることで、従来
は得られなかったような、高周波数での安定駆動等の優
れた効果が実現されるのであって、そのような本発明に
かかる多層配線基板の実用上の意義は大きい。
In particular, by setting the standard deviation of the film thickness to 2.8% or less for such variations in the wiring thickness, excellent effects such as stable driving at a high frequency, which cannot be obtained conventionally, can be obtained. This is realized, and the practical significance of such a multilayer wiring board according to the present invention is great.

【0047】なお、以上にはめっき種が銅の場合を例に
とって本発明を説明したが、めっき種がニッケル、金、
銀、亜鉛等の他の金属、或いはこれらの金属の合金のよ
うに、電解めっきにより析出皮膜が得られるものであれ
ば、本発明の効果は同様に達成される。例えば、磁気ヘ
ッド等に用いられるFe−Ni合金の電解パターンめっきで
は、電流密度に依存して析出皮膜の組成が変化してしま
うので、本発明を有効に活用できる。
Although the present invention has been described with reference to the case where the plating type is copper, the plating type is nickel, gold,
The effect of the present invention can be similarly achieved as long as a deposition film can be obtained by electrolytic plating, such as another metal such as silver or zinc, or an alloy of these metals. For example, in the case of electrolytic pattern plating of an Fe-Ni alloy used for a magnetic head or the like, the composition of the deposited film changes depending on the current density, so that the present invention can be effectively used.

【0048】[0048]

【実施例】本発明の作用効果をさらに具体的に実施例に
よって説明するが、本発明はこの実施例の態様にのみ限
定されるものではない。まず、硫酸−硫酸銅めっき浴中
にて電解めっき銅の電極電位と電解電流密度の関係を求
める。表1に、使用した電解銅めっき浴の浴組成の概略
を示す。
EXAMPLES The function and effect of the present invention will be described more specifically with reference to examples, but the present invention is not limited only to the embodiments. First, the relationship between the electrode potential of electrolytic plated copper and the electrolytic current density in a sulfuric acid-copper sulfate plating bath is determined. Table 1 shows an outline of the bath composition of the electrolytic copper plating bath used.

【0049】[0049]

【表1】 [Table 1]

【0050】測定には、回転ディスク電極装置[(有) 日
厚計測製;RRDE-1] 、スピードコントローラ (同社製;
SC-5) 、容量0.15 dm3のガラスセル (同社製;NKC-70-
T) および白金回転ディスク電極 (同社製;NDE-1-6:電
極面積=2.826 ×10-5 m2)を使用した。白金回転ディス
ク電極には、測定の直前に、硫酸銅めっき液を用いて、
ディスク回転速度900 rpm 、電流密度100A/m2 にて600
s の電解銅めっきを予め施した。対極には白金電極を使
用し、照合電極にはダブルジャンクション型の銀/塩化
銀照合電極(3.0 kmol/m3-KCl)[岩城硝子 (株) 製;IW06
7]を使用した。
For the measurement, a rotating disk electrode device (manufactured by Nikkatsu Keiso; RRDE-1), a speed controller (manufactured by the company;
SC-5), capacity 0.15 dm 3 of a glass cell (manufactured by the company; NKC-70-
T) and a platinum rotating disk electrode (manufactured by the company; NDE-1-6: electrode area = 2.826 × 10 −5 m 2 ). For the platinum rotating disk electrode, immediately before the measurement, using a copper sulfate plating solution,
Disk rotational speed 900 rpm, at a current density of 100A / m 2 600
s was previously subjected to electrolytic copper plating. A platinum electrode is used as a counter electrode, and a double junction silver / silver chloride reference electrode (3.0 kmol / m 3 -KCl) is used as a reference electrode (Iwaki Glass Co., Ltd .; IW06)
7] was used.

【0051】電気化学的計測には、全自動分極測定装置
[北斗電工 (株) 製;HZ-1A 、ポテンショ/ガルバノス
タット;HA-501G 、任意関数発生器;HB-105、および日
本電気 (株) 製;PC-9801Ra]を使用した。 測定は、自
然電極電位よりカソード方向へ、電位掃引速度を0.5 mV
/sとして実施した。図2に、本例にてディスク回転速度
400 rpm で測定した分極曲線を示す。
For the electrochemical measurement, a fully automatic polarization measuring device was used.
[HZ-1A, potentiometer / galvanostat; HA-501G, arbitrary function generator; HB-105, manufactured by Hokuto Denko; PC-9801Ra, manufactured by NEC Corporation] were used. The measurement was performed at a potential sweep rate of 0.5 mV from the natural electrode potential toward the cathode.
/ s. FIG. 2 shows the disk rotation speed in this example.
The polarization curve measured at 400 rpm is shown.

【0052】次に、実際に電解めっき加工が行った被め
っき対象物について説明する。下地基板には、市販の銅
張り積層板 (エポキシ系、FR-4グレード) を使用し、表
面の銅箔を塩化第二鉄水溶液を主成分とするエッチング
液を用いて下地回路を形成した。
Next, an object to be plated actually subjected to electrolytic plating will be described. A commercially available copper-clad laminate (epoxy, FR-4 grade) was used as the base substrate, and the base circuit was formed on the copper foil on the surface using an etching solution containing a ferric chloride aqueous solution as a main component.

【0053】絶縁材料としては、フェノールノボラック
型エポキシ樹脂 (液化シェル製、商品名:エピコート15
4)を主成分とするワニスを作製し、これをロールコート
法を用いて上記基板上に塗布し、423Kにて10.8k 秒乾燥
硬化させることにより絶縁性樹脂層を形成した。
As the insulating material, a phenol novolak type epoxy resin (manufactured by liquefied shell, trade name: Epicoat 15)
A varnish containing 4) as a main component was prepared, and the varnish was applied on the above substrate by a roll coating method, and dried and cured at 423 K for 10.8 k seconds to form an insulating resin layer.

【0054】乾燥硬化後の絶縁性樹脂層の膜厚は35μm
であった。樹脂表面は、膨潤処理を行った後に、過マン
ガン酸カリウム(60 g/dm3)と水酸化ナトリウム(35g /dm
3)を主成分とする混合溶液に353Kにて720 秒間浸漬する
ことにより粗化処理を行った。その後、粗化された絶縁
性樹脂表面に中和処理を施し、448Kにて3.6k秒間の硬化
処理を行った。
The thickness of the insulating resin layer after drying and curing is 35 μm.
Met. After performing the swelling treatment on the resin surface, potassium permanganate (60 g / dm 3 ) and sodium hydroxide (35 g / dm 3
Roughening treatment was performed by dipping in a mixed solution containing 3 ) as a main component at 353 K for 720 seconds. Thereafter, the roughened insulating resin surface was subjected to a neutralization treatment, and a curing treatment was performed at 448 K for 3.6 ksec.

【0055】粗化処理後の樹脂表面に、パラジウム触媒
(シプレイ製) を付与し、活性化処理を施した後に、表
2に示した323Kの無電解銅めっき浴を用いて、1.2k秒間
の無電解めっきによる金属銅析出処理を行った。この無
電解銅めっきプロセスによる析出銅の膜厚は0.8 μmで
あった。
A palladium catalyst is applied to the surface of the resin after the roughening treatment.
(Manufactured by Shipley Co., Ltd.), and after activation treatment, metal copper deposition treatment by electroless plating for 1.2 ksec was performed using a 323 K electroless copper plating bath shown in Table 2. The film thickness of the copper deposited by this electroless copper plating process was 0.8 μm.

【0056】[0056]

【表2】 [Table 2]

【0057】次に、感光性のめっきレジストを用いてフ
ォトリソグラフ法により配線パターンを形成した。この
ときの配線パターン (露出している被めっき対象部) の
幅は35μmとした。このように加工した被めっき対象物
である下地基板は、本発明の各実施例および比較例用に
各々128 枚ずつ作製され、電解めっきに供された。
Next, a wiring pattern was formed by photolithography using a photosensitive plating resist. At this time, the width of the wiring pattern (the exposed portion to be plated) was 35 μm. The undersubstrates, which are the objects to be plated, processed in this way were prepared for each of the examples and comparative examples of the present invention, and each of the substrates was subjected to electrolytic plating.

【0058】感光性のめっきレジストにより保護されて
いない露出部位、つまり被めっき対象となる電極の面積
は、各基板について個体差が存在し、しかも各々の電極
面積が不知であるために、所望する電流密度での安定し
た電解めっきが困難であり、その結果、配線膜厚にバラ
ツキを生じる原因となる。
The exposed portion that is not protected by the photosensitive plating resist, that is, the area of the electrode to be plated is desired because there is an individual difference for each substrate and the area of each electrode is unknown. It is difficult to perform stable electrolytic plating at a current density, and as a result, this causes a variation in the wiring film thickness.

【0059】図3に、本例で使用した電解めっき装置
と、電解めっき槽中に設置された被めっき対象物である
加工基板と、照合電極および対極の配置状態の概略を示
す。本例では、対極には通常使用される含リン銅板を使
用し、照合電極には銅片を使用した。
FIG. 3 schematically shows an electrolytic plating apparatus used in this example, a processed substrate which is an object to be plated, and an arrangement of a reference electrode and a counter electrode, which are installed in an electrolytic plating tank. In this example, a phosphorus-containing copper plate that is usually used was used for the counter electrode, and a copper piece was used for the reference electrode.

【0060】すなわち、電解めっき槽1には硫酸銅めっ
き浴2が収容されており、めっき浴中には作用電極とし
ての被めっき加工基板3と照合電極としての銅片5が対
向して配置され、その間には、対極として含リン銅板4
が設置されている。それぞれの電極は、プローブである
ブリッジ6に接続されており、切替え器7を経て直流安
定電源8に、また電流計を含む定電位分極装置9に接続
され、これらの制御はパーソナルコンピュータ10により
行われる。
That is, a copper sulfate plating bath 2 is accommodated in the electrolytic plating bath 1, and a substrate 3 to be plated as a working electrode and a copper piece 5 as a reference electrode are arranged in the plating bath so as to face each other. In the meantime, a phosphorus-containing copper plate 4 is used as a counter electrode.
Is installed. Each electrode is connected to a bridge 6 which is a probe, and connected to a DC stable power supply 8 via a switch 7 and to a potentiostatic polarization device 9 including an ammeter. Will be

【0061】照合電極4は、溶液抵抗に起因した電位降
下を回避するために、作用電極である被めっき加工基板
3に極力近接させて設置することが望ましいが、この硫
酸銅めっき浴2は電気伝導度に優れている(62 S/m)こと
と、分極電圧が比較的低く通電される電流密度が比較的
低いことから、作用電極より5mm離れた部位に照合電極
を設置した。
It is desirable that the reference electrode 4 be placed as close as possible to the substrate 3 to be plated, which is the working electrode, in order to avoid a potential drop caused by the solution resistance. The reference electrode was placed at a position 5 mm away from the working electrode because of its excellent conductivity (62 S / m) and relatively low polarization voltage and relatively low current density.

【0062】定電位分極には、前述のパーソナルコンピ
ュータ10により制御された全自動分極装置を使用した。
設定電位は、照合電極である銅の自然電極電位よりも50
mV卑な電位とした。このときに計測された電流値は、
被めっき加工基板3の各個体に依存して、0.2869〜0.28
92 Aの間で変化した。
For the constant potential polarization, a fully automatic polarization device controlled by the personal computer 10 was used.
The set potential is 50 times higher than the natural electrode potential of copper as the reference electrode.
The potential was mV lower. The current value measured at this time is
0.2869 to 0.28, depending on each individual substrate 3 to be plated
Varied between 92 A.

【0063】図2に示した分極曲線より、電位が−50mV
vs.Ecorr of Cu=0.4 mVvs.Ag/AgCl(3.0 kmol/m3-KCl)
のときの銅電極で得られる電解電流密度は4.712 A/m2
あるので、基板の被めっき対象部における電解電流密度
も4.712 A/m2であると判断される。
From the polarization curve shown in FIG. 2, the potential was -50 mV.
vs. E corr of Cu = 0.4 mVvs. Ag / AgCl (3.0 kmol / m 3 -KCl)
In this case, the electrolytic current density obtained from the copper electrode is 4.712 A / m 2 , so that the electrolytic current density in the portion to be plated of the substrate is also determined to be 4.712 A / m 2 .

【0064】このときに計測された電流値が0.2880 Aで
あったとすると、基板の被めっき対象部 (露出した電
極) の面積は0.06112 m2であることが分かり、電解電流
密度50A/m2 にて電解めっきを実施するためには、全電
流を3.056 A として電解めっきを実施すればよいことが
直ちに判明する。
Assuming that the current value measured at this time is 0.2880 A, the area of the portion to be plated (exposed electrode) of the substrate is 0.06112 m 2 , and the electrolytic current density is 50 A / m 2 . In order to carry out the electrolytic plating, it is immediately found that the electrolytic plating should be carried out at a total current of 3.056 A.

【0065】本実施例では、定電位分極装置9と上述の
計算により電極面積を算出して全電流値を決定するシス
テムと、その全電流値にて所定時間の電解めっきを実施
する直流安定電源8とを備えた電解めっき装置を使用
し、全電流は3.044 〜3.069 Aの間で調整した。全ての
電解めっきにおいて、電解めっき時間は10.8 ks であ
り、析出狙い膜厚は18μmである。
In this embodiment, a constant-potential polarization device 9, a system for calculating the electrode area by the above-described calculation to determine the total current value, and a DC stable power supply for performing electrolytic plating for a predetermined time at the total current value The total current was adjusted between 3.044 and 3.069 A using an electroplating apparatus equipped with an electroplating apparatus as described above. In all electrolytic plating, the electrolytic plating time was 10.8 ks, and the target film thickness was 18 μm.

【0066】このようにして本発明により、各被めっき
対象基板の電極面積を算出し、電解電流密度が一定の値
となるように全電流を増減して電解めっき加工を実施し
たときの配線部における析出膜厚の標準偏差を表3に示
す。この表には、比較例として、全電流を3.057 A に固
定して実施したときの配線部における析出膜厚の標準偏
差も併せて示した。標準偏差が比較例の3.5 %から、本
発明例では2.8 %にまで20%も低減したことから、製品
間の配線厚さの均一化が確認され、全ての製品において
高周波数での安定した動作が期待される。
As described above, according to the present invention, the electrode area of each substrate to be plated is calculated, and the total current is increased or decreased so that the electrolytic current density becomes a constant value. Are shown in Table 3. This table also shows, as a comparative example, the standard deviation of the deposited film thickness in the wiring portion when the test was performed with the total current fixed at 3.057 A. Since the standard deviation was reduced by 20% from 3.5% in the comparative example to 2.8% in the present invention example, it was confirmed that the wiring thickness between products was uniform, and stable operation at high frequency was achieved in all products. There is expected.

【0067】なお、本発明例も比較例も、それぞれ128
枚の基板に対して電解めっきが実施され、それぞれの析
出膜厚は、被めっき基板を切断し、その断面を埋め込み
研磨したものを光学顕微鏡で観察することにより測定し
た。
In each of the examples of the present invention and the comparative examples, 128
Electroplating was performed on one substrate, and the thickness of each deposited film was measured by observing a substrate, which had been cut and polished with its cross section embedded and polished, using an optical microscope.

【0068】[0068]

【表3】 [Table 3]

【0069】表3から、本発明を用いることにより、析
出膜厚のバラツキが小さくなっていることが確認され
る。また、上の比較例では同一の配線基板を使用した
が、配線パターンが異なるときには、本発明の効果は、
さらに大きなものとなる。
From Table 3, it is confirmed that the use of the present invention reduces the variation in the thickness of the deposited film. In the above comparative example, the same wiring board was used. However, when the wiring pattern is different, the effect of the present invention is as follows.
It will be even bigger.

【0070】[0070]

【発明の効果】本発明により、一定の電解電流密度での
電解めっきが容易に可能となり、析出金属皮膜の膜厚が
極めて均一な多層配線基板が容易に製造可能となる。
According to the present invention, electrolytic plating at a constant electrolytic current density can be easily performed, and a multilayer wiring board having a very uniform thickness of a deposited metal film can be easily manufactured.

【図面の簡単な説明】[Brief description of the drawings]

【図1】カソード分極曲線の測定結果を示すグラフであ
る。
FIG. 1 is a graph showing a measurement result of a cathode polarization curve.

【図2】ディスク回転速度400 rpm の銅回転ディスク電
極にて測定された分極曲線を示すグラフである。
FIG. 2 is a graph showing a polarization curve measured at a copper rotating disk electrode at a disk rotating speed of 400 rpm.

【図3】本発明の電解めっきを実施するための電解めっ
き装置の概略説明図である。
FIG. 3 is a schematic explanatory view of an electrolytic plating apparatus for performing the electrolytic plating of the present invention.

【符号の説明】[Explanation of symbols]

1:電解めっき槽 2:硫酸銅めっき液 3:被めっき加工基板 (作用電極) 4:銅片 (照合電極) 5:含リン銅板 (対極) 6:ブリッジ (プローブ) 7:切り替え器 8:直流安定電源 9:定電位分極装置 (含む電流計) 10:制御用パーソナルコンピュータ 1: Electrolytic plating tank 2: Copper sulfate plating solution 3: Substrate to be plated (working electrode) 4: Copper piece (reference electrode) 5: Phosphorus-containing copper plate (counter electrode) 6: Bridge (probe) 7: Switching device 8: DC Stable power supply 9: Constant potential polarizer (including ammeter) 10: Personal computer for control

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 下記工程 (1)〜(4) を含む電解めっき方
法: (1) めっき浴中における、被めっき対象物の分極時の電
流値および電位値を求める工程; (2) 被めっき対象物と実質的に同じ材料からなる面積既
知の電極を用いて得られた電極電位と電流密度との関係
と、前記工程(1) で求めた電流値および電位値とから、
被めっき対象物の被めっき対象面積を算出する工程; (3) 算出された面積値より、被めっき対象物の電流密度
が任意の所望の値になる電流値を算出する工程; および (4) 前記工程(3) で算出された電流値で被めっき対象物
に通電し、めっき金属を析出させる工程。
1. An electrolytic plating method including the following steps (1) to (4): (1) a step of obtaining a current value and a potential value at the time of polarization of an object to be plated in a plating bath; From the relationship between the electrode potential and the current density obtained using an electrode having a known area composed of substantially the same material as the object, and the current value and the potential value obtained in the step (1),
(3) calculating a current value at which the current density of the object to be plated becomes any desired value from the calculated area value; and (4) A step of energizing the object to be plated with the current value calculated in the step (3) to deposit a plated metal;
【請求項2】 少なくとも一部の配線が電解めっき法に
より形成される多層配線基板の作製において、該電解め
っき法が下記工程 (1)〜(4) を含むことを特徴とする、
多層配線基板の作製方法: (1) 被めっき対象部が露出した下地基板について、めっ
き浴中における、被めっき対象部の分極時の電流値およ
び電位値を求める工程; (2) 被めっき対象部と実質的に同じ材料からなる面積既
知の電極を用いて得られた電極電位と電流密度との関係
と、前記工程(1) で求めた電流値および電位値とから、
基板の被めっき対象部の面積を算出する工程; (3) 算出された面積値より、被めっき対象部の電流密度
が任意の所望の値になる電流値を算出する工程; および (4) 前記工程(3) で算出された電流値で被めっき対象部
に通電し、めっき金属を析出させて配線を形成する工
程。
2. A method for producing a multilayer wiring board in which at least a part of wiring is formed by an electrolytic plating method, wherein the electrolytic plating method includes the following steps (1) to (4):
Method for manufacturing multilayer wiring board: (1) Step of obtaining current value and potential value at the time of polarization of a portion to be plated, in a plating bath, for an underlying substrate having a portion to be plated exposed; (2) Part to be plated From the relationship between the electrode potential and the current density obtained using an electrode having a known area made of substantially the same material, and from the current value and the potential value obtained in the step (1),
Calculating the area of the portion to be plated of the substrate; (3) calculating a current value at which the current density of the portion to be plated becomes any desired value from the calculated area value; and (4) A step of applying a current to the portion to be plated with the current value calculated in the step (3) to deposit a plating metal and form a wiring.
【請求項3】 樹脂層間に配線を有する多層配線基板で
あって、前記配線の幅が35μm以下であり、配線の少な
くとも一部が電解めっきによって形成されており、複数
作製された多層配線基板の電解めっきで形成された配線
の膜厚の標準偏差が2.8 %以下であることを特徴とする
多層配線基板。
3. A multilayer wiring board having wirings between resin layers, wherein the width of the wirings is 35 μm or less, at least a part of the wirings is formed by electrolytic plating, A multilayer wiring board, wherein a standard deviation of a film thickness of wiring formed by electrolytic plating is 2.8% or less.
JP30254599A 1999-10-25 1999-10-25 Electroplating method, multi-layered printed circuit board and its manufacturing method Withdrawn JP2001123298A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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Publication Number Publication Date
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ID=17910266

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Country Link
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7226634B2 (en) 2002-02-01 2007-06-05 Fujitsu Limited Designing a plated pattern in printed writing board
JP2007270320A (en) * 2006-03-31 2007-10-18 Ebara Corp Polarization curve measurement method and electrolytic treatment apparatus
US7563352B2 (en) 2001-10-27 2009-07-21 Atotech Deutschland Gmbh Method and conveyorized system for electorlytically processing work pieces
US8038864B2 (en) 2006-07-27 2011-10-18 Renesas Electronics Corporation Method of fabricating semiconductor device, and plating apparatus
JP2020193383A (en) * 2019-05-30 2020-12-03 長野県 Method for estimating the concentration of additive in nickel electroplating solution

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7563352B2 (en) 2001-10-27 2009-07-21 Atotech Deutschland Gmbh Method and conveyorized system for electorlytically processing work pieces
KR100956536B1 (en) * 2001-10-27 2010-05-07 아토테크더치랜드게엠베하 Method and conveyorized system for electrolytically processing work pieces
US7226634B2 (en) 2002-02-01 2007-06-05 Fujitsu Limited Designing a plated pattern in printed writing board
JP2007270320A (en) * 2006-03-31 2007-10-18 Ebara Corp Polarization curve measurement method and electrolytic treatment apparatus
US8038864B2 (en) 2006-07-27 2011-10-18 Renesas Electronics Corporation Method of fabricating semiconductor device, and plating apparatus
JP2020193383A (en) * 2019-05-30 2020-12-03 長野県 Method for estimating the concentration of additive in nickel electroplating solution
JP7291911B2 (en) 2019-05-30 2023-06-16 長野県 Additive Concentration Estimation Method in Electronic Nickel Plating Solution

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