JP2001103043A - Unique word communication system, transmitting side device and receiving side device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve data transmission efficiency by utilizing a unique word pattern and transmitting simple additional information. SOLUTION: On a transmitting side, a unique word error position setting circuit 1 sets an error pattern showing the additional information, and a pattern generation circuit 2 generates a unique pattern including the error pattern. On a receiving side, a detection circuit 5 capable of detecting a unique word detects the unique word pattern with the error pattern attached, and a unique work error position detection circuit 6 detects an error position. A detection position comparator circuit 7 decides whether the detected error pattern is additional information, a decision circuit 8 decides whether the detected additional information is effective and subsequently, detects the transmitted additional information.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a unique word communication system, and a transmitter and a receiver for use in the unique word communication system. The present invention relates to a unique word communication system used in, and a transmitting device and a receiving device used for the unique word communication system.

[0002]

2. Description of the Related Art Generally, in a wireless communication employing a time division multiple access as a communication system, such as a multi-directional wireless communication system, a unique word communication system for transmitting data using a unique word pattern is employed. You. In particular, in a communication mode using a satellite line, very long-distance transmission must be performed between the ground and the satellite, and the signal in the propagation path is affected by rain, fog, dust and the like in the air. Attenuation is large and bit errors are likely to occur frequently. For this reason, in this type of conventional system, much attention is being paid to how burst synchronization can be established even under various adverse conditions.

[0003]

In a conventional synchronization establishing circuit using unique word detection, a certain bit error is generated by predicting a bit error rate deterioration due to conditions such as rainfall, fog, and dust in a propagation path. Even using a detection circuit capable of detecting a unique word. This is usually expressed as an allowable error ε. This circuit is based on the premise that a signal is degraded on a propagation path and a certain bit error occurs, and a unique word detection circuit can detect a unique word pattern if a pattern error is within an allowable error ε. It is. This allowable error ε is generally set within N bits in number of bits. That is, if an error is within a total of N bits for a unique word pattern of m bits in total, it is a unique word pattern.

By the way, in the above-mentioned communication system, if information is added and transmitted in addition to the data to be transmitted,
Transmission efficiency can be further improved. It has been desired to realize a communication system capable of transmitting the additional information. In order to realize this system, it is desired to use a large scale integrated circuit (LSI).

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned drawbacks of the prior art, and has as its object to transmit simple additional information using a unique word pattern to improve data transmission efficiency. And to provide a unique word communication system that can It is another object of the present invention to provide a transmission side device and a reception side device of a unique word communication system which are configured only with logic circuits and have a circuit configuration suitable for LSI.

[0006]

SUMMARY OF THE INVENTION A unique word communication system according to the present invention is a unique word communication system for transmitting data from a transmitting device to a receiving device using a unique word. A unique word error position setting means for making the specific bit of the unique word erroneous, a transmitting device performing transmission using the unique word having the specific bit erroneous, and a unique word from data transmitted from the transmitting device. And a receiving-side device that reproduces the additional information in accordance with a result of the detection, including a unique word detection unit that detects the detected unique word, and a unique word error position detection unit that detects an error position of the detected unique word. It is characterized by the following.
The unique word error position setting means inverts a bit corresponding to additional information to be transmitted among bits constituting the unique word. The receiving device further includes a comparing unit that compares an error position detected by the unique word error position detecting unit with an error position based on the additional information, and determines validity of the additional information based on the comparison result. It is characterized by doing.

A transmitting device according to the present invention is a transmitting device used in a unique word communication system for transmitting data from a transmitting device to a receiving device by using a unique word, and the transmitting device according to the additional information to be transmitted. A unique word error position setting means for erroneously specifying a specific bit of the unique word is included, and transmission is performed using the unique word in which the specific bit is erroneous. The unique word error position setting means inverts a bit corresponding to additional information to be transmitted among bits constituting the unique word. The unique word error position setting means is constituted only by a logic circuit.

[0008] A receiving device according to the present invention is a receiving device used in a unique word communication system for transmitting data from a transmitting device to a receiving device using a unique word, wherein the data sent from the transmitting device is used. And a unique word error position detecting means for detecting an error position of the detected unique word, and reproduces additional information in the transmitting apparatus according to the detection result. It is characterized by the following.
A comparing unit that compares an error position detected by the unique word error position detecting unit with an error position based on the additional information, and that the validity of the additional information is determined based on the comparison result. Features.
The unique word detecting means, the unique word error position detecting means, and the comparing means are constituted only by a logic circuit.

[0009] In short, in the conventional unique word detection, it is detected that there are N errors in total, but it is not detected that the Xth of the unique word pattern is incorrect. In this system, by patterning the additional information, sending it in the unique word pattern, and detecting the additional information pattern,
It transmits additional information such as simple alarms.

[0010]

Next, an embodiment of the present invention will be described with reference to the drawings. In the drawings referred to in the following description, the same parts as those in the other drawings are denoted by the same reference numerals.

FIG. 1 is a block diagram showing an embodiment of a unique word communication system according to the present invention. FIG. 1 (a) shows a transmitting side device, and FIG. 1 (b) shows a receiving side device. The configuration of the unit is shown.

FIG. 1A shows a circuit configuration of a unique word generator of a transmitting apparatus. In the figure,
The unique word generator on the transmitting side uses the additional information to
A unique word error position setting circuit 1 for setting an error position of a unique word, a unique word generating circuit 2 for inverting a specific unique word bit according to error position setting information, and a transmission signal obtained by multiplexing transmission data and a unique word pattern. And a multiplexing circuit 3 that outputs the same.

FIG. 1B shows a circuit configuration of a unique word detecting unit of the receiving apparatus. In the figure, the unique word detector on the receiving side can detect the unique word if the demodulator 4 demodulates the received signal and the number of errors of the unique word pattern within the allowable error set from the demodulated signal. A unique word detection circuit 5 that outputs a unique word detection pulse and a detection pattern, a unique word error position detection circuit 6 that can compare a detection pattern with an original unique word pattern and output an error position, It comprises a detection position comparison circuit 7 for detecting additional information from information, a determination circuit 8 for determining the validity of the detected additional information, and a separation circuit 9 for extracting received data from a demodulated signal.

Hereinafter, the operation of the unique word communication system according to the present embodiment will be described. First, the operation of the unique word generator on the transmitting side will be described with reference to FIGS. 1A and 1B and the timing chart of FIG.

In this example, the unique word length is 32 bits. The additional information 1 is an error pattern obtained by intentionally inverting the 6th and 20th bits of the unique word,
It is assumed that the additional information n is an error pattern obtained by inverting the ninth and thirteenth and further the 27th. Further, it is assumed that the allowable error number ε of the unique word detection circuit is set to 5, and it is determined that the additional information is received when the error pattern is continuously detected three times. Note that “PA” in the figure is a preamble,
“UW” indicates a unique word.

When transmitting the additional information 1, the additional information 1 signal 112 is input to the unique word error position setting circuit 1 in the transmitting device. The unique word error position setting circuit 1 receives the additional information 1 signal 112 and outputs error position setting information 101 in which the sixth and twentieth indicating the additional information 1 are “1”.

The unique word generating circuit 2 outputs a unique word pattern 103 in which the sixth and twentieth bits are inverted with respect to the original unique word pattern 102 at the timing of the reference pulse 110 based on the error position setting information 101. . The output of the unique word pattern including this additional information is repeated at least three bursts or more because the number of consecutive error patterns detected is three. The multiplexing circuit 3 multiplexes the transmission data 111 and the unique word pattern 103 including the additional information to generate a transmission signal 104.

Next, the operation of the receiving device will be described. Received signal 105 is demodulated by demodulator 4 and outputs demodulated signal 106. The unique word detection circuit 5 monitors whether a unique word pattern exists in the demodulated signal 106. For the allowable error value ε = 5, the number of unique word pattern errors in the demodulated signal 106 is 3 bits, so that the unique word pattern is detected,
The unique word detection circuit 5 outputs a detection pattern 107 and a unique word detection pulse 109.

The unique word error position detecting circuit 6 includes a unique unique word pattern 102 and a detected pattern 10.
7 and outputs error position information 108, which is the position information of the inverted bit, to the detection position comparison circuit 7. 6
Upon receiving the error position information 108 that the 20th, 20th, and 25th are inverted, the detection position comparison circuit 7 compares the error position information with the error pattern indicating the additional information. It is determined that there is a possibility.

However, it is not immediately determined that the additional information 1 has been received. This is because the same position as the additional information 1 may happen to be erroneous only by the influence of the line quality. Therefore, the judgment circuit 8 checks the result of the detection position comparison circuit 7 with the unique word detection pulse 109, and performs a plurality of times of coincidence detection of the detection additional information as to what the next unique word pattern is. Judge the validity of When the matching of the detection results is performed three or more times by the determination circuit 8, the determination circuit 8 determines that the information is the additional information 1 and outputs the additional information 1 signal 115. Similarly, when it is determined that the information is the additional information n, an additional information n signal 116 is output.

As described above, by utilizing the allowable error of the unique word detection circuit, the transmission of the additional information using the unique word portion used for establishing the burst synchronization other than the normal data signal is realized. It is.

Therefore, the amount of data per burst is
Normal data plus additional information is provided, and transmission efficiency is improved.

Furthermore, since the transmitting side device and the receiving side device of the present embodiment can all be constituted by logic circuits, integration such as LSI is easy.

Here, an example of the internal configuration of the unique word error position setting circuit 1 in FIG. 1A will be described with reference to FIG. As shown in the figure, the unique word error position setting circuit 1 is configured using, for example, a unique word length counter 100. And this counter 10
In 0, predetermined additional information 1, additional information 2, additional information 3, ... are input, and when the count value matches these additional information, the error position setting becomes "1" (high level). The information 101 is output.

For example, "1" is set when the count value is "6" and "20" by the additional information 1, and "1" is set when the count value is "7" and "25" by the additional information 2. Shall be set. When there is no input of additional information, no data set is performed.

Then, as shown in FIG. 4, when the count value increases sequentially from “1”, the additional information 1
Is input, the count values are “6” and “2”.
The output goes high during the period of “0” and is sent out as the error position setting information 101. When the additional information 2 is input, the output goes high during the period when the count value is “7” and “25”. Are transmitted as the error position setting information 101. Further, when both the additional information 1 and the additional information 2 are input, the count value is “6”,
The output goes high during the periods “7”, “20” and “25” and is sent out as the error position setting information 101.

The error position setting information 101 thus generated is input to the above-described unique word generation circuit 2. The unique word generation circuit 2 inverts and outputs the unique word while the error position setting information 101 is “1”, thereby causing the unique word to be erroneous according to the additional information.

Next, an example of the internal configuration of the unique word error position detecting circuit 6 in FIG. 1B will be described with reference to FIG. In the figure, the unique word error position detecting circuit 6 has no additional information added (no error),
A unique word pattern generator 61 for generating an original unique word pattern, and a comparison circuit 62 for comparing the generated unique word pattern with the detection pattern detected by the above-described unique word detection circuit 5
It is comprised including. Note that the unique word pattern generator 61 may be configured to read and output the stored pattern using a memory in which the unique word pattern is stored in advance.

When the unique word pattern output from the unique word pattern generator 61 matches the detected pattern, the output of the comparison circuit 62 goes low. If they do not match, the output of the comparison circuit 62 is at a high level. As described above, the error position information 108 which is set to the high level or the low level in accordance with the comparison result in the comparison circuit 62 is output.

Next, the detection position comparison circuit 7 shown in FIG.
Will be described with reference to FIG. In the figure, a detection position comparison circuit 7 has an additional information data memory 7 storing data of predetermined additional information.
1 and a decoding circuit 72 for detecting each additional information by decoding the storage contents of the memory 71 and the error position information 108 from the unique word error position detection circuit 6 described above.

In this example, the count values "6" and "20"
Are stored in the additional information data memory 71, and the additional information 1 in which the position corresponding to is inverted and the additional information 2 in which the positions corresponding to the count values "7" and "25" are inverted are stored in the additional information data memory 71. Is input to the decode circuit 72 in advance.

Here, the decoding circuit may be composed of a shift register 721, selectors 722 and 723, and an AND circuit 724, for example, as shown in FIG. The shift register 721 operates so as to sequentially shift the error position information 108, and sets selection conditions for the selectors 722 and 723 in accordance with the contents stored in the additional information data memory 71. In this way, when the same pattern as the set content exists in the error position information 108, a detection pulse indicating that the additional information has been detected is transmitted. This detection pulse is input to the determination circuit 8 described above. It is assumed that the same number of the configurations shown in FIG. 7 are provided corresponding to the respective pieces of additional information.

An example of the internal configuration of the decision circuit 8 in FIG. 1B will be described with reference to FIG. As described above, in this example, a 3-bit match counter is used as shown in the figure to determine that the additional information has been received with three consecutive detections of the error pattern. That is, three F / Fs that perform a shift operation in accordance with the unique word detection pulse 109
(Flip-flop) 81 to 83, and output the A
The configuration input to the ND circuit 80 is used. Therefore, only when the detection pulse is input three consecutive times, the F / F
The outputs of 81 to 83 all become "1" and the AND circuit 80
Output the additional information 115. If it does not continue three times, no additional information is output from the AND circuit 80 and it is not determined to be valid. It is assumed that the same number of the configurations shown in FIG. 8 are provided corresponding to the number of the additional information.

As described above, according to the present system, the unique word error position setting which can set the error position information for inverting a specific unique word bit on the transmitting side in accordance with the specification of the error pattern which means additional information predetermined in advance. Invert the unique word bit specified by the circuit 1 and the error position setting information 101 output from the unique word error position setting circuit 1 (because the digital signal is "1" or "0", the error information is the reverse of the correct information). )
And a unique word pattern generating circuit 2 that can perform the processing. In addition, the unique word detection circuit 5 that can set the allowable number of errors on the receiving side and can output the detected unique word pattern, compares the detected pattern 107 with the correct unique word pattern, and determines which bit is wrong. Unique word error position detecting circuit 6 for detecting whether
Is compared with the error position information 108 and the error pattern indicating the additional information previously determined, and a detection position comparison circuit 7 that determines whether the information is additional information, and determines the validity of the detected additional information. The determination circuit 8 is provided.

When transmitting the additional information 1, the unique word error position setting circuit 1 on the transmitting side generates specific error position setting information 101 indicating the additional information 1, and the unique word generating circuit 2 sets the error position setting information 101. Unique word pattern 1 in which the pattern is inverted only at the position indicated by information 101
03 is generated. The original transmission data 1 in the multiplexing circuit 3
11 and a unique word pattern 103 containing additional information are multiplexed to generate a transmission signal 104.

On the receiving side, the unique word detection circuit 5 uses the demodulated signal 106 demodulated by the demodulator 4 to
Detects unique word patterns containing additional information,
Output the detection pattern. The unique word error position detection circuit 6 detects which bit in the pattern is erroneous, and the detection position comparison circuit 7 detects whether the error position information 108 is an error pattern registered as additional information. When the additional information 1 which is a registered pattern is detected a plurality of times, it is determined that the detected additional information 1 is valid, and the determination circuit 7 outputs the additional information 1 to transmit the additional information.

Next, another embodiment of the present invention will be described. The basic configuration of the system of this embodiment is the same as that of the above-described embodiment, but the unique word error position setting circuit and the determination circuit are further devised. FIG. 9A shows the configuration of the transmitting device, and FIG.
Each is shown in (b).

In these figures, the difference from the above-described embodiment is the unique word error position setting circuit 10 on the transmitting side and the determining circuit 11 for determining the validity of the additional information on the receiving side. Another difference is that a plurality of patterns such as an error position pattern A and an error position pattern B are combined to form one additional information as an error pattern indicating the additional information.

In this example, the unique word pattern length is 3
The 2-bit additional information 1 is a repetitive pattern of an error pattern A in which the sixth and twentieth are inverted, and an error pattern B in which the ninth, thirteenth, and even the 27th are inverted. Also, the allowable error number ε = 5 of the unique word detection circuit
It is determined that the additional information has been received when the number of consecutive error pattern detections is two.

Next, the basic operation of the system of this embodiment will be described with reference to FIG. First, when transmitting the additional information 1 in the transmitting device, the unique word error position setting circuit 10 transmits the reference pulse 1 from the multiplexing circuit 3.
10 outputs error position setting information 101 which repeats an error pattern A and an error pattern B which are different error patterns for each unique word insertion cycle of the transmission signal 114. In the unique word generation circuit 2, the reference pulse 110
Position information 101 having a different error pattern for each cycle of
, Two types of unique word patterns 103 are generated.

The transmission of the unique word pattern including the additional information is repeatedly output at least two times or more in consideration of the detection of two or more continuous repetitions. Similarly, the multiplexing circuit 3 multiplexes the unique word pattern 103 and the transmission data 111 which are different for each unique word insertion cycle, and
04 is generated.

Next, in the receiving apparatus, the unique word detection circuit 5 detects a unique word pattern different for each burst, and outputs the information as a detection pattern 107. The unique word error position detection circuit 6 receives the detection pattern 107 and generates different error position information 108 for each burst. The detection position comparison circuit 7 detects that the error position information 108 that differs for each burst period is an error pattern A and an error pattern B, and outputs an additional information signal 117 in which information indicating the error pattern A and the error pattern B is repeated. I do. The determination circuit 11 monitors the additional detection information 117 output from the detection position comparison circuit 7 with the unique word detection pulse 109 that is the same as the burst period, and continuously outputs information indicating the error pattern A and information indicating the error pattern B for two consecutive times. If it can be detected more than once, it is valid, it is determined that it is the additional information 1, and the additional information 1 signal 115 is output. As described above, in the present embodiment, by transmitting a combination of a plurality of error patterns as additional information and detecting the additional information, an effect equivalent to that of the above-described embodiment can be obtained.

Here, an example of the internal configuration of the unique word error position setting circuit 10 in FIG. 9A will be described with reference to FIG. 3, the unique word error position setting circuit 10 uses the two unique word counters shown in FIG.
Selector 100-4 according to the pulse divided by 2 at 0-3
Is switched. At this time, the inputs of the unique word counters 100-1 and 100-2 are set so as to output different error patterns when the same additional information is used. Then, the selector 100 receives the divided-by-2 pulse.
-4, and these different patterns are output alternately.

Next, an example of the internal configuration of the decision circuit 11 in FIG. 9B will be described with reference to FIG. In the system of the present embodiment, one additional information is configured to alternately repeat two types of patterns. Therefore, the respective patterns A and B are input to a 4-bit shift register. That is, as shown in FIG. 12, that is, four F / FAs 1 to A4 corresponding to the pattern A.
And four F / FB1 to B4 corresponding to pattern B
Is provided. Then, the first pulse and the third pulse of the pattern A, the second pulse and the fourth pulse of the pattern B, or the second pulse and the fourth pulse of the pattern A, the pattern B
By detecting whether or not the detection additional information exists in the first pulse and the third pulse, it is determined that the combination of the pattern A and the pattern B is continuous twice. It is assumed that the same number of the configurations shown in FIG. 12 are provided corresponding to the respective pieces of additional information.

As described above, in this embodiment, a combination of a plurality of error patterns is transmitted as additional information and detected, so that the same effect as in the above-described embodiment can be obtained.

It should be noted that the present invention is not limited to the above embodiments, and each embodiment can be appropriately modified within the scope of the technical idea of the present invention.

[0047]

As described above, according to the present invention, a unique word pattern for establishing burst synchronization and an error pattern meaning additional information are transmitted as a unique word pattern, and the unique word is transmitted to the receiving side. By detecting the error pattern included in the error pattern and determining the validity of the error pattern, it is possible to transmit the additional information and to improve the transmission efficiency. Also,
By changing the circuit configuration, it is possible to obtain an effect that the circuit can be configured by a logic circuit suitable for LSI.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a unique word communication system according to the present invention, wherein (a) shows a transmitting device and (b) shows a receiving device.

FIG. 2 is a timing chart showing an operation of the unique word communication system of FIG. 1;

FIG. 3 is a block diagram showing an example of an internal configuration of a unique word error position setting circuit in FIG.

FIG. 4 is a timing chart showing an operation of the unique word error position setting circuit of FIG. 3;

FIG. 5 is a block diagram showing an example of an internal configuration of a unique word error position detection circuit in FIG. 1 (b).

FIG. 6 is a block diagram showing an example of an internal configuration of a detection position comparison circuit in FIG. 1 (b).

FIG. 7 is a block diagram showing an example of the internal configuration of a decoding circuit in FIG. 6;

FIG. 8 is a block diagram showing an example of an internal configuration of a determination circuit in FIG. 1 (b).

FIG. 9 is a block diagram showing a configuration of another embodiment of the unique word communication system of the present invention, wherein (a) shows a transmitting device and (b) shows a receiving device.

FIG. 10 is a timing chart showing an operation of the unique word communication system of FIG. 9;

FIG. 11 is a block diagram showing an example of the internal configuration of a unique word error position setting circuit in FIG.

FIG. 12 is a block diagram showing an example of an internal configuration of a determination circuit in FIG. 9B;

[Explanation of symbols]

 1, 10 unique word error position setting circuit 2 unique word generation circuit 3 multiplexing circuit 4 demodulator 5 unique word detection circuit 6 unique word error position detection circuit 7 detection position comparison circuit 8, 11 determination circuit 9 separation circuit 101 error position setting Information 102 Original unique word pattern 103 Unique word pattern including additional information 104 Transmission signal 105 Reception signal 106 Demodulation signal 107 Detection pattern 108 Error location information 109 Unique word detection pulse 110 Reference pulse 111 Transmission data 112 Additional information 1 113 Additional information n 114 Received data 115 Additional information 1 116 Additional information n 117 Detection additional information

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference)

Claims (9)

[Claims] 1. A unique word communication system for transmitting data from a transmitting device to a receiving device using a unique word, wherein a unique word error position causing a specific bit of the unique word to be erroneous according to additional information to be transmitted. A transmitting device including setting means for performing transmission using a unique word in which the specific bit is erroneous; a unique word detecting device for detecting a unique word from data transmitted from the transmitting device; and A unique word communication system comprising: a unique word error position detecting means for detecting an error position of a unique word; and a receiving device for reproducing the additional information in accordance with a result of the detection. 2. The unique word communication system according to claim 1, wherein said unique word error position setting means inverts a bit corresponding to additional information to be transmitted among bits constituting said unique word. 3. The receiving apparatus further includes a comparing unit that compares an error position detected by the unique word error position detecting unit with an error position based on the additional information, and based on the comparison result, the additional information. 3. The unique word communication system according to claim 1, wherein the validity of the unique word is determined. 4. A transmitting device for use in a unique word communication system for transmitting data from a transmitting device to a receiving device using a unique word, wherein a specific bit of the unique word is determined according to additional information to be transmitted. A transmitting device of a unique word communication system, characterized by including a unique word error position setting means for making an error, and performing transmission using the unique word in which the specific bit is made erroneous. 5. The transmission-side apparatus according to claim 4, wherein said unique word error position setting means inverts a bit corresponding to additional information to be transmitted among bits constituting said unique word. 6. The transmission-side apparatus according to claim 4, wherein said unique word error position setting means comprises only a logic circuit. 7. A receiving device for use in a unique word communication system for transmitting data from a transmitting device to a receiving device using a unique word, wherein the unique word is detected from the data sent from the transmitting device. A unique word detecting means, and a unique word error position detecting means for detecting an error position of the detected unique word, and reproducing the additional information in the transmitting apparatus in accordance with the detection result. A receiving device of a word communication system. 8. The apparatus further comprises comparing means for comparing an error position detected by the unique word error position detecting means with an error position based on the additional information, and determining the validity of the additional information based on a result of the comparison. 8. The receiving-side apparatus according to claim 7, wherein: 9. The receiving-side apparatus according to claim 8, wherein said unique word detecting means, said unique word error position detecting means, and said comparing means are constituted only by a logic circuit.