JP2001093849A - Epitaxial growth, method of manufacturing epitaxial substrate and solar cell - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve difficult epitaxial growth in a desired region by a liquid phase epitaxy method. SOLUTION: This method includes steps of forming a cover layer 101, having a property that a semiconductor layer 104 is not grown on side and rear surfaces of a substrate 100 or on a part of a rear or front surface of the substrate 100, and bringing the substrate having the cover layer formed thereon into contact with a melt of saturated semiconductor material, to grow the semiconductor layer 104 in a region A of the substrate other than a cover-layer formation region B thereof.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a liquid phase growth method, a method for manufacturing an epitaxial substrate, and a method for manufacturing a solar cell. More particularly, the present invention relates to a liquid phase growth method and a high quality and low cost solar cell using the same. The present invention relates to a method for manufacturing an epitaxial substrate.

[0002]

2. Description of the Related Art In the case of application to a single crystal semiconductor substrate, particularly an epitaxial substrate, in a LSI manufacturing process, particularly in a photolithography process, a predetermined depth of a substrate is required due to the necessity of contact with a mask and a depth of focus for pattern printing. It is required to grow a semiconductor layer having a uniform thickness only in the region (1), while it is required to prevent the growth on the back surface of the substrate.

[0003] By the way, CVD for thermally decomposing a source gas containing silicon such as dichlorosilane or trichlorosilane.
In the (Chemical Vapor Deposition) method, the number of sheets that can be charged per batch is limited, or maintenance of the apparatus is required for each batch, and the production throughput is low. The growth of a silicon layer by a liquid phase growth method is being studied. For example, Japanese Patent Application Laid-Open No. Hei 10-189244 has a detailed disclosure on the production of a solar cell by a liquid phase growth method.

[0004]

When a semiconductor layer having a uniform thickness is grown only on a predetermined region on a substrate, when a crystal grows on an edge portion of a wafer shaped to a predetermined diameter,
There are many inconveniences in handling such as positioning of the substrate. When the liquid phase growth method as described above is used, it is easy to grow a crystal only in a predetermined region, for example, by hanging a mask plate on a region on the substrate where growth is not desired. It is difficult to select the material of the mask plate because it is immersed in the melt, and it is troublesome to treat the silicon adhered to the mask plate. Further, if the mask plate is thick, it may hinder uniform growth. It is also difficult to hold the mask plate and the substrate so that no gap is formed even when exposed to high temperatures.

According to the present invention, in the liquid phase growth of a semiconductor layer on a substrate, growth of a semiconductor in a region other than a predetermined region (a region for growing a semiconductor layer) and elution of the semiconductor into a melt are prevented. A manufacturing method capable of uniformly growing a semiconductor layer in a region where a semiconductor is to be formed without using a complicated mask jig or the like, reducing the accumulation of impurities in a melt, and manufacturing an epitaxial substrate having excellent characteristics at a low cost. The purpose is to provide. Another object of the present invention is to provide a manufacturing method capable of manufacturing a solar cell having more excellent characteristics without substantially impairing the throughput of the method described in JP-A-10-189244.

[0006]

The liquid phase growth method of the present invention comprises:
A liquid phase growth method comprising at least the following steps 1) and 2).

1) A step of forming a cover layer having a property that a semiconductor layer does not grow on the side and back surfaces of the base, or a part of the side, back and top surfaces of the base. A step of growing a semiconductor layer in a region other than the cover layer forming region of the base by contacting the supersaturated melt with the material; the base does not need to be particularly flat, but a plate, a cylindrical body, or a sphere having a curved flat surface. It may be a shape or the like. Further, the semiconductor layer to be grown does not necessarily have to be single crystal, but may be polycrystal, microcrystal, or the like. When the semiconductor layer to be formed is polycrystal, microcrystal, or the like, it is needless to say that the base does not need to be single crystal.

The method of manufacturing an epitaxial substrate and the method of manufacturing a solar cell according to the present invention use the above-described liquid phase growth method according to the present invention.

The present inventors have set out to solve the above-mentioned problems.
It has been noted that, depending on the material and surface properties of the base, the semiconductor layer may or may not grow even in the same state of the melt. A semiconductor, for example, a melt in which silicon is melted to supersaturation, a smooth silicon layer grows on a silicon substrate having a clean surface, but if the supersaturation is not extremely large, even from a melt in the same state, the silicon oxide surface Does not grow the silicon layer or only weakly adheres the silicon grains. Based on this observation result, a silicon oxide layer is formed as a cover layer on the back surface or the edge (region B) where the semiconductor layer is not desired to grow on the entire surface of the base, and a solar cell or device is formed. By leaving clean silicon exposed on the main surface (region A), a silicon layer can be grown only in region A. Also, when the substrate surface is eluted into the melt prior to the growth, the back surface of the substrate is prevented from melting into the melt, and the accumulation of impurities in the melt can be reduced even if a highly doped substrate is used. Such a phenomenon is considered to be caused by a difference in free energy at the interface between the semiconductor layer and the substrate. There may be a combination of a cover layer and a semiconductor layer having similar properties other than the combination of silicon oxide and silicon. For example, in addition to a silicon oxide layer such as a thermal oxide film, a silicon nitride layer, a carbon layer, a silicon carbide layer, or the like can be used as the cover layer.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The outline of an embodiment of the present invention will be described with reference to FIGS.

1A, a silicon substrate 100 is prepared. As the silicon substrate 100, a p-type or an n-type can be used as necessary. In particular, it can be used even with a highly doped low resistance substrate.

Next, as shown in FIG. 1B, the silicon substrate 100 is thermally oxidized to form a silicon oxide layer as a cover layer 101 on the entire surface.

Next, as shown in FIG. 1C, the cover layer of the main portion (region A) 103 of the main surface is selectively etched and removed, leaving the back surface and the edge portion (region B) 102 of the substrate. Then, the silicon surface is exposed only in the region A. Of course, a silicon oxide layer is selectively formed only in the region B from the beginning by a method such as applying a cover plate to the region A and thermally oxidizing the main surfaces of the two substrates in close contact with each other. You can also. Alternatively, a coating liquid for forming silicon oxide may be applied to the region B by a method such as screen printing and then fired to selectively form a silicon oxide layer. In addition to silicon oxide, silicon nitride and carbon can be used as the cover layer. In FIG. 1C, the region B includes the vicinity of the edge of the substrate surface in addition to the back surface and the side surface of the substrate. Region B may be provided only on the back and side surfaces of the substrate (ie, the cover layer may be provided only on the back surface and side surfaces of the substrate).

Thereafter, the substrate is brought into contact with the melt supersaturated with silicon. Also, heavy metal contamination on the substrate surface,
In order to remove other defects present on the surface, the substrate is brought into contact with a melt not yet saturated with silicon as necessary, and the surface of the substrate is eluted into the melt, and then contacted with a supersaturated melt to grow the substrate. Starting is also effective for improving the characteristics of the epitaxial film.

As a result, as shown in FIG. 1D, the silicon layer 104 grows only in the region A in the liquid phase growth. The thickness of the cover layer 101 may be generally 0.01 to 1 μm. Therefore, the growth rate of the semiconductor layer does not decrease in the vicinity of the region A in the region A due to the cover layer 101. Conversely, since the growth does not occur in the region B, the concentration of the semiconductor raw material in the melt near the region B increases, and the growth rate tends to increase near the region B under the influence. desirable. In particular, in liquid phase growth, remarkable growth occurs at the edge of the substrate, and the diameter of the substrate tends to increase. In order to prevent this, it is desirable to form the cover layer reliably at the edge.

The cover film 101 in the region B102 is generally finally removed. However, they may be left as necessary. The removal of the cover layer is performed as shown in FIG.
The removal may be performed immediately after the formation of the semiconductor layer 104, or may be performed after the device function of the LSI or the solar cell is formed in the epitaxial substrate while being left as it is. It is preferable to use a small amount of etchant solution,
For a combination of silicon, a hydrofluoric acid solution containing no oxidizing agent such as nitric acid or the like can be suitably used. However, when a different kind of material is further stacked on the semiconductor layer 104, an etchant according to the characteristics of the material should be used.

By providing a cover layer appropriately, a semiconductor layer can be formed in a desired region on the substrate surface.
FIG. 2 is a diagram showing an example in which a semiconductor layer is formed separately.
As shown in FIG. 2C, a region A1 is formed on the surface of the substrate 100.
If the region B (the region provided with the cover layer) 102 is provided so as to separate the semiconductor layer 03, the separated semiconductor layer can be formed in the region A as shown in FIGS. it can. FIGS. 2A and 2B show the same steps as FIGS. 1A and 1B.

As described above, according to the method of the present invention, a semiconductor layer having a high surface smoothness and a controlled impurity concentration can be grown at a high throughput, and a low-cost and high-quality solar cell can be obtained. And an epitaxial substrate can be manufactured. Further, if the method of the present invention is applied, an epitaxial substrate with easy element isolation and a solar cell module which is a crystalline solar cell but easily integrated and connected in series can be easily manufactured.

Hereinafter, more specific embodiments will be described.

Embodiment 1 In this embodiment, an example in which the present invention is applied to the manufacture of a thin-film single-crystal silicon solar cell will be described.

First, as shown in FIG. 3A, a single-crystal silicon substrate 200 having a diameter of 5 inches (125 mm) φ is prepared, and a separation layer is formed on the surface of the silicon substrate 200 as shown in FIG. Form. Here, a porous layer 201 is formed as a separation layer. In order to form the porous layer 201 with good controllability, it is preferable to use a low-resistance p-type (p ⁺ ) substrate having a specific resistance of about 0.005 to 0.1 Ωcm. Even if a layer of p ⁺ is formed on the surface in advance by a method such as CVD, LPE, or thermal diffusion, several to several tens μm can be used in the same manner. The plane orientation of the crystal is (10
Those commonly distributed such as (0) and (111) are preferably used.

First, a silicon substrate 2 is placed in a solution of hydrofluoric acid.
00 and an electrode (not shown) opposed thereto is immersed in the substrate 2
Electricity is applied so that 00 becomes positive (anodizing treatment). In this case, silicon is dissolved by an electrochemical reaction on the surface of the substrate 200. However, when the concentration of hydrofluoric acid is high and the flowing current is appropriately maintained, the dissolution of silicon proceeds locally, and the fineness having a thickness of about several hundred angstroms is obtained. The pores grow while entangled in a complicated manner, and the porous layer 201 is formed. Porous layer 201
The ratio of the volume occupied by the inner hole becomes larger as the current flowing therethrough increases, and when the current value is changed during the current passing, a plurality of layers having different hole sizes can be formed.

Next, as shown in FIG. 3 (c), a circular mask having a diameter of 120 mm is brought into close contact with the area A on the surface on which the porous layer 201 is formed, while the carbon of the cover layer 202 is formed on the area B. A protective film is formed. The carbon film is sputtered with a carbon target in a reducing atmosphere, high-frequency plasma is applied while flowing vapor and oxygen of an organic gas such as methanol, ethanol, methane, and ethane, and an oxygen atmosphere is formed by coating an organic coating liquid such as a resist. And baking.

Next, as shown in FIG.
The melt prepared by dissolving p-type polycrystalline silicon in indium at 1000 ° C. is gradually cooled at a rate of about −0.1 to −2 ° C./min, and when the temperature is lowered by 10 to 30 ° C., the substrate is immersed in the melt. Then, a single crystal silicon film 203 is epitaxially grown. The single crystal silicon film 203 has a thickness of 5 to 1
00 μm, typically 10-50 μm, typically 20
It grows up to about 40 μm. Due to the effect of the cover layer 202, the single crystal silicon film 203 grows only in the opening (region A) of the cover layer. Thereafter, as shown in FIG. 3E, the carbon protective film serving as the cover layer 202 is removed. The carbon protective film can be removed by applying ultrasonic waves in a solution such as alcohol or acetone, baking in an oxygen atmosphere, or exposing to a plasma in an oxygen atmosphere.

After that, as shown in FIG. 3F, a doped layer (n ⁺ ) 204 is formed on the surface of the silicon layer 203. As a method for forming the dope layer, a coating solution containing an n-type impurity such as phosphorus is applied to a uniform thickness by a spinner and baked to form a phosphorus glass layer, and then a depth of 0.1 to 0.5 μm
It is advisable to diffuse the heat to the depth. Alternatively, the cover layer 202
Prior to removing n from the melt containing phosphorus in addition to silicon
^{The +} silicon layer can be grown to a thickness of 0.1 to 0.5 μm. Alternatively, silane (SiH
₄ ) and phosphine (PH ₃ ) may be flowed while being diluted with hydrogen to deposit an n ⁺ silicon film. in this case,
The silicon film to be deposited may be polycrystalline or microcrystalline, but preferably has a small thickness of about 0.01 to 0.1 μm.

Subsequently, as shown in FIG. 3 (g), a grid electrode 205 is formed as a surface-side electrode, and the sheet resistance of the doped layer 204 is substantially reduced to prevent ohmic power loss. The grid electrode 205 can be formed by printing an ink containing silver as a main component in a desired pattern by screen printing and firing. Alternatively, Ni or the like may be deposited using a mask having a grid-shaped opening, and copper may be deposited thereon by electroplating.

Thereafter, as shown in FIG. 3 (h), a transparent resin film such as PET or polycarbonate, or a transparent support member 206 made of glass,
Stick firmly with a transparent adhesive 207 such as VA.

Further, as shown in FIG.
00 while holding the back surface of the support member 20 by vacuum or electromagnetic force.
6 is applied to break the portion of the porous layer 201 where micropores are formed and become brittle, and the silicon layer 203 is peeled off. To peel off, insert a wedge into the porous layer portion, apply a force to pry open by injecting a high-pressure water jet, and apply a thermal shock such as rapid cooling or rapid heating to the support member 206 to reduce the coefficient of thermal expansion. A method of applying a shearing force due to the difference, adding an end of the support member and winding up with a roller, and the like are possible. In this case, if the region A where the silicon layer is formed is made narrower than the region where the porous layer 201 is formed, a trigger for starting peeling from the edge of the silicon layer 203 is easily formed and peeling is performed. It can be done smoothly.

On the back surface of the peeled silicon layer 203,
Generally, since the residue 208 of the porous layer 201 remains, it can be selectively etched and removed with a hydrofluoric acid solution to which an alkali or a hydrogen peroxide solution is added, but this is not essential.

Thereafter, as shown in FIG. 4 (j), a back electrode plate 209 made of a conductive sheet such as stainless steel or aluminum is provided on the back surface of the silicon layer 203 by a conductive adhesive 210 such as an aluminum or silver paste. Paste with Thus, a thin film single crystal silicon solar cell can be formed.

On the other hand, as shown in FIG. 4 (k), the porous layer residue 208 remaining on the surface of the silicon substrate 200 is removed by electrolytic polishing in a similar etchant or hydrofluoric acid solution to obtain a substrate having a smooth surface. By reproducing as 211, FIG.
(A) can be introduced as the silicon substrate 200, and a plurality of thin-film single-crystal silicon solar cells can be formed by repeatedly using the substrate, so that the manufacturing cost of the solar cell can be significantly reduced.

Embodiment 2 In this embodiment, an example in which the method of the present invention is applied to the manufacture of an epitaxial substrate will be described with reference to FIG.

As shown in FIG. 1A, a single crystal silicon substrate 100 is prepared. Single crystal silicon substrate 100
Various types of substrates can be used depending on the use of the epitaxial substrate. However, low-resistance substrates such as p ⁺ and n ⁺ can prevent latch-up of CMOS-LSI and gettering effect by boron as described above. There is much demand from the point. The smoothness of the substrate 100 has a large effect on the planarity of the epitaxial layer, but the method of the present invention can be used even if the smoothness is lower than that of the CVD method. Therefore, usually, the wafer surface is sliced from the ingot, and then lapping and etching are performed, and then polishing is repeated a plurality of times to finish the polishing. Can also be used. The orientation of the crystal plane is (100)
In a semiconductor process such as or (111), those commonly used can be suitably used.

Next, as shown in FIG. 1B, a silicon oxide layer was formed as the cover layer 101. As described above, various methods can be used for forming the silicon oxide layer. However, when applied to an epitaxial substrate, the thermal oxidation method seems to be the most reliable. The silicon oxide layer as the cover layer 101 has a thickness of 0.01 to 1 μm.
m sufficiently fulfills the function as a cover layer, in the case of pyrogenic (hydrogen combustion) oxidation, it can be formed within one hour, and then, as shown in FIG. The silicon oxide layer may be selectively removed by etching.

In order to selectively remove the cover layer, for example, as shown in FIG. 5A, a substrate 300 having a silicon oxide layer 301 formed on the entire surface as a first cover layer is made to have the same size as the region A. The chucking stage 303 is chucked. For chucking, a method such as a vacuum chuck or an electromagnetic chuck can be used. In this state, for example, a resist liquid for forming a resist layer 302 serving as a second cover layer is sprayed with a shower 304. After the resist is dried, the substrate 300 is removed from the stage 303 and baked. Thus, the resist layer 3 having an opening in the region A
At the place where 02 has been formed, as shown in FIG. 5B, the substrate 300 is immersed in an etching solution 305 such as hydrofluoric acid containing no oxidizing agent such as nitric acid. Then, the silicon oxide layer in the region A is etched, and the silicon surface in the region A is exposed. Thereafter, as shown in FIG.
Is removed with a resist stripper, only the region B is covered with silicon oxide.

Alternatively, as shown in FIG. 6A, a substrate 400 having a silicon oxide layer 401 formed on the entire surface is attached to an etching solution holding cylinder 402 having an O-ring 403 for preventing liquid leakage at the tip. When the region A is pressed against and the inside is filled with an etching solution, as shown in FIG.
Only the inside (region A) of the O-ring can be selectively etched.

As shown in FIG. 1D, a silicon layer 104 is formed.
Is grown by melting a melt prepared by dissolving polycrystalline silicon in indium at 800 to 1000 ° C.
The substrate 100 is gradually cooled at a rate of about -2 [deg.] C./min. However, no silicon layer is formed in the region B where the cover layer 101 is formed. The conductivity type of the silicon layer to be grown can be adjusted by changing the conductivity type of the polycrystalline silicon to be melted to p-type or n-type. In addition, the substrate is not saturated with silicon in advance in order to improve the smoothness of the substrate being used or to remove heavy metal contamination on the substrate surface and defects on the substrate surface that may cause stacking faults. It is also effective to soak the surface slightly in melt and then soak in supersaturated melt to start growing.

As shown in FIG. 1E, the silicon layer 10
After the growth of No. 4, the cover layer 101 may be immediately removed with an etchant such as hydrofluoric acid containing no oxidizing agent, or may be left as it is after the device manufacturing process is completed.
Further, there is a possibility that melt contamination may remain on the surface due to the liquid phase growth, so that the remaining indium may be removed by etching by dipping in hydrochloric acid for 5 to 10 minutes just in case. However, it is not mandatory.

[Embodiment 3] In this embodiment, a plurality of independent thin-film single-crystal layers are formed on one single-crystal silicon substrate, and the individual elements are completely electrically separated. An example of manufacturing an epitaxial substrate that can be used will be described with reference to FIG.

First, a liquid phase growth apparatus used in this embodiment will be described with reference to FIG. Here, the gap between the quartz glass reaction tube 506 and the load lock chamber 508 can be completely separated by the gate valve 510. However, when the gate valve 510 is opened, the substrate holding means 502 is lowered into the reaction tube 506. Can be done. The substrate exchange raises the substrate holding means 502 into the load lock chamber 508, and closes the gate valve 510. Then, the atmosphere in the gate valve is replaced with nitrogen, the substrate exchange door 509 is opened,
The silicon substrate 503 is held by the substrate holding means 502.
However, a melting substrate 504 is held at the lowermost position of the substrate holding means 502 as shown. In this state, the inside of the load lock chamber 508 is replaced with nitrogen and then with hydrogen. On the other hand, in the crucible, indium (melt) 501 in which silicon has been previously melted until it is saturated is maintained at a predetermined temperature by heating with an electric furnace. In order to prevent the melt and the substrate from being oxidized, the reaction tube 5
Hydrogen gas is also introduced into the reaction tube 06 from the gas introduction tube 511, flows through the reaction tube, is exhausted by the gas exhaust tube 512, and is maintained at a predetermined pressure. Open the gate valve 510,
The substrate raising / lowering mechanism 505 is operated, and the substrate is once lowered to the position immediately above the crucible, held there, and waits until the temperature reaches the same as the melt. Thereafter, all the substrates are immersed in the melt 501. The silicon layer is allowed to grow for a predetermined time. Thereafter, the substrate holding means 502 is raised to the load lock chamber 508, the gate valve 510 is closed, the substrate is cooled, the flow of hydrogen is replaced with the flow of nitrogen, and then the substrate exchange door 509 is opened to take out the substrate.

Hereinafter, a method of manufacturing an epitaxial substrate using the above liquid phase growth apparatus will be described.

As shown in FIG. 8A, a p-type silicon substrate 600 having a plane orientation (100) of 6 inches φ was prepared.
Next, as shown in FIG. 8B, a silicon oxide film 601 having a thickness of 1.2 μm was grown thereon using a thermal oxidation furnace.

Next, as shown in FIG. 8C, a resist was applied to the silicon oxide film 601, a desired pattern was baked, and a plurality of independent openings 602 were formed by etching with a hydrofluoric acid solution. Next, as shown in FIG.
The n ⁺ buried layer 603 was formed by the device shown in FIG. n ⁺
If the buried layer 603 is formed, the base transmissivity of carriers can be improved when a bipolar transistor is manufactured using a completed epitaxial substrate.

First, an undoped high-resistance melting substrate 504 is placed at the bottom of the substrate holding means 502.
The silicon substrate 600 on which the pattern of the silicon oxide layer was formed was held thereon, and was maintained at 680 ° C. above the melt 501 independently of the melt temperature. On the other hand, a melt prepared by previously dissolving P-doped n ⁺ -type polycrystalline silicon in indium at 650 ° C. until saturation is reached is −0.1 ° C. /
At a rate of 630 ° C., the substrate is immersed in the melt 501 for 5 minutes to form an n ⁺ buried layer 60.
3 grew. At the moment when the substrate is immersed in the melt, the melt near the substrate is not saturated, and it is considered that the silicon on the substrate surface slightly melted into the melt.

Next, as shown in FIG. 8E, an n ⁻ type epitaxial layer 604 is grown on the n ⁺ buried layer 603. First, while stirring the melt, only the undoped dissolution substrate 504 was immersed in the melt at 950 ° C. until saturation. Originally, n ⁺ -type low-resistance silicon doped with P at a high concentration was melted into the melt, but the temperature of the melt was significantly increased to 95%.
Since the high-resistance dissolving substrate 504 which was not doped with indium at 0 ° C. was dissolved, the concentration of P in the melt was significantly reduced. After that, all the substrates were pulled out of the melt and kept at 970 ° C., while the melt was kept at −0.1.
When the temperature was lowered to 930 ° C. at a rate of 5 ° C./min, the entire substrate was immersed in a melt for 3 minutes to grow an n ⁻ -type epitaxial layer 604. At the moment when the board is immersed in the melt,
It is considered that the melt near the substrate was unsaturated, and the surface of the n ⁺ buried layer 603 slightly melted into the melt. In this way, while adjusting the melt for n ⁻ type epitaxial layer 604, n ⁺ buried layer 603 is kept on standby.
Perfect to remove any heavy metal contamination that may have adhered to the surface. The thickness in which the n ⁺ buried layer 603 and the n ⁻ -type epitaxial layer 604 were stacked was about 1.2 μm, which was almost equal to the thickness of the silicon oxide film 601. This is not essential, but it is desirable that no step is formed on the surface of the substrate when manufacturing the LSI. afterwards,
As shown in FIG. 8F, unnecessary portions of the silicon oxide film 601 were removed.

FIG. 9 shows an example of the configuration of a unit transistor of a bipolar LSI manufactured by a standard process using the epitaxial substrate thus obtained. The epitaxial layer 604 includes a silicon oxide layer 601.
Then, the individual unit transistors can be completely electrically separated by the junction between the substrate (p) and the n ⁺ buried layer 603. In this embodiment, since the n ⁺ buried layer 603 is grown at a sufficiently low temperature, the influence of defects can be suppressed. In addition, since the subsequent growth was performed at a high temperature, not only the growth rate was able to be increased, but also it was possible to grow a low-resistance high-doped layer and a high-resistance low-doped layer in this order without exchanging the melt. Was able to increase the throughput.

[Embodiment 4] In this embodiment,
A plurality of independent thin-film single-crystal layers are formed on one single-crystal silicon substrate, independent solar cells are formed in these thin-film single-crystal layers, connected in series, and then separated from the substrate to form a solar cell module. An example of manufacturing will be described.

As shown in FIG. 10A, for example, 120 ×
60 mm plane orientation (111) p ⁺ type silicon substrate 70
At 0, a porous layer 701 is formed as a separation layer. Note that the separation layer is a layer for providing a surface that is separated and exposed in a later separation step, and is divided inside the separation layer or at an upper and lower interface thereof.

In order to form the porous layer 701 with good controllability, a low resistivity p of about 0.005 to 0.1 Ωcm is required.
Although the use of a mold (p ⁺ ) substrate is preferable, even if the substrate has a higher resistance, a layer of p ⁺ is formed on the surface in advance by a method such as CVD, LPE, or thermal diffusion to form several to several tens μm. Can be used similarly. As the plane orientation of the crystal, generally distributed materials such as (100) and (111) are preferably used.

First, a silicon substrate 700 and an electrode (not shown) facing the silicon substrate 700 are immersed in a solution containing hydrofluoric acid.
An electric current is applied so that the substrate 700 becomes positive (anodization treatment). In this case, silicon is dissolved by an electrochemical reaction on the surface of the substrate 700. However, when the concentration of hydrofluoric acid is high and the flowing current is appropriately maintained, the dissolution of silicon proceeds locally, and the fineness of several hundred angstroms is reduced. The pores grow while being entangled in a complicated manner, and the porous layer 701 is formed. The ratio of the volume of the pores of the porous layer 701 increases as the current flowing increases. When the current value is changed during the current distribution, a plurality of porous layers having different pore sizes can be formed.

Thereafter, as shown in FIG. 10B, as a cover layer, for example, a thermally oxidized silicon layer 7 having a thickness of about 1 μm is formed.
02 is formed.

Further, as shown in FIG. 10C, four openings of 56 × 27.5 mm are formed as a region A in the thermally oxidized silicon layer 702.

The cover layer can be selectively formed only on the portion excluding the region A where the semiconductor layer is to be formed from the beginning by a method such as attaching a mask plate to the region A and performing thermal oxidation. Alternatively, a coating liquid for forming a cover layer such as silicon oxide is applied to a portion excluding the region A by a method such as screen printing, and then baked to selectively form a silicon oxide layer in a portion excluding the region A. You can also.

Next, as shown in FIG. 10 (d), the region A not covered with the cover layer has a thickness 3 by the liquid phase growth method.
A plurality of independent silicon layers 704 each having a thickness of 0 μm are formed. For example, a melt prepared by dissolving p-type polycrystalline silicon in indium at 800 to 1000 ° C. is −
Slowly cool at a rate of about 0.1 to −2 ° C./min.
When the temperature is lowered by ° C., the substrate (which becomes supersaturated by a silicon material) is immersed in a melt, and a single crystal silicon layer 704 is epitaxially grown. Due to the effect of the cover layer 702, the single crystal silicon layer 704 grows only in the opening (region A) of the cover layer.

Further, in order to remove heavy metal contamination on the substrate surface and other defects existing on the surface, the substrate is brought into contact with a melt which is not saturated with silicon beforehand as necessary to elute the surface of the substrate into the melt. After that, the contact with the supersaturated melt to start the growth is also effective for improving the characteristics of the epitaxial film. That is, by raising the polycrystalline silicon before the p-type polycrystalline silicon is completely melted, or by raising the melt temperature after the p-type polycrystalline silicon is sufficiently melted, the melt is made unsaturated with respect to silicon (for example, liquid phase growth). After dissolving the polycrystalline silicon in 900 ° C. indium in the crucible of the apparatus, the temperature is raised to 1000 ° C. to obtain an unsaturated melt.) When the substrate 700 is immersed in the unsaturated melt, With respect to the unsaturated melt, melting from the substrate to the melt occurs, the surface of the region A of the substrate 700 is smoothed, and heavy metal contamination on the substrate surface and other defects existing on the surface are removed. After that, if the single crystal silicon layer 704 is epitaxially grown, single crystal silicon can be grown on the smoothed surface.

The removal of the cover layer 702 is performed after separation at the porous layer 701 serving as a separation layer in this embodiment, as described later, but may be performed immediately after the formation of the single crystal silicon layer 704. It may be performed after the device function of the solar cell is built. When removing the cover layer,
It is preferable to use an etchant having a small etching effect on the single crystal silicon layer 704. For a combination of silicon oxide and silicon, a hydrofluoric acid solution containing no oxidizing agent such as hydrofluoric nitric acid can be suitably used. However, when a different kind of material is further stacked on the semiconductor layer 704, an etchant according to the characteristics of the material should be used.

Thereafter, as shown in FIG. 10E, a comb-toothed n-electrode 705 and a p-electrode 706 are formed on the surface of each single-crystal silicon layer 704. The n-electrode 705 is obtained by applying a paste obtained by adding phosphorus to a silver paste in a desired pattern by screen printing, and then performing baking and thermal diffusion of phosphorus to form an electrode. N electrode 705 by thermal diffusion
A doped region 707 in which phosphorus is diffused is formed inside single crystal silicon layer 704 in contact with. On the other hand, the p electrode 70
Reference numeral 6 denotes an electrode formed by applying an aluminum paste in a desired pattern by screen printing and then performing baking and thermal diffusion of phosphorus. A doped region (not shown) in which aluminum is diffused is formed inside single crystal silicon layer 704 in contact with p electrode 706 by thermal diffusion. As the p-electrode 706, a paste in which a p-type dopant is added to a silver paste like the n-electrode 705 can be used. n electrode 7
05 and the p-electrode 706 are formed so as to keep an interval of several tens to several hundreds μm, and carriers generated in the semiconductor layer 704 can be collected by a junction formed between the two electrodes. If the n-electrode 705 and the p-electrode 706 are simultaneously baked and thermally diffused, the manufacturing process can be simplified, which is convenient. Also, the n-electrode 705 is made of silver paste such as arsenic, antimony or the like.
It may be formed by printing a paste containing an element of Group 3 of the periodic table. The p-electrode 706 is made of silver paste containing boron,
It may be formed by printing a paste containing an element of Group 5 of the periodic table, such as aluminum or gallium.

Thereafter, as shown in FIG. 11F, the n-electrode 705 and the p-electrode 706 of the adjacent unit cell are electrically connected by a tab 708 as a connecting body. As the connection tab 708, a nickel-plated copper sheet or the like may be used. Alternatively, the connection tab 708 may be directly formed on the semiconductor layer 704 or the thermally oxidized silicon layer 702 by printing with a silver paste or the like and firing. Metal may be applied by sputtering or the like.

Next, as shown in FIG. 11 (g), an insulating support member 709 is attached to this surface with an insulating adhesive. The insulating support member 709 may have at least an insulating surface. It is also desirable that the reflectance of sunlight be high. For example, when a Tedlar film in which both surfaces of an aluminum sheet are laminated is used, sunlight transmitted without being absorbed by the single-crystal silicon layer 704 can be reflected and re-absorbed by the single-crystal silicon layer 704. This is effective for improving the efficiency of the battery. The insulating adhesive 710 is desirably transparent in order to expect the solar supporting member 709 to reflect sunlight. Adhesives generally used for lamination of solar cells, such as EVA, can be preferably used. However, even if the adhesive absorbs short-wavelength light such as yellow or brown, light transmitted through the single-crystal silicon layer 704 is not enough. And can be used.

Next, as shown in FIG. 11 (h), in this state, the substrate 700 was vacuum-sucked to the stage, and a force was applied so as to peel off the end of the insulating support member 709. The portion 701 is destroyed and the single crystal silicon layer 704 is removed.
And the silicon oxide layer 702 was separated from the substrate 700. For peeling, a wedge may be inserted into a portion of the porous layer, or a high-pressure fluid may be sprayed to apply a force to separate the substrate 700 and the supporting member 709. Also, if a heating step or a vacuum processing step is performed after this peeling step,
There is a possibility that deformation or breakage of the adhesive or the support member, degassing, or the like may occur. Since a residue 711 of the porous layer remains on the back surface of the peeled single-crystal silicon layer 704 and the silicon oxide layer 702 serving as the cover layer, it is preferable to remove the porous layer residue 711 by etching as necessary. It can be selectively etched and removed with a hydrofluoric acid solution to which an alkali or a hydrogen peroxide solution is added.

Thereafter, as shown in FIG. 11I, a transparent support member 712 such as glass or epoxy resin is attached to the back surface with a transparent adhesive 713. In the solar cell module having this structure, since there is no electrode on the surface on which sunlight enters, not only the appearance is smart, but also there is no loss of incident light caused by the shadow of the electrode.

As shown in FIG. 11 (j), the substrate after peeling has a smooth surface by removing the residue 711 of the porous layer and the silicon oxide layer 702 by etching, polishing, hydrogen annealing or the like. A recycled substrate 714 having a surface can be reused as the substrate 700, and the steps described with reference to FIGS. 10 and 11 can be repeatedly performed, which contributes to cost reduction of the solar cell module. Place is big.

[0063]

According to the method of the present invention, a semiconductor layer having a high surface smoothness and a controlled impurity concentration can be grown at a high throughput, and a low-cost and high-quality solar cell or epitaxial substrate can be obtained. It can be manufactured.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a step of manufacturing an epitaxial substrate by a method of the present invention.

FIG. 2 is a cross-sectional view illustrating a step of manufacturing an epitaxial substrate by the method of the present invention.

FIG. 3 is a cross-sectional view illustrating a step of manufacturing a thin-film crystal solar cell by the method of the present invention.

FIG. 4 is a cross-sectional view illustrating a step of manufacturing a thin-film crystal solar cell by the method of the present invention.

FIG. 5 is a diagram illustrating an example of a step of removing a cover layer in a region A in the method of the present invention.

FIG. 6 is an explanatory view of another example of the step of removing the cover layer in the area A in the method of the present invention.

FIG. 7 is an explanatory view of a liquid phase growth apparatus for suitably executing the method of the present invention.

FIG. 8 is a cross-sectional view illustrating a step of manufacturing an epitaxial substrate having a highly-doped buried layer according to the method of the present invention.

FIG. 9 shows a bipolar L using the above epitaxial substrate.
FIG. 3 is a cross-sectional view illustrating a configuration of an SI unit transistor.

10A and 10B are a cross-sectional view and a plan view illustrating a step of manufacturing an integrated series-connected solar cell module on one substrate by the method of the present invention.

FIG. 11 is an explanatory diagram of a process of manufacturing an integrated series-connected solar cell module on one substrate by the method of the present invention.

[Explanation of symbols]

100, 200, 300, 400, substrate 200 porous layer 101, 202, 301, 401 cover layer 102 region B 103 basin A 104, 203 semiconductor (silicon) layer 204 doped layer 205 grid electrode 206 transparent support member 209 back electrode plate 600 substrate 601 silicon oxide film 603 n ⁺ buried layer 604 n ^- epitaxial layer 606 emitter 607 base 608 collector 700 substrate 701 porous layer 702 cover layer 703 region A 704 semiconductor (silicon) layer 705 n electrode 706 p electrode 707 n doped layer 708 tab 709 insulating support member 710 insulating adhesive 711 porous residue 712 transparent support member 713 transparent adhesive 714 recycled substrate

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F003 BA27 BA96 BP31 BP33 5F051 BA14 CB01 DA03 GA04 5F053 AA03 BB04 BB38 DD01 FF01 GG01 GG02 HH01 HH04 JJ01 JJ03 LL05 PP02 PP04 PP20

Claims (13)

[Claims] 1. At least the following steps 1) and 2)
And a liquid phase growth method. 1) a step of forming a cover layer having a property that a semiconductor layer does not grow on the side and back surfaces of the base, or a part of the side, back and front surfaces of the base; 2) supersaturating the base on which the cover layer is formed with a semiconductor material; Growing a semiconductor layer in a region other than the cover layer forming region of the base by contacting the melt that has become 2. The liquid phase growth method according to claim 1, wherein the region other than the cover layer forming region of the base comprises a plurality of regions separated from each other. 3. The liquid phase growth method according to claim 1, further comprising a step of removing the cover layer of the base after forming the semiconductor layer. 4. The semiconductor device according to claim 1, wherein the base on which the cover layer is formed is brought into contact with a melt that is unsaturated with a semiconductor material before being brought into contact with the melt that is supersaturated with a semiconductor material. 2. The liquid phase growth method according to 1. 5. The liquid phase growth method according to claim 1, wherein the substrate is a silicon wafer. 6. The liquid phase growth method according to claim 5, wherein the substrate is a heavily doped silicon wafer. 7. The liquid phase according to claim 1, wherein the substrate having the cover layer in the step 1) is prepared by the following steps 3) and 4). Growth method. 3) forming a first cover layer over the entire surface of the substrate, holding the substrate in close contact with the first cover layer corresponding to a region where the semiconductor layer of the substrate is to be formed, and holding the substrate;
Forming a second cover layer on the first cover layer in a region other than the region where the semiconductor layer is to be formed; 4) exposing the first cover other than the region covered with the second cover layer; Removing the second cover layer after etching the layer to expose the surface of the substrate 8. The method according to claim 1, wherein the cover layer is formed by forming a cover layer on the entire surface of the base, and bringing only a region of the cover layer to be removed, which is to be removed, into contact with an etchant. The liquid phase growth method according to claim 6. 9. The liquid phase growth method according to claim 1, wherein the cover layer is a silicon oxide film. 10. The liquid phase growth method according to claim 1, wherein the cover layer is a carbon film. 11. The liquid phase growth method according to claim 1, wherein the melt is a solution of indium. 12. A method for manufacturing a solar cell using a semiconductor layer grown by the liquid phase growth method according to claim 1 as an active layer. 13. A method for manufacturing an epitaxial substrate, wherein a semiconductor layer grown by the liquid phase growth method according to claim 1 is used as an epitaxial layer.