JP2001092803A - Microcomputer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate the need of manufacturing a glass mask which has been required for a one-chip microcomputer incorporating a flash memory at the time of changing a wiring layer for switching a circuit function as hardware. SOLUTION: A wiring layer can be changed and, in addition, the need of manufacturing a glass mask for changing the wiring layer is eliminated by means of a switching circuit which selectively switches one of the output terminals of a plurality of logic circuit or blocks, a nonvolatile storage device which outputs the signal used for deciding the selection of the switch connection of the switching circuit, a resistor for holding the data corresponding to the signal, and a register control means which controls the writing in a register.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor integrated circuit having a nonvolatile memory device. In particular, it relates to a microcomputer.

[0002]

2. Description of the Related Art In a conventional semiconductor device using a nonvolatile memory device, particularly a one-chip microcomputer with a built-in flash memory, data stored in the memory device is processed by a central processing unit (hereinafter referred to as a CPU).
It was taken out under the control of.

In addition, although character data such as characters and figures are stored, switch data for switching circuit functions is not stored. Therefore, to switch the circuit function in hardware, change the wiring layer,
Accordingly, it was necessary to manufacture a glass mask each time.

Further, when a large amount of fixed switch data which can be selected by a customer, ie, switch data for switching circuit functions, is stored in a non-volatile storage device, it is necessary to read the data via the CPU each time. . Therefore, the switch that can be selected by the customer cannot be easily changed.

[0005]

In the prior art, data stored in the storage device is extracted under the control of the CPU. However, fixed data, for example, an option switch for switching circuit functions is extracted from the nonvolatile storage device. The operation only needs to be read once just after the reset signal or the like, and when there is a large amount of such fixed data, reading the data via the CPU each time is inefficient in programming.

[0006]

In order to solve the above-mentioned problems, a microcomputer according to the present invention comprises a plurality of signal input terminals and a plurality of logic circuits each having a different function, each of which has the function of inputting the signal input terminal. A plurality of blocks having different functions, a switch circuit for selectively switching to one of the logic circuit and the output terminal of the block, and a nonvolatile circuit for outputting a signal for determining selection of switch connection of the switch circuit A storage device;
A register for holding data according to the signal;
It is characterized by comprising register control means for controlling writing to the register, and an output terminal for transmitting an output of the switch circuit as a final output terminal to a next-stage logic circuit or block.

According to the present invention, for example, an option switch for switching a circuit function is stored in a non-volatile storage device, so that a change in a wiring layer and a accompanying glass mask for switching a circuit function in a hardware manner are realized. There is no need to make things. Further, the function switching and the test can be easily performed only by rewriting the data contents of the nonvolatile storage device at the time of the customer or the test. This effect gives the customer a degree of freedom in product development and eliminates the necessity of producing a glass mask dedicated to the customer, thereby enabling development with a shorter delivery time than before.

A second microcomputer according to the present invention includes a nonvolatile storage device for storing switch data for switching wiring of a plurality of logic circuits having different functions or wirings of a plurality of blocks having different functions, A volatile storage device that is inputted and held, a logic circuit or a functional block to which an output signal of the volatile storage device is inputted, and a control circuit that controls the nonvolatile storage device and the volatile storage device, The data stored in the nonvolatile storage device is transferred to the volatile storage device by a signal from the control circuit, and the data of the transferred address is not taken out from the nonvolatile storage device thereafter, and the control circuit intervenes software. It is characterized by an automatic sequence circuit that does not.

Further, according to the present invention, when the data content of the option switch for switching the circuit function stored in the nonvolatile storage device is taken out, the data of the nonvolatile storage device is automatically stored in the volatile storage device. And then use the data in the volatile storage device. Therefore, when there is a large amount of such fixed data, it is not necessary to read out the data via the central processing unit CPU each time, and a troublesome sequence at that time is not performed, and the software efficiency can be improved. .

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention. The configuration is such that in a semiconductor device using a non-volatile memory device, an input terminal INPUT of a certain signal and two types of logic circuits having different functions or blocks having different functions, each having the input signal as an input, are provided as Function1 and Function1.
Function 2 and its respective output terminals S1, S2
, A non-volatile storage device that outputs a signal for deciding the selection of the switch connection of the switch circuit (selector), a Registor for holding the data, and writing to the Registor. There is a Registor control signal and the switch circuit (se
An output terminal OUTPUT for transmitting the output of the lecter) to the next-stage logic circuit or block as a final output terminal.

In the prior art, in a semiconductor device using a nonvolatile memory device such as a flash memory, particularly in a one-chip microcomputer with a built-in flash memory,
The data stored in the flash storage device is extracted under the control of the central processing unit CPU core. Further, even though character data such as characters and figures may be stored, switch data for switching circuit functions is not stored. If the switch that switches the circuit functions can be selected by the customer as an optional switch, a single chip microcomputer requires several functions to provide multiple functions, but all functions are limited at the same time. It is difficult to function with a limited chip area.

For example, when a customer wants to change a drive duty or a drive bias in a liquid crystal drive circuit, it has been realized by using the same functional block just by changing the wiring layer data. Since the wiring layer data is changed, a glass mask must be produced exclusively for the customer at the time of manufacturing.

Therefore, as shown in the present invention, for example, as shown in FIG. 1, as the drive duty data of the liquid crystal drive circuit in the flash memory, if "1", 1/32 duty, "0"
If it is, set it in advance like 1/8 duty, and if 1/32 duty is selected, function
When a logic circuit of n1 is used and a 1/8 duty is selected, a function can be easily changed simply by rewriting flash data by switching a switch so as to use a logic circuit of function2. Become. Further, the switch can be realized by a method using a transmission gate or assembling a logic gate with a selector input.

FIG. 2 is a diagram conceptually illustrating a second embodiment of the present invention, and FIG. 3 shows a more specific example.

In the configuration shown in FIG. 2, in a semiconductor device using a nonvolatile storage device, a nonvolatile storage device for storing switch data for switching wiring of a logic circuit or a functional block having different functions, and the stored data as an input. A volatile storage device to hold, a logic circuit or a functional block using an output signal of the volatile storage device,
It comprises a control circuit for controlling the nonvolatile storage device and the volatile storage device.

The essence of the present embodiment is that data in a nonvolatile storage device is transferred to a volatile storage device without passing through a central processing unit CPU, and data transferred once is not read from the nonvolatile storage device. is there.

The procedure will be described with reference to FIG. 2. First, a read command is issued from a controller to a flash memory which is a nonvolatile storage device, and at the same time, a RAM or a register (RAM) of a volatile storage device is issued.
or a register) to transfer data from the flash memory to the RAM. At this time, the flash memory data is
Which address of M is to be stored is determined in advance. This is not changed by the customer and may be arbitrarily determined at the time of design. Then, after the data transfer process is completed, the output of the RAM and the output of the register are always set to the output state, so that the data that is in the flash memory can be supplied to the logic circuit (Logic Circuit). This data is switch data for switching circuit functions as described above, and is not random data stored in a normal RAM. When a large amount of such data is present, it is inefficient to perform the read processing of the flash memory by the central processing unit CPU every time in order to retrieve the data. If the data is stored in the register and kept in the output state, the data can be continuously used thereafter, and the software efficiency can be improved because the data is not passed through the central processing unit CPU.

FIG. 3 shows a specific embodiment in which data in the nonvolatile storage device shown in FIG. 2 is transferred to the volatile storage device without passing through the central processing unit CPU, and the data is used.

FIG. 3 shows a flash memory cell 1 (Flash me
mory cell-1) and flash memory cell 2 (Flash memor)
y cell-2) is transferred to TR1, TR2, IN1, IN
2 and the output of the latch memory is determined by a data comparison circuit composed of TR3, TR4, TR5, and TR6. If the gate potentials of TR3 and TR4 are both at the Lo level, the output is output. Consider a circuit that outputs a Hi level to the terminal OUT.

This operation starts with the flash memory cell 1
The output of (Flash memory cell-1) is supplied to the BL line by, for example, opening the switch to Hi level, and by simultaneously setting WL to Hi level, TR1, T
MOS type N-channel field effect transistor of R2, I
The Hi level is supplied to the point A of the latch memory constituted by the negative logic elements N1 and IN2. At point B, the flash memory cell 2 (Flash memory cell-1) storing the negative logical data of the flash memory cell 1 (Flash memory cell-1) is stored.
Lo level is given from the data of mory cell-2).
Thereafter, the WL is set to Lo to switch to data holding in the latch memory. At the same time, two switches are simultaneously closed to disconnect the flash memory from the circuit. With this operation, data is transferred from the flash memory to the latch memory and held. At this time, TR4 is turned off because the Lo level is given to the gate of TR4. Next, the data comparison operation will be described. Common gate XP of each of MOS type N-channel field effect transistor TR5 and MOS type P-channel field effect transistor TR6
The Lo level is applied to RCG, and the Hi level due to the conduction of TR6 is applied to point C. At this time, the MOS N-channel field effect transistor TR5 is off. This is called a precharge operation. Then, the XPRCG is given the Hi level this time, and the GND level, that is, the Lo level is made conductive from TR5. At this time, TR4 is OFF, but when Lo level is applied to the XBL line, TR3 becomes O.
The Hi level remains at the point C due to the parasitic drain capacitance of the field effect transistor for the FF. A series of operations is completed by setting this Hi level as the output of this circuit. In this circuit, the BL line and the XBL line have a negative logic relationship.

Next, the flash memory cell 1 (Flash me
The case where the output of mory cell-1) is at the Lo level will be described.

First, when the switch is opened, a low level is supplied to the BL line, and at the same time, when the WL is set to the high level, the MOS type N-channel field effect transistors of TR1 and TR2 and the negative logic elements of IN1 and IN2 are used. The Lo level is supplied to point A of the configured latch memory. At point B, the flash memory cell 1 (Flashmem
ory cell-1) is stored in the flash memory cell-2 (Flash memory cell-2).
Levels are given. Thereafter, the WL is set to the Lo level to switch to data holding in the latch memory. At the same time, the two switches are simultaneously closed to disconnect the flash memory from the circuit. At this time, the gate of TR4 is Hi.
TR4 is turned ON because the level is given.

Next, the data comparison operation will be described.

The Lo level is applied to the common gate XPRCG of each of the MOS type N-channel field effect transistor TR5 and the MOS type P-channel field effect transistor TR6, and the Hi level due to the conduction of TR6 is applied to the point C.
Thus, a precharge operation is performed. At this time, since the MOS type N-channel field effect transistor TR5 is OFF, even if the MOS type N-channel field effect transistor TR4 is ON, or if the gate of the MOS type N-channel field effect transistor TR3 is indeterminate, Lo at point C. No level is supplied. Then, the XPRCG is given the Hi level this time, and the GND level, that is, the Lo level is made conductive from TR5. At this time, TR4 is ON, and Lo level is supplied to point C even if Lo or Hi level is applied to the XBL line. A series of operations is completed by setting this Lo level as the output of this circuit. Therefore, if the data of the flash memory is at the Hi level and the BL line is at the Hi level, the point C, that is, the output of this circuit is Hi.
When the data of the flash memory is at the Lo level, the point C, that is, the output of this circuit becomes Lo. The circuit operation is the logical product of the data of the flash memory and the BL line. The comparison circuit composed of TR3, TR4, TR5, and TR6 of this embodiment has four transistors, but the normal logical product circuit has a NAND + NOT gate. Therefore, six transistors are required. However, the comparison circuit of this embodiment requires the control signal of XPRCG. However, when a large number of circuits of this embodiment are required like a memory array, the difference between the two transistors is smaller than that of a normal logic circuit. The layout area can be further reduced since the present embodiment is superior to the used NAND + NOT gate combination circuit.

When a large number of circuits as shown in FIG. 3 are used as in a memory array, switching, XPR in FIG.
Signals such as CG and WL are transmitted to the control circuit con in FIG.
The central processing unit C is automatically controlled by the controller.
A series of operations for reading data via the PU is eliminated, and software efficiency can be improved. In this case, the control circuit may perform data transfer to each memory array one after another by applying an increment operation by the counter circuit, using an initial signal such as a reset as a trigger, and perform the increment operation by the number of memory arrays. Then, when the increment operation is completed, an end signal is returned to the central processing unit CPU, and operation as a normal one-chip microcomputer is started therefrom.

[0027]

According to the present invention, by storing fixed data, for example, an option switch for switching a circuit function by a user in a non-volatile storage device, it is possible to change a wiring layer for switching a circuit function in a hardware manner. This eliminates the need for producing a glass mask.

Therefore, even microcomputers of different specifications can be mass-produced collectively using a common glass mask. As a result, compared to producing a large variety of products little by little, it is easier to manufacture. The required time and energy can be reduced.

Further, the function switching and the function test can be easily performed only by rewriting the data contents of the nonvolatile storage device by the user or the IC test. This action gives the user freedom of product development, and eliminates the need to produce a glass mask exclusively for the user, thereby enabling product development with a shorter delivery time than before.

Further, when extracting the data content of the option switch for switching the circuit function stored in the nonvolatile storage device, the data of the nonvolatile storage device is transferred to the volatile storage device by the automatic control circuit, and thereafter the volatile storage device is operated. Since the data in the storage device is used, it is not necessary to read out the data via the central processing unit CPU each time a large amount of such fixed data is present. Can be increased.

[Brief description of the drawings]

FIG. 1 is a diagram of a microcomputer showing an embodiment of the present invention.

FIG. 2 is a diagram of a microcomputer showing another embodiment of the present invention.

FIG. 3 is a diagram of a microcomputer showing a specific example of another embodiment of the present invention.

[Explanation of symbols]

S1: switch terminal 1 S2: switch terminal 2 SEL: switch selector signal stored in the register ADDR: address signal to the volatile storage device CE: volatile storage device Write control signal CTRL: Read control signal from nonvolatile storage device TR1: MOS N-channel field effect transistor TR2: MOS N-channel field effect transistor TR3: MOS N-channel field effect transistor TR4: MOS-type N-channel field-effect transistor TR5: MOS-type N-channel field-effect transistor TR6: MOS-type P-channel field-effect transistor IN1: Negative logic gate IN2: Negative logic gate Point A ... Positive logic output node B of memory circuit ··· Negative logic output side node of memory circuit Point C ··· Output node of data comparison circuit WL ··· Control signal for writing data to memory cell (data can be written to memory cell at Hi level) BL・ Positive logic input / output line of memory cell and external positive logic comparison data input line XBL ・ ・ ・ Negative logic input / output line of memory cell and external negative logic comparison data input line XPRCG ・ ・ ・ Precharge signal VCC ・ ・ ・ Positive polarity Power supply GND: Ground level power supply

Claims (2)

[Claims] A plurality of signal input terminals; a plurality of logic circuits having different functions, each of which receives the signal input terminals, or a plurality of blocks each having a different function; and an output terminal of the logic circuit or the block. A switch circuit that selectively switches to any one of the switches, a nonvolatile storage device that outputs a signal for determining selection of a switch connection of the switch circuit, a register that holds data corresponding to the signal, A microcomputer comprising: register control means for controlling writing to a register; and an output terminal for transmitting an output of the switch circuit as a final output terminal to a next-stage logic circuit or block. 2. A non-volatile storage device for storing switch data for switching a plurality of logic circuits having different functions or wirings of blocks having different functions, a volatile storage device for receiving and storing the switch data, A logic circuit or a functional block to which an output signal of the volatile storage device is input; and a control circuit for controlling the nonvolatile storage device and the volatile storage device. The stored data is transferred to the volatile storage device, and the data of the address transferred thereafter is not taken out from the non-volatile storage device, and the control circuit is an automatic sequence circuit without software. Computer.