JP2001085542A - Dielectric gate memory and fabrication thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make possible sporadic polarization of a ferroelectric thin film by employing such a ferroelectric thin film as a part of Ti ions is substituted to equalize the valence number of tetravalent ions and the number of ions of one of Sn, Zr, Hf, Fe or Sm. SOLUTION: A ferroelectric thin film 2, i.e., La2(SnTi)2O7, is formed on the upper surface of an Si substrate 1 through a buffer film 4, i.e., an SiO2 film. As a ferroelectric thin film material, B site of La2Ti2O7 having layer pervskite structure, i.e., a part of Ti ions, is substituted such that the valence number or the number of ions is equalized by tetravalent ions or Nb of any one of Sn, Zr, Hf, Fe or Sm. Since a higher voltage can be applied to the ferroelectric thin film 2 as compared with the buffer film 4, the ferroelectric thin film 2 can be polarized sporadically.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a ferroelectric gate memory capable of lowering an operating voltage, and a composition of a ferroelectric thin film having a low relative dielectric constant used for the same.

[0002] The present invention relates to a ferroelectric gate memory which is a nonvolatile semiconductor memory using a ferroelectric thin film as a gate insulating film.

[0003]

2. Description of the Related Art A ferroelectric gate memory using a ferroelectric as a gate insulating film of a field effect transistor (hereinafter referred to as an FET) has attracted attention as a nonvolatile semiconductor memory. This ferroelectric gate memory controls a drain current by inducing charges on the surface of a semiconductor substrate in a channel region by spontaneous polarization of a ferroelectric.

FIGS. 6A to 6C are cross-sectional views showing three types of structures of a ferroelectric gate memory. The features of each structure will be described below.

FIG. 6A shows a gate structure having a two-layer structure including a ferroelectric thin film 2 and a metal electrode 3 provided on an upper surface thereof, and an MF using the gate having the two-layer structure.
It is an S (Metal-Ferroelectric-Semiconductor) FET. 1 is a semiconductor substrate. In this MFS-FET,
Since the ferroelectric thin film 2 is formed directly on the upper surface of the semiconductor substrate 1, a natural oxide film (silicon dioxide in the case of a silicon substrate) is formed at the interface between the semiconductor substrate 1 and the ferroelectric thin film 2 during the formation. An elementary film, hereinafter referred to as an SiO ₂ film) is often formed. This natural oxide film is an unstable and poor-quality film grown at a low temperature. As a result, an increase in operating voltage and cancellation of polarization due to the generation of trap levels occur, and the natural memory element is not used. There was a problem that the characteristics as described above were somewhat unstable.

FIG. 6B shows a gate having a three-layer structure in which a buffer film 4 of, for example, an SiO ₂ film formed by thermal oxidation is inserted between the ferroelectric thin film 2 of the MFS-FET and the semiconductor substrate 1. MFIS (Metal-Ferroelectric-In
(sulator-Semiconductor) -FET. In this type of FET, a high quality and stable SiO ₂ film is positively formed on the semiconductor substrate 1 so that the MF shown in FIG.
The above-mentioned problem in the S-FET is solved.

FIG. 6C shows an MFMIS (Metal-Ferroele) of a type in which an intermediate metal film 5 is provided on a buffer film 4 and a ferroelectric thin film 2 is formed on the intermediate metal film 5.
ctric-Metal-Insulator-Semiconductor) -FET. In this MFMIS-FET, since the ferroelectric thin film 2 is formed on the metal film 5, it is easy to form a ferroelectric thin film having good characteristics. Therefore, the ferroelectric thin film 2 having good characteristics is easily obtained. There are advantages.

As the ferroelectric, for example, zirconium
Lead titanate (PbZr_xTi_1-xO _ThreeHereinafter referred to as PZT
) And Bi layered compounds such as Y1 are known. P
The relative permittivity and spontaneous polarization of ZT and Y1 are about 100, respectively.
0, 39 μC / cm^Two, 120, 13μC / cm^TwoIn
You.

Japanese Patent Application Laid-Open No. 9-213899 discloses Sr ₂ Ti ₂ O ₇ as a ferroelectric having a perovskite structure.
La ₂ Ti ₂ O ₇ or La ₂ (Ti _0.3 Ta _0.7 ) ₂ O ₇
Etc. are described. However, it is stated that in a memory element using La ₂ Ti ₂ O _{7 formed} by sputtering, data could not be written due to poor crystal orientation.

[0010]

In the MFIS-FET or MFMIS-FET, the metal electrode 3 and the semiconductor substrate 1
To control the drain current. At this time, the MFIS-FET or MFIS
The gate structure of the MIS-FET has a circuit configuration in which the capacitance of the buffer film 4 and the capacitance of the ferroelectric thin film 2 are connected in series.

[0011] Now, the ferroelectric charge Q _f of the thin film 2, the capacitance C _f, voltage V _f, the charge of the buffer film 4 Q _i, a capacitance C _i, when the voltage is V _i, following The formula holds.

[0012] Since the _{Q f = C f · V f} Q i = C i · V i ferroelectric thin film 2 and the buffer layer 4 in series, a Q _f = Q _i. Therefore, the _{C f · V f = C i} · V i (1).

[0013] capacitance C per unit area by the thickness t and a dielectric constant epsilon, the _{C f = ε f / t f} C i = ε i / t i. Substituting this into equation (1) gives: ε _f · V _f / t _f = ε _i · V _i / t _i (2)

As the buffer film 4, a silicon oxide film (hereinafter referred to as S
iO ₂ film hereinafter) using the specific dielectric constant epsilon _i is 3.8, when the relative dielectric constant epsilon _f of the ferroelectric thin film 2 is assumed _{1000, V f / V i =} t f / 263t _i .

Therefore, if the ferroelectric thin film 2 conventionally used is used as the ferroelectric thin film 2, most of the voltage applied to the gate electrode 3 is large because the relative dielectric constant is large. The voltage applied to the buffer film 4 causes the ratio of the voltage applied to the ferroelectric thin film 2 to decrease.

Therefore, the spontaneous polarization formed in the ferroelectric thin film 2 often does not reach saturation. Further, when the voltage applied to the gate electrode 3 is set to zero, there is a problem that the remanent polarization is small, the polarization cannot be maintained large enough to identify the presence or absence of data, and the memory does not function effectively. Was. Further, when a large voltage is applied to the gate electrode, the gate insulating film 4 may cause dielectric breakdown.

In view of such circumstances, an object of the present invention is to provide a ferroelectric gate memory in which a ferroelectric thin film is sufficiently spontaneously polarized at an appropriate gate voltage and has a large residual polarization, and a method of manufacturing the same. Is to do.

[0018]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a second conductive type source region and a drain region formed on a surface layer of a first conductive type semiconductor substrate, A ferroelectric gate memory comprising a drain electrode and a gate electrode provided on a surface of a semiconductor substrate between a second conductivity type source region and a drain region via a buffer film and a ferroelectric thin film. The B site of La ₂ Ti ₂ O ₇ having a layered perovskite structure as a ferroelectric thin film material, that is, a part of Ti ions is converted into any of tetravalent ions of Sn, Zr, Hf, Fe, Sm, or It is assumed that a ferroelectric thin film substituted with Nb to have the same valence and the same number of ions is used.

Such a ferroelectric has a relative dielectric constant of about 10
0 or less, the voltage applied to the ferroelectric thin film is large even when laminated with a buffer film having a small relative dielectric constant,
Since a sufficiently large spontaneous polarization can be obtained, the memory becomes a nonvolatile memory. Further, there is no possibility that an excessive voltage is applied to the buffer film having a small relative dielectric constant to cause a dielectric breakdown.

In particular, it is assumed that the buffer film is a SiO ₂ film.

In a semiconductor using a silicon crystal, a stable SiO ₂ film can be easily formed by thermal oxidation, so that it can be used as a buffer film.

Manufacturing of a ferroelectric gate memory as described above
As a method, SiO 2 by thermal oxidation is used. _TwoStep of forming a film
And a step of directly applying a precursor solution containing a metal thereon
And a step of performing a heat treatment to crystallize the film.
I will do it.

By such a method, a ferroelectric having stable characteristics can be easily obtained.

In particular, when the precursor solution is spin-coated, a ferroelectric having a uniform film thickness can be easily obtained.

[0025]

Embodiments of the present invention will be described below with reference to the drawings. The figures schematically show the shapes, sizes, and arrangements so that the present invention can be understood. Therefore, the present invention is not limited to the numerical values and the like of this embodiment.

[First Embodiment] FIG. 1 is a sectional view of a ferroelectric gate memory according to a first embodiment of the present invention.

La ₂ (S 2) is formed on the upper surface of the Si substrate 1 as a ferroelectric thin film 2 via a buffer film 4 made of SiO ₂ film.
An n, Ti) ₂ O ₇ film is formed. Further, a gate electrode 3 made of platinum (hereinafter referred to as Pt) is provided on the ferroelectric thin film 2. Source / drain regions 6 and 7 separated from each other are formed in a surface layer of the Si substrate 1 below the gate electrode 3, and a source electrode 8 and a drain electrode 9 are provided respectively. In other words, MFIS using La ₂ (Sn, Ti) ₂ O ₇ as a ferroelectric thin film material
An FET is configured. The thickness of the buffer film 4 is 25 n
m, La ₂ (Sn, Ti) ₂ O ₇ ferroelectric film thickness is 50
It was set to 0 nm.

FIG. 2 shows La ₂ (Sn, Ti) ₂ O of FIG.
_{FIG. 7} is a characteristic diagram showing the composition dependence of the relative dielectric constant of a ₇ ferroelectric thin film. The horizontal axis represents the substitution rate of Ti, which is the B site of the La ₂ Ti ₂ O ₇ ferroelectric thin film, with Sn, and the vertical axis represents the relative dielectric constant.
The relative permittivity was measured using an impedance analyzer.

The relative dielectric constant of La ₂ Ti ₂ O ₇ having a substitution rate of 0% is about 55, but becomes lower as the amount of substitution with Sn increases, and the substitution amount of 100%, ie, about ₂ % with La ₂ Sn ₂ O _7. It has reached 30. 30-40 for 25-100% Sn
Range.

FIG. 3 shows La ₂ (Sn _0.5 T) shown in FIG.
i _{0.5) 2} O ₇ ferroelectric polarization of a thin film - a hysteresis curve of the applied voltage. The horizontal axis is the applied voltage, and the vertical axis is the polarization. Sufficiently polarized at an applied voltage of 5V, spontaneous polarization is 1.1μ
C / cm ² . The relative dielectric constant was about 40.

These measurement results show that the spontaneous polarization of PZT, which has been conventionally used as a ferroelectric thin film, is 39 μC / c.
m ² , relative dielectric constant 1000, spontaneous polarization of Y1 13 μC / cm
² , compared to the relative dielectric constant of 120, it is a sufficiently small value,
La ₂ Ti described in Japanese Patent Application Laid-Open No. 9-213899
About 30% or more reduction of ₂ O ₇ from 55 is possible.

The buffer film 4 is a SiO ₂ film formed by thermal oxidation and has a relative dielectric constant of 3.8, a thickness of 25 nm, and a thickness of La ₂ (Sn _0.5 Ti _0.5 ) ₂ O ₇ ferroelectric. Is 500 nm, and the relative dielectric constant is about 40 from the experimental results.
These values are substituted into the previous equation (2), and V _f = 1.90V _i.

As described above, under the same conditions, the value of the voltage _Vf applied to the ferroelectric thin film is determined by the relative permittivity ratio. The _{La 2 (Ti, Sn) 2} O 7 voltages applied across the thin film, voltage _{V (= V i + V f} ) of about 66
% Voltage is applied to the ferroelectric thin film, which is higher than the voltage applied between both ends of the other ferroelectric thin film under the same conditions, and the above-described problem has been solved. .

The MFIS-FET of FIG.
A voltage was applied between the semiconductor substrate 1 and the semiconductor substrate 1, and a drain current flowed even after the voltage was removed, thus effectively functioning as a memory.

FIGS. 4 (a) to 4 (c) show the MFIS-
It is sectional drawing of the order of a manufacturing process of FET. Hereinafter, the manufacturing process will be described with reference to FIG.

First, the entire surface of the Si substrate 1 is thermally oxidized,
An SiO ₂ film having a thickness of 25 nm to be the buffer film 4 is formed (FIG. 4A).

Next, the ferroelectric film 2 is formed using a spin coating method.
A La ₂ (Sn, Ti) ₂ O ₇ film is formed and crystallized by heat treatment to form a ferroelectric thin film (FIG. 2B). The details of the film forming process are as follows.

First, a La ₂ (Sn, Ti) ₂ O ₇ precursor solution for forming a film by a spin coating method is prepared. This La ₂ Ti ₂ O ₇ precursor solution is made of lanthanum acetyl acetate hydrate [La (Acac) ₃ .xH
₂ O], titanium isopropoxide [Ti (OP
r) ₄ ] and tin chloride (SnCl ₄ ) with La and (Ti
+ Sn) is an organic solvent solution mixed so that the molar ratio thereof becomes 1: 1. As the solvent, 2-methoxyethanol is used.

This La ₂ (Sn, Ti) ₂ O ₇ precursor solution is applied onto the buffer film 4 of the Si substrate 1 rotating about an axis perpendicular to the substrate surface. First, rotation speed 5
The coating is performed while rotating at 00 rpm for 5 seconds, and then the coating is performed while rotating at 3000 rpm for 25 seconds. Thus, by the initial loose rotation, Si
The precursor solution is applied to the upper surface of the substrate 1 and is applied while blowing off excess solution by the subsequent high-speed rotation to form a uniform coating film.

Next, the precursor solution is dried in an oven at 150 ° C. This drying step is performed for 15 minutes to evaporate the solvent, moisture and the like in the coating film.

Next, calcination is performed in a calcination furnace at 500 ° C. for 1 minute. In this preliminary firing step, the organic functional groups remaining in the coating film are burned to form a preliminary ferroelectric thin film. The calcination was performed in an air atmosphere, but may be performed in a nitrogen or argon atmosphere.

Each of the steps from the spin coating step to the calcination step is repeated 5 to 20 times. The reason why the preliminary firing is performed a plurality of times is that if a thick film is formed at a time, the preliminary ferroelectric thin film may be broken and damaged.

Finally, main firing is performed in an air atmosphere at 800 ° C. for one hour. By this firing step, the preliminary ferroelectric thin film is crystallized to obtain a La ₂ (Sn, Ti) ₂ O ₇ ferroelectric thin film. X-ray diffraction confirmed that a La ₂ (Sn, Ti) ₂ O ₇ ferroelectric thin film having a good layered perovskite structure was formed. In addition, each temperature set value and processing time described above were set based on the thermal decomposition data.

In this manner, the La ₂ (Sn, Ti) ₂ O ₇ ferroelectric thin film 2 having a good crystal structure and a thickness of 200 to 600 nm is formed on the buffer film 4 with a substantially uniform thickness. Can be formed.

Next, a 200 nm-thick Pt film serving as the gate electrode 3 is deposited on the ferroelectric thin film 2 by, for example, sputtering, and then patterned by photolithography to form a gate electrode [FIG. .

Finally, after the source / drain regions 6 and 7 are formed by ion implantation and heat treatment, for example, an Al alloy film is deposited and patterned to provide source and drain electrodes 8 and 9.

Thus, there is no particularly difficult step,
The MFIS-FET shown in FIG. 1 can be easily completed.

As described above, in the above-described thin film forming method, a step of directly applying a solution (precursor solution) containing a constituent material of a target film to be formed on an insulating film of a substrate, and further performing a heat treatment. A ferroelectric thin film of La ₂ (Sn, Ti) ₂ O ₇ is formed on an appropriate upper surface by a coating pyrolysis method of performing a film crystallization step by using a La ₂ having a good crystal structure. A (Sn, Ti) ₂ O ₇ ferroelectric thin film could be formed. In particular, a La ₂ (Sn, Ti) ₂ O ₇ thin film having a uniform film thickness could be easily formed by performing the precursor solution coating process by a spin coating method.

The spin coating method is a method of the coating step of the coating thermal decomposition method described above, in which the precursor solution is coated on the substrate surface while rotating the substrate about an axis perpendicular to the substrate surface. It is. However, in the field of ferroelectric memory technology, it may be called a spin coating method including a thermal decomposition process.

When a MFIS-FET using a La ₂ (Sn, Ti) ₂ O ₇ thin film was experimentally manufactured, a nonvolatile memory operation was shown.

Since the relative dielectric constant of the La ₂ (Sn, Ti) ₂ O ₇ thin film is smaller than that of the conventional ferroelectric material, the voltage applied to the ferroelectric thin film must be increased. Can be. Therefore, La ₂ (Sn, Ti) ₂ O ₇
The spontaneous polarization formed in the thin film is also easily saturated, and the remanent polarization increases. As a result, the operating voltage of the MFIS-FET can be reduced. Further, since the ratio of the voltage applied to the buffer film can be made lower than before, there is also an advantage that there is no possibility that the dielectric breakdown of the buffer film occurs.

As for the manufacturing process, a method may be adopted in which the source region and the drain region 6 and 7 are formed by implanting ions of impurities before forming the buffer film 4. [Embodiment 2] FIG. 5 is a cross-sectional view of La ₂ (H
(f, Ti) ₂ O ₇ is a hysteresis curve of a polarization-applied voltage of a ferroelectric thin film. The horizontal axis is the applied voltage, and the vertical axis is the polarization. Polarization was sufficient at an applied voltage of about 5.0 V, and spontaneous polarization was 0.6 μC / cm ² . When measured using an impedance analyzer, the relative dielectric constant was about 40.

An MFIS-FET using this La ₂ (Hf, Ti) ₂ O ₇ thin film was experimentally manufactured, and showed a non-volatile memory operation. This is La ₂ (Hf, Ti) ₂ O ₇
Since the relative permittivity of the thin film is smaller than that of the conventional ferroelectric material, the voltage applied to the ferroelectric thin film is higher than before, the spontaneous polarization is easily saturated, and the remanent polarization is also increased. Conceivable.

[Embodiment 3] La formed in the same manner
_{2 (Nb, Ti) 2 O} 7 ferroelectric polarization film - measured hysteresis curve of the applied voltage. Polarization was sufficient at an applied voltage of about 3.0 V, and spontaneous polarization was 2.0 μC / cm ² . When measured using an impedance analyzer, the relative dielectric constant was about 50.

An MFIS-FET using this La ₂ (Nb, Ti) ₂ O ₇ thin film was experimentally manufactured, and showed a nonvolatile memory operation.

[Examples 4, 5, and 6]
La_Two(Fe, Ti)_TwoO₇Thin film, La_Two(Sm, T
i) _TwoO₇Thin film, La_Two(Zr, Ti)_TwoO₇Use thin film
Prototyped MFIS-FETs
A spontaneous memory operation was shown.

Also in this case, since the relative dielectric constant of the ferroelectric thin film is smaller than that of the conventional ferroelectric material, it is considered that the voltage applied to the ferroelectric thin film is higher than that of the conventional ferroelectric thin film.

In the above embodiment, an example in which the spin coating method is adopted as the coating method has been described, but another method, for example, a dip method may be used. Further, it is considered that methods such as MOCVD, vapor deposition, sputtering, and PLD may be used. In addition, MFIS-FE is used as an FET structure.
Although T is adopted, an MFMIS-FET may be used. In this case, for example, an SiO ₂ film and La ₂ (Sn, Ti) ₂ O
_A Pt film is provided as a floating electrode between the ₇ film and
A ferroelectric thin film is preferably formed thereon.

Regarding a nonvolatile memory using a ferroelectric thin film as a gate insulating film, Japanese Patent Application Laid-Open No. 9-213899 describes a similar type of ferroelectric material. Therein, when a ferroelectric the _{M1 2 (M2 x M3 1-} x) 2 O 7, M1 is Sr, Ca, Nd, M2 are listed examples of Nb. Further, there is also mentioned an example in which M1 is La and M2 is Ti. However, including those cases, M3 is always Ta, and there is no description suggesting other elements. Further, it is assumed that 0.1 ≦ x ≦ 0.5. In this case, M2 ≦ M3, that is, the content of Ta is larger than M2.

The present invention relates to the above-mentioned JP-A-9-21389.
No substance overlapping with the ferroelectric material of JP-A No. 9 is contained, and therefore, the invention is different from the invention.

[0061]

As described above, according to the present invention, as a ferroelectric thin film material, La ₂ (Sn, T ₂₎ having a relative dielectric constant of 50 or less in which Ti ions of La ₂ Ti ₂ O ₇ are replaced by other ions.
i) By using ₂ O ₇ or the like, of the voltages applied to the gate electrode, the voltage applied to the ferroelectric thin film is
It is possible to make the ferroelectric thin film spontaneous polarization higher than the voltage applied to the buffer film. Also,
The remanent polarization is increased, data can be easily retained, and a non-volatile memory having a lower operating voltage than before can be obtained.

Therefore, the present invention makes a great contribution to the development and spread of nonvolatile memories.

[Brief description of the drawings]

FIG. 1 shows La ₂ (Sn, Ti) ₂ O _{7 of} Example 1 of the present invention.
Sectional view of MFIS-FET using film

FIG. 2 is a characteristic diagram showing the composition dependence of the relative dielectric constant of La ₂ (Sn, Ti) ₂ O ₇ .

FIG. 3 shows a graph of La ₂ (Sn) used for the FET of Example 1 of the present invention.
_0.5, the polarization characteristic diagram of Ti _{0.5) 2} O ₇ film

FIGS. 4A to 4C are MFIS-FETs of Example 1.
Sectional view in order of manufacturing process

FIG. 5 shows a graph of La ₂ (H) used in the FET of Example 2 of the present invention.
f, Ti) ₂ O ₇ film polarization characteristics

FIGS. 6 (a), (b), and (c) show MFS-
Sectional view of FET, MFIS-FET, MFMIS-FET

[Explanation of symbols]

Reference Signs List 1 semiconductor substrate or Si substrate 2 ferroelectric thin film or La ₂ (Sn, Ti) ₂
O ₇ film 3 Gate electrode 4 Buffer film 5 Intermediate metal film 6 Source region 7 Drain region 8 Source electrode 9 Drain electrode

Continuation of the front page (72) Inventor Hisato Kato 1-1-1, Tanabe-Shinda, Kawasaki-ku, Kawasaki-shi, Kanagawa Prefecture F-term (reference) 5F001 AA17 AD12 AG02 AG30 5F083 FR06 GA30 JA03 JA13 JA38 PR23 PR33

Claims (5)

[Claims] A second conductive type source region and a drain region formed on a surface layer of the first conductive type semiconductor substrate; a source electrode and a drain electrode in contact therewith; and a second conductive type source region and a drain region. And a gate electrode provided on the surface of the semiconductor substrate with a buffer film and a ferroelectric thin film interposed therebetween, wherein the ferroelectric thin film material has a layered perovskite structure of La ₂ Ti _2.
The B site of O ₇ , that is, a part of Ti ion is converted to S
A ferroelectric gate memory using a ferroelectric thin film substituted with any of tetravalent ions of n, Zr, Hf, Fe, and Sm. 2. A second conductivity type source region and a drain region formed on a surface layer of a first conductivity type semiconductor substrate, and a source electrode and a drain electrode in contact with the second conductivity type source and drain regions, respectively, and between the second conductivity type source and drain regions. And a gate electrode provided on the surface of the semiconductor substrate with a buffer film and a ferroelectric thin film interposed therebetween, wherein the ferroelectric thin film material has a layered perovskite structure of La ₂ Ti _2.
The B site of O ₇ , that is, a part of Ti ion is converted to Nb
A ferroelectric gate memory characterized by using a ferroelectric thin film substituted so as to have the same valence and the same number of ions. 3. The ferroelectric gate memory according to claim 1, wherein the buffer film is a silicon dioxide (SiO ₂ ) film. 4. A semiconductor device formed on a surface layer of a semiconductor substrate of a first conductivity type.
And the second conductivity type source region and the drain region, respectively.
The source electrode and the drain electrode that are in contact
Buffer on the surface of the semiconductor substrate between the source and drain regions
Membrane and La _TwoTi_TwoO₇B site of Ti, that is, Ti
Some of the ions are converted to Sn, Zr, Hf, Fe, Sm, and Nb.
Make the valence and ion number the same for any of the ions
Electrode provided via a ferroelectric thin film substituted for
A method for manufacturing a ferroelectric gate memory comprising:
Silicon dioxide (SiO_Two) Film formation
Process for directly applying a precursor solution containing a metal on it
And the step of performing a heat treatment to crystallize the film.
Manufacturing of ferroelectric gate memory characterized by performing
Method. 5. The method for manufacturing a ferroelectric gate memory according to claim 4, wherein the precursor solution is spin-coated.