JP2001084694A - Data transfer device and integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress system change of a first transfer means to a minimum by adding a second transfer means provided with a means for retransferring data and a means for detecting a watermark to transfer data in which watermark is embedded by the first transfer means. SOLUTION: A recording and reproducing signal block 14 being a first transfer means processes a signal inputted to an input/output control means (1) 16, records it in a disk 11, processes a signal read out from the disk 11, and outputs it from the input/output control means (1) 16. When watermark(WM) is embedded in a signal inputted externally, in order to enable to control a system by detecting it, an input/output control means 20 with detecting WM being a second transfer means is added, and signals are delivered and received between the device and the outside through this block. A WM detecting means 22 extracts WM from a signal input/output means 23, and controls transmission of data for an input/output control means (2) 21 conforming to the contents.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for transferring data in which other data is embedded in image or audio data, and more particularly to a data transfer apparatus having a function of detecting embedded data and controlling the data in accordance with the detection result. Get involved.

[0002]

2. Description of the Related Art A digital watermarking technique (data hiding) has been studied so far as a technique for embedding identification information and annotations in image, voice and text data. Recently, identification information has been embedded in data to protect copyrights, and has been applied as a technique for preventing unauthorized operations. These techniques are described in "Nikkei Electronics" of Nikkei BP (1997.24. P149-P162).

[0003] If this digital watermarking technology is adopted as a means for copy control in the future, it will be necessary to provide a function for detecting a digital watermark, and a new device must be developed.

[0004]

Various situations are conceivable with respect to copy restrictions, such as original data that can be freely copied due to copyright, data that is prohibited from being copied, and data that can be copied only once. It has been considered that data is embedded using a digital watermarking technique in accordance with those situations, and copying is controlled by detecting the data. The data thus embedded is watermarked (hereinafter abbreviated as WM). The WM is always embedded in the original data so that it can be detected even if any part of the data is reproduced. However, it does not describe the operation of a system having a function of detecting the WM embedded in this way.

In order to perform WM detection, a conventional system must be used.
It is necessary to add a WM detection function, but if the configuration of the conventional system is changed, it will be necessary to reconsider the entire system, so that time will be spent on system development. Therefore,
The challenge is to add a WM detection function by adding small blocks without changing the conventional system as far as possible.

[0006]

To achieve the above object, the present invention provides an apparatus provided with first transfer means for transferring first data, wherein the first data includes:
Second data, which is additional information of the first data, may be included, and the second data is embedded in the first data, and the data from the first transfer unit is retransmitted. The provision of the second transfer means and the detection means for detecting the second data makes it possible to realize a device having a WM detection function.

Also, in an integrated circuit provided with a transfer means for transferring the first data and a detection means for detecting the second data, the transfer means can transfer data from another transfer means. An integrated circuit characterized in that it is difficult to avoid WM detection by combining the transfer means and the detection means.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment of a configuration of a recording / reproducing system having a WM detection function according to the present invention.
FIG. 2 shows an example of the configuration of a conventional recording / reproducing system having no WM detection function according to the present invention.

Here, for the sake of explanation, an example of a disk reproducing apparatus will be used, but this is, of course, not limited to a disk reproducing apparatus, but relates to a general data recording / reproducing apparatus including a magnetic recording / reproducing apparatus.

Here, it is assumed that the type of embedded data is information for copy control. Of course, the information to be embedded is not limited to the copy control information, but is not limited to the information indicating the type of data and the control information according to each recording medium.

In general, in order to reproduce data, copy control may be required to protect copyright. There are data transmitted by radio waves such as broadcasts and data recorded as media such as disks and cassettes. Therefore, it is necessary to detect the copy control information according to each mode and perform the reproduction control or the recording control in accordance with the copy control information.

First, the operation of the conventional system shown in FIG. 2 will be described. 2, reference numeral 11 denotes a disk serving as a recording medium, 12 denotes a pickup, 13 denotes a preamplifier, 14 denotes a recording / reproducing signal processing block, 15 denotes a recording / reproducing signal processing unit, 16 denotes an input / output control unit (1), and 17 denotes a rotation control. Means, 18 a system control means, 19 a motor for rotating the disk, 23 a signal input / output terminal, and 24 a display means.

A signal reproduced from the disk 11 by the pickup 12 is amplified by a preamplifier 13 and input to a recording / reproduction signal processing block 14. The signal processing block 14 is roughly divided into a reproduction signal processing means 15 for performing a reproduction process on a reproduced signal according to a signal format at the time of reproduction, and usually includes a process for rearranging data and correcting an error. However, details are not shown. An input / output control means (1) 16 for performing control for outputting a reproduced signal and a rotation control means 17 are included. The rotation control means 17 receives a speed detection signal capable of detecting the rotation speed from the recording / reproduction signal processing means 15, and controls the motor 19 to control the rotation of the disk to the target rotation. The system control means 18 includes the rotation control means 17
At the same time as setting the target rotation control, the system control unit 18 controls the operation of these several processing units and control units. The display means 24 also receives a control signal from the system control means,
Displays the information contained in the recorded signal.

At the time of recording, the recording / reproducing signal processing block 1
A recording process is performed on a signal to be recorded in order to write the signal input to 4 on a recording medium in accordance with a signal format. Normally, this includes processing for rearranging data and adding an error correction code, but details are not shown.

A conventional device has such a configuration, and a signal from the input / output control means (1) 16 is a signal input / output. However, since conventional devices do not have a function of detecting a WM, the system cannot be controlled by information embedded as the WM.

Next, the difference from the conventional system shown in FIG. 2 will be described with reference to FIG. In FIG. 1, 20 is input / output control means with WM detection, 21 is input / output control means (2),
22 is a WM detection means, 71 is a connection confirmation means 1, 72 is a connection confirmation means 2, 73 is an authentication means. In addition to the conventional system shown in FIG. 2, an input / output control means 20 with WM detection is added, whereby the WM is detected while performing input / output control in the same manner as in the related art, and the system is configured according to the detection result. It becomes possible to control. Here, the connection confirmation means (1) 71 and the connection confirmation means (2) 72 are confirmation means for confirming that they are connected to each other, and if both are correctly connected. If not confirmed, input / output of data from each block is stopped. Alternatively, by transmitting the data to the system control unit 18, control is performed to stop the data transfer.

The connection confirming means (1) 71 and the connection confirming means (2) 72 do not need to confirm each other, but may confirm each other with respect to the system control means 18. The authentication unit 73 is an authentication unit for performing authentication with both the connection partner and the other party when connecting to another device as the whole system. As a result, it is possible to confirm what kind of device the connection partner is, and system control is performed according to the result, and if necessary, scramble so that data being transferred cannot be extracted from the middle. To use the encryption by. In this figure, the authentication means 73 is described as being directly connected to the system control means 18, but is not limited to such a connection in practice, and may be included in the recording / reproduction signal processing block 14,
It is also possible to include the input / output control means 20 with WM detection. The display means 24 displays the result of the connection confirmation means (1) 71 and the connection confirmation means (2) 72 confirming that they are connected to each other, and displays the authentication result confirmed by the authentication means 73. Receives the signal from the system control means and displays the state at that time.

With such a configuration, if the WM detection is bypassed, data transfer becomes impossible, so that copy control is always performed in accordance with the WM information, and a system that makes it difficult to avoid WM detection is constructed. it can.

FIG. 3 shows an embodiment of the configuration of the input / output control means 20 with WM detection shown in FIG. This figure shows a case where the connection destination of the signal input / output 23 is a personal computer (hereinafter abbreviated as a host PC) serving as a host. In this case, the system shown in Fig. 1 is a CD-ROM
Or a DVD drive, but of course is not limited to these. Also, here, since the connection with the host PC is described as an example, the data transfer is in accordance with the ATAPI or SCSI format, but the data transfer method is as follows.
The data transfer format for connecting devices such as IEEE1394 and USB is not limited to these,
There is no particular limitation on the format for transmitting video and audio data.

In FIG. 3, reference numeral 25 denotes a host transmission signal;
6 is a host reception signal, 27 is a data bus, 30 is a control signal reception a, 33 is a data bus control, 34 is a data bus control SW, 35 is a header detection, 36 is a WM detection operation, and 37 is a WM detection operation.
It is a judgment. First, an operation when the host PC reads data from the CD-ROM drive, that is, when the host PC receives a signal reproduced by the recording / reproduction signal processing block 14 will be described. A signal for requesting data reading is transmitted from the host PC as a host transmission signal 25, and the recording / reproducing signal processing block 14 reproduces data according to a request from the host PC and is ready to output. As a host reception signal 26 to the host PC. At this time, the host transmission signal 25 and the host reception signal 2
6. The data bus 27 exchanges data via the input / output control means 20 with WM detection. By doing so, since the data to be transferred always passes through the block for performing WM detection, it is possible to make it difficult to avoid the WM from being detected.

The input / output processing means (2) 21 receives the host transmission signal 25 and the host reception signal 26, and controls whether to transmit data on the data bus according to the detected WM. The control signal reception a30 detects the timing of the data to be transferred from the host transmission signal 25 and the host reception signal 26 so as to extract a necessary portion of the data transmitted via the data bus. In addition, by receiving a signal indicating that the transfer has been completed, the WM detection can be terminated, and the WM detection means 22 is operated only when necessary, and is stopped when not necessary, thereby reducing power consumption. I can do it. Here, the control signal reception a30 is described so as to receive both the host transmission signal 25 and the host reception signal 26, but not all the signals transmitted to and received from the host are required depending on the data transfer format.

The WM detecting means 22 receives the timing signal from the control signal reception a30 and the data on the data bus, extracts necessary data from the data, and detects the WM. The detection of WM differs depending on the format in which WM is embedded, but if WM is embedded in video data compressed by MPEG and can be detected from MPEG stream data, In the header detection 35, the head of data called a sequence header or a picture header is detected, and WM detection is started therefrom. WM
In the detection calculation 36, a calculation of what information is included as the WM is performed, and finally the WM is determined by the WM determination 37.

Then, according to the WM, the data bus control SW
34 to control data output. That is, if the WM finds that the data has been illegally copied, it controls to stop outputting the data, and instead sends a flag indicating that the data transfer was not correctly performed. Alternatively, by sending the WM determination result to the system control means 18, the system control means 18 controls the system according to the WM. However, in this case, it is conceivable that the data transfer with the system control unit may be avoided. Therefore, it is preferable to control the data bus even in the input / output control unit 20 with WM detection.

Here, the connection confirmation means (1) 71 and the connection confirmation means (2) 72 are confirmation means for confirming that they are connected to each other, and if both are correctly connected. If not, the connection confirmation means (2) 72 switches the data bus control SW 34,
Control the output of data and instead send a flag indicating that the data transfer was not successful.
Alternatively, by transmitting the data to the system control unit 18, control is performed to stop the data transfer.

As described above, by performing the connection confirmation on both sides, the WM detection is always connected, and it is difficult to avoid the WM detection. The display means 24 also displays the result of the connection confirmation means (1) 71 and the connection confirmation means (2) 72 confirming that they are connected to each other, receives a signal from the system control means, and receives the connection at that time. Display status. With such a configuration, if the WM detection is bypassed, data transfer becomes impossible, so that copy control is always performed in accordance with the WM information, and a system that makes it difficult to avoid WM detection can be configured.

As described above, by adopting a system configuration in which the input / output control means 20 with WM detection is added to the conventional system, it is possible to configure a highly reliable system with a WM detection function, in which detection results are not easily avoided. It becomes possible. Also,
In this system, by making the input / output control unit with WM detection 20 an integrated circuit, it is possible to make it difficult to bypass the WM detection.

Next, the operation when the host PC writes data to the CD-R drive, that is, when the data sent from the host PC is received by the recording / reproduction signal processing block 14 for recording signal processing will be described. Host PC
Thereafter, a signal for requesting data writing is transmitted as a host transmission signal 25, and the recording / reproducing signal processing block 14 prepares to receive data according to a request from the host PC. Then, the fact that the preparation is completed is sent to the host PC as the host reception signal 26. This allows the host PC
Is written via the data bus 27. At this time, the host transmission signal 25, the host reception signal 26, and the data bus 27 are exchanged through the input / output control unit 20 with WM detection, as in the case of reproduction. By doing so, since the data to be transferred always passes through the block for performing WM detection, it is possible to make it difficult to avoid the WM from being detected.

The input / output processing means (2) 21 receives the host transmission signal 25 and the host reception signal 26, and controls whether to transmit data on the data bus according to the detected WM. The control signal reception a30 detects the timing of the data to be transferred from the host transmission signal 25 and the host reception signal 26 so as to extract a necessary portion of the data transmitted via the data bus. In addition, by receiving a signal indicating that the transfer has been completed, the WM detection can be terminated, and the WM detection means 22 is operated only when necessary, and is stopped when not necessary, thereby reducing power consumption. I can do it. Here, the control signal reception a30 is described so as to receive both the host transmission signal 25 and the host reception signal 26, but not all the signals transmitted to and received from the host are required depending on the data transfer format.

The WM detection means 22 performs a detection operation in the same manner as during reproduction, although the data transfer direction differs between recording and reproduction.
Control transfer according to WM. If the detected WM indicates that the data has been illegally copied, the transfer of data is stopped. Also, if the copy information is information indicating that only reproduction is permitted and the data is not permitted to be recorded, the reproduction information is output to a monitor or display for a video signal, or to a speaker for an audio signal. Is output, but is not transferred to a recording device, such as a hard disk, a tape recorder, or a disk recorder. This is the authentication means 73
Thus, when connecting to another device, authentication is performed on both sides of the connection partner, so that the connection partner device can be confirmed.

As described above, by adopting a system configuration in which the input / output control means 20 with WM detection is added to the conventional system, it is possible to configure a highly reliable system with a WM detection function and in which the detection result is hard to be avoided. It becomes possible. Also,
By making the input / output control unit 20 with WM detection an integrated circuit, it is possible to make it difficult to bypass the WM detection.

FIG. 4 shows another embodiment of the configuration of the input / output control means 20 with WM detection shown in FIG.
Similar to FIG. 3, this figure shows a case where the connection destination of the signal input / output 23 is a host PC.

Reference numeral 31 denotes a control signal transmission / reception b1, 32 denotes a control signal transmission / reception b2, and 38 denotes a memory for storing data. First, an operation when the host PC reads data from the CD-ROM drive, that is, when the host PC receives a signal reproduced by the recording / reproduction signal processing block 14 will be described. Here, when the calculation process for WM detection takes time, it may be necessary to temporarily store and transfer data in order to secure the detection time. Alternatively, the response speed of the control signal may not be able to satisfy the standard and may be reduced due to the input / output control unit 20 with the WM detection. In order to cope with such a case, the following configuration is employed to enable the WM detection operation.

It is assumed that the conventional system unit (the configuration of FIG. 2) including the recording / reproducing signal processing block 14 supports up to the fast transfer mode, and the input / output control unit 20 with WM detection requires time for the arithmetic processing for WM detection. Therefore, when only the slow transfer mode can be supported, the input / output control unit with WM detection 20 makes the host PC recognize the slow data transfer mode that can be supported, and the conventional system unit performs the fast transfer mode. , The data is reproduced quickly, and the difference between the transfer speeds of the host PC and the recording / reproducing signal processing block 14 is adjusted by the input / output control unit 20 with WM detection. Therefore, the host transmission signal 25 becomes a signal corresponding to the slow transfer mode, and the host transmission signal (2) 28 becomes a signal corresponding to the fast transfer mode. Similarly, the host reception signal 26 is a signal corresponding to the slow transfer mode, and the host reception signal (2) 29 is a signal corresponding to the fast transfer mode.

The host PC transmits a host transmission signal 25 for requesting data reading to the input / output control means 20 with WM detection. The input / output control means 20 with WM detection includes:
The control signal transmission / reception (b1) 31 causes the host transmission signal 2
5 is transmitted to the control signal transmission / reception (b2) 32. The control signal transmission / reception (b2) 32 receives a command from the control signal transmission / reception (b1) 31, and converts the host transmission signal (2) 28 similar to the host transmission signal 25 transmitted from the host PC into the recording / reproducing signal processing block 14. Send to In the recording / reproduction signal processing block 14, this signal is received by the input / output control means (1) 16.

The recording / reproducing signal processing block 14 is a host transmission signal (2) 28 from the input / output control means 20 with WM detection.
Is sent to the input / output control means with WM detection 20 as a host reception signal (2) 29. The input / output control unit with WM detection 20 receives the host reception signal (2) 29 by the control signal transmission / reception (b2) 32 and notifies the control signal transmission / reception (b1) 31 of the reception. Control signal transmission / reception (b1) 31
Receives the command from the control signal transmission / reception (b2) 32,
A host reception signal 26 is sent to the host PC. At the same time, the recording / reproducing signal processing block 14 sends the reproduced data to the input / output control means 20 with WM detection, and stores the transferred data in the memory 38 in the data bus control 33.

Here, the WM detecting means 22 performs WM detection on the data stored in the memory 38. Data that is no longer required for WM detection is read from the memory 38 and sent to the host PC via the data bus 27. Depending on the result of the WM detection, the data bus control SW 34 can be controlled to stop outputting data to the host PC. In order to stop the data transfer, not only the method of controlling the data bus control SW 34 to stop the output of the data to the host PC, but also the fact that the data transfer is impossible to the host PC using the host reception signal 26 is sent. Things are also possible.

As described above, the input / output control means 20 with WM detection
By providing a memory for temporarily converting data transfer speed and temporarily storing data, without changing the conventional system,
When a detection time for the WM detection is required, the detection time can be secured.

The connection confirmation means (1) 71 and the connection confirmation means (2) 72 are confirmation means for confirming that they are connected to each other, and if both are correctly connected. In this case, the connection confirmation means (1) 71 and the connection confirmation means (2) 72 prevent data from being extracted during data transfer by encrypting the data on the data bus 27, such as scrambling. It is possible to do.

Next, the operation when the host PC writes data to the CD-R drive, that is, when the data sent from the host PC is received by the recording / reproduction signal processing block 14 for recording signal processing will be described. Host PC
Then, a signal for requesting data writing is transmitted as a host transmission signal to the input / output control means 20 with 25WM detection. The input / output control means 20 with WM detection receives the host transmission signal 25 by the control signal transmission / reception (b1) 31, and notifies the control signal transmission / reception (b2) 32 of the reception. The control signal transmission / reception (b2) 32 is a control signal transmission / reception (b1)
In response to a command from the host 31, a host transmission signal (2) 28 similar to the host transmission signal 25 transmitted from the host PC is sent to the recording / reproducing signal processing block 14. The recording / reproducing signal processing block 14 outputs this signal to the input / output control means (1) 1
6 to receive. The recording / reproducing signal processing block 14 prepares to receive data. Then, the fact that the preparation is completed is sent to the input / output control means 20 with WM detection as the host reception signal (2) 29.

The input / output control means 20 with WM detection receives the host reception signal (2) 2 by the control signal transmission / reception (b2) 32.
9 is transmitted to the control signal transmission / reception (b1) 31. The control signal transmission / reception (b1) 31 receives a command from the control signal transmission / reception (b2) 32 and
Send 6 to the host PC. Thereby, data to be written from the host PC is transferred via the data bus 27. host
The PC sends the data to the input / output control unit 20 with WM detection, and stores the transferred data in the memory 38 in the data bus control 33. Here, the WM detection means 22 performs WM detection on the data stored in the memory 38. Data unnecessary for WM detection is read from the memory 38 and sent to the recording / reproducing signal processing block 14 via the data bus 27. Depending on the result of the WM detection, the data bus control SW 34
To stop outputting data to the host PC.

As described above, the input / output control means 20 with WM detection
By providing a memory for temporarily converting data transfer speed and temporarily storing data, without changing the conventional system,
When a detection time for the WM detection is required, the detection time can be secured.

The WM detection means 22 performs a detection operation in the same manner as during reproduction, although the data transfer direction differs between recording and reproduction.
Control transfer according to WM. If the detected WM indicates that the data has been illegally copied, the transfer of data is stopped. Also, if the copy information is information indicating that only reproduction is permitted and the data is not permitted to be recorded, the reproduction information is output to a monitor or display for a video signal, or to a speaker for an audio signal. Is output, but is not transferred to a recording device, such as a hard disk, a tape recorder, or a disk recorder.

As described above, by adopting a system configuration in which the input / output control means 20 with WM detection is added to the conventional system, it is possible to configure a highly reliable system having a WM detection function and in which the detection result is hard to be avoided. It becomes possible. Also,
By making the input / output control unit 20 with WM detection an integrated circuit, it is possible to make it difficult to bypass the WM detection.

FIG. 5 shows another embodiment having a WM embedding means as the configuration of the input / output control means 20 with WM detection shown in FIG. Similar to FIG. 3, this figure shows a case where the connection destination of the signal input / output 23 is a host PC. In this case, the conventional system configuration shown in FIG.
It corresponds to a CD-ROM or a DVD drive, but of course is not limited to these. Also, here, the connection with the host PC will be described as an example, so the data transfer is performed using ATAPI or SCSI.
, But the data transfer method is not limited to these, and IEEE1394 and US
There is no particular limitation on a data transfer format for connecting a device such as B or a digital audio transfer format for transmitting video and audio data.

In FIG. 5, reference numeral 41 denotes WM embedding means,
2 is a header detection means, 43 is WM generation means, and 44 is WM writing means. For example, when the host PC writes data to the CD-R drive, that is, when the data transmitted from the host PC is received by the recording / reproduction signal processing block 14 for recording signal processing, the information for copy control is set as WM. It may be necessary to embed it in the data. In this case, a command for embedding the WM in the transfer data is issued by the system control unit 18 to embed the WM. A signal for requesting data writing is sent from the host PC to the host transmission signal 25.
To the input / output control means 20 with WM detection.

The input / output control means 20 with WM detection receives the host transmission signal 25 by the control signal transmission / reception (b1) 31, and notifies the control signal transmission / reception (b2) 32 of the reception. The control signal transmission / reception (b2) 32 receives the command from the control signal transmission / reception (b1) 31, and receives the command from the control signal transmission / reception (b1) 31, and transmits the same host transmission signal (2) as the host transmission signal 25 transmitted from the host PC.
28 to the recording / reproducing signal processing block 14. In the recording / reproducing signal processing block 14, this signal is received by the input / output control means (1) 16. The recording / reproducing signal processing block 14 prepares to receive data to be recorded.

Then, the fact that the preparation is completed is sent to the input / output control means 20 with WM detection as the host reception signal (2) 29. The input / output control unit with WM detection 20 receives the host reception signal (2) 29 by the control signal transmission / reception (b2) 32 and notifies the control signal transmission / reception (b1) 31 of the reception.
The control signal transmission / reception (b1) 31 includes the control signal transmission / reception (b1).
2) In response to the command from 32, send the host reception signal 26 to the host PC. Thereby, data to be written from the host PC is transferred via the data bus 27. The host PC sends the data to the input / output control means 20 with WM detection, and stores the transferred data in the memory 38 in the data bus control 33. Up to this point, the recording is the same as that of the example shown in FIG. Here, the WM embedding means 41 performs WM embedding on the data stored in the memory 38.

The WM embedding means 41 receives the data on the data bus stored in the memory 38 and embeds the WM.
The embedding of the WM differs depending on the format in which the WM is embedded.If it is possible to embed the WM in MPEG-compressed video data and embed it in the MPEG stream data, In the detection 42, for example, the head of data called a sequence header or a picture header is detected, and WM embedding is started therefrom. The WM generation 43 determines how to embed the WM according to what information is to be embedded as the WM and the information amount of the data transferred at that time, and generates the WM in accordance with the WM. And the generated WM is WM
The writing unit 44 writes the WM superimposed on the data. The data on which the WM embedding has been completed is read from the memory 38 or immediately output without being written to the memory, and sent to the recording / reproducing signal processing block 14 via the data bus 27 and recorded.

As described above, the input / output control means 20 with WM detection
With a memory for temporarily storing data transfer rate and data, and a means for embedding WM, it is possible to secure the time for WM embedding and perform WM embedding without changing the conventional system. . Further, by making the input / output control means 20 with WM detection an integrated circuit,
It is possible to make it difficult to bypass the embedding.

FIG. 6 shows another embodiment having a WM updating means as the configuration of the input / output control means with WM detection 20 shown in FIG. Similar to FIG. 3, this figure shows a case where the connection destination of the signal input / output 23 is a host PC. In this case, the conventional system configuration shown in FIG.
It corresponds to an OM or a DVD drive, but of course is not limited to these. Also, here, since the connection with the host PC will be described as an example, the data transfer is in accordance with the ATAPI or SCSI format, but the data transfer method is not limited to these. , IEEE1394 or USB
There are no particular restrictions on the data transfer format for connecting such devices, or the digital audio transfer format for transmitting video and audio data.

In FIG. 6, reference numeral 51 denotes WM updating means, 52 denotes header detecting means, 53 denotes WM generating means, and 54 denotes WM writing means. For example, when the host PC updates the data to the CD-R drive, that is, when the data sent from the host PC is received by the recording / reproducing signal processing block 14 for recording signal processing, the information is information for copy control. In some cases, it is necessary to detect the WM, update the copy information, and embed the new WM in the data. In this case, a command for embedding the WM in the transfer data is issued by the system control unit 18 to embed the WM. A signal for requesting data writing is transmitted from the host PC to the input / output control unit 20 with 25WM detection as a host transmission signal.

The input / output control means 20 with WM detection receives the host transmission signal 25 by the control signal transmission / reception (b1) 31, and notifies the control signal transmission / reception (b2) 32 of the reception. The control signal transmission / reception (b2) 32 receives the command from the control signal transmission / reception (b1) 31, and receives the command from the control signal transmission / reception (b1) 31, and transmits the same host transmission signal (2) as the host transmission signal 25 transmitted from the host PC.
28 to the recording / reproducing signal processing block 14. In the recording / reproducing signal processing block 14, this signal is received by the input / output control means (1) 16. The recording / reproducing signal processing block 14 prepares to receive updated recording data. Then, the host is ready (2)
29 is sent to the input / output control means 20 with WM detection.

The input / output control means 20 with WM detection receives the host reception signal (2) 2 by the control signal transmission / reception (b2) 32.
9 is transmitted to the control signal transmission / reception (b1) 31. The control signal transmission / reception (b1) 31 receives a command from the control signal transmission / reception (b2) 32 and
Send 6 to the host PC. As a result, data to be updated and recorded from the host PC is transferred via the data bus 27. The host PC transfers the data to the input / output control unit 20 with WM detection.
And stores the transferred data in the memory 38 in the data bus control 33. Up to this point, the recording is the same as that of the example shown in FIG. Here, the WM embedding unit 51 performs WM update on the data stored in the memory 38.

The WM updating means 51 receives the data on the data bus stored in the memory 38, first detects the WM embedded in the data, performs control according to the detected result, and if necessary, Update WM. The update of the WM depends on the format in which the WM is embedded, but if the WM can be embedded in MPEG stream data by a method of embedding the WM in MPEG-compressed video data, In the detection 52, for example, the head of data called a sequence header or a picture header is detected, and WM detection and update are started from there.
In the WM detection calculation 55, a calculation of what information is included as WM is performed, and finally the WM is determined by the WM determination 56. Then, according to the WM, the data bus control SW3
4 to control data output. Alternatively, by sending the WM determination result to the system control means 18, the system control means 18 controls the system according to the WM.

The WM generation 53 receives the result of the WM determination in the WM determination 56, determines what information is to be embedded as the WM to be updated, thereby determining how to embed the WM, Generate WM together. The generated WM is superimposed on the data and written by the WM writing means 54. The data on which the WM embedding has been completed is read from the memory 38 or immediately output without being written to the memory, and sent to the recording / reproducing signal processing block 14 via the data bus 27 and recorded.

As described above, the input / output control means 20 with WM detection
By providing a memory for temporarily storing data transfer rate conversion and data and providing a WM updating means, it is possible to secure a time for WM updating and to perform WM embedding without changing the conventional system. Further, by making the input / output control unit with WM detection 20 an integrated circuit, it is possible to make it difficult to bypass the WM update.

FIG. 7 shows another embodiment of the configuration of a recording / reproducing system having a WM detection function according to the present invention. FIG. 8 shows the input / output conversion means 61 with WM detection shown in FIG.
1 shows an embodiment of the configuration.

In FIG. 7, reference numeral 61 denotes input / output conversion means with WM detection, and reference numeral 62 denotes input / output conversion means. The input / output conversion unit 62 has a function of converting, for example, SCSI input / output as ATAPI input / output.
6 is compatible only with ATAPI input / output, by adding this input / output conversion means 62,
It becomes possible to connect as a device corresponding to SCSI input / output.

In FIG. 8, reference numeral 63 denotes a control signal transmission / reception b.
Reference numerals 1 and 64 denote control signal transmission / reception c2, 68 denotes a host transmission signal 3, and 69 denotes a host reception signal 3. According to the description of FIG. 7, the control signal transmission / reception (b1) 63 has a SCSI input / output transmission / reception function, and the host transmission signal 25 corresponds to a SCSI control signal. The control signal transmission / reception (b1) 63 transmits the received command to the control signal transmission / reception (c2) 64 having an ATAPI input / output transmission / reception function, and the control signal transmission / reception (c2) 64
From the recording / playback signal processing block 14 as ATAPI input / output
Send to At this time, the host transmission signal (3) 68 corresponds to an ATAPI control signal. Here, similarly to the example of FIG. 3, the timing of the data to be transferred is detected from the control signal so that a necessary portion of the data transmitted via the data bus can be extracted. Also, by receiving a signal indicating that the transfer has been completed, the WM detection can be terminated, and the WM detection means 22 is operated only when necessary, and is stopped when not necessary, thereby reducing power consumption. Can be done. Here, the transmission signal from the host PC
Although described separately from the reception signal / data bus, not all of these signals are required depending on the data format to be transferred.

It is assumed that the conventional system unit (the configuration shown in FIG. 2) including the recording / reproducing signal processing block 14 supports up to the fast transfer mode, and the input / output conversion unit 61 with WM detection converts the input / output format and performs WM detection. In the case where only a slow transfer mode can be handled, the input / output conversion means 6 with WM detection is required for the host PC.
1 recognizes the slow data transfer mode that can be supported, and the conventional system unit operates in the fast transfer mode, thereby reproducing the data quickly, and the difference in the transfer speed between the host PC and the recording / reproducing signal processing block 14. Is adjusted by the input / output conversion means 61 with WM detection.

The WM detecting means 22 transmits and receives the control signal (b
1) The timing signal from 63 and the control signal transmission / reception (c2) 64 and the data of the data bus are received, and the WM is detected from the necessary data therein. The detection of WM is as shown in the previous embodiments.

As described above, by adopting a system configuration in which the input / output conversion means with WM detection is added to the conventional system, and by changing the combination of the input / output conversion means with WM detection, an apparatus compatible with various input / output formats is realized. It becomes possible. In addition, since this device cannot bypass the input / output conversion unit with WM detection, it is possible to configure a highly reliable system in which the detection result of WM detection is hard to be avoided. Further, by making the input / output conversion means with WM detection an integrated circuit, it is possible to make it difficult to bypass the WM detection.

[0063]

According to the present invention, in order to add a function of reproducing data obtained by superimposing another additional information such as copy prohibition on image or audio data, in addition to the conventional system, an input / output with WM detection is provided. By adopting a system configuration to which the control means is added, it is possible to configure a highly reliable system with a WM detection function, in which detection results are hard to be avoided. Further WM
By making the input / output control unit with detection 20 an integrated circuit,
It is possible to make it difficult to bypass the WM detection.

In addition, when the arithmetic processing for detecting the WM takes a long time, or when the reaction speed of the control signal does not satisfy the standard and becomes slow due to the input / output control means with the WM detection, the WM is not used. The input / output control means with detection is equipped with a memory that temporarily stores data conversion and data transfer rate, so if the detection time for WM detection is needed without changing the conventional system, secure the detection time It becomes possible.

Further, by adopting a system configuration in which input / output conversion means with WM detection is added to the conventional system, and changing the combination of the input / output conversion means with WM detection, it is possible to realize an apparatus compatible with various input / output formats. Becomes possible. In addition, since this device cannot bypass the input / output conversion unit with WM detection, it is possible to configure a highly reliable system in which the detection result of WM detection is hard to be avoided.

Of course, these WM detection functions include not only WM detection but also WM embedding and WM updating functions, and can control the system according to the WM.

[Brief description of the drawings]

FIG. 1 is a diagram showing an embodiment of a configuration of a recording / reproducing system having a WM detection function according to the present invention.

FIG. 2 is a diagram showing an example of a configuration of a conventional recording / reproducing system without a WM detection function according to the present invention.

FIG. 3 is a diagram showing an embodiment of the configuration of the input / output control means with WM detection according to the present invention.

FIG. 4 shows another embodiment of the configuration of the input / output control means with WM detection 20 according to the present invention.

FIG. 5 shows another embodiment provided with a WM embedding means as the configuration of the input / output control means with WM detection according to the present invention.

FIG. 6 is a diagram showing another embodiment including a WM updating unit as a configuration of the input / output control unit with WM detection according to the present invention.

FIG. 7 is a diagram showing another embodiment of the configuration of the recording / reproducing system having a WM detection function according to the present invention;

FIG. 8 is a diagram showing one embodiment of the configuration of the input / output conversion means with WM detection according to the present invention.

[Explanation of symbols]

11: disk as a recording medium, 12: pickup,
13: preamplifier, 14: recording / playback signal processing block,
15: recording / reproduction signal processing means, 16: input / output control means (1), 17: rotation control means, 18: system control means, 19: motor for rotating a disk, 20: input / output control means with WM detection, 21: input Output control means (2), 22... WM
Detecting means, 23 ... signal input / output, 24 ... display means, 25 ...
Host transmission signal, 26: Host reception signal, 27: Data bus, 30: Control signal reception a, 33: Data bus control,
34: Data bus control SW, 35: Header detection, 36: WM
Detection calculation, 37 ... WM determination.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5B017 AA06 BA04 BA07 BB03 BB10 CA07 CA09 CA16 5B065 BA10 CE01 CE05 CE11 PA04 5D044 CC04 DE17 DE52 EF05 FG18 GK10 GK17 HL08 HL11 5D066 AA01 DA01 DA11

Claims (16)

[Claims] 1. An apparatus provided with first transfer means for transferring first data, wherein the first data includes second data which is additional information of the first data. Wherein the second data is embedded in the first data, a second transfer means for re-transmitting the data from the first transfer means, and a detection means for detecting the second data A data transfer device comprising: 2. The data transfer device according to claim 1, wherein the data transfer of the second transfer means is performed in accordance with the second data detected by the detection means for detecting the second data. A data transfer device characterized by being controlled. 3. The data transfer device according to claim 1, wherein the second data includes information for controlling copying, and there is no copy restriction, no copy prohibition, The data transfer of the second transfer means is controlled in accordance with the information indicating whether only one generation can be copied, and when the data transfer is stopped in accordance with the second data in the previous period, the flag indicating the transfer is controlled. Characteristic data transfer device. 4. The data transfer device according to claim 1, wherein said second transfer means has a function of converting a speed at which data to be transferred is input and a speed at which data is output. Data transfer device. 5. The data transfer device according to claim 4, wherein said second transfer means lowers a data transfer rate to be output to the outside as compared with a data transfer rate with said first transfer means. A data transfer device characterized by being controlled. 6. The data transfer device according to claim 1, wherein said second transfer means has a function of converting a transfer format for inputting data to be transferred and a transfer format for outputting data. Characteristic data transfer device. 7. A data transfer device according to claim 1, wherein said first transfer means and said second transfer means each have a confirmation means for confirming connection with each other. A data transfer device for performing data transfer when it is confirmed that the connection is properly established. 8. The data transfer device according to claim 1, further comprising a display device, wherein when the data transfer is stopped according to the second data, the stop is displayed. Data transfer device. 9. The data transfer device according to claim 7, further comprising a display device, wherein when it is not confirmed that the data transfer device is correctly connected to each other, it is displayed that the connection is not correct. A data transfer device characterized by the above-mentioned. 10. A transfer means for transferring first data, wherein the first data may include second data which is additional information of the first data, wherein the second data is An integrated circuit comprising: a detection unit embedded in the first data and detecting the second data;
An integrated circuit, wherein the transfer means can transfer data from another transfer means, and the transfer means and the detection means are combined. 11. The integrated circuit according to claim 10, wherein data transfer via said transfer means is controlled by controlling an internal bus of said transfer means according to a detection result of said detection means. An integrated circuit characterized by the above. 12. The integrated circuit according to claim 11, wherein the internal bus of said transfer means is controlled according to the detection result of said detection means, so that said signal is transmitted through said transfer means in accordance with said second data. An integrated circuit, wherein when data transfer is stopped, a flag indicating the stop is transferred. 13. The integrated circuit according to claim 10, wherein said transfer means includes a memory for temporarily storing data to be transferred, and has a function of converting a speed at which data to be transferred is input and a speed at which data to be transferred is output. An integrated circuit, comprising: 14. The integrated circuit according to claim 10, wherein said transfer means includes a memory for temporarily storing data to be transferred, and converts a transfer format for inputting data to be transferred and a transfer format for output. An integrated circuit having a function. 15. The integrated circuit according to claim 10, further comprising connection confirmation means for confirming whether the connection is correctly established with a connection destination for transferring data, said connection confirmation means comprising: An integrated circuit, which transfers data when it is confirmed that the connection is correct. 16. The integrated circuit according to claim 15, wherein when the connection confirmation means cannot confirm that the connection is correctly established, the transfer of the data is stopped, and the data transfer is stopped. An integrated circuit for transferring a flag indicating that transfer has been stopped.