JP2001084230A5 - - Google Patents
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- Publication number
- JP2001084230A5 JP2001084230A5 JP2000226513A JP2000226513A JP2001084230A5 JP 2001084230 A5 JP2001084230 A5 JP 2001084230A5 JP 2000226513 A JP2000226513 A JP 2000226513A JP 2000226513 A JP2000226513 A JP 2000226513A JP 2001084230 A5 JP2001084230 A5 JP 2001084230A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP99114802A EP1072977B1 (en) | 1999-07-28 | 1999-07-28 | A system for initializing a distributed computer system and a method thereof |
| EP99114802.4 | 1999-07-28 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001084230A JP2001084230A (ja) | 2001-03-30 |
| JP2001084230A5 true JP2001084230A5 (ja) | 2007-09-13 |
| JP4422304B2 JP4422304B2 (ja) | 2010-02-24 |
Family
ID=8238678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000226513A Expired - Fee Related JP4422304B2 (ja) | 1999-07-28 | 2000-07-27 | 分散型コンピュータシステムを初期化するためのシステムおよびその方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6629270B1 (ja) |
| EP (1) | EP1072977B1 (ja) |
| JP (1) | JP4422304B2 (ja) |
| KR (1) | KR100544805B1 (ja) |
| DE (1) | DE69911000T2 (ja) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6934871B2 (en) * | 2001-05-17 | 2005-08-23 | Lsi Logic Corporation | Programmable counters for setting bus arbitration delays involves counting clock cycles equal to a count number loaded from a memory |
| US7848361B2 (en) * | 2003-05-20 | 2010-12-07 | Nxp B.V. | Time-triggered communication system and method for the synchronization of a dual-channel network |
| US7392422B2 (en) * | 2003-10-20 | 2008-06-24 | Sony Computer Entertainment America Inc., | Violations in a peer-to-peer relay network |
| CN101568911B (zh) * | 2006-11-29 | 2011-10-19 | 张永敏 | 群对群计算的方法及系统 |
| CN116974636B (zh) * | 2023-08-03 | 2024-04-26 | 上海合芯数字科技有限公司 | 多路互联系统及其总线接口初始化方法、装置 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5295258A (en) * | 1989-12-22 | 1994-03-15 | Tandem Computers Incorporated | Fault-tolerant computer system with online recovery and reintegration of redundant components |
| FR2682201B1 (fr) * | 1991-10-04 | 1994-01-14 | Aerospatiale Ste Nationale Indle | Procede de discrimination temporelle de pannes dans un systeme hierarchise de traitement de donnees, et systeme hierarchise de traitement de donnees adapte a sa mise en óoeuvre. |
| JP2687860B2 (ja) * | 1993-12-28 | 1997-12-08 | 日本電気株式会社 | 分散処理システムにおけるシステム起動または停止統括システム |
| GB2290891B (en) * | 1994-06-29 | 1999-02-17 | Mitsubishi Electric Corp | Multiprocessor system |
| US5687308A (en) * | 1995-06-07 | 1997-11-11 | Tandem Computers Incorporated | Method to improve tolerance of non-homogeneous power outages |
| US5694542A (en) * | 1995-11-24 | 1997-12-02 | Fault Tolerant Systems Fts-Computertechnik Ges.M.B. | Time-triggered communication control unit and communication method |
| JPH10200552A (ja) * | 1997-01-16 | 1998-07-31 | Yamatake Honeywell Co Ltd | イーサネット通信を用いた冗長方法 |
| US5991518A (en) * | 1997-01-28 | 1999-11-23 | Tandem Computers Incorporated | Method and apparatus for split-brain avoidance in a multi-processor system |
-
1999
- 1999-07-28 EP EP99114802A patent/EP1072977B1/en not_active Expired - Lifetime
- 1999-07-28 DE DE69911000T patent/DE69911000T2/de not_active Expired - Fee Related
-
2000
- 2000-07-27 JP JP2000226513A patent/JP4422304B2/ja not_active Expired - Fee Related
- 2000-07-27 US US09/626,679 patent/US6629270B1/en not_active Expired - Lifetime
- 2000-07-28 KR KR1020000043697A patent/KR100544805B1/ko not_active IP Right Cessation