JP2001083933A - Capacitive display panel driving device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress heat generation of a capacitive display panel without decreasing scan frequency. SOLUTION: Scan-side drivers IC2, 3 receive the supply of a voltage required to drive a scan electrode from a switching power supply 5 via voltage supply lines L1, L2, and output a pulse-like scan voltage to the scan electrode of an EL display panel 1 to sequentially perform scanning. A data-side drivers IC4 receives the supply of a voltage required to drive a data electrode from the switching power supply 5 via voltage supply lines L3, L4, and outputs a pulse- like scan voltage to the data electrode. A reactor 9 and a resistor 10 are inserted in series between the switching power supply 5 and the scan-side drivers IC2, 3. Because this reactor 9 reduces especially a high-grade harmonic component of a driving current, heat generation of the EL display panel 1 can be suppressed without decreasing the pulse width.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a capacitive display panel driving apparatus for driving a display panel including capacitive display elements formed at intersections between a plurality of scanning electrodes and a plurality of data electrodes.

As a display panel of this type, for example, scanning electrodes and data electrodes are arranged orthogonally.
At each intersection, a capacitive display element EL (Electro
Luminescence) is a simple dot matrix type EL display panel in which elements are formed. When the EL display panel is driven by a line-sequential scanning method, a pulse-like voltage is applied to the scanning electrodes and the data electrodes. At this time, the combined voltage is applied to each EL element.

This EL device has a structure in which a transparent electrode corresponding to a scanning electrode, a first insulating layer, a light emitting layer, a second insulating layer, and a back electrode as a data electrode are laminated on a glass substrate. It has a capacitance (see FIG. 4). However, the EL element has a series resistance equivalently, and a loss occurs when a current flows through the equivalent series resistance.
The equivalent series resistance is the dielectric loss tangent (tan) of the EL element.
δ) is increased.

Accordingly, when a pulse voltage is repeatedly applied to the EL element and a pulse-like current flows, the EL display panel generates heat due to the loss generated by the equivalent series resistance. Then, when the temperature of the EL display panel rises due to this heat generation, the withstand voltage of the EL element is reduced, and the bonding surface between the back electrode and the protective glass is peeled off, so that the reliability of the EL display panel is reduced. Would.

As an effective means for suppressing such heat generation of the EL display panel, there is one disclosed in Japanese Patent Application Laid-Open No. 58-113986. This means interposes a reactor between each scanning electrode and a scanning electrode driving circuit for driving each of the scanning electrodes.
The withstand voltage of the scan electrode drive circuit is reduced by utilizing LC resonance generated between the element and the element. When the reactor is interposed in this way, the higher harmonic component of the current flowing through the EL element is reduced, so that the effect of reducing the loss in the EL element can be expected.

However, in the above-mentioned means, the inductance of the reactor is selected so as to resonate with the capacitance of the EL element for the intended purpose. Therefore, the pulse voltage application time required to satisfy this resonance condition ( Pulse width) is uniquely determined to a certain constant value. Therefore, if the above configuration is applied to an EL display panel having more EL elements while maintaining the above resonance condition, the scanning frequency is increased by the increased number of scanning electrodes because the pulse width is constant. And flickering occurs. In order to prevent the occurrence of flicker, the resonance condition may be adjusted for each EL display panel. However, the operation of determining an inductance that satisfies the resonance condition at a desired scanning frequency requires a lot of trouble.

Another means effective for suppressing heat generation of the EL display panel is disclosed in Japanese Patent Application Laid-Open No. 10-63198. This means interposes a correction resistor between the electrode terminal of each scan electrode and the scan electrode drive circuit, and reduces uneven brightness caused by variation in the pattern resistance value of the wiring portion. in this case,
By setting the resistance value of the correction resistor large, it is possible to reduce the current flowing through the EL element and suppress the heat generation of the EL display panel.

However, when the resistance value is increased, the rise time of the pulse-like scanning voltage is prolonged, so that the time during which the voltage required for light emission is applied to the EL element is shortened, resulting in a decrease in luminance. To prevent this, the pulse width may be increased, but as a result, the scanning frequency decreases and flicker occurs.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a capacitive display panel driving device capable of suppressing heat generation of a capacitive display panel without lowering a scanning frequency. It is in.

[0009]

To achieve the above object, the means described in claim 1 can be employed. According to this means, the scan electrode drive circuit receives the supply of the first voltage from the first power supply, and outputs a pulse-like scan voltage to each scan electrode in a predetermined order. The second voltage is supplied from the second power supply and the data voltage is output to the capacitive display element below each scan electrode in synchronization with the scan of the scan electrode.

As a result, a pulse-like voltage (pulse voltage) which is a composite voltage of the scanning voltage and the data voltage is repeatedly applied to each capacitive display element sandwiched between the scanning electrode and the data electrode. In this case, since the reactor is inserted between the first power supply and the scan electrode drive circuit, the harmonic component of the current flowing through the capacitive display element based on the pulse voltage is reduced. A series resistance component is equivalently present in the capacitive display element, and the harmonic component of the current is reduced, thereby reducing the loss. As a result, heat generation of the display panel can be suppressed.

Further, according to this means, the scanning is performed in comparison with the conventional means for reducing the harmonic component of the current flowing through the capacitive display element by inserting a resistor between the scanning electrode driving circuit and each scanning electrode. The rise time of the voltage is shortened, and the decrease in the pulse width of the pulse voltage is small. Therefore, even if the scanning frequency is set relatively high, it is easy to obtain the desired luminance, and the occurrence of flicker can be prevented.

According to the second aspect of the present invention, since the reactor and the resistor are inserted in series between the first power supply and the scan electrode drive circuit, the reactor appears at the scan electrode drive circuit side terminal of the reactor. Voltage overshoot is suppressed, and the withstand voltage required for the scan electrode driving circuit can be reduced.

According to the third aspect of the present invention, since the resistors are inserted between the scan electrode driving circuit and the plurality of scan electrodes, the overshoot is suppressed as in the second aspect. Thus, the withstand voltage required for the scan electrode driving circuit can be reduced.

According to the fourth aspect of the present invention, the reactor is inserted between the second power supply and the data electrode driving circuit in addition to the connection between the first power supply and the scanning electrode driving circuit. Harmonic components of the current flowing through the non-volatile display element are further reduced. Thereby, the loss of the capacitive display element is reduced, and the heat generation of the display panel is further suppressed.

According to the fifth aspect of the present invention, since the reactor is inserted between the second power supply and the data electrode driving circuit, the display panel has the same operation as the first aspect. Heat generation can be suppressed. Further, since the rise time of the data voltage is relatively short, the scanning frequency can be set high, and the occurrence of flicker can be prevented.

According to the sixth aspect of the present invention, since the reactor and the resistor are inserted in series between the second power supply and the data electrode driving circuit, they appear at the data electrode driving circuit side terminal of the reactor. Voltage overshoot is suppressed, and the withstand voltage required for the data electrode drive circuit can be reduced.

According to the seventh aspect of the present invention, since the resistors are inserted between the data electrode driving circuit and the plurality of data electrodes, the overshoot is suppressed in the same manner as the sixth aspect. Thus, the withstand voltage required for the data electrode driving circuit can be reduced.

According to the means described in claim 8, the resistance inserted between the scan electrode drive circuit and the plurality of scan electrodes or between the data electrode drive circuit and the plurality of data electrodes is:
Since it is formed by film formation in the display panel, it is easy to form a resistor having an arbitrary resistance value.

[0019]

(First Embodiment) A first embodiment in which the present invention is applied to driving of an EL display panel will be described below with reference to FIGS. FIG. 4 shows a schematic cross-sectional structure of an EL element (corresponding to a capacitive display element according to the present invention). EL element 1 as a pixel
00, a transparent electrode 102 is provided on a glass substrate 101, and a thin film of a first insulating layer 103, a light emitting layer 104, and a second insulating layer 105 is sequentially formed thereon, and a back electrode 106 is further formed thereon. It is formed by providing.
A protective glass (not shown) is adhered to the upper surface of the back electrode 106 by, for example, an acrylic adhesive having a heat resistance temperature of 120 ° C.

The EL element 100 emits light by applying a pulsed driving voltage higher than the light emission threshold voltage between the transparent electrode 102 and the back electrode 106, and the light is extracted through the glass substrate 101. It has become. In this case, for the purpose of stabilizing the light emission, as described later, an AC voltage drive in which the polarity of the drive voltage is inverted at predetermined timings is performed. If the back electrode 106 is a transparent electrode, emitted light can be extracted from the back electrode 106 side.

The EL element 100 having the above structure can be electrically represented by an equivalent circuit shown in FIG. That is, the first insulating layer 103 and the second insulating layer 105 are respectively a series circuit of the resistor 103a and the capacitor 103b,
It can be represented as a parallel circuit of a resistor 105a and a capacitor 105b. The light-emitting layer 104 includes a resistor 104
a and a capacitor 104b, a zener diode 104c, 104d and a resistor 1
04e can be represented as a circuit connected in parallel.

Here, the resistors 103a, 104a, 105
“a” equivalently indicates a loss due to a dielectric hysteresis loss or the like, and is hereinafter referred to as an equivalent series resistance. Also,
The Zener diodes 104c and 104d are connected to the EL element 1
00 is equivalently shown. As described above, although the EL element 100 is almost capacitive, a loss such as an equivalent series resistance is present, so that a dielectric loss occurs, and the dielectric loss tangent (tan δ) does not become zero.

FIG. 3 shows a specific electrical configuration of the EL display panel and its driving circuit. The EL display panel 1 includes a transparent electrode 102 and a back electrode 10 shown in FIG.
6 are arranged in a matrix and are configured to perform matrix display as scanning electrodes and data electrodes, respectively. Are formed in odd-numbered rows, scan electrodes 301, 302,... Are formed in even-numbered rows, and data electrodes 401, 402,.

These scanning electrodes 201, 301, 202,
The EL elements 111, 112,..., 121, 122,... As pixels having the structure shown in FIG.
Are formed in a matrix. In FIG. 3, EL
The elements 111, 112,... Are represented using the symbol of a capacitor.

The EL display panel 1 is driven by scanning driver ICs 2 and 3 (corresponding to a scanning electrode driving circuit according to the present invention) and data driver IC 4 (corresponding to a data electrode driving circuit according to the present invention). It has become. The scanning side driver ICs 2 and 3 include a scanning side voltage supply circuit 6
Supply of voltages necessary for driving the scan electrodes via the voltage supply lines L1 and L2 from the scan electrodes 201 and 20 respectively.
, And a circuit for outputting a pulsed scanning voltage to the scanning electrodes 301, 302,.

The scanning driver IC2 is a push-pull type driving circuit, and includes P-channel MOSFETs 21a, 22a,... Connected to the voltage supply line L1, and N-channel MOSFETs 21 connected to the voltage supply line L2.
, 22b,... correspond to the scanning electrodes 201, 20 respectively.
2,... Constitute a push-pull circuit. These MOSFETs 21a, 21b, 22a, 22b,... Have parasitic diodes 21c, 21d, 22c,
Are connected in antiparallel.

The scanning driver IC2 is a MOSFE
A gate drive circuit 20 for driving each gate of T21a, 21b, 22a, 22b,... Is provided. The gate drive circuit 20 receives a control signal from the control circuit via an isolation circuit (none is shown), and based on the control signal, the MOSFETs 21a, 21b, 22a, 22
A gate voltage of a predetermined level is output to the gates b,.

The scanning driver IC3 has the same configuration as the scanning driver IC2. That is, MOSF
ET31a, 32a, ... and MOSFET31b, 32b
Form a push-pull circuit for the scan electrodes 301, 302,.
are connected in anti-parallel to parasitic diodes 31c, 31d, 32c, 32d, respectively. The scanning driver IC3 is M
A gate drive circuit 30 for driving the gates of the OSFETs 31a, 31b, 32a, 32b,.

On the other hand, the data side driver IC 4 receives the supply of the voltage (Vm) necessary for driving the data electrodes from the switching power supply 5 shown in FIG. 1 via the voltage supply lines L3 and L4. .. Are circuits for outputting pulsed data voltages. This data side driver IC
Reference numeral 4 has the same configuration as the above-described scanning driver ICs 2 and 3. That is, P-channel MOSFETs 41a, 42a,... Connected to the voltage supply line L3 and N-channel MOSFETs 4 connected to the voltage supply line L4.
1b, 42b,... Correspond to the scanning electrodes 401, 40, respectively.
2,... Constitute a push-pull circuit. Parasitic diodes are connected in anti-parallel to these MOSFETs 41a, 41b, 42a, 42b,. The data-side driver IC 4 includes MOSFETs 41a, 41
, 42a, 42b,... are provided with a gate drive circuit 40.

FIG. 1 shows a schematic electrical configuration of a driving device of the EL display panel 1 (hereinafter, referred to as an EL display device). In FIG. 1, an EL display device 7 (corresponding to a capacitive display panel driving device according to the present invention) has the above-mentioned E display device.
In addition to the L display panel 1, the scanning driver ICs 2, 3, and the data driver IC 4, the switching power supply 5, the scanning voltage supply circuit 6, and a control circuit (not shown) are provided.

The switching power supply 5 as the first and second power supplies receives a DC voltage (Vr-V) corresponding to the first voltage.
m), a DC voltage Vm corresponding to the second voltage, and a drive control voltage Vc for operating the gate drive circuits 20 and 30 of the scan driver ICs 2 and 3 are generated. The DC voltage (Vr-Vm), the DC voltage Vm, and the drive control voltage Vc are, for example, 210 V,
45V and 5V are selected. The voltage Vr
(= 255 V) is a writing voltage when the EL element 100 emits light, and the light emission threshold voltage of the EL element 100 exists between the voltage (Vr−Vm) and the voltage Vr.

The switching power supply 5 has a flyback type circuit configuration. That is, the primary coil 51p of the high-frequency transformer 51 and the N-channel MOSFET 52 are connected in series between the terminal F1 connected to the positive terminal of the battery 8 and the ground terminal. Control I
C53 is an IC for controlling the switching of the MOSFET 52, and its power supply terminal Vcc is connected to the terminal F1.
The output signal terminal Eo is connected to the MOSFET via the resistor 54a.
52 are connected to the gate. MOSFET5
The second gate is connected to the ground terminal via the resistor 54b.

On the other hand, the high-frequency transformer 51 has three secondary coils 51a, 51b, 51c. The secondary coil 51a includes a diode 55a and a capacitor 56.
The rectifying / smoothing circuit composed of a is connected to output a DC voltage Vm between the terminals F2 (positive side) and F3 (negative side). These terminals F2 and F3 are connected to voltage supply lines L3 and L4, respectively, and further connected to terminals T3 and T4 of a scanning side voltage supply circuit 6 described later.

The terminal F3 is grounded. Voltage dividing resistors 57a and 57b are connected in series between the terminal F2 and the ground terminal, and the voltage dividing point is connected to the feedback terminal FB of the control IC 53. Have been. Control IC 53
Is set so that the preset command voltage is equal to the voltage input to the feedback terminal FB.
The duty ratio of the gate output signal to the ET 52 is PWM controlled.

A rectifying / smoothing circuit including a diode 55b and a capacitor 56b is connected to the secondary coil 51b.
The drive control voltage Vc is output between the terminals F4 (positive side) and F5 (negative side).

The secondary coil 51c has a diode 5
A rectifying / smoothing circuit including the capacitor 5c and the capacitor 56c is connected, and a DC voltage (Vr-Vm) is output between the terminals F6 (positive side) and F7 (negative side). The terminal F6 is connected to a terminal T1 of a later-described scanning-side voltage supply circuit 6 via a reactor 9 and a resistor 10 in series, and the terminal F7 is connected to a terminal T2 of the scanning-side voltage supply circuit 6.

FIG. 2 shows the electrical configuration of the scanning-side voltage supply circuit 6. Terminals T1 and T2 to which a DC voltage (Vr-Vm) is applied are connected to terminals T5 and T6, respectively. Voltage supply lines L1 and L2 are connected to these terminals T5 and T6, respectively. An N-channel MOSFET 61a having a parasitic diode 61b is connected between the terminal T1 and the ground terminal, and its gate is connected to the terminal S1 via a reactor 62a. A capacitor 62b is connected between the gate and the source of the MOSFET 61a, and the reactor 62a and the capacitor 62b constitute a filter circuit 62.

A P-channel MOSFET 63a having a parasitic diode 63b is connected between the terminals T3 and T2, and includes a reactor 64a and a capacitor 64b between the gate and the source, similarly to the filter circuit 62. The filter circuit 64 is connected. MOSF
A resistor 65 and a Zener diode 66 of the illustrated polarity are connected in parallel between the source of the ET 63a and the opposite gate side terminal of the reactor 64a, and a capacitor is provided between the opposite gate side terminal of the reactor 64a and the terminal S2. 67 are connected.

The switches 6a and 6b shown in the scanning-side voltage supply circuit 6 in FIG. 3 equivalently represent the on / off operation of the MOSFETs 61a and 63a. Sometimes, the switch 6a is switched to the upper side (Vr) and the switch 6b is switched to the lower side (Vm). During the negative field driving, the switch 6a is switched to the lower side (ground voltage), and the switch 6b is switched to the upper side (-Vm).
(Vr + Vm).

Next, the operation of the present embodiment will be described. First, using the timing chart shown in FIG.
A driving method of the L display device 7 will be described. EL element 1
In order to stably emit light from the electrodes 11, 112,..., It is necessary to apply an AC voltage between the scan electrodes 201, 301, 202, 302,. Therefore, the EL display device 7 performs the following for each scanning period (one field) for all the scanning electrodes of the EL display panel 1.
By switching the MOSFETs 61a and 63a of the scanning-side voltage supply circuit 6, positive field driving for applying a positive driving voltage to the EL elements 111, 112,... And negative field driving for applying a negative driving voltage are alternately repeated. (Field inversion drive). Hereinafter, the positive field drive and the negative field drive will be described separately.

(Positive Field Driving) Terminal S shown in FIG.
When a low level (ground voltage) signal is applied to both S1 and S2, the MOSFET 61a is turned off and the MOSFET 63
a turns on. As a result, the voltages of the voltage supply lines L1 and L2 become Vr and Vm, respectively. The control circuit (not shown) turns on the P-channel MOSFETs 41a, 42a,... In the data driver IC4.

As a result, the scanning electrodes 201, 301,... Become offset voltage Vm by the action of the parasitic diodes 21d, 31d,.
Also attains the voltage Vm through the MOSFETs 41a, 42a,. Therefore, in this state, all the EL elements 111, 1
The drive voltage of 12,... Becomes 0 V and no light is emitted.

Thereafter, the control circuit operates as a scanning driver IC.
The second MOSFET 21a is turned on, and the voltage of the scan electrode 201 in the first row is set to the voltage Vr (time t1). At this time, the other scan electrodes 301, 202,.
.. Are floating because all 31a, 31b, 22a, 22b,.

On the other hand, in the data-side driver IC 4, based on the display data, of the EL elements 111, 112,... The MOSFET on the channel side (MOSFET 41a) is turned off, and the MOSFET on the N channel side (MOSFET 41a) is turned off.
b) is turned on (time t1). In addition, E which does not emit light
P-channel MOS connected to data electrode of L element
The FET is kept on, and the N-channel MOS
The FET is kept off.

As a result, the EL element that emits light emits light when the voltage of its data electrode becomes the ground voltage and a voltage Vr higher than the light emission threshold voltage is applied between the electrodes. Also,
An EL element that does not emit light does not emit light because the voltage of its data electrode becomes the offset voltage Vm and a voltage (Vr-Vm) lower than the emission threshold voltage is applied between the electrodes.

Thereafter, the control circuit sets the MOSFET 21a
Are turned off, and the scan electrode 201 is once set in a floating state, and at time t2, the MOSFET 21b is turned on to discharge electric charges accumulated between the electrodes of the EL elements 111, 112,. EL
The elements 111, 112, ... do not emit light.

Subsequently, the control circuit starts scanning the scan electrodes 301 in the second row from time t3. FIG.
The case where the element 121 does not emit light is shown. That is, the M connected to the data electrode 401 of the EL element 121
The OSFET 41a is kept in the ON state, and the MOSFE
T41b is kept off. In this case, the voltage of the scanning electrode 301 of the EL element 121 becomes Vr, and the voltage of the data electrode 401 becomes the offset voltage Vm. As a result, a voltage (Vr-Vm) lower than the light emission threshold voltage is applied between the electrodes of the EL element 121, so that the EL element 121 does not emit light. Thereafter, line-sequential scanning is performed by repeating the above operation until the last scanning electrode is reached.

(Negative field drive) Terminal S shown in FIG.
When a high-level (5 V) signal is applied to both S1 and S2, the MOSFET 61a is turned on and the MOSFET 63a is turned off. As a result, the voltage supply lines L1 and L2 become the ground voltage and -Vr + Vm, respectively. The control circuit (not shown) turns on the N-channel MOSFETs 41b, 42b,... In the data driver IC4. As a result, the scanning electrodes 201, 301,.
Are all ground voltages. Therefore, in this state, the driving voltages of all the EL elements 111, 112,.

Thereafter, the control circuit performs line-sequential scanning by the same scanning method as in the normal field driving. In this case, the control circuit turns on the N-channel MOSFET connected to the scan electrodes of the sequentially selected row, and applies a voltage of (−Vr + Vm) to the scan electrodes. On the other hand, the control circuit turns on and off the P-channel and N-channel MOSFETs connected to the data electrode of the EL element to emit light, respectively, and sets the voltage of the data electrode to the offset voltage Vm. Further, the control circuit does not emit light.
P channel side connected to the data electrode of the L element and N
The MOSFETs on the channel side are kept off and on, respectively, and the voltage of the data electrode is kept at the ground voltage.

As a result, an EL element (for example, E
The L element 111) emits light when a voltage (-Vr) whose absolute value exceeds the light emission threshold voltage is applied between its electrodes. An EL element that does not emit light does not emit light because a voltage (−Vr + Vm) whose absolute value is lower than the emission threshold voltage is applied between its electrodes.

The positive field drive and the negative field drive described above are each performed at a frequency of, for example, 480 Hz. The positive field drive and the negative field drive are alternately repeated, and the polarity of the pulse voltage applied to the EL elements 111, 112,... Is reversed between the positive field drive and the negative field drive. Therefore, E
The driving voltages applied to the L elements 111, 112,.
A fundamental component of 240 Hz and its harmonic components are included.

The loss Pd generally generated by the equivalent series resistances 103a, 104a, 105a (see FIG. 5) of the EL element 100 is equal to the equivalent series resistances 103a, 104
a, 105a (hereinafter referred to as equivalent series resistance value)
Is expressed as Rc and the current as Id. Pd = Id ² · Rc (1)

If the capacitance (combined value of the capacitors 103b, 104b, 105b) of the EL element 100 is C, the dielectric loss tangent is tan δ, and the angular frequency is ω, the following (2)
The relational expression of the expression holds. tan δ = ω · C · R (2)

Using these equations (1) and (2),
The loss Pd generated in the EL element 100 is as shown in the equation (3). Pd = Id ² · tan δ / (ω · C) (3)

The current Id used in the equation (3) changes according to the impedance of the current path flowing from the switching power supply 5 to the EL elements 111, 112,... (Hereinafter referred to as circuit impedance). As the value is larger, the current Id decreases and the loss Pd decreases.
However, if the circuit impedance with respect to the fundamental component and the lower harmonic components is increased, the rise time of the drive voltage becomes longer as described later, and the luminance of the EL element 100 decreases. For this reason, it is necessary to increase only the circuit impedance for high-order harmonic components.

Therefore, the reactor 9 is connected between the terminal F6 of the switching power supply 5 and the terminal T1 of the scanning-side voltage supply circuit 6.
In the case of the circuit configuration in which is inserted (this embodiment), and in the case of the conventional circuit configuration in which the reactor 9 is not inserted, the circuit impedance Z is calculated, particularly for higher-order harmonic components, and the loss in both cases is calculated. Compare the magnitude of Pd.

In the following calculation, the wiring resistance,
Let R be the on-resistance of the MOSFET, the resistance of the electrode terminal portion (not shown) of the EL display panel 1, and the series combined resistance of the circuit such as the resistor 10.

(A) When the reactor 9 is inserted: Configuration of the present embodiment Z = (R ² + (ωL−1 / ωC) ² ) ^1/2 Here, a relatively high-order harmonic component Is ωL >>
Since the relationship of 1 / ωC holds, the circuit impedance Z is approximately determined by the following equation (4). Z = (R ² + (ωL) ² ) ^1/2 (4)

(B) When no reactor 9 is inserted: Conventional configuration Z = (R ² + (1 / ωC) ² ) ^1/2 Here, the relatively high-order harmonic component is 1 / ωC
= 0, the circuit impedance Z
Is approximately determined by the following equation (5). Z = R (5)

As can be seen from equations (4) and (5),
By inserting the reactor 9, the switching power supply 5 supplies EL elements 111 and 11 for higher-order harmonic components.
The circuit impedance of the current path flowing through 2,... Can be increased. On the other hand, when the reactor 9 is not inserted, it is not possible to selectively increase only the circuit impedance with respect to higher-order harmonic components.

When the reactor 9 is inserted,
Even when the series combined resistance value R is small or almost zero, a relatively high-order harmonic component can have a large impedance. Therefore, when the reactor 9 is inserted, its inductance can be set to a relatively small value.

The condition in which the impedance of the reactor 9 is dominant in the circuit impedance Z is as shown in the following equation (6). ωL> R (6)

Therefore, the inventors of the present invention conducted tests using the EL display panel 1 having the following specifications, and confirmed that the effect of suppressing the heat generation of the EL display panel 1 was sufficiently exhibited when the reactor 9 of 4 μH was used. I found it. In this case, the series combined resistance value R was 820Ω. Number of scanning electrodes = 64 Number of data electrodes = 100 Capacitance per pixel (EL element) = 15 pF tan δ = 0.18 Basic frequency of scanning voltage = 240 Hz (positive and negative field frequencies = 480 Hz)

In the above equation (6), L = 4 μH, R = 8
When the calculation is performed using 20Ω, the following conditional expression is obtained. R / L <2.05 × 10 ⁸ (7) ω obtained by the equation (7) is equivalent to the cutoff frequency in the RL series circuit, and is at least (2.0
This means that if the angular frequency component higher than the angular frequency of about 5 × 10 ⁸ ) is reduced, the effect of suppressing the heat generation of the EL display panel 1 appears. Therefore, the series combined resistance value R
Is changed, the inductance of the reactor 9 may be determined so as to satisfy the above equation (7).

Next, the waveform of the scanning voltage will be described with reference to FIG. Since the driving voltage of the EL element 100 is a composite voltage of the scanning voltage and the data voltage, the driving voltage waveform is almost equal to the scanning voltage waveform.

FIG. 7A shows an actually measured waveform of the scan voltage of the scan electrode scanned last in one field when the EL display panel 1 is fully lit. The vertical axis is 5
At 0 V / div, the horizontal axis is 50 μs / div, and the mode is switched from the positive field drive to the negative field drive near time ta. The last scan electrode scanned at time t
b. The pulse-like waveform that appears at a cycle of approximately 30 μs is a voltage fluctuation caused by scanning other scanning electrodes in the fully lit state. In addition,
The EL display panel 1 used in this test emits light at a drive voltage of about 200V.

The waveform shown by the solid line in FIG.
7A is an enlarged waveform of a scanning voltage at time tb in FIG.
The EL display device 7 includes capacitive EL elements 111, 112,
Since only the higher-order harmonic components are reduced by using the reactor 9, the rise time of the scanning voltage is relatively short as shown by the waveform of the solid line.

In this case, the capacitive EL element 111,
If the reactor 9 that is inductive to 112,... Is used, the circuit becomes oscillating, and an overshoot voltage is generated at the terminal of the reactor 9 on the scanning side voltage supply circuit 6 side.
Therefore, in the EL display device 7, the overshoot voltage is reduced by inserting the resistor 10 between the reactor 9 and the scanning-side voltage supply circuit 6.

On the other hand, the waveform shown by the broken line in FIG. 7B shows the waveform of the scanning voltage in the conventional configuration in which the resistor is inserted without using the reactor 9. Since the resistance has the same impedance for all frequency components, not only high-order high-frequency components but also fundamental wave components and relatively low-order frequency components are reduced, and the rise time of the scanning voltage is relatively long. As a result, the effective pulse width of the driving voltage of the EL elements 111, 112,... Becomes short, and the luminance is reduced.

As described above, the scanning electrodes 201 and 30
, And a plurality of data electrodes 401, 402,... Are arranged in a matrix, and EL elements 111, 11
The EL display device 7 of the present embodiment in which 2,... Are formed has an output terminal F6 of the switching power supply 5 for outputting a DC voltage (Vr−Vm) necessary for driving the scanning electrodes, and a terminal of the scanning-side voltage supply circuit 6. It is characterized in that a reactor 9 and a resistor 10 are inserted in series between T1.

Reactor 9 is used for line sequential scanning.
.. Acts particularly to reduce high-order harmonic components of the pulsed drive current flowing through the elements 111, 112,..., And accordingly, the loss generated by the equivalent series resistance of the EL elements 111, 112,. . Thereby, the heat generation of the EL display panel 1 is reduced, and the temperature rise can be suppressed. As a result, the reliability of the EL display device 7 is improved, for example, the reduction of the withstand voltage of the EL elements 111, 112,... Is suppressed, and the adhesion surface between the back electrode 106 and the protective glass is hardly peeled off.

The reactor 9 has a small impedance with respect to the fundamental wave component and low-order harmonic components,
Since these components are not reduced, the scanning electrode 2
The rise time of the pulse-like scanning voltage applied to 01, 301,... Can be made relatively short. EL element 11
Since the drive voltages 1, 112,... Are combined voltages of the scan voltage and the data voltage, the rise time of the drive voltage is relatively short. Therefore, the effective pulse width at which the drive voltage becomes equal to or higher than the light emission threshold voltage is hardly reduced, and a decrease in luminance can be prevented.

Further, since the resistor 10 is connected in series to the reactor 9, an overshoot voltage generated at a terminal of the reactor 9 on the scanning side voltage supply circuit 6 side can be suppressed. Thereby, the scanning driver IC2,
, 31 constituting MOSFETs 3a, 3b,.
can be reduced, and the cost of the EL display device 7 can be reduced.

(Second Embodiment) A second embodiment in which the present invention is applied to driving of an EL display panel will be described with reference to FIG. FIG. 8 shows a schematic electrical configuration of the EL display device 11.
The same reference numerals are given to the same components as those shown in FIG.

In the EL display device 11, the terminal F6 of the switching power supply 5 and the terminal T of the scanning-side voltage supply circuit 6
A reactor 9 is inserted between the reactor 9 and the reactor 1. Also, between each output terminal of the scanning driver ICs 2 and 3 (see FIG. 3) and the scanning electrodes 201, 301, 202,...
2, 73,... Are inserted.

With such a configuration, the switching power supply 5 supplies the EL elements 111, 112,
.. Flows through the reactor 9 and the resistor 71 (or 7).
, 73,...), The higher-order harmonic components are reduced as in the first embodiment, and the EL display panel 1
Heat generation can be suppressed. The resistance 10 of the EL display device 7
Are replaced by resistors 71, 72, 73,.
The effect of suppressing the overshoot voltage is also obtained.

(Third Embodiment) FIG. 9 shows the third embodiment of the present invention.
A third embodiment applied to driving of an L display panel is shown. The EL display panel 1 of the EL display device 12 shown here has scanning electrodes 201, 301,.
It is formed of a transparent conductive film such as O. These scanning electrodes 201, 301,...
As shown in Japanese Patent Application Laid-Open No. 63-198, a scanning electrode portion orthogonal to the data electrodes 401, 402,... And a lead wiring portion extending from the scanning electrode portion to the scanning electrode terminal portion are provided. The pattern is formed.

According to this configuration, since the leading wiring portion acts as the resistors 81, 82, 83,..., The overshoot voltage can be suppressed as in the first and second embodiments. . When a transparent conductive film such as ITO is used, a desired resistance value can be obtained relatively easily.

(Fourth Embodiment) FIG. 10 shows a schematic electrical configuration of an EL display device 13 according to a fourth embodiment of the present invention. This EL display device 13 is different from the EL display device 7 shown in the first embodiment in that only the reactor 9 is inserted between the terminal F6 of the switching power supply 5 and the terminal T1 of the scanning-side voltage supply circuit 6. Are different.

For example, wiring resistance, MOSFET 21a,
When the values of the on-resistance such as 21b, 31a, 31b,..., 61a, and 63a and the series combined resistance of the electrode terminals of the EL display panel 1 are sufficiently large, vibration is suppressed by the series combined resistance. Therefore, in such a case, by using the EL display device 13, it is possible to suppress the overshoot voltage and to suppress the heat generation of the EL display panel 1.

(Fifth Embodiment) FIG. 11 shows a schematic electrical configuration of an EL display device 14 according to a fifth embodiment of the present invention. The EL display device 14 is characterized in that a reactor 9 and a resistor 10 are inserted between the terminal F2 of the switching power supply 5 and the data driver IC4.

According to this configuration, reactor 9 and resistor 10
(See FIG. 3), the high-order harmonic components among the pulse-like drive currents flowing through the data electrodes 401, 402,... Of the EL elements 111, 112,.
As in the embodiment, the effect of suppressing heat generation of the EL display panel 1 can be obtained.

(Sixth Embodiment) FIG. 12 shows a schematic electrical configuration of an EL display device 15 according to a sixth embodiment of the present invention. The EL display device 15 is provided between the output terminal F6 of the switching power supply 5 and the terminal T1 of the scanning-side voltage supply circuit 6 and the output terminal F of the switching power supply 5.
2 and the data side driver IC 4, a reactor 9 a, a resistor 10 a and a reactor 9 b,
The feature is that b is inserted in series.

According to the above configuration, the scanning electrodes 201 and 30
The current and data electrodes 401, 402,
, The higher-order harmonic components are reduced from the current flowing through..., And the effect of suppressing the heat generation of the EL display panel 1 is greater than in the above embodiments.

(Other Embodiments) The present invention is not limited to the above embodiments, but can be modified or expanded as follows. In a fifth embodiment,
Similarly to the second embodiment, each output terminal of the data-side driver IC 4 and the data electrodes 401 and 40 are replaced with the resistor 10.
It is good also as a structure which inserts a resistance between 2 and each. Further, similarly to the third embodiment, these resistors are set to I
It may be formed of a transparent conductive film such as TO.

In the sixth embodiment, the wiring resistance, MO
SFETs 21a, 21b, 31a, 31b, ..., 61
When the values of the on-resistance such as a and 63a and the series combined resistance such as the electrode terminal of the EL display panel 1 are sufficiently large,
The resistor 10a or 10b may be omitted.

In each of the above embodiments, the matrix type EL
Although the configuration in which the display panel 1 is driven has been described, the present invention can also be applied to a configuration in which a segment-type EL display panel is driven.
In addition, the above-described units are not limited to the EL display panel, and can be similarly applied to a display panel including a display element having capacitance.

[Brief description of the drawings]

FIG. 1 is a schematic electrical configuration diagram of an EL display device according to a first embodiment of the present invention.

FIG. 2 is an electrical configuration diagram of a scanning-side voltage supply circuit.

FIG. 3 is an electrical configuration diagram of an EL display panel and a driving circuit thereof.

FIG. 4 is a schematic cross-sectional structure diagram of an EL element.

FIG. 5 is a diagram equivalently showing electric characteristics of an EL element by an electric circuit.

FIG. 6 is a drive timing chart of an EL display panel.

7A and 7B are an actually measured waveform diagram of a scanning voltage and an enlarged waveform diagram thereof;

FIG. 8 is a view corresponding to FIG. 1, showing a second embodiment of the present invention.

FIG. 9 is a view corresponding to FIG. 1, showing a third embodiment of the present invention.

FIG. 10 is a view corresponding to FIG. 1, showing a fourth embodiment of the present invention;

FIG. 11 is a view corresponding to FIG. 1, showing a fifth embodiment of the present invention;

FIG. 12 is a view corresponding to FIG. 1, showing a sixth embodiment of the present invention;

[Explanation of symbols]

1 is an EL display panel (display panel), 2 and 3 are scanning driver ICs (scan electrode driving circuits), 4 is data driver ICs (data electrode driving circuits), and 5 is a switching power supply (first power supply, second power supply). , And 11 to 15 are EL display devices (capacitive display panel driving devices), 9, 9a, and 9b.
Are reactors, 10, 10a, 10b, 71, 72, 7
, 81, 82, 83, ... are resistors, 100, 11
1, 112,... Are EL elements (capacitive display elements), 20
1, 301, 202, 302,... Are scanning electrodes, 401,
Reference numerals 402, 403,... Denote data electrodes.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Masaaki Kawauchi 1-1-1 Showa-cho, Kariya-shi, Aichi F-term in DENSO Corporation (reference) 5C080 AA06 BB05 DD26 EE25 FF07 FF12 JJ02 JJ03 JJ04 JJ04 JJ06

Claims (9)

[Claims] 1. A display panel in which a capacitive display element is formed in a region where a plurality of scan electrodes and a plurality of data electrodes intersect, a scan electrode driving circuit that outputs a scan voltage to the scan electrodes, and a data electrode. A data electrode driving circuit that outputs a data voltage to the scanning electrode driving circuit; a first power supply that outputs a first voltage corresponding to the scanning voltage to the scanning electrode driving circuit; and a data voltage corresponding to the data electrode driving circuit. A capacitive display panel driving device comprising a second power supply for outputting a second voltage to be applied, wherein a reactor is inserted between the first power supply and the scan electrode driving circuit. Display panel drive. 2. The capacitive display panel driving device according to claim 1, wherein a resistor is inserted between the first power supply and the scan electrode driving circuit in addition to the reactor in series with the reactor. 3. The capacitive display panel driving device according to claim 1, wherein a resistor is inserted between the scanning electrode driving circuit and the plurality of scanning electrodes. 4. The capacitive display panel driving device according to claim 1, wherein a reactor is inserted between said second power supply and said data electrode driving circuit. 5. A display panel in which a capacitive display element is formed in a region where a plurality of scan electrodes and a plurality of data electrodes intersect, a scan electrode driving circuit for outputting a scan voltage to the scan electrodes, and a data electrode. A data electrode driving circuit that outputs a data voltage to the scanning electrode driving circuit; a first power supply that outputs a first voltage corresponding to the scanning voltage to the scanning electrode driving circuit; and a data voltage corresponding to the data electrode driving circuit. A capacitive display panel driving device including a second power supply for outputting a second voltage to be applied, wherein a reactor is inserted between the second power supply and the data electrode driving circuit. Display panel drive. 6. The capacitive display panel driving device according to claim 5, wherein a resistor is inserted between the second power supply and the data electrode driving circuit in addition to the reactor in series with the reactor. 7. The capacitive display panel driving device according to claim 5, wherein a resistor is inserted between the data electrode driving circuit and the plurality of data electrodes. 8. The capacitive display panel driving device according to claim 3, wherein the resistor is formed in the display panel by film formation. 9. The capacitive display panel driving device according to claim 1, wherein said capacitive display element is an EL element.