JP2001077344A - Solid-state image sensing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an IT-CCD which can readily prevent generation of difference in solar concentration efficiency and sensitivity of a picture element between adjacent two picture element lines, although picture element shift arrangement is carried out and is easy to improve picture element density while restraining lowering of an area of a light receiving part in each picture element, and a driving method of the same. SOLUTION: The IT-CCD has a number of photoelectric conversion elements 22 in picture element shift arrangement, a vertical transfer CCD 30 which transfers signal charge stored in the photoelectric conversion element 22 to an output transfer path while meandering and a read gate region 40 for controlling read to the vertical transfer CCD 30 of signal charge stored in each photoelectric conversion element 22 for each photoelectric conversion element 22. The channel width of charge transfer channels 31a, 31b in a place adjacent to the read gate region 40 is made narrower than the channel width of other places.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a solid-state imaging device used as an area image sensor and a driving method thereof, and more particularly, to an interline transfer having a plurality of rows of photoelectric conversion elements and a plurality of vertical transfer CCDs. The present invention relates to a solid-state imaging device and a driving method thereof.

[0002]

2. Description of the Related Art Since the mass production technology of CCDs (Charge Coupled Devices) was established, video cameras, electronic still cameras, and the like using CCD type solid-state imaging devices as area image sensors have rapidly spread. CCD type solid-state imaging devices are classified into several types according to their structures. One of them is an interline transfer type solid-state imaging device (hereinafter, this solid-state imaging device is abbreviated as “IT-CCD”). ).

An IT-CCD has a large number of photoelectric conversion elements arranged on a surface of a semiconductor substrate at a constant pitch in a plurality of columns and a plurality of rows. Each photoelectric conversion element column is configured by a plurality of photoelectric conversion elements, and each photoelectric conversion element row is also configured by a plurality of photoelectric conversion elements. Each photoelectric conversion element is usually constituted by a photodiode.

[0004] A large number of photoelectric conversion elements composed of pn photodiodes are formed, for example, by forming a p-type well on a desired surface side of a semiconductor substrate and forming a n-type region having a desired shape in the same number as the number of photoelectric conversion elements intended. It is produced by forming in the above-mentioned p-type well. At this time, if necessary, each n
A p ⁺ type region is formed on the type region. Signal charges are accumulated in each of the n-type regions. That is, each of the n-type regions functions as a signal charge accumulation region.

Hereinafter, the term “photoelectric conversion element” is used in this specification.
May refer only to the signal charge storage region. In this specification, “close to a photoelectric conversion element” or “adjacent to a photoelectric conversion element” means “close to a signal charge accumulation region forming the photoelectric conversion element” or “ Adjacent to the signal charge accumulation region forming the conversion element. "

[0006] One charge transfer channel is formed for each photoelectric conversion element row in the vicinity of the photoelectric conversion element row. Therefore, the IT-CCD has a plurality of charge transfer channels. One charge transfer channel is used as a charge transfer channel for transferring signal charges accumulated in all photoelectric conversion elements in the photoelectric conversion element row adjacent to the charge transfer channel.

A plurality of transfer electrodes crossing each of the charge transfer channels in plan view are formed on the surface of the semiconductor substrate via an electric insulating film. Each intersection in plan view between each transfer electrode and each charge transfer channel functions as one charge transfer stage. That is, one vertical transfer CCD is formed by one charge transfer channel and the plurality of transfer electrodes.

[0008] In this specification, a region forming the above-described charge transfer stage in each of a plurality of transfer electrodes forming a vertical transfer CCD is referred to as a "transfer path forming portion".

Each vertical transfer CCD in the interlace drive type IT-CCD usually has two charge transfer stages for one photoelectric conversion element. Each vertical transfer CCD in an all-pixel read-out IT-CCD generally has three or four charge transfer stages for one photoelectric conversion element. One IT-CCD has the same number of vertical transfer CCDs as the plurality of photoelectric conversion element rows formed on the IT-CCD.

When each of the above-mentioned photoelectric conversion elements performs photoelectric conversion, signal charges are accumulated in the photoelectric conversion elements. The signal charge stored in each photoelectric conversion element is read out to a corresponding charge transfer channel at a predetermined time.

In order to control the reading of the signal charge from the photoelectric conversion element to the charge transfer channel, one of the photoelectric conversion elements
A readout gate region is formed on the surface of the semiconductor substrate adjacent to the photoelectric conversion element on an individual basis. This readout gate region is usually constituted by a region of a conductivity type opposite to that of the photoelectric conversion element and the charge transfer channel so as to form a potential barrier for signal charges. Each read gate region is also adjacent to a given area in a given charge transfer channel.

A read gate electrode portion is formed on each of the read gate regions. Each of the readout gate electrode portions usually includes a partial area of a transfer path forming portion in a predetermined transfer electrode constituting a vertical transfer CCD. By applying a high voltage to the read gate electrode to eliminate the potential barrier in the read gate region, signal charges accumulated in the photoelectric conversion element can be read to the charge transfer channel.

The signal charges read to each charge transfer channel are transferred to an output transfer path by each vertical transfer CCD including the charge transfer channel. This output transfer path is usually formed by a CCD (hereinafter, referred to as a CCD).
This CCD may be referred to as a “horizontal transfer CCD”. ).

An output transfer path composed of a horizontal transfer CCD has one
There are N charge transfer stages for one vertical transfer CCD. One charge transfer stage usually has one potential barrier portion and one potential well portion, and the “N” is two. When one charge transfer stage has a uniform potential, the above “N” is 3 or more.

The output transfer path sequentially transfers the received signal charges in the longitudinal direction of the photoelectric conversion element row (hereinafter, this direction is simply referred to as “row direction”) and sends the signal charge to the output section. Similarly to the vertical transfer CCD, an output transfer path is also formed on the semiconductor substrate.

The vertical transfer CCD and the horizontal transfer CCD have a photoelectric conversion capability like a photodiode. For this reason, a light shielding film is formed from the photosensitive portion where the photoelectric conversion elements are distributed to the horizontal transfer CCD so that unnecessary photoelectric conversion is not performed by the vertical transfer CCD or the horizontal transfer CCD. The light shielding film is a photoelectric conversion element (photodiode)
Each has an opening of a predetermined shape on each. One opening is formed for one photoelectric conversion element. This opening is usually open inside the edge of the signal charge storage region of the photoelectric conversion element when viewed in plan.

One photoelectric conversion element, one readout gate region formed adjacent to the photoelectric conversion element, a readout gate electrode portion covering the readout gate area in plan view, and one photoelectric conversion element. One pixel is constituted by the corresponding two to four charge transfer stages (two to four charge transfer stages in the vertical transfer CCD). And
The portion of the surface of each photoelectric conversion element that is exposed from the above-described opening in plan view functions as a light receiving unit in one pixel.

Therefore, in the IT-CCD, the shape and area of the light receiving portion in each pixel depend on the shape of each opening formed in the light shielding film in plan view and the area of the opening in plan view. Is substantially determined.

By the way, with the spread of IT-CCD, further improvement of its performance, for example, resolution and sensitivity is required.

The resolution of the IT-CCD is
D greatly depends on the pixel density (integration degree). The higher the pixel density (integration degree), the easier it is to increase the resolution. On the other hand, the sensitivity of the IT-CCD greatly depends on the area of the light receiving unit in each pixel. The sensitivity increases as the area of the light receiving section in each pixel increases.

The IT-CCD described in Japanese Patent No. 2825702 (which is referred to as “solid-state imaging device” in this publication, but is referred to as “IT-CCD” in this specification) is an individual. IT- technology that can increase the pixel density while suppressing the decrease in the area of the light receiving section in the pixel
Also known as a CCD.

In this IT-CCD, a large number of photoelectric conversion elements are arranged at a fixed pitch in a plurality of columns and a plurality of rows. One photoelectric conversion element row and one photoelectric conversion element row are provided in plural numbers. Of photoelectric conversion elements.
Each of the plurality of photoelectric conversion elements forming the even-numbered row is, with respect to the plurality of photoelectric conversion elements forming the odd-numbered row, the pitch of the photoelectric conversion elements in each photoelectric conversion element row. Approximately ２, shifted in the column direction. Similarly, each of the plurality of photoelectric conversion elements forming an even-numbered row is about one pitch of the photoelectric conversion elements in each photoelectric conversion element row relative to the plurality of photoelectric conversion elements forming an odd-numbered row. / 2, shifted in the row direction. Each of the photoelectric conversion element columns includes only odd-numbered rows or even-numbered rows of photoelectric conversion elements.

A plurality of vertical transfer CCDs are formed to transfer the signal charges accumulated in each photoelectric conversion element, and each vertical transfer CCD transfers the signal charges in a predetermined direction while meandering.

Each vertical transfer CCD includes a plurality of transfer electrodes, and the plurality of transfer electrodes are arranged in a honeycomb shape. Each of the above-described photoelectric conversion elements is positioned in a plan view in each of the hexagonal gaps generated by disposing a plurality of transfer electrodes in a honeycomb shape.

In the IT-CCD described in the above publication, a large number of photoelectric conversion elements and a plurality of transfer electrodes (a plurality of transfer electrodes for a vertical transfer CCD) are arranged in this manner, so that individual It is possible to improve the pixel density while suppressing a decrease in the area of the light receiving section in the pixel.

In this specification, the arrangement of a large number of photoelectric conversion elements described above is hereinafter referred to as “pixel shift arrangement”.
Called.

[0027]

In an IT-CCD, generally, one microlens is formed above each photoelectric conversion element for each photoelectric conversion element. After the light from the object is collected by the imaging lens optical system, it is further collected by the microlens and forms an image on the photoelectric conversion element.

At this time, the incident angle of the light beam incident on the microlens at the upper part in the column direction of the photoelectric conversion element row and the incident angle of the light beam incident on the microlens at the lower part in the column direction sandwich the optical axis of the imaging lens. Is upside down. Therefore, the position of the image point formed on the photoelectric conversion element by the microlens is also inverted up and down in the column direction upper part and the column direction lower part of the photoelectric conversion element row when viewed with reference to the optical axis of the microlens.

FIG. 17 is a sectional view for explaining the position of an image point formed on a photoelectric conversion element by a microlens. The photoelectric conversion element 151 shown in the figure is formed on a semiconductor substrate 152 and includes a microlens 153.
Is formed above the photoelectric conversion element 151 via the focus adjustment layer 154. In FIG. 17, the horizontal direction in the figure corresponds to the vertical direction of the photoelectric conversion element row.

When the photoelectric conversion element 151 is located above the photoelectric conversion element row in the column direction, the optical axis
A light beam 155 obliquely crossing 53a from the center of the photoelectric conversion element row toward the top in the row direction enters the microlens 153. This light beam 155 forms an image at a point 155a shifted above the optical axis 153a of the microlens 153 (upper side in the column direction of the photoelectric conversion element row).

On the other hand, when the photoelectric conversion element 151 is located at the lower part in the column direction of the photoelectric conversion element row, the optical axis 153a of the microlens 153 obliquely crosses from the center of the photoelectric conversion element row to the lower part in the column direction. The light beam 156 enters the microlens 153. The light beam 156 forms an image at a point 156 b shifted below the optical axis 153 a of the microlens 153 (on the lower side in the column direction of the photoelectric conversion element row).

The displacement of the point 155a from the optical axis 153a of the microlens 153 increases as the position of the microlens 153 moves away from the center of the photoelectric conversion element row in the column direction. Optical axis 15 of micro lens 153 at point 156b
The same applies to the displacement from 3a.

Therefore, in both the IT-CCD in which pixels are arranged in a square lattice and the IT-CCD in which pixels are shifted, the following cases (A) to (C) indicate that There may be a difference in light-collection efficiency and sensitivity between pixels between two adjacent pixel rows. (A) When the shape of the light receiving section in each pixel is different. (B) When the shape of the light receiving portion in each pixel is the same, but the size is different. (C) When the shape and size of the light receiving unit in each pixel are the same, but the directions are different.

If a difference occurs in the light collection efficiency or sensitivity between pixels between two adjacent pixel rows, for example, a color imaging I
In a T-CCD, the color balance of an output signal from the IT-CCD is lost, and color shading occurs in a reproduced image. In the IT-CCD for black and white imaging,
The unevenness of the background occurs, and the image quality of the reproduced image deteriorates.

For example, in the IT-CCD described in the aforementioned Japanese Patent No. 2825702, the hexagonal gap generated by arranging a plurality of transfer electrodes in a honeycomb shape has an odd number in plan view. The gap between the rows and the gap between the even rows are shifted from each other by 180 °. Here, the “gap of the odd-numbered row” and the “gap of the even-numbered row” mean that the longitudinal direction of the photoelectric conversion element column is the column direction, and the longitudinal direction of the photoelectric conversion element row is the row direction, and the arrangement of the gaps is a matrix. It means “gap of odd-numbered row” and “gap of even-numbered row” when considered.

Therefore, in the IT-CCD,
If the shape and size of the light receiving portion in each pixel are made similar to the hexagonal gap as it is, a difference occurs in the light collection efficiency and sensitivity of the pixel between two adjacent pixel rows. It will be easier. Also, if the shape, size, and orientation of the light receiving unit in each pixel are to be the same between the pixels in the odd-numbered rows and the pixels in the even-numbered rows, the area of the light-receiving unit is further narrower than the hexagonal gap. . That is, the area that cannot be used as a light receiving unit increases. As a result, it is difficult to increase the pixel density while suppressing the decrease in the area of the light receiving unit in each pixel.

As described above, the signal charges are read from the individual photoelectric conversion elements to the corresponding charge transfer channels by the read gate region formed on the semiconductor substrate and the read gate formed on the read gate region. It is controlled using the gate electrode unit. Each of the readout gate electrode portions usually includes a partial area of a transfer path forming portion in a predetermined transfer electrode constituting the vertical transfer CCD.

Conventionally, the channel width of the charge transfer channel of the vertical transfer CCD has substantially the same value both in the portion where the read gate region is formed adjacently and in the portion where the read gate region is not formed adjacently. Has been.

Therefore, the width of the transfer path forming section including the read gate electrode section must be wider than that of the transfer path forming section not including the read gate electrode section. Alternatively, the width of all the transfer path forming sections is set to the same value as the width of the transfer path forming section including the readout gate electrode section.

By increasing the width of the transfer path forming section,
For example, in the IT-CCD described in the above publication, the area in plan view of the hexagonal gap generated when the transfer electrodes for the vertical transfer CCD are arranged in a honeycomb shape is reduced. Since the photoelectric conversion element is formed in the hexagonal gap in plan view, as the area of the hexagonal gap in plan view decreases, the area of the photoelectric conversion element also decreases.

Of course, the shape of the light receiving portion in each pixel is determined by the shape in plan view of the opening formed in the light shielding film as described above. However, the opening is usually formed inside the edge when the photoelectric conversion element is viewed in plan. For this reason, the area of the light receiving section in the pixel is usually smaller than the area of the photoelectric conversion element forming the pixel.

Therefore, when the area of the photoelectric conversion element is reduced, the area of the light receiving portion of the pixel is usually reduced accordingly.

An object of the present invention is to easily prevent a difference in light-collecting efficiency and sensitivity between two adjacent pixel rows even though pixel shift arrangement is performed. IT-CC that can improve the pixel density while suppressing the decrease in the area of the light receiving portion in each pixel
D and its driving method.

[0044]

According to one aspect of the present invention, there are provided a plurality of photoelectric conversion elements arranged on a surface of a semiconductor substrate at a constant pitch in a plurality of columns and a plurality of rows.
One photoelectric conversion element column and one photoelectric conversion element row are each formed by a plurality of photoelectric conversion elements, and the plurality of photoelectric conversion elements forming an even-numbered column are compared with the plurality of photoelectric conversion elements forming an odd-numbered column. Each of the elements is shifted in the column direction by about の of the pitch between the photoelectric conversion elements in each photoelectric conversion element column, and constitutes an even-numbered row with respect to the plurality of photoelectric conversion elements constituting an odd-numbered row. Each of the plurality of photoelectric conversion elements is shifted in a row direction by about の of the pitch between the photoelectric conversion elements in each photoelectric conversion element row, and each of the photoelectric conversion element columns has an odd-numbered row or an even-numbered row. A plurality of photoelectric conversion elements including only the photoelectric conversion elements, and a plurality of sections formed on the surface of the semiconductor substrate in close proximity to the photoelectric conversion element rows for each of the plurality of photoelectric conversion element rows, and Change direction at the border of A plurality of charge transfer channels exhibiting a meandering shape that are continuous in the longitudinal direction of the photoelectric conversion element row as a whole, and are formed on the surface of the semiconductor substrate so as to cross each of the plurality of charge transfer channels in plan view. A plurality of transfer electrodes, each having a plurality of transfer path forming portions of the same number as the plurality of charge transfer channels, each of the plurality of transfer path forming portions being the plurality of transfer electrodes. One of the sections on each of the charge transfer channels
To form one charge transfer stage together with the section in plan view, and furthermore, two adjacent transfer electrodes are repeatedly separated from each other in plan view, and one of the plurality of photoelectric conversion element rows.
While enclosing one of the odd-numbered rows or even-numbered rows of photoelectric conversion elements that constitute the photoelectric conversion element columns every other column in plan view and defining one photoelectric conversion element area, the photoelectric conversion element rows as a whole are defined. A plurality of transfer electrodes extending in the longitudinal direction of the plurality of photoelectric conversion elements, and the plurality of sections in each of the plurality of photoelectric conversion elements, adjacent to the photoelectric conversion element, and in each of the plurality of charge transfer channels. And a plurality of read gate regions formed on the surface of the semiconductor substrate, adjacent to the interval, and wherein the read gate regions are adjacent to each other in the plurality of charge transfer channels. There is provided a solid-state imaging device in which a channel width at one location is smaller than a channel width at another location.

According to another aspect of the present invention, there is provided the above-described method for driving a solid-state imaging device, wherein each of the photoelectric conversion elements constituting a predetermined photoelectric conversion element row is provided in one vertical blanking period. A signal charge reading step of reading out the stored signal charges through the read gate region adjacent to the photoelectric conversion element to a charge transfer channel adjacent to the read gate region; and reading the next vertical blanking period from the one vertical blanking period. An image signal output step of converting each of the signal charges read out to the charge transfer channel into an image signal and outputting the signal signal until a ranking period.

In the above-described solid-state imaging device, the channel width at the portion where the readout gate region is adjacent to the charge transfer channel is smaller than the channel width at other portions. For this reason, in forming the transfer path forming section including the read gate electrode section, a desired read gate area can be formed without making the width of the transfer path forming section much wider than the width of other transfer path forming sections. It can be formed on a semiconductor substrate.

As a result, it is possible to easily suppress an increase in the area of the surface of the photoelectric conversion element that cannot be used as the light receiving portion of the pixel due to the formation of the readout gate area. At the same time, it becomes easy to make the shape, size, and direction of the light receiving portion of the pixel the same between two adjacent pixel rows.

Accordingly, the solid-state imaging device described above prevents a difference in light-collecting efficiency and sensitivity between two adjacent pixel rows even though the pixels are shifted and arranged. This is a solid-state imaging device that is easy to perform and easily increases the pixel density while suppressing the decrease in the area of the light receiving unit in each pixel.

In the above-described solid-state imaging device, a readout gate region is formed adjacent to every other one of a plurality of sections of each charge transfer channel. That is, the region where the channel width is narrow in each charge transfer channel is formed every other charge transfer stage. For this reason, the charge transfer stage in which the channel width of the charge transfer channel is narrow is only required to accumulate the signal charges for one charge transfer stage for a short time and transfer the signal charges to the next charge transfer stage.

If the charge transfer channel and the readout gate region are formed as described above, even if the channel width in a portion where the readout gate region is not adjacent is kept the same as the conventional one, It is possible to obtain transfer efficiency.

For example, by narrowing the channel width of the charge transfer channel, a narrow channel effect may be exhibited and transfer efficiency may be reduced. However, a decrease in transfer efficiency due to the manifestation of the narrow channel effect can be suppressed by generating a so-called fringe electric field.

The fringe electric field can be generated, for example, by setting the relationship between the transfer path forming portion in the transfer electrode and the read gate region to satisfy the following (1) to (3). (1) The size of the transfer path forming portion in the transfer electrode in plan view is set to a size that can cover the readout gate region. (2) The edge of the downstream side (which means the output transfer path side; the same applies hereinafter) of the transfer path forming portion constituting the charge transfer stage in which the channel width of the charge transfer channel is not narrow is immediately adjacent to the charge transfer stage. It is in contact with the edge of the upstream side (in plan view, the side opposite to the output transfer path; the same applies hereinafter) in the read gate region formed on the downstream side in plan view. (3) The upstream edge of the transfer path forming portion constituting the charge transfer stage in which the channel width of the charge transfer channel is not narrowed is downstream of the read gate region formed immediately upstream of the charge transfer stage. In plan view with the side edge.

However, if the channel width in the portion where the read gate region is adjacent is too narrow, even if the above-mentioned relations (1) to (3) are satisfied, the charge transfer stage will be equivalent to one charge transfer stage. It becomes difficult to accumulate the signal charges of the above. The channel width of the portion where the read gate region is adjacent is preferably about 50 to 95%, more preferably about 60 to 80% of the channel width in the portion where the read gate region is not adjacent. .

[0054]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a diagram showing an example of the IT-system according to the first embodiment.
FIG. 2 is a plan view schematically showing the CCD 100. However, this figure is a schematic diagram of an interlaced drive type IT-CCD in which a number of pixels are arranged in a shifted manner.

In the illustrated configuration, a simplified total of three
Two photoelectric conversion elements 22 are arranged with pixels shifted over 8 rows × 8 columns. The odd-numbered photoelectric conversion element columns 20 include only the odd-numbered rows of photoelectric conversion elements 22, and the even-numbered photoelectric conversion element columns 20 include only the even-numbered rows of photoelectric conversion elements 22.

In an actual IT-CCD, the number of pixels is several tens.
10,000 to several million. Even in such a configuration,
Pixels are shifted so that the odd-numbered photoelectric conversion element columns 20 include only the odd-numbered rows of photoelectric conversion elements 22 and the even-numbered photoelectric conversion element columns 20 include only the even-numbered rows of photoelectric conversion elements 22. In addition, when the first photoelectric conversion element column 20 counted from the left end in the figure is omitted, the odd-numbered photoelectric conversion element column 20 includes only the even-numbered photoelectric conversion elements 22, and the even-numbered photoelectric conversion element column 20 is omitted. Is an odd-numbered row of photoelectric conversion elements 22
Will only include

The illustrated IT-CCD 100 includes a photosensitive section 10 set on the surface of the semiconductor substrate 1, an adjusting section 60 formed outside the photosensitive section 10, and an output section formed outside the adjusting section 60. It has a transfer path 70 and an output unit 80 connected to one end of the output transfer path 70.

Eight photoelectric conversion element columns 20, eight photoelectric conversion element rows 21, eight vertical transfer CCDs 30, 32
The readout gate regions 40 are formed on the surface of the semiconductor substrate 1 in the photosensitive section 10.

Each photoelectric conversion element column 20 is constituted by four photoelectric conversion elements 22 constituted by n-type regions in a p-type well, and each photoelectric conversion element row 21 is also constituted by four photoelectric conversion elements 22. It is configured.

Each vertical transfer CCD 30 has one charge transfer channel (not shown in FIG. 1) constituted by an n-type region in a p-type well formed on the surface of the semiconductor substrate 1. Five transfer electrodes 32 formed on the semiconductor substrate 1 via an electric insulating film (not shown in FIG. 1) so as to cross the charge transfer channel in plan view.
And four transfer electrodes 33 formed on the semiconductor substrate 1 via an electric insulating film (not shown in FIG. 1) so as to cross the charge transfer channel in plan view. It is configured. The transfer electrode 32 is composed of, for example, a first polysilicon layer. The transfer electrode 33 is composed of, for example, a second polysilicon layer. These transfer electrodes 32 and 33 are formed alternately.

Each of the read gate areas 40 includes a predetermined photoelectric conversion element 22 and a corresponding vertical transfer CCD 30
And a predetermined section in the above-described charge transfer channel. In FIG. 1,
In order to make the read gate region 40 easy to understand, the read gate region 40 is hatched.

The adjusting section 60 is composed of a total of 12 charge transfer stages formed by connecting to one end of each of the charge transfer channels constituting each vertical transfer CCD 30. Each charge transfer stage is formed on the semiconductor substrate 1 such that the charge transfer channel for the adjustment unit (not shown) following the charge transfer channel and the charge transfer channel for the adjustment unit are traversed in plan view. And any one of the three transfer electrodes 61, 62, 63. One charge transfer stage is formed at each intersection of the charge transfer channel for each adjustment unit and the transfer electrodes 61, 62, 63 in plan view.

The transfer electrode 61 has a transfer path forming portion 61T at each of intersections in plan view with each of the adjusting portion charge transfer channels, and these transfer path forming portions 61T are connected via the connecting portions 61C. Connected to each other. Transfer electrode 6
No. 2 has a transfer path forming portion 62T at each position where each of the adjusting portion charge transfer channels intersects in plan view,
These transfer path forming portions 62T are connected to each other via a connecting portion 62C. The transfer electrode 63 has a transfer path forming section 63T at each of intersections of each of the adjusting section charge transfer channels in plan view.
The 3Ts are connected to each other via a connection 63C. As described later, the transfer electrode 3 formed on the photosensitive unit 10
The same applies to 2, 33.

Each of the adjusting portion charge transfer channels extends in a direction perpendicular to the transfer path forming portions 61T, 62T, 63T, which intersect with the adjusting portion charge transfer channel in plan view, in plan view.

In FIG. 1, the transfer electrode 32, the transfer electrode 61, the transfer electrode 62, and the transfer electrode 63 closest to the adjustment unit 60 are drawn apart from each other so as to be easily distinguished. However, in practice, the adjustment unit 60
The transfer electrode 32 and the transfer electrode 61 closest to the transfer path are at least on the downstream side (the output transfer path 70
Side) and the upstream (photosensitive portion 10 side) edge of the transfer path forming portion 62T overlap each other in plan view. The same applies to the transfer electrode 61 and the transfer electrode 62, and the transfer electrode 62 and the transfer electrode 63. These transfer electrodes are insulated from each other by an electric insulating film.

The adjusting section 60 changes the transfer direction of the signal charges transferred by each vertical transfer CCD 30, and adjusts the horizontal (row) pitch of the charge transfer paths to a constant value.

The output transfer path 70 receives the signal charges sent from each of the vertical transfer CCDs 30 via the adjustment unit 60, sequentially transfers the signal charges in the row direction, and sends them to the output unit 80.

The output section 80 converts the signal charge sent from the output transfer path 70 into a signal voltage by a floating capacitor (not shown), and uses the signal voltage by a source follower circuit (not shown) or the like. And amplify. The charge after detection (conversion) is absorbed by a power supply (not shown) via a reset transistor (not shown).

In order to supply a predetermined drive pulse to each of the transfer electrodes 32, each of the transfer electrodes 33 and the transfer electrodes 61, 62, 63, four pulse supply terminals 85a, 85b, 85
c and 85d are disposed outside the photosensitive unit 10.

The individual pulse supply terminals 85a, 85b,
85c and 85d are on the upper end side of the photosensitive unit 10 (output transfer path 7).
Transfer electrodes 32, 3 formed from the side farthest from 0) to the lower end side of the adjusting section 60 (the side of the output transfer path 70).
3, 61, 62, 63 are electrically connected to every third,
A four-phase drive pulse is supplied.

Also, two pulse supply terminals 88a and 88 for supplying a predetermined drive pulse to the output transfer path 70.
b is disposed outside the photosensitive unit 10.

Reference numeral 51 in FIG. 1 indicates an opening formed in a light shielding film 50 described later.

FIGS. 2, 3 (a), 3 (b), 4, 5 and 5 show an example in which the semiconductor substrate 1 made of an n-type silicon substrate having a p-type well is used. 6 (a)
The structure of the photosensitive section 10 will be described with reference to FIG. 6B, but the present invention is not limited to the following example.

FIG. 2 is an enlarged plan view showing a part of the photosensitive section 10 shown in FIG. Further, FIG.
FIG. 3B is a plan view schematically showing the charge transfer channel 31a shown in FIG. 3, and FIG. 3B is a plan view schematically showing the charge transfer channel 31b shown in FIG. FIG. 4 shows the transfer electrode 3
2 is a plan view schematically showing one of the transfer electrodes 33, and FIG. 5 is a plan view schematically showing one of the transfer electrodes 33. FIG. 6A is a schematic view of a cross section taken along the line AA shown in FIG. 2, and FIG.
FIG. 3 is a schematic view of a cross section taken along line BB shown in FIG. 2.

As shown in FIG. 2, in each of the photoelectric conversion element rows 20 formed in the photosensitive section 10, a predetermined number of photoelectric conversion elements 22 (signal charge storage regions) are arranged in a predetermined direction D.
It is formed at a constant pitch P ₁ to _V (. Indicated by the arrow in FIG. 2). In each of the photoelectric conversion element rows 21, a predetermined number of photoelectric conversion elements 22 (signal charge accumulation regions) are formed at a constant pitch P ₂ in a predetermined direction D _H (indicated by an arrow in FIG. 2). I have.

Construct an even-numbered photoelectric conversion element array 20
Each of the photoelectric conversion elements 22 (signal charge storage region) has an odd number.
A predetermined number of photoelectric conversions constituting the second photoelectric conversion element row 20
With respect to the element 22 (signal charge storage region), the pitch P₁
１ ／ of the column direction (direction D _V) (See Fig. 2)
See). Similarly, the even-numbered photoelectric conversion element rows 21 are formed.
Each of the photoelectric conversion elements 22 (signal charge storage regions)
A predetermined number of photoelectric conversion elements forming the number-th photoelectric conversion element row 21
The pitch P with respect to the exchange element 22 (signal charge storage region).
_TwoAbout 1/2 of the row direction (direction D_H) (Fig. 2)
reference).

[0077] Here, "about half of the pitch P _1," as referred to herein, in addition to containing a P _1/2, the manufacturing error, cause rounding errors such pixel location occurring on design or mask fabrication although the out of the P _1/2 by, the category includes a value which can be regarded as substantially equivalent to P _1/2 when viewed from the image quality of the performance and the image of the resulting iT-CCD. It referred to in the present specification, "about half of the pitch P _2"
The same applies to.

The shape in plan view of each of the photoelectric conversion elements 22 is substantially hexagonal, and the size in plan view of each photoelectric conversion element 22 is substantially the same.

Two types of charge transfer channels 31a and 31b
Are alternately formed in the direction _DH (see FIG. 2). The charge transfer channels 31a and 31b have substantially line-symmetric shapes in plan view. Except for the rightmost (rightmost end in FIG. 1) photoelectric conversion element row 20, one photoelectric conversion element row 20 is composed of two adjacent charge transfer channels 31.
a and 31b.

As shown in FIGS. 2, 3A and 3B, the individual charge transfer channels 31a and 31b
Take a winding shape in which a plurality of sections, which are arranged in this direction D _V as a whole while changing the orientation at the boundary between the sections. The charge transfer channel 31a and the charge transfer channel 31b have the same number of sections. Charge transfer channels 31a and 3
1b, a region where the channel width is narrow is formed every other section. The region where the channel width is reduced is the charge transfer channels 31a and 31a.
In any one of the sections b, the sections are formed in the sections of the same order as counted from the upper end side of the photosensitive section 10 (the side farthest from the output transfer path 70). The read gate region 40 is arranged adjacent to each of the regions where the channel width is narrow. Each of the read gate regions 40 is also adjacent to a predetermined photoelectric conversion element 22.

The symbols R ₁ , R ₂ , R ₃ ,..., R ₆ in FIGS. 3A and 3B indicate one section in the charge transfer channels 31a, 31b, respectively. .

The two types of transfer electrodes 32 and 33 are formed so as to cross the charge transfer channels 31a and 31b in plan view, respectively (see FIG. 2). Each transfer electrode 32, 33 is connected to a charge transfer channel 31a, 31.
The transfer path forming units 32T and 33T have the same number as the total number b.

In the transfer electrode 32, each transfer path forming portion 32T is connected to the above-mentioned direction _DH via a connection portion 32C (see FIG. 4). Two transfer path forming parts 32T, 32T adjacent to each other via one connection part 32C are plane-symmetric with each other. Each of the transfer path forming portions 32T covers one of the sections in the charge transfer channel 31a or 31b where the channel width is not narrow in plan view, and forms one charge transfer stage together with the section.

In the transfer electrode 33, each transfer path forming portion 33T is connected to the above-mentioned direction _DH via a connecting portion 33C (see FIG. 5). Two transfer path forming parts 33T, 33T adjacent to each other via one connection part 33C are plane-symmetric with each other. Each of the transfer path forming portions 33T covers one of the sections in the charge transfer channel 31a or 31b where the channel width is narrow in plan view, and forms one charge transfer stage together with the section.

Further, each of the transfer path forming portions 33T separately covers one read gate region 40 in plan view. A portion of the transfer path forming portion 33T that covers the read gate region 40 in plan view is a read gate electrode portion 33 for reading signal charges from the photoelectric conversion element 22.
It functions as G (see FIG. 5).

The charge transfer stage including the transfer path forming portion 32T and the charge transfer stage including the transfer path forming portion 33T are alternately connected to one vertical transfer CCD 30.
Is formed (see FIG. 2). Each charge transfer stage in each vertical transfer CCD30 is continuous while changing the orientation at the boundary between the charge transfer stage, and extends in the direction D _V as a whole (see FIG. 2).

When two adjacent transfer electrodes 32, 33 cross one certain photoelectric conversion element row 20, the connection section 3
Overlap at 2C and 33C. When crossing the photoelectric conversion element array 20 adjacent to the photoelectric conversion element array 20, the photoelectric conversion element array 20 is separated from each other and surrounds one of the photoelectric conversion elements 22 constituting the photoelectric conversion element array 20 in plan view. Next to each other
The transfer electrodes 32 and 33 extend in the direction _DH as a whole while repeating the above separation (see FIG. 2).

In the configuration of FIG. 1, when two adjacent transfer electrodes are the transfer electrode 32 and the transfer electrode 33 when viewed from the upper end side of the photosensitive section 10, the two adjacent transfer electrodes 3 are used.
2, 33 surround each of the odd-numbered rows of photoelectric conversion elements 22 in plan view. On the other hand, two adjacent transfer electrodes are connected to the photosensitive unit 1.
When the transfer electrode 33 and the transfer electrode 32 are viewed from the upper end side of 0, the two adjacent transfer electrodes 33 and 32 surround each of the even-numbered rows of the photoelectric conversion elements 22 in plan view.

Each of the two transfer electrodes 32 and 33 adjacent to each other surrounds one of the photoelectric conversion elements 22 in a plan view at each of the portions separated from each other, and has a hexagonal or substantially hexagonal shape. One rectangular photoelectric conversion element region is defined. The shape, size, and orientation of these photoelectric conversion element regions are substantially the same. That is, each of the transfer electrodes 32 and 33 is formed in a honeycomb shape (FIG. 2).
reference).

Each of the photoelectric conversion element regions includes one connecting portion 32C, two transfer path forming portions 32T and 32T adjacent to each other via the connecting portion 32C, and one connecting portion 3C.
3C and two transfer path forming parts 33T, 33T adjacent to each other via the connection part 33C, are defined in plan view.

In FIG. 1, the transfer electrodes 32 and 33 are illustrated as being separated from each other so that the transfer electrode 32 and the transfer electrode 33 can be easily distinguished from each other. However, as shown in FIG. 2, the transfer electrodes 32 and 33 are connected to the connecting portions 32C and 33C and the transfer path forming portion 32.
It overlaps at T and 33T.

A vertical transfer CCD is provided on the left side of the photoelectric conversion element row 20 at the left end (left end in FIG. 1) of the photosensitive section 10.
In the case where no photoelectric conversion element 30 is provided, each of the photoelectric conversion elements 22 constituting the leftmost photoelectric conversion element row 20 has two adjacent photoelectric conversion elements 22.
The transfer electrodes 32 and 33 need not be surrounded by each other in plan view. That is, the transfer path forming portions 32T and 33T on the left end, which are necessary for surrounding the respective photoelectric conversion elements 22 constituting the left end photoelectric conversion element row 20 in plan view, can be omitted. Further, the left end connecting portions 32C and 33C can be omitted. The same applies to the case where the vertical transfer CCD 30 is not provided on the right side of the rightmost photoelectric conversion element row 20 in the photosensitive section 10 (see FIG. 1).

As shown in FIGS. 6A and 6B, the above-described photoelectric conversion element 22 is, for example, a semiconductor substrate 1
A predetermined region in the p-type well 2 formed on one surface side of
The buried photodiode includes an n-type region 3 provided on the predetermined region and a buried p ⁺ -type layer 4 provided on the n-type region 3. n-type region 3
Functions as a signal charge accumulation region. An electric insulating film (silicon oxide film) 5 is formed on the p ⁺ -type layer 4.
Along the direction D _V two neighboring single photoelectric conversion element 2
The channels 2 and 22 are separated by a channel stop region 25 (see FIG. 6A) made of, for example, a p ⁺ -type layer.

The charge transfer channels 31a and 31b are formed, for example, on a p-type well 2 formed on one surface side of the semiconductor substrate 1.
By forming an n-type region at a predetermined location. Charge transfer channels 31a, 31b and photoelectric conversion element 2
2 is a channel stop region 3 made of, for example, ap ⁺ -type layer except for a portion where the read gate region 40 is formed.
5 (see FIG. 6B).

The transfer electrode 32 is made of, for example, a polysilicon layer formed on the semiconductor substrate 1 via an electric insulating film (silicon oxide film) 5. Each transfer electrode 32 is covered with an electrical insulating layer made of a silicon oxide film or the like.

The transfer electrode 33 is also made of, for example, a polysilicon layer. Each transfer electrode 33 is covered with an electric insulating layer as described later. 6 (a) and 6 (b)
In order to make the drawing easier to see,
The electric insulating layer covering 2, 33 is replaced with one electric insulating layer 3
It is represented by 4.

The individual read gate regions 40 (FIG. 6)
(See (b)) consists of, for example, a predetermined portion of the p-type well 2 formed on one surface side of the semiconductor substrate 1. The read gate electrode portion 33G is formed on the read gate region 40 via the electric insulating film (silicon oxide film) 5.

6A and FIG. 6B indicates a light shielding film described later. 1, FIG. 2, FIG. 6A and FIG.
Indicates an opening formed in the light shielding film 50.

IT-CCD having the above-described photosensitive section 10
100, (a) one photoelectric conversion element 22, (b)
Two charge transfer stages in the vertical transfer CCD 30 formed on the left side in FIG. 2 in the vicinity of the photoelectric conversion element 22, that is, a charge transfer stage including the transfer path forming unit 32T and a transfer path formation And (c) a read gate region 40 formed between the charge transfer stage including the transfer path forming unit 33T and the photoelectric conversion element 22. , By 1
One pixel is configured.

As described above, in the IT-CCD, in order to prevent unnecessary photoelectric conversion from being performed by each of the vertical transfer CCDs 30, the light covering the area from the photosensitive unit 10 to the output transfer path 70 in a plan view. A shielding film is formed.

As shown in FIGS. 6A and 6B, the light shielding film 50 has an opening 51 of a predetermined shape on each of the photoelectric conversion elements 22 on the photosensitive portion 10. One opening 51 for one photoelectric conversion element 22
Is formed. Each of the openings 51 is open inside the edge of the signal charge accumulation region (n-type region 3) of the photoelectric conversion element 22 in plan view in plan view. A portion of one photoelectric conversion element 22 that is exposed in a plan view from the opening 51 serves as a light receiving unit (hereinafter, this light receiving unit may be referred to as a “light receiving unit 51”) in each pixel. Function.

The light shielding film 50 is made of, for example, a metal thin film made of aluminum, chromium, tungsten, titanium, or molybdenum, an alloy thin film made of two or more of these metals, It is formed of a multilayer metal thin film or the like in combination with the above alloy.

Each of the openings (light receiving portions) 51 has a hexagonal shape which is line-symmetric in both the direction _DV and the direction _DH in plan view. The shape, size, and orientation of these openings (light receiving portions) 51 are substantially the same.

The opening (light receiving portion) 51 is connected to the photoelectric conversion element 2
2 is photoelectrically converted by the photoelectric conversion element 22 to become signal charges. This signal charge is read from the n-type region 3, which is the signal charge storage region of the photoelectric conversion element 22, to the vertical transfer CCD 30 via the read gate area 40 adjacent to the photoelectric conversion element 22. At this time,
A predetermined field shift pulse is applied to the transfer electrode 33 (readout gate electrode unit 33G).

The signal charges read out to the vertical transfer CCD 30 are sequentially transferred through the charge transfer stages in the vertical transfer CCD 30, and then output via the output transfer path 7 via the adjustment unit 60.
Reaches 0 (see FIG. 1).

FIG. 7 is a sectional view schematically showing an example of the output transfer path 70. The output transfer path 70 shown in FIG.
It consists of a two-phase driven CCD having a layer polysilicon electrode structure.
7, the same components as those shown in FIG. 6 are denoted by the same reference numerals as those used in FIG. 6, and the description thereof will be omitted.

The output transfer path (horizontal transfer CC) shown in FIG.
D) 70 is a single charge transfer channel 71 formed on the semiconductor substrate 1 and a plurality of transfer electrodes 7 formed on the semiconductor substrate 1 via the electrical insulating film (silicon oxide film) 5.
2, 73, an electric insulating film 74 formed on the transfer electrodes 72, 73, and a light shielding film 50 formed on the electric insulating film 74.

The charge transfer channel 71 includes an n ⁺ -type region 71a containing a high concentration of n-type impurities and a low concentration of n-type impurities at a predetermined portion of a p-type well 2 formed on one surface side of the semiconductor substrate 1. It is manufactured by alternately forming a predetermined number of n-type regions 71b. This charge transfer channel 71
Extends in the direction D _H.

Each of transfer electrodes 72 is made of a polysilicon layer. On the surface of these transfer electrodes 72, a silicon oxide film 75 is provided. Each transfer electrode 72 is formed on each of the n ⁺ -type regions 71a. Each of the transfer electrodes 73 is also formed of a polysilicon layer. These transfer electrodes 73 are formed on each of the n-type regions 71b.

Each transfer electrode 72, 73 is formed so as to cross the charge transfer channel 71. The edge of each transfer electrode 73 on the transfer electrode 72 side covers and covers the transfer electrode 72. That is, the transfer electrode 7
Reference numerals 2 and 73 have a so-called superposed transfer electrode structure.

[0111] one of the n ⁺ -type region 71a, the n ⁺ -type on the region 71a by the electrical insulating film (silicon oxide film) of one of 5 through the formed transfer electrodes 72, one potential well region Is configured. Similarly, one potential barrier region is formed by one of the n-type regions 71b and one transfer electrode 73 formed on the n-type region 71b via the electric insulating film (silicon oxide film) 5. Is done.

The transfer electrode 73 forming one potential barrier region and the transfer electrode 72 forming one potential well region formed immediately downstream of the potential barrier (meaning the output portion 80 side). , A voltage of a predetermined level is simultaneously applied to both of them to form one charge transfer stage.

In the output transfer path 70, two charge transfer stages are provided for one vertical transfer CCD 30. Therefore, in the output transfer path 70, one vertical transfer CCD 30 is connected to the charge transfer stage every other charge transfer stage in the output transfer path 70 via the adjustment unit 60.

The signal charges transferred from the vertical transfer CCD 30 via the adjustment section 60 are received by the output transfer path 70 in the potential well region of the output transfer path 70.

The electric insulating film 74 protects the transfer electrodes 72 and 73 and electrically insulates the light shielding film 50. The electrical insulating film 74 is formed of, for example, a silicon oxide film, a two-layer film of a silicon oxide film and a silicon nitride film, a three-layer film of a silicon oxide film, a silicon nitride film, and a silicon oxide film.

The light shielding film 50 is provided on the output transfer path 7 to prevent unnecessary photoelectric conversion in the output transfer path 70 and the like.
Prevents light from entering 0 or the like.

The signal charges sequentially transferred in the output transfer path 70 are transferred to the output section 80 (see FIG. 1).
The signal is converted into a signal voltage and amplified at the output unit 80. The amplified signal voltage is output to a predetermined circuit.

In the IT-CCD 100 described above, the channel width of the charge transfer channel 31a or 31b at a location adjacent to the read gate region 40 is smaller than the channel width at other locations (see FIG. 3). ). Therefore, the IT-CCD 100 has the following advantages.

That is, the width of the transfer path forming portion 33T in the transfer electrode 33 is adjusted to the width of the transfer path forming portion 3 in the transfer electrode 32.
Even if the transfer path is not wider than the width of 2T, the transfer path forming section 33T includes an area as a transfer path forming section for the vertical transfer CCD 30;
An area as the read gate electrode portion 33G can be secured. As a result, two adjacent transfer electrodes 3
The size of the above-mentioned photoelectric conversion element region defined every other row of each photoelectric conversion element row 20 by 2 and 33 can be easily increased. Accordingly, while maintaining the shape, size, and direction of the pixel opening (light receiving portion) 51 between two adjacent pixel rows, the area of the opening (light receiving portion) 51 is increased. It becomes easy to widen.

Therefore, in the IT-CCD 100, it is easy to prevent a difference in light-collection efficiency and sensitivity between adjacent two pixel rows even though the pixel is shifted. Can be prevented. Further, it is possible to easily increase the pixel density while suppressing a decrease in the area of each opening (light receiving unit) 51.

As described above, in each of the vertical transfer CCDs 30, a charge transfer stage in which the channel width of the charge transfer channel 31a or 31b is narrow and a charge transfer stage in which the channel width is not narrow alternately. Is formed. That is, two read gate regions 4 adjacent to each other along one charge transfer channel 31a or 31b.
Between the 0 and 40, there is one charge transfer stage whose channel width is not narrow.

For this reason, the disadvantage caused by reducing the channel width in the portion where the read gate region 40 is adjacent as shown in FIG. 3 can be kept small.
The charge transfer stage in which the channel width of the charge transfer channel 31a or 31b is narrow may store signal charges for one charge transfer stage for a short time and transfer the signal charges to the next charge transfer stage. The channel width in this charge transfer stage is preferably approximately 50% to 95%, more preferably approximately 60% to 80% of the channel width in a portion where the readout gate region 40 is not adjacent.

In order to drive the IT-CCD 100 shown in FIG. 1, each transfer electrode 32, each transfer electrode 33, the transfer electrodes 61, 62, 63, and the output transfer path 70
A drive pulse supply means for supplying a predetermined drive pulse to the power supply is used.

An example of a method for driving the IT-CCD 100 will be described below. The following example is an example in which one frame is divided into a first field and a second field, that is, a total of two fields and interlaced driving is performed.

As shown in FIG. 8, the drive pulse supply means 105 for driving the IT-CCD 100 is, for example,
It comprises a synchronization signal generator 101, a timing generator 102, a vertical drive circuit 103 and a horizontal drive circuit 104.

The synchronization signal generator 101 generates various pulses necessary for signal processing, such as a vertical synchronization pulse and a horizontal synchronization pulse. The timing generator 102 includes a vertical transfer CCD 3
Timing for a four-phase vertical pulse signal required for driving 0, a field shift pulse required for reading signal charges from the photoelectric conversion element 22, a two-phase horizontal pulse signal required for driving the output transfer path 70, and the like. Make a signal.

The vertical drive circuit 103 generates a vertical pulse signal based on the above-mentioned timing signal, and via the pulse supply terminals 85a, 85b, 85c, 85d, the predetermined transfer electrodes 32, 33, 61, 62 or 63. The horizontal drive circuit 104 generates a horizontal pulse signal based on the above-mentioned timing signal, and
a and 88b to the output transfer path 70.

Hereinafter, the vertical pulse signal applied to the pulse supply terminal 85a is V _a , the vertical pulse signal applied to the pulse supply terminal 85b is V _b , and the pulse supply terminal 85
V _c the vertical pulse signal applied to c, and a vertical pulse signal applied to the pulse supply terminals 85d is denoted by V _d. Further, the horizontal pulse signal applied to the pulse supply terminal 88a is denoted by H _a, the horizontal pulse signal applied to the pulse supply terminal 88b is denoted as H _b. The H _a phase and H _b of phase, are shifted π from each other.

At an appropriate time during the first vertical blanking period defined by the blanking pulse, a low-level vertical pulse V _L is applied to the pulse supply terminals 85a and 85b, and a high-level vertical pulse V _L is applied. _H is applied to the pulse supply terminals 85c and 85d. Then, these vertical pulse V _L, when the V _H is applied, field shift pulse V _R high level is applied to the pulse supply terminals 85c further. The application of the field shift pulse V _R, are read to the vertical transfer CCD30 the signal charges accumulated in the photoelectric conversion elements 22 of the 1, 2, 5, 6 pixel rows correspond respectively (signal charge readout process).

Here, the “pixel row” means a group of pixels arranged in series in the row direction described above, and the first pixel row, the second pixel row,. ... It is referred to as an n-th pixel row (n is a positive integer) (the same applies to other embodiments). One pixel row includes one photoelectric conversion element row 21 (see FIG. 1). IT-CCD10
0 has a total of eight pixel rows, a first pixel row to an eighth pixel row.

[0131] The after field shift pulse V _R is applied, vertical pulse signal V _a of the predetermined waveform, V _b, V _c,
V _d is the pulse supply terminals 85a, 85b, 85c, 85
d. Thereby, the vertical transfer CCD3
The signal charges read to 0 are sequentially transferred to the output transfer path 70.

The signal charges read from each of the photoelectric conversion elements 22 in the first and second pixel rows are supplied to the output transfer path 70 during the first horizontal blanking period following the vertical blanking period.
Is forwarded to These signal charges are sequentially output from the output unit 80 in a first effective signal period following the first horizontal blanking period. At this time, the image signal output of the second pixel row and the image signal output of the first pixel row are output alternately in pixel units (image signal output step).

The signal charges read from each of the photoelectric conversion elements 22 in the fifth and sixth pixel rows are transferred to the output transfer path 70 in the second horizontal blanking period following the first valid signal period. These signal charges are sequentially output from the output unit 80 in a second effective signal period following the second horizontal blanking period. At this time, the image signal output of the sixth pixel row is
The image signal output of the pixel row is output alternately in pixel units (image signal output step).

At the appropriate time of the second vertical blanking period defined by the blanking pulse after the end of the second valid signal period, a high-level vertical pulse _VH is applied to the pulse supply terminals 85a and 85b. At the same time, the low level vertical pulse _VL is supplied to the pulse supply terminals 85c and 85c.
5d. Then, these vertical pulses V _H ,
When V _L is applied, field shift pulse V _R is applied to the pulse supply terminal 85a. The application of the field shift pulse V _R, the 3,4,7,
The signal charges stored in each of the photoelectric conversion elements 22 in the eight pixel rows are read out to the corresponding vertical transfer CCD 30 (a signal charge reading step).

The signal charge read from each of the photoelectric conversion elements 22 in the third and fourth pixel rows is supplied to the output transfer path 70 in the third horizontal blanking period following the second vertical blanking period.
Is forwarded to These signal charges are sequentially output from the output unit 80 in a third effective signal period following the third horizontal blanking period. At this time, the image signal output of the fourth pixel row and the image signal output of the third pixel row are output alternately in pixel units (image signal output step).

The signal charges read from each of the photoelectric conversion elements 22 in the seventh and eighth pixel rows are transferred to the output transfer path 70 in the fourth horizontal blanking period following the third effective signal period. These signal charges are sequentially output from the output unit 80 in a fourth effective signal period following the fourth horizontal blanking period. At this time, the image signal output of the eighth pixel row is
The image signal output of the pixel row is output alternately in pixel units (image signal output step).

By repeating the above operations (steps) performed from the first vertical blanking period to the fourth effective signal period, the interlaced image output signal, that is, the image output signal of each field, is obtained. Output unit 8
It is output one after another from 0.

By providing a color filter array on the IT-CCD 100, an IT-CCD for color imaging can be obtained. In a camera that requires a color image signal for each field, color signal processing is performed for each field image output signal output from the output unit 80 to obtain a color image signal for each field.

In a camera that requires a frame color image signal, two consecutive field image output signals are temporarily stored in a frame memory, and then color signal processing is performed for each frame of image output signal. Obtain the color image signal of the frame. In this case, it is preferable to use a mechanical shutter in order to prevent the exposure time from shifting for each field. After the first vertical blanking period ends, until the second vertical blanking period starts, the mechanical shutter is closed so that an optical image does not enter each pixel. Thereby, a field image output signal at the same time is obtained for each of the first field and the second field. The same applies to a camera requiring a monochrome image signal of a frame.
In a camera that requires only one frame image, the mechanical shutter is closed after the first vertical blanking period ends. This can suppress occurrence of smear in the image of the second field.

The IT-CCD of the first embodiment described above
100 is an IT-C which has a simple structure as an IT-CCD
It is a CD. In an actual IT-CCD, usually, a microlens is provided in order to increase the photoelectric conversion efficiency of the photoelectric conversion element 22. IT-CCD for color imaging
, A color filter array is provided.

In providing the above-described microlens, first, a flattening film is formed on the photosensitive section 10. This flattening film is also used as a focus adjusting layer. In the IT-CCD for monochrome imaging, a microlens array including a predetermined number of microlenses is arranged on the surface of the flattening film. On the other hand, IT-CC for color imaging
In D, a color filter array is formed on the flattening film. Therefore, the microlens array is formed on the surface of the second flattening film after further providing the second flattening film on the color filter array. In each of the IT-CCDs for monochrome imaging and color imaging, individual microlenses are separately formed so as to cover the light receiving portions of the pixels in plan view.

FIGS. 9A and 9B are partial cross-sectional views of the IT-CCD 110 according to the second embodiment. These figures show a part of the cross section of the photosensitive section of the IT-CCD 110. I have. The IT-CCD 110 is obtained by adding a color filter array and a microlens array to the IT-CCD 100 of the first embodiment. That is, IT
-The CCD 110 is an IT-CCD for color imaging.

It should be noted that, of the components shown in FIG. 9A or FIG. 9B, those common to the components shown in FIG. 6A or FIG. The same reference numerals as those used in FIG. 6A or FIG. 6B are assigned, and the description thereof is omitted.

In the IT-CCD 110, the first flattening film 9 is formed so as to cover the light shielding film 50 formed on the photosensitive portion and the light receiving portion 51 of each pixel.
0 is formed. A color filter array 91 is provided on the surface of the first flattening film 90. Further, a second flattening film 92 is formed on the color filter array 91.
A microlens array including a predetermined number of microlenses 93 is formed on the surface of the second flattening film 92.

The first flattening film 90 is formed by applying a transparent resin such as a photoresist to a desired thickness by a spin coating method, for example.

The color filter array 91 includes, for example, a red filter 91 R, a green filter 91 G, and a blue filter 9.
1B is formed in a predetermined pattern. The color filter array 91 can be manufactured, for example, by forming a resin (color resin) layer in which a pigment or dye of a desired color is dispersed at a predetermined position by a method such as a photolithography method.

As described in the description of the IT-CCD 100 of the first embodiment, each transfer electrode 32, 33 is formed in a honeycomb shape. Each of the photoelectric conversion elements 22 is located in a plan view in a photoelectric conversion element region defined by every two adjacent photoelectric conversion element rows by two adjacent transfer electrodes 32 and 33. For this reason, in the color filter array 91, the red filter 91R and the green filter 9
1G and a blue filter 91B are arranged in a turtle shell shape.

The arrangement pattern of each color filter in the color filter array 91 is selected as follows. That is, the IT-C provided with the color filter array 91
It is selected so that full-color information can be obtained by an additive color method or a subtractive color method using signal charges stored in each photoelectric conversion element of a predetermined two pixel rows in a CD, for example, two adjacent pixel rows.

FIG. 10 is a plan view partially showing an example of the color filter array 91. As shown in FIG. In the color filter array 91 shown in the figure, a color filter array consisting of only a green filter 91G, a blue filter 91B and a red filter 9
The color filter rows in which 1R and 1R are alternately arranged are formed alternately.

Each color filter 91R, 91G, 91B is
It is formed so as to cover the light receiving portion 51 of each pixel in plan view. The broken lines in FIG. 10 indicate two adjacent transfer electrodes 3.
2 and 33 show the outlines of photoelectric conversion element regions defined every other photoelectric conversion element row. Note that alphabets R, G, and B in each color filter shown in FIG.
Each represents the color of the color filter.

[0154] The second signal shown in FIGS. 9A and 9B is used.
The flattening film 92 is formed by applying a transparent resin such as a photoresist to a desired thickness by a spin coating method, for example.

Each of the micro lenses 93 shown in FIGS. 9A and 9B is formed so as to cover the light receiving portion 51 of one pixel in plan view. These micro lenses 93 have, for example, a refractive index of approximately 1.3 to 2.0.
After a layer made of a transparent resin (including a photoresist) is divided in a turtle-shape by a photolithography method or the like, the transparent resin layer in each section is melted by heat treatment, and the corners are rounded off by surface tension and then cooled. Obtained by:

In the IT-CCD 110 having the above-described color filter array 91 and microlens array, the light shielding film 50 in the output transfer path 70 shown in FIG.
A first planarization film 90 is formed thereon, and a second planarization film 92 is formed on the first planarization film 90.

FIG. 11 is a partial sectional view schematically showing an output transfer path 70a in the IT-CCD 110. FIG.
Among the components shown in FIG. 1, components common to the components shown in FIG. 7 or FIG. 9 are denoted by the same reference numerals as those used in FIG. 7 or FIG. 9, and description thereof is omitted.

The first flattening film 90 shown in FIG. 15 is formed together with the formation of the above-mentioned first flattening film 90 (see FIG. 9) above the photosensitive section 10. . The second flattening film 92 shown in FIG. 9 is formed together with the formation of the second flattening film 92 (see FIG. 9) on the color filter array 91 described above.

In the IT-CCD 110 having the color filter array 91 shown in FIG. 10, a green filter 91G is provided above each one of the photoelectric conversion elements 22 of two adjacent pixel rows. In the other pixel row, the blue filter 9 is provided above each photoelectric conversion element 22.
1B or a red filter 91R is provided. In the other pixel rows, the blue filters 91B and the red filters 91R are provided alternately in this order or in the reverse order.

The full-color information includes the signal charge from each photoelectric conversion element 22 in the pixel row in which only the green filter 91G is provided, the blue filter 91B and the red filter 91R.
And each photoelectric conversion element 22 of the pixel row in which
Is generated based on the signal charges from

If there is a difference in the light collection efficiency and sensitivity between two adjacent pixel rows, the pixel row in which only the green filter 91G is provided and the blue filter 91B and the red filter 91R alternate. Also in comparison with the pixel rows provided in the above, differences occur in the light collection efficiency and sensitivity of the pixels between these pixel rows. As a result, the difference between the ratio of the red signal output to the green signal output and the ratio of the blue signal output to the green signal output obtained based on the signal charges accumulated in each of the photoelectric conversion elements 22 in these pixel rows. Occurs. This means that I
This means that the color balance of the output signal from the T-CCD 110 is lost. When the color balance of the output signal is lost, color shading occurs in the reproduced image.

However, in the IT-CCD 110,
The photosensitive section is the same as that of the IT-CCD 100 of the first embodiment.
This is the same as the photosensitive section 10. As mentioned above, IT-C
Each light receiving section 51 formed on the photosensitive section 10 of the CD 100
Is the direction D in plan view. _VAnd said direction D_Hof
Each of them exhibits a line-symmetric hexagon. And this
The shape, size and orientation of these light receiving sections 51 are substantially
Is the same as

For this reason, in the IT-CCD 110, there is little difference in the light-collecting efficiency and sensitivity of pixels between two adjacent pixel rows, even though the pixels are shifted. As a result, color shading hardly occurs.
Further, it is easy to increase the pixel density while suppressing a decrease in the area of the light receiving unit 51 in each pixel.

Next, the IT-system according to the third embodiment of the present invention will be described.
The CCD will be described with reference to FIG. FIG.
FIG. 11 is a plan view schematically showing an IT-CCD 120 according to a third embodiment.

The IT-CCD 120 shown in FIG.
The shape of the light receiving portion in each pixel, (ii) each transfer electrode 3
2. The number of pulse supply terminals for supplying a predetermined drive pulse to each of the transfer electrodes 33 and the transfer electrodes 61, 62, 63; and (iii) the pulse supply terminal and the transfer electrodes 32, 33, 61 , 62 or 63,
Except for the above, it has the same structure as the IT-CCD 100 described above. 12 that are the same as the components shown in FIG. 1 are assigned the same reference numerals as those used in FIG. 1 and the description thereof is omitted.

As shown in FIG. 12, the IT-CCD 12
In 0, the shape of the light receiving portion 51a of the pixel, the longer diagonal in the substantially parallel to the direction D _V of, a short diagonal line of a said direction D _H substantially parallel rhombus I have.

In order to supply a predetermined drive pulse to each of the transfer electrodes 32, each of the transfer electrodes 33 and the transfer electrodes 61, 62 and 63, six pulse supply terminals 85a ₁ and 85a are provided.
a _2, 85b, is 85c _1, 85c _2, 85d are provided.

The pulse supply terminals 85a ₁ and 85a ₂
The pulse supply terminal 85a shown in FIG. 1 is divided into two. Also, the pulse supply terminals 85c ₁ , 85c ₂
Is obtained by dividing the pulse supply terminal 85c shown in FIG. 1 into two.

These pulse supply terminals 85a ₁ , 85a
a ₂ , 85b, 85c ₁ , 85c ₂ , 85d are electrically connected to predetermined transfer electrodes 32, 33, 61, 62, or 63, respectively.

Also in the IT-CCD 120 shown in FIG. 12, the channel width of the charge transfer channel 31a or 31b at the place where the readout gate region 40 is adjacent is smaller than the channel width at other places. For this reason, for the same reason as in the IT-CCD 100 of the first embodiment, two adjacent
It is easy to increase the area of the light receiving unit 51a while maintaining the same shape, size, and orientation of the light receiving unit 51a of the pixel between two pixel rows.

As a result, in the IT-CCD 120, it is easy to cause a difference in light-collecting efficiency and sensitivity between two adjacent pixel rows even though the pixel is shifted. Can be prevented. Further, it is possible to easily increase the pixel density while suppressing a decrease in the area of each light receiving unit 51a.

By providing a color filter array on the IT-CCD 120, an IT-CCD for color imaging can be obtained. The color filter array can be formed, for example, according to the procedure for forming the color filter array when the IT-CCD 110 of the second embodiment is obtained.

The IT-CCD 120 is connected to an IT for color imaging.
-When the CCD is used, the IT-CCD of the second embodiment is used.
For the same reason as at 110, color shading is less likely to occur.

The IT-CCD 120 uses the above-mentioned IT-CCD.
-Interlaced drive in the same way as CCD100
Can be At this time, the vertical pulse signal V_aBut pal
Terminal 85a₁And pulse supply terminal 85a_TwoAnd to
Applied vertical pulse signal V _bIs the pulse supply terminal 85
b. Also, the vertical pulse signal V_cIs a pulse
Supply terminal 85c₁And pulse supply terminal 85c_TwoApplied to
And the vertical pulse signal V_dTo the pulse supply terminal 85d
Applied. Then, the horizontal pulse signal H_aIs pulsed
The horizontal pulse signal H applied to the_bIs a pulse
The voltage is applied to the supply terminal 88b.

Thus, one frame includes two fields, that is, a first field including first, second, fifth, and sixth pixel rows, and third, fourth, seventh, and eighth pixel rows. It is divided into a second field. The image signal output of each field can be obtained by the same operation as in the first embodiment. Then, by performing the operation from the first field to the second feed, an image output signal of one frame can be obtained.

The IT-CCD 120 has a signal charge
Thinning out the number of read pixel rows to 1/4 of the total number of pixel rows
It can be driven while. In this thinning drive
Is the first vertical defined by the blanking pulse
At an appropriate time during the blanking period, for example,
Vertical pulse V_LIs the pulse supply terminal 85a₁, 85
a _Two, 85b and a high level vertical pulse
SUV_HIs the pulse supply terminal 85c₁, 85c_Two, 85d
Is applied to Then, these vertical pulses V_L, V_H
Is applied, the field shift pulse V_R
Is the pulse supply terminal 85c_TwoIs applied to The fee
Field shift pulse V_RIs applied to the first and second pixel rows.
The signal charge stored in each photoelectric conversion element 22 is
And read out to the corresponding vertical transfer CCD 30 (signal signal
Load reading step).

[0174] field shift pulse V _R is, 85c ₁
Can also be applied. In this case, the signal charges stored in the photoelectric conversion elements 22 in the fifth and sixth pixel rows are read out to the corresponding vertical transfer CCDs 30.

Further, each photoelectric conversion element 2 in the third and fourth pixel rows
2 can be read out to the corresponding vertical transfer CCD 30. For this purpose, a high-level vertical pulse V _H is supplied to the pulse supply terminals 85a ₁ , 8a at appropriate times during the first vertical blanking period.
5a ₂ , 85b and a low level vertical pulse _VL is applied to the pulse supply terminals 85c ₁ , 85c ₂ , 85d.
Is applied. Then, these vertical pulse V _H, when the V _L is applied, applying a field shift pulse V _R to the pulse supply terminal 85a _2.

Further, the signal charges stored in the photoelectric conversion elements 22 in the seventh and eighth pixel rows can be read out to the corresponding vertical transfer CCDs 30. For this purpose, a high-level vertical pulse V _H is supplied to the pulse supply terminals 85a ₁ , 85a at appropriate times during the first vertical blanking period.
85a ₂ , 85b and a low-level vertical pulse _VL is applied to the pulse supply terminals 85c ₁ , 85c ₂ , 85
d. Then, these vertical pulses V _H , V _L
Is applied, the field shift pulse V _R
And it applies to the pulse supply terminals 85a _1.

Hereinafter, the read signal charges are processed in the same manner as the processing of the signal charges in the normal interlace driving, thereby reducing the field image signal to 1/4 or to 1/4. A frame image signal can be obtained.

The above-mentioned thinning-out is not for the purpose of reading out the signal charges of all the pixels but for the purpose of always obtaining an image signal thinned out to 1/4 of the number of rows (the number of pixel rows). is there. Since the illustrated IT-CCD 120 has only eight pixel rows, the operation of thinning out to 1/4 is completed by one horizontal read. However, the actual number of pixel rows is
For example, there are 600 lines or more.

The photosensitive section 10 shown in FIG.
_{When the} above-described thinning operation is performed on the IT-CCD having a structure connected to n stages of _V to obtain a frame image signal thinned to 1/4, the above thinning operation is performed from the first stage to the n-th stage. Do. At this time, the reading of the signal charge from each photoelectric conversion element 22 of the desired pixel row to the vertical transfer CCD 30 is performed simultaneously in each stage. Each of the signal charges read from each stage is sequentially transferred to the output transfer path 70 by each of the vertical transfer CCDs 30, and the output transfer path 70
And is sequentially output from the output unit 80.

For example, in order to optimally set exposure conditions (shutter time and aperture), adjust focus, and display a monitor image in a digital still camera, an image output signal must be obtained at a high frame frequency of about 30 frames / second. is necessary.

On the other hand, when a high-resolution digital still camera is to be obtained, an IT-CCD for the digital still camera having an I-CCD having more than one million pixels is required.
It is desirable to use a T-CCD.

However, the number of pixels of the IT-CCD is 1
If it exceeds one million, it takes a very long time, for example, several frames / second to obtain one frame of image signal output. As a result, optimal setting of exposure conditions, focus adjustment, display of a monitor image, and the like cannot be performed.

Therefore, in order to obtain a high-resolution digital still camera, an IT-CCD that can perform operations other than reading a still image recorded when a shutter is pressed at a high frame frequency is used. It is desirable.

As described above, the IT-CCD 120 can perform normal interlace driving and driving while thinning out pixel rows to 1/4. The frame frequency at the time of thinning driving is four times the frame frequency at the time of normal interlace driving. Therefore, the IT-
The CCD 120 is an IT-CCD having a structure suitable for obtaining an image signal with a high frame frequency.

In a camera that requires a color image signal for each field, color signal processing is performed for each field image output signal output from the output unit 80 to obtain a color image signal for each field.

In a camera that requires a frame color image signal, two consecutive field image output signals are temporarily stored in a frame memory, and then color signal processing is performed for each frame of image output signal. The color image signal of each frame is obtained. In this case, it is preferable to use a mechanical shutter in order to prevent the exposure time from shifting for each field. After the vertical blanking period for the first field ends, the mechanical shutter is closed so that the optical image does not enter each pixel until the vertical blanking period for the second field starts. Thus, a field image output signal at the same time is obtained for each of the first field and the second field. The same applies to a camera requiring a monochrome image signal of a frame. In a camera requiring only one frame image, the mechanical shutter is closed after the vertical blanking period for the first field ends. This can suppress occurrence of smear in the image of the second field.

Next, the IT-system according to the fourth embodiment of the present invention will be described.
The CCD will be described with reference to FIG. FIG.
FIG. 11 is a plan view schematically showing an IT-CCD 130 according to a fourth embodiment.

The IT-CCD 130 shown in FIG.
Each transfer electrode 32, each transfer electrode 33 and transfer electrode 61,
The number of pulse supply terminals for supplying a predetermined drive pulse to 62 and 63, and (ii) the specification of the connection between the pulse supply terminal and the transfer electrode 32, 33, 61, 62 or 63. Except for this, it has the same structure as the IT-CCD 120 described above. Note that among the components illustrated in FIG. 13, components that are common to the components illustrated in FIG. 12 are given the same reference numerals as those used in FIG. 12, and descriptions thereof will be omitted.

[0189] As shown in FIG.
In order to supply a predetermined drive pulse to each of the transfer electrodes 32, each of the transfer electrodes 33, and the transfer electrodes 61, 62, and 63, 0 denotes eight pulse supply terminals 86a, 86b, 86c,
86d, 86e, 86f, 86g, and 86h.

These pulse supply terminals 86a, 86
b, 86c, 86d, 86e, 86f, 86g, 86h
Are electrically connected to predetermined transfer electrodes 32, 33, 61, 62 or 63, respectively.

In the IT-CCD 130 shown in FIG.
For the same reason as in the IT-CCD 120 of the third embodiment, the shape, size, and orientation of the light receiving portion 51a of the pixel are kept the same between two adjacent pixel rows while the light receiving portion 51a It is easy to increase the area. As a result, in the IT-CCD 130, it is possible to easily prevent a difference in light-collecting efficiency and sensitivity between two adjacent pixel rows even though the pixel is shifted and arranged. can do. Further, it is possible to easily increase the pixel density while suppressing a decrease in the area of each light receiving unit 51a.

The IT-CCD 130 is connected to an IT for color imaging.
-When the CCD is used, the IT-CCD of the third embodiment is used.
For the same reason as at 120, color shading is less likely to occur.

When the IT-CCD 130 is driven by interlacing, the pulse supply terminals 86a, 86b, 8
A predetermined vertical pulse signal is applied to each of 6c, 86d, 86e, 86f, 86g, and 86h. Horizontal pulse signal H _a is applied to the pulse supply terminal 88a, the horizontal pulse signal H _b applied to the pulse supply terminal 88b.

Thus, one frame is divided into four fields, that is, the first frame including the first pixel row and the second pixel row.
A field, a second field consisting of a third pixel row and a fourth pixel row, a third field consisting of a fifth pixel row and a sixth pixel row, and a fourth field consisting of a seventh pixel row and an eighth pixel row. Field, can be divided into

The image signal output of each field is the same as the operation for obtaining an image signal output of one field when one frame is divided into two fields and driven by interlacing (see the first embodiment). Can be obtained. Then, by performing the operation from the first field to the fourth feed, an image output signal of one frame can be obtained.

If the image signal output is always obtained only for the same field, a 1/4 thinning operation is possible. The photosensitive unit 10 shown in FIG.
_{When the} above-described thinning operation is performed on an IT-CCD having a structure of n stages connected in the _V (column direction) to obtain a frame image signal thinned to 1/4, the above thinning operation is performed from the first stage. Perform up to the n-th stage. At this time, the reading of the signal charge from each photoelectric conversion element 22 of the desired pixel row to the vertical transfer CCD 30 is performed simultaneously in each stage. Each of the signal charges read from each stage is sequentially transferred to the output transfer path 70 by each of the vertical transfer CCDs 30, transferred in the output transfer path 70, and sequentially output from the output unit 80.

In the IT-CCD 130, each vertical transfer CCD 30 can be driven in eight phases. In an eight-phase drive type CCD, one potential well is formed over six to seven consecutive charge transfer stages, and the signal charges stored therein can be transferred. on the other hand,
In a four-phase drive type CCD, it is possible to form one potential well over two or three consecutive charge transfer stages and transfer the signal charges stored therein.

Therefore, when the design patterns of the transfer electrodes 32 and 33 are the same, the eight-phase drive type vertical transfer C
The CD can transfer about 2-3 times the signal charge of the four-phase drive type vertical transfer CCD.

As a result, in the IT-CCD 130, the channel width of the charge transfer channel for each vertical transfer CCD 30 is reduced, and the photoelectric conversion element 2 is accordingly reduced.
2 and the area of each of the light receiving portions 51a of the pixels can be increased. Accompanying this, it is possible to increase the sensitivity and the saturation output and to expand the dynamic range, respectively.

By providing a color filter array in the IT-CCD 130, an IT-CCD for color imaging can be obtained. The color filter array can be formed, for example, according to the procedure for forming the color filter array when the IT-CCD 110 of the second embodiment is obtained.

In a camera that requires a color image signal for each field, color signal processing is performed for each field image output signal output from the output unit 80 to obtain a color image signal for each field.

In a camera requiring a color image signal of a frame, four consecutive field image output signals are temporarily stored in a frame memory, and then color signal processing is performed for each frame of image output signal. The color image signal of each frame is obtained. In this case, it is preferable to use a mechanical shutter in order to prevent the exposure time from shifting for each field. After the vertical blanking period for the first field ends, the mechanical shutter is closed so that the optical image does not enter each pixel until the vertical blanking period for the fourth field starts. As a result, a field image output signal at the same time is obtained for each of the first to fourth fields. The same applies to a camera requiring a monochrome image signal of a frame. In a camera requiring only one frame image, the mechanical shutter is closed after the vertical blanking period for the first field ends. Thereby, it is possible to suppress the occurrence of smear in the image of each of the second to fourth fields.

Next, according to the fifth embodiment of the present invention,
The CCD will be described with reference to FIG. FIG.
It is a partial sectional view showing roughly an example of output transfer way 70b in IT-CCD140 by a 5th example of the present invention.

The IT-CCD 140 has the same configuration as that of the IT-CCD 100 of the first embodiment except that the output transfer path 70 is changed to the illustrated output transfer path 70b.
It has the same structure as D100. 14 that are functionally the same as those of the output transfer path 70a shown in FIG. 11 are denoted by the same reference numerals as those used in FIG. 11, and description thereof will be omitted.

The output transfer path 70b is a three-layer polysilicon
It consists of a two-phase driven CCD with a pole structure. The output transfer path 7
0b is the output transfer of the IT-CCD 110 shown in FIG.
Like the path 70a, it has a charge transfer channel 71.
You. The charge transfer channel 71 corresponds to one surface of the semiconductor substrate 1.
A predetermined portion of the p-type well 2 formed on the surface side has an n-type impurity
Containing a high concentration of substances⁺Type region 71a and low concentration of n-type impurity
And the n-type region 71b included in the direction D_HAlong
It is produced by forming a predetermined number of them. n ⁺Type
The width of the region 71a is wider than the width of the n-type region 71b. Charge transfer
Channel 71 is in the direction D_HExtends to.

The output transfer path 70b has three types of transfer electrodes 72, 73 and 77 each made of a polysilicon layer. Each of the transfer electrodes 72 is formed on each of the n ⁺ -type regions 71a. Transfer electrode 73
And each of the transfer electrodes 77 are alternately formed on each of the n-type regions 71b.

These transfer electrodes 72, 73 and 77 are formed so as to cross the charge transfer channel 71. The edge of the transfer electrode 73 on the transfer electrode 72 side covers the transfer electrode 72. The edge of the transfer electrode 77 on the transfer electrode 73 side covers the transfer electrode 73. That is, the transfer electrodes 72, 73, and 77 have a so-called superposed transfer electrode structure.

One potential well region is formed by one of n ⁺ -type regions 71a and one transfer electrode 72 formed on n ⁺ -type region 71a. Similarly, one potential barrier region is formed by one of the n-type regions 71b and one transfer electrode 73 or one transfer electrode 77 formed on the n-type region 71b.

[0209] The transfer electrode 73 or 77 constituting one potential barrier region and one potential well region formed immediately downstream of the potential barrier (on the output portion 80 side; the same applies hereinafter) are used. A single charge transfer stage is formed by simultaneously applying a predetermined level of voltage to both the constituent transfer electrodes 72.

An electric insulating film is formed on each of the transfer electrodes 72, 73, 77. In FIG. 14, the electric insulating film is shown as one electric insulating film 74a for easy understanding of the drawing.

The number of pulse supply terminals used to supply a predetermined drive pulse to the output transfer path 70b is shown in FIG.
2 is the same as the output transfer path 70 shown in FIG. Transfer electrode 7
2 and the transfer electrode 73 or 77 formed immediately downstream of the transfer electrode 72 are electrically connected to the same pulse supply terminal. The two transfer electrodes 72 adjacent to each other via the transfer electrode 73 or the transfer electrode 77 are electrically connected to different pulse supply terminals.

Two-phase drive type C having a three-layer polysilicon electrode structure
The output transfer path made of a CD has an advantage that the design rule is relatively strict compared to the output transfer path made of a two-phase driven CCD having a two-layer polysilicon electrode structure.
For example, a two-phase driven CCD having a two-layer polysilicon electrode structure
In this case, the gap between the transfer electrodes 73 needs to be equal to or smaller than the gap between the transfer electrodes 72. The formation of such a transfer electrode 73 is strict according to design rules.

On the other hand, in the two-phase drive type CCD 70b having the three-layer polysilicon electrode structure shown in FIG.

Therefore, when obtaining an IT-CCD with a fine pixel pitch (pitch P ₂ of photoelectric conversion elements) in the row direction of the photoelectric conversion elements (the direction D _H ), two-phase driving of a three-layer polysilicon electrode structure is required. When an output transfer path composed of a type CCD is used, a target IT-CCD can be easily obtained. When forming electrodes using materials other than polysilicon,
The same is true.

The IT-CC of the present invention has been described with reference to the examples.
Although D has been described, the present invention is not limited to the embodiments described above. It will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.

For example, the IT-CCD of each embodiment has a structure in which a photoelectric conversion element (photodiode), a vertical transfer CCD, an output transfer path, and the like are formed on an n-type semiconductor substrate having a p-type well. An IT-CCD can be obtained even if a photoelectric conversion element (photodiode), a vertical transfer CCD, an output transfer, and the like are formed on a mold semiconductor substrate. A desired semiconductor layer is formed on the surface of a sapphire substrate or the like, and a photoelectric conversion element (photodiode), a vertical transfer C
An IT-CCD can also be obtained by forming a CD, an output transfer path, and the like. In this specification, a photoelectric conversion element (photodiode),
A device provided with a semiconductor layer for forming a vertical transfer CCD, an output transfer path, and the like is also included in the “semiconductor substrate”.

The shape of the photoelectric conversion element in a plan view is a rectangle (including a rhombus), a polygon having a pentagon or more in which all interior angles are obtuse angles, or a polygon having a pentagon or more in which interior angles include acute angles and obtuse angles. A square shape, a shape in which these corners are rounded, and the like can be appropriately selected.

The shape of each section in the charge transfer channel of the vertical transfer CCD in plan view may be a curved line or a straight line, in addition to a straight line. .

The shape of each transfer electrode constituting the vertical transfer CCD is, as exemplified in the embodiment, the direction D _H.
The two transfer path forming parts oblique to the direction D _H
(Hereinafter, this shape is referred to as “shape A”). Further, the shape of each transfer electrode is inclined 2 with respect to the direction _DH .
It is also possible to adopt a shape in which the two transfer path forming portions are directly connected without going through the connection portion (hereinafter, this shape is referred to as “shape B”). When the shape of each transfer electrode is set to the shape A, the connection portion and the transfer path forming portion are connected so as to form an obtuse angle with each other, or the connection portion and the transfer path formation portion are connected so as to be smoothly connected. It is preferable to select the shape of the transfer electrode.

In the vertical transfer CCD, two adjacent transfer electrodes may be made of different materials. The individual transfer electrodes
In addition to polysilicon, it can be formed of a metal such as aluminum, tungsten or molybdenum, or an alloy of two or more of these metals.

In a region where two adjacent transfer electrodes are adjacent to each other, the connection portions between the two transfer electrodes may completely overlap as shown in FIG. 6A, Only the edge in the width direction of the connection part of one transfer electrode may overlap the connection part of the other transfer electrode.
Furthermore, the connection portions of two adjacent transfer electrodes may be adjacent to each other without overlapping.

The shape in plan view of a photoelectric conversion element region in which two adjacent transfer electrodes define every other photoelectric conversion element row (two adjacent transfer electrodes form one photoelectric conversion element in a plane). The outline of the inner edge of the portion that is visually surrounded) is a rectangle (including a rhombus), a pentagon or more polygon in which all interior angles are obtuse, and a pentagon or more polygon in which the interior angles include acute and obtuse angles. The shape of these corners may be appropriately selected.

Similarly, the shape of the light receiving portion in each pixel is rectangular (including rhombus), polygonal not less than pentagon in which all interior angles are obtuse, and pentagon or more in which interior angles include acute and obtuse angles. , Or a shape in which these corners are rounded can be selected as appropriate. In order to prevent a difference in light-collecting efficiency or sensitivity between two adjacent pixel rows from occurring, the shape of the light receiving section in each pixel is changed in the direction _DV and the direction Dv. It is preferable that any of _H has a line-symmetric shape.

The read gate electrode portion does not necessarily cover the entire read gate region in plan view. The read gate region may protrude from the read gate electrode portion to, for example, the photoelectric conversion element side in plan view.

The driving method of the vertical transfer CCD is not limited to the driving method described in the embodiment, but can be appropriately changed according to the intended use of the IT-CCD.
Accordingly, the number of pulse supply terminals for supplying a predetermined drive pulse to each transfer electrode, and the specification of the connection between the pulse supply terminal and each transfer electrode are also the target I.
It can be changed as appropriate according to the driving method of the vertical transfer CCD in the T-CCD. The same applies to the output transfer path.

When a two-phase drive type CCD is used as the output transfer path, adjacent two transfer electrodes in the two-phase drive type CCD may be made of different materials. The transfer electrode can be formed of a metal such as aluminum, tungsten, or molybdenum, or an alloy of two or more of these metals, in addition to polysilicon.

The adjusting section is not an essential component. The vertical transfer CCD may be connected to the horizontal transfer CCD immediately after leaving the photosensitive section. Further, a CCD accumulating unit for one frame may be provided instead of the adjusting unit.

When one microlens is provided above each of the light receiving sections so as to cover the light receiving sections of each pixel in plan view, the shape of each microlens in plan view is rectangular, The shape may be appropriately selected from a rounded shape, a pentagon or more polygon in which all the internal angles are obtuse angles, a rounded shape at the corner of the polygon, a circle, an ellipse, and the like. The shape of the microlens in plan view can be appropriately selected according to the shape of the light receiving unit in each pixel. Further, a plurality of condenser lenses including at least one inner lens may be stacked on the light receiving portion of the pixel to form a microlens structure on the light receiving portion.

The above-mentioned ones in these microlenses
Direction D_VPitch in the direction D_VPhotoelectric conversion element
Pitch P₁May be the same as or slightly different
May be. Said direction D_VAbout Microlen
Of the pitch P ₁If different from individual
The micro lens is moved, for example, under the following perspective
You.

That is, in accordance with the change in the incident direction of the incident light beam in accordance with the change in the position in the light receiving section, the image formation position by the microlens can be obtained at a desired position in the light receiving section of the pixel, for example, a desired sensitivity or resolution. Is moved so as to be displaced to a position that is more advantageous in. In order to increase the sensitivity or resolution of the pixel, it is preferable that the photoelectric conversion region exists over as wide a region as possible around the imaging position of the microlens.

For the same reason, the pitch in the direction D _H in each of the microlenses is
May be the same as the pitch P ₂ of the photoelectric conversion elements in _H, may be slightly different.

When the relative positional relationship between the photoelectric conversion element and the microlens is substantially the same in all pixels, the position of the image point formed on the photoelectric conversion element by the microlens is As shown in FIG. 17, the difference between the central part of the photoelectric conversion element column and the upper or lower part in the column direction.
In order to prevent the position of the image point formed on the photoelectric conversion element from being shifted from a desired position by the microlens, it is preferable to shift the microlens, for example, as described in (1) to (3) below. (1) As schematically shown in FIG. 15A, the positions of the microlenses 93 at the upper part in the column direction and the lower part in the column direction in each of the photoelectric conversion element rows 20 are determined in the central part of the photoelectric conversion element row 20. As you move away from the center, shift to the center of the row. The arrow in the figure indicates the direction in which the micro lens 93 is shifted. (2) As schematically shown in FIG. 15B, the microlenses 9 at the row direction ends of the individual photoelectric conversion element rows 21.
The position of No. 3 is shifted toward the center of the photosensitive unit 10 along the direction _DH as the position becomes farther from the center of the photosensitive unit 10.
The arrow in the figure indicates the direction in which the micro lens 93 is shifted. (3) as shown schematically in FIG. 15 (c), the micro lens 93, the distance from the center of the photosensitive portion 10, along said direction D _H and the direction D _V of the photosensitive portion 10
To the center of The arrow in FIG.
Are shown.

By shifting the microlenses as described in (1) to (3) above, it is also possible to improve luminance shading.

When a color filter array is provided in the IT-CCD, the color filter array only needs to be constituted by a color filter that enables color imaging. As such a color filter array, there is a so-called complementary color type color filter array in addition to the three primary color (red, green, and blue) color filter arrays described in the embodiments.

The complementary color filter array is, for example,
(i) green (G), cyan (Cy) and yellow (Ye) color filters; (ii) cyan (Cy), yellow (Ye) and white or colorless (W) color filters; (iii) cyan (C)
y), magenta (Mg), yellow (Ye) and green (G) color filters, or (iv) cyan (Cy), yellow (Y
e), green (G) and white or colorless (W) color filters, and the like.

FIG. 16A is a plan view showing an example of the color filter array 91a of the complementary type shown in FIG.
6 (b) is a complementary color type color filter array 9 of the above (ii).
It is a top view showing an example of 1b. FIG. 16C shows the above (i)
FIG. 16D is a plan view showing an example of the complementary color filter array 91c of ii), and FIG. 16D is a plan view showing another example of the complementary color filter array 91c of (iii). FIG. 16E is a plan view showing an example of the color filter array 91d of the complementary color type of the above (iv).

In each of FIGS. 16 (a) to 16 (e), alphabets G, Cy, Ye, W,
Each hexagon surrounding Mg represents one color filter. Alphabet G, Cy, Ye, W, Mg in the figure
Represents the color of each color filter.

The arrangement pattern of the color filters in the color filter array of the three primary colors is not limited to the pattern shown in FIG. Similarly, the arrangement pattern of the color filters in the complementary color filter array is shown in FIG.
The present invention is not limited to the patterns shown in FIGS.

In the IT-CCD of each embodiment, a photoelectric conversion element (photodiode) 22 is formed on a p-type well 2 formed on an n-type semiconductor substrate 1. Therefore, these IT-CCDs can be provided with a vertical overflow drain structure. Accordingly, an electronic shutter can be additionally provided. IT- of each embodiment
In order to attach a vertical overflow drain structure to the CCD, a structure capable of applying a reverse bias to the p-type well 2 and the lower portion of the n-type semiconductor substrate 1 (region below the p-type well 2) is added. Further, a horizontal overflow drain structure may be additionally provided instead of the vertical overflow drain structure. By providing a vertical or horizontal overflow drain structure, blooming can be easily suppressed.

The driving method of the IT-CCD can be appropriately selected. Accordingly, the vertical transfer CCD (vertical transfer CC)
The configuration of the drive pulse supply means for supplying a predetermined drive pulse to each of the transfer electrode forming D and the output transfer section (the transfer electrode forming the output transfer section) can be appropriately selected.

[0241]

As described above, as described above, the IT-C of the present invention
In a CD, it is easy to prevent a difference in light-collecting efficiency and sensitivity between pixels between two adjacent pixel rows, and it is also possible to suppress a decrease in the area of a light receiving portion in each pixel while reducing a pixel density. Easy to improve.

Therefore, according to the present invention, it is easy to obtain an IT-CCD having a high reproduced image quality.

[Brief description of the drawings]

FIG. 1 is a plan view schematically showing an IT-CCD according to a first embodiment of the present invention.

FIG. 2 is an enlarged plan view showing a part of a photosensitive section in the IT-CCD shown in FIG.

FIG. 3 is a plan view schematically showing a charge transfer channel shown in FIG. 2;

FIG. 4 is a plan view schematically showing one of transfer electrodes 32 shown in FIG. 2;

FIG. 5 is a plan view schematically showing one transfer electrode 33 shown in FIG. 2;

6A is a schematic diagram of a cross section taken along line AA shown in FIG. 2, and FIG. 6B is a schematic diagram of a cross section taken along line BB shown in FIG.

FIG. 7 is a sectional view schematically showing an example of an output transfer path in the IT-CCD according to the first embodiment.

FIG. 8 is a diagram showing a relationship between a drive pulse supply unit used when the IT-CCD shown in FIG. 1 is interlaced and the IT-CCD.

9 (a) and 9 (b) show a second embodiment of the present invention.
FIG. 2 is a partial cross-sectional view schematically illustrating an IT-CCD according to an embodiment of the present invention.

FIG. 10 is a plan view illustrating an example of a color filter array.

FIG. 11 is a partial sectional view schematically showing an output transfer path in the IT-CCD according to the second embodiment.

FIG. 12 is a plan view schematically showing an IT-CCD according to a third embodiment of the present invention.

FIG. 13 is a plan view schematically showing an IT-CCD according to a fourth embodiment of the present invention.

FIG. 14 is a partial cross-sectional view schematically showing an output transfer path including a CCD having a three-layer polysilicon electrode structure in an IT-CCD according to a fifth embodiment of the present invention.

15 (a), 15 (b) and 15
(C) is a diagram for explaining a direction in which the microlens is shifted when the microlens is formed while being shifted.

16 (a), 16 (b), 16
FIGS. 16C, 16D and 16E are plan views each showing an example of a complementary color filter array.

FIG. 17 is a cross-sectional view for explaining the position of an image point formed on a photoelectric conversion element by a microlens.

[Description of code]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2 ... P type well, 10 ... Photosensitive part,
20: photoelectric conversion element column, 21: photoelectric conversion element row,
22: photoelectric conversion element (photodiode), 30: vertical transfer CCD, 31a, 31b: charge transfer channel,
32, 33: transfer electrode, 32T, 33T: transfer path forming portion, 32C, 33C: connection portion, 33G: read gate electrode portion, 40: read gate region, 50: light shielding film, 51: opening portion (pixel light receiving) Part), 60 ... adjustment part, 70, 70a, 70b ... output transfer path (horizontal transfer CCD), 71 ... charge transfer channel, 72, 73,
77 ... Transfer electrode, 91, 91a, 91b, 91c, 9
1d: color filter array, 91R, 91G, 91B ...
Color filter, 93 ... micro lens, 100, 11
0, 120, 130, 140 ... IT-CCD, 105
... Drive pulse supply means

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[Submission date] December 15, 1999 (1999.12.
15)

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 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M118 AA06 AB01 BA13 CA04 CA20 CA26 CA32 CB14 DA12 DA18 DA24 DB01 DB03 DB08 FA02 FA06 FA26 FA33 GB11 GC08 GC09 GD04 5C024 AA01 CA12 EA04 FA11 FA12 GA01 GA11 GA16 GA22 GA51 GA52 JA25

Claims (12)

[Claims] 1. A large number of photoelectric conversion elements arranged on a surface of a semiconductor substrate at a constant pitch in a plurality of columns and a plurality of rows, wherein one photoelectric conversion element row and one photoelectric conversion element row are respectively provided. Each of the plurality of photoelectric conversion elements forming an even-numbered row is formed by a plurality of photoelectric conversion elements, and each of the plurality of photoelectric conversion elements forming an even-numbered row is photoelectrically converted in each photoelectric conversion element row. Each of the plurality of photoelectric conversion elements forming an even-numbered row is different from each of the plurality of photoelectric conversion elements forming an even-numbered row by about one-half of the pitch between the elements and is shifted in the column direction. About 1/2 of the pitch between the photoelectric conversion elements in the element row, which are displaced in the row direction, and each of the photoelectric conversion element columns includes only odd-numbered rows or even-numbered rows of photoelectric conversion elements. The plurality of photoelectric conversion element rows A meandering shape formed on the surface of the semiconductor substrate in proximity to the photoelectric conversion element row for each row, and a plurality of sections continuing in the longitudinal direction of the photoelectric conversion element row as a whole while changing directions at boundaries between the sections. A plurality of charge transfer channels, and a plurality of transfer electrodes formed on the surface of the semiconductor substrate so as to traverse each of the plurality of charge transfer channels in plan view, each of the plurality of charge transfer channels. And a plurality of transfer path forming sections each having the same number as the number of charge transfer channels, and each of the plurality of transfer path forming sections is a plan view of one of the sections on each of the plurality of charge transfer channels. A single charge transfer stage is formed together with the section so as to cover the photoelectric conversion element array, and two adjacent transfer electrodes repeatedly separate from each other in a plan view, and the photoelectric transfer elements are arranged every other one of the plurality of photoelectric conversion element arrays. Conversion element A plurality of the photoelectric conversion elements extending in the longitudinal direction of the photoelectric conversion element rows as a whole while defining one photoelectric conversion element area by surrounding one of the photoelectric conversion elements in the odd-numbered rows or the even-numbered rows in plan view. A plurality of transfer electrodes, adjacent to the photoelectric conversion element for each of the plurality of photoelectric conversion elements, and in every other of the plurality of sections in each of the plurality of charge transfer channels. A plurality of read gate regions formed on the surface of the semiconductor substrate adjacent to each other, and a channel width at each of the plurality of charge transfer channels where the read gate regions are adjacent to each other is different. Solid-state imaging device narrower than the channel width at the location. A plurality of read gate electrode portions formed on each of the plurality of read gate regions and covering the read gate regions in plan view, wherein each of the plurality of read gate electrode portions is 2. The solid-state imaging device according to claim 1, comprising a part of the transfer path forming portion that covers one section of the charge transfer channel adjacent to the corresponding readout gate region in plan view. 3. The solid-state imaging device according to claim 1, wherein each of the plurality of photoelectric conversion elements has substantially the same shape, size, and direction in plan view. 4. The photoelectric conversion element region defined by the two adjacent transfer electrodes has a hexagonal or substantially hexagonal shape in plan view. 20. The solid-state imaging device according to 5. The light shielding film according to claim 1, further comprising a light shielding film disposed above the semiconductor substrate and having one opening for each of the plurality of photoelectric conversion elements. 3. The solid-state imaging device according to item 1. 6. The shape of each of the openings in a plan view,
The solid-state imaging device according to claim 5, wherein the size and the orientation are substantially the same. 7. The solid-state imaging device according to claim 5, wherein each of the openings has a quadrangular, pentagonal, or hexagonal shape in plan view. 8. Further, above each of said openings,
The solid-state imaging device according to claim 5, further comprising a microlens that covers the opening in plan view. 9. The solid-state imaging device according to claim 8, further comprising a color filter disposed between each of said openings and said corresponding microlens, and covering said openings in plan view. 10. A two-phase drive type C having a two-layer electrode structure.
It consists of a CD or a two-phase driven CCD with a three-layer electrode structure,
2. An output transfer path for receiving signal charges accumulated in the photoelectric conversion elements through the charge transfer channel by photoelectric conversion of each of the photoelectric conversion elements and transferring the signal charges in a predetermined direction. The solid-state imaging device according to claim 9. 11. The method according to claim 11, further comprising the step of: connecting one end of each of the plurality of charge transfer channels, changing a transfer direction of the signal charge before transferring the signal charge to the output transfer path, and keeping a horizontal pitch constant. The solid-state imaging device according to claim 10, further comprising: an adjustment unit configured to adjust the distance. 12. The method for driving a solid-state imaging device according to claim 1, wherein each of the photoelectric conversion elements constituting a predetermined photoelectric conversion element row in one vertical blanking period. A signal charge readout step of reading out the signal charges stored in the memory cell via the readout gate region adjacent to the photoelectric conversion element to the charge transfer channel adjacent to the readout gate region; and An image signal output step of converting each of the signal charges read out to the charge transfer channel into an image signal and outputting the image signal until a vertical blanking period.