JP2001077297A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restrain signals leaking from one semiconductor device to another so as to lessen crosstalk noises induced in a semiconductor device without enhancing the device in scale even if adjacent element forming regions are arranged confronting each other by a method wherein a conductive layer is interposed between a first and a second semiconductor device. SOLUTION: A second semiconductor device 2 is mounted on a first semiconductor device 1, and the inner electrode pad 3 of the first semiconductor device 1 and the electrode pad 5 of the second semiconductor device 2 are electrically and mechanically connected together through the intermediary of a bump 6. The first semiconductor device 1 and the second semiconductor device 2 are stacked face to face with each other and joined together with bumps. A conductive layer 7 is interposed between the semiconductor devices 1 and 2. By this setup, when the devices 1 and 2 are driven, signals leaking out of the devices 1 and 2 hit the conductive layer 7. At this time, signals leaking out of the device 1 are averaged by the conductive layer 7 without acting direct on the device 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a structure in which two semiconductor elements are bump-bonded to each other and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, electronic devices have been increasingly miniaturized, improved in function, increased in operating speed, and further modularized. Further, among various semiconductor devices, there has been proposed a configuration in which a multi-stage element unit in which another semiconductor element is mounted on a semiconductor element is incorporated in one package.

FIG. 6 is a sectional view of a main part showing an example of the configuration of a conventional semiconductor device of this type. In FIG. 6, the first
The second semiconductor element 52 is mounted on the semiconductor element 51. The first semiconductor element 51 is the second semiconductor element 5
The outer dimensions are set to be larger than 2, and a substantially central portion thereof is used as an element mounting area. A plurality of inner electrode pads 53 are formed in this element mounting area. Further, a plurality of outer electrode pads 54 are formed on the outer peripheral portion of the element outside the element mounting area. The inner electrode pad 53 and the outer electrode pad 54 are electrically connected via a wiring pattern (not shown) formed on the first semiconductor element 51. Also, the first semiconductor element 5
A passivation film 55 is formed on 1.

On the other hand, a plurality of electrode pads 56 are formed on the periphery of the second semiconductor element 52. Further, a passivation film 57 is formed on the second semiconductor element 52. The second semiconductor element 52 is mounted on the element mounting area of the first semiconductor element 51 in a so-called face-down state in which the element formation area faces downward. In this element mounting state, the inner electrode pad 53 of the first semiconductor element 51 and the corresponding electrode pad 56 of the second semiconductor element 52 are electrically connected via bumps (metal projections) 58. And mechanically connected (bump bonding). Further, an insulating resin 59 is interposed between the first and second semiconductor elements 51 and 52.

Next, a description will be given of a manufacturing process for manufacturing a conventional semiconductor device, particularly for bonding elements. First, at least one of the first and second semiconductor elements 51 and 52, for example, as shown in FIG.
A barrier metal layer 60 of Ti (titanium), Pd (palladium), Au (gold) or the like is formed. Next, as shown in FIG. 7B, a portion of the second semiconductor element 52 except for the electrode pad 56 is covered with a photoresist 61 by using a photolithography technique. Next, as shown in FIG.
Pd, Sn (tin) is plated on the electrode pads 56 of the second semiconductor element 52 by an electroplating method or the like to form bumps 5.
Eight parts are formed.

Subsequently, as shown in FIG. 7D, the photoresist 61 formed previously is removed, and the unnecessary barrier metal layer 60 is removed by using aqua regia, hydrofluoric acid, etc. A bump 58 is formed on the electrode pad 56 of the semiconductor element 52. Next, as shown in FIG. 7E, the second semiconductor element 52 is mounted in the element mounting area (substantially at the center) of the first semiconductor element 51 by aligning the electrode pads 53 and 56 with each other. And pressurizing / heating tool 6
Pressurization and heating are performed by 2. Finally, as shown in FIG. 7F, a liquid insulating resin 59 is injected between the first and second semiconductor elements 51 and 52, and then cured.

[0007]

However, in the above-described conventional semiconductor device, the first and second semiconductor elements 51 and 52 are provided.
Are arranged close to each other, and the signals flowing through the signal lines on each of the semiconductor elements 51 and 52 interfere with each other to induce crosstalk noise, thereby causing a malfunction of the semiconductor device. There was a problem.

As a countermeasure against this, Japanese Patent Laid-Open Publication No. 09-13499
No. 8 discloses that the first semiconductor element 51 is formed with a wiring layer and an element formation region in a portion other than a portion covered by the element formation region of the second semiconductor element 52, thereby forming the first and second semiconductor layers. A technique for reducing crosstalk noise induced between the semiconductor elements 51 and 52 is disclosed.

However, according to the technique disclosed in the above publication, the element mounting area of the first semiconductor element 51 is not effectively used, and the outer size of the first semiconductor element 51 is increased, which leads to an increase in the size of the semiconductor device. There were difficulties.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to reduce crosstalk noise induced between two semiconductor elements without increasing the size of a device. And a method for manufacturing the same.

[0011]

In a semiconductor device according to the present invention, a first semiconductor element is mounted on the first semiconductor element in an opposed state, and the first semiconductor element is electrically connected to the first semiconductor element via bumps. The structure employs a second semiconductor element which is electrically connected and a conductive layer interposed between the first and second semiconductor elements.

In this semiconductor device, since the conductive layer is interposed between the first and second semiconductor elements, even if the element formation regions of the respective semiconductor elements are close to each other while facing each other, one of the semiconductor elements can be formed. Signal leakage from the element to the other semiconductor element is suppressed by the conductive layer.

In the method of manufacturing a semiconductor device according to the present invention, a step of forming a bump on at least one electrode pad of the first and second semiconductor elements and a step of forming the bump on the first and second semiconductor elements are provided. A step of attaching a film member having a conductive layer to one element formation region surface, and heating and pressurizing the first and second semiconductor elements while positioning them in a state where they face each other, thereby forming the first and second semiconductor elements. Electrically connecting the first and second semiconductor elements via bumps with the conductive layer interposed between the semiconductor elements.

In this method of manufacturing a semiconductor device, a semiconductor device having a structure in which a conductive layer is interposed between the first and second semiconductor elements is obtained. In the semiconductor device having such a structure, even if the element forming regions of the respective semiconductor elements are close to each other in a state of facing each other, signal leakage from one semiconductor element to the other semiconductor element is suppressed by the conductive layer. Become like

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a cross-sectional view showing a main part (element junction) of a semiconductor device according to an embodiment of the present invention. In FIG. 1, a second semiconductor element 2 is mounted on a first semiconductor element 1. The outer dimensions of the first semiconductor element 1 are set to be larger than those of the second semiconductor element 2, and a substantially central portion thereof is an element mounting area. An element forming area 1A is provided inside the element mounting area. In the element mounting area, the element forming area 1A is provided.
A plurality of inner electrode pads 3 are formed on the outer side. These inner electrode pads 3 are arranged in a frame shape at a predetermined pitch in the element mounting area of the first semiconductor element 1.

In the first semiconductor element 1, a plurality of outer electrode pads 4 are formed on the element periphery outside the element mounting area. When the pair of the first and second semiconductor elements 1 and 2 are incorporated in the same package, these outer electrode pads 4 are connected to, for example, external connection terminals (eg, lead terminals) by wire bonding or inner bonding. It serves as an extraction electrode electrically connected by lead bonding, bumps, or the like. Also, the first
A passivation film (not shown) is formed on the semiconductor element 1.

On the other hand, a plurality of electrode pads 5 are formed on the periphery of the second semiconductor element 2, and an element forming region 2A is provided in a portion surrounded by these electrode pads 5. Further, a passivation film (not shown) is formed on the second semiconductor element 2. The second semiconductor element 2 is placed in a face-down state with its element formation region 2A facing downward.
Is mounted in the element mounting area of the semiconductor element 1. Under this element mounting state, the inner electrode pad 3 of the first semiconductor element 1 and the electrode pad 5 of the second semiconductor element 2 are electrically and mechanically connected via bumps 6. As a result, the first semiconductor element 1 and the second semiconductor element 2 are overlapped and bump-bonded to each other while facing each other.

A conductive layer 7 is interposed between the first and second semiconductor elements 1 and 2. The conductive layer 7 is preferably formed to have substantially the same area as or larger than each of the element forming regions 1A and 2A. Further, the conductive layer 7 is formed between the electrode pads 3 and 5 and the wiring patterns connected thereto. It is desirable to form as wide as possible as long as electrical insulation can be maintained.

The conductive layer 7 is made of, for example, Cu (copper), Ni
It is formed in a layer (solid) using a metal material such as (nickel), Au, Ag (silver), Pd, Al (aluminum) or an organic conductive material. Adhesive layers 8A and 8B are provided above and below conductive layer 7, respectively.
Of these, one (upper) adhesive layer 8A is provided in close contact with the surface of the element formation region 2A of the second semiconductor element 2,
The other (lower) adhesive layer 8B is provided in close contact with the surface of the element formation region 1A of the first semiconductor element 1.

Further, an insulating resin 9 is interposed between the first and second semiconductor elements 1 and 2 except for a region where the conductive layer 7 and the adhesive layers 8A and 8B are provided.

Next, a description will be given of a manufacturing process for manufacturing the semiconductor device according to the embodiment of the present invention, particularly when the elements are joined to each other.

First, as shown in FIG. 2A, the electrode pad 5 of the second semiconductor element 2 is made of, for example, a Ni core Au or only Au by using an electrolytic plating method or an electroless plating method. The bump 6 is formed. The bump 6 may be a ball bump obtained by a stud bump method using a wire bonding tool (capillary) or a solder bump (solder bump) obtained by a soldering method. Au, Cu, P for ball bumps
The bump 6 is made of a metal material such as d, Ag, or an alloy containing them. In the case of a solder bump, S
The bump 6 is made of a metal material such as n, Pb, In (indium), and Ag bismuth. Further, in addition to the above-described bump forming method, the bump 6 can be formed by a transfer bump method or the like.

The diameter of the bump 6 is Ni bump Au, A
5 μm to 100 μm for u bump and ball bump,
In the case of a solder bump, a bump having a thickness of about 20 μm to 200 μm is used. The bump 6 may be formed on the inner electrode pad 3 of the first semiconductor element 1 or formed on both the electrode pads 3 and 5 of the first and second semiconductor elements 1 and 2. You may.

Next, as shown in FIG. 2B, a film member 10 in which the conductive layer 7 and the adhesive layers 8A and 8B are integrated is attached to the surface of the element forming region 2A of the second semiconductor element 2. As shown in FIG. 3A, for example, the film member 10 has a conductive layer 7 made of copper foil or the like between two resin films (polyimide film or the like) 12 each having an adhesive 11 applied to one side thereof. Is sandwiched and pressed, and an adhesive 13 is applied to both surfaces thereof as shown in FIG. 3B. In this case, the adhesive layers 8A and 8B are composed of two resin films 12 and the adhesive 1 applied to both surfaces thereof.
1 and 13. Also, adhesive 1
As 1 and 13, a thermoplastic resin such as a polyimide resin or a thermosetting resin such as an epoxy resin or a silicone resin can be used. Note that the film member 10 may be attached to the element forming region 1A of the first semiconductor element 1. The film member 10 may be formed by forming an adhesive layer on both sides of a metal foil such as a copper foil, or a film formed by forming a metal layer (conductive layer) on a resin layer by plating or the like. What formed the adhesive layer on both surfaces may be sufficient. Further, a metal foil and a resin film may be bonded using an adhesive layer, and an adhesive layer may be formed on both surfaces of the film. Furthermore, a resin layer may be bonded to the metal foil side of a film formed of a metal foil and a resin using an adhesive, and adhesive layers may be formed on both sides of the resin layer. Further, an adhesive layer for bonding to the element can be applied to the element in advance.

Next, as shown in FIG. 3C, the second semiconductor element 2 is disposed directly above the element mounting area of the first semiconductor element 1 so as to face each other, and the first and second semiconductor elements 2 corresponding to each other are arranged.
The electrode pads 3 and 5 of the second semiconductor elements 1 and 2 are aligned.

Subsequently, as shown in FIG.
Using the heating tool 14, the first and second semiconductor elements 1,
The metal alloy 2 is bonded to the metal alloy 2 by pressurizing and heating the bump 2 at a pressure of about 0.1 gram to 200 gram per bump and a temperature of about 150 ° C. to 450 ° C. In the case of solder alloy bonding, pressure heating is performed at a temperature of about 60 ° C. to 270 ° C. and a pressure of about several grams from the weight of the second semiconductor element 2.

At this time, since the film member 10 (see FIG. 3B) is attached to the second semiconductor element 2, an adhesive 13 (FIG.
(B) is brought into contact with the surface of the element forming region 1A of the first semiconductor element 1 by the pressurizing action of the pressurizing / heating tool 14, so that one surface of the film member 10 is attached to the surface of the element forming region 1A. . Thereby, the first and second
With the conductive layer 7 interposed between the semiconductor elements 1 and 2 of
The second semiconductor element 2 is mounted on the element mounting area of the first semiconductor element 1.

Finally, as shown in FIG.
After injecting a liquid insulating resin 9 between the second semiconductor elements 1 and 2 by, for example, a dispense nozzle 15, this is cured. Incidentally, when the adhesive 13 applied to one surface of the film member 10 is sufficiently spread by the pressurizing action of the pressurizing / heating tool 14 and the space between the elements is filled with the spread adhesive 13, the insulating resin 9 is injected. -It is not necessary to perform a curing step.

In the semiconductor device of this embodiment obtained through such a manufacturing process, the conductive layer 7 is formed between the first and second semiconductor elements 1 and 2 so as to shield the element formation regions 1A and 2A from each other. Is interposed. Thereby, when the first and second semiconductor elements 1 and 2 are actually driven,
Signals of various voltage levels leaked from the respective elements 1 and 2 collide with the conductive layer 7. At this time, a signal leaked from one of the semiconductor elements (for example, the first semiconductor element 1) is replaced with a signal of the other semiconductor element (for example, the second semiconductor element 2).
Are not leveled, but are leveled over the entire conductive layer 7.

Thus, when the semiconductor elements 1 and 2 are driven, the potential of the conductive layer 7 is kept at or near the ground level, whereby the conductive layer 7 functions to suppress signal interference between the elements. That is, a function equivalent to the electric shielding function is performed. As a result, crosstalk noise induced between the first and second semiconductor elements 1 and 2 can be reduced. Further, an element forming area 1A is provided in the element mounting area of the first semiconductor element 1.
Is provided, thereby effectively utilizing the element mounting area. Therefore, the outer size of the first semiconductor element 1 can be reduced as much as possible, and the increase in the size of the semiconductor device can be avoided.

FIG. 5 shows an application example of the semiconductor device according to the embodiment of the present invention. FIG.
(B) is XX sectional drawing in (a). In FIG. 5, an extended portion 7A is integrally formed at a corner portion of a conductive layer 7 interposed between the first and second semiconductor elements 1 and 2. In addition, a ground electrode pad (hereinafter, referred to as a ground electrode pad) 5A is formed at a corner of the second semiconductor element 2 in a form corresponding to the formation position of the extension 7A.
However, a ground inner electrode pad (hereinafter, referred to as a ground electrode pad) 3A is also formed at a corner portion of the element mounting area of the first semiconductor element 1. Further, a bump 6A is formed on the ground electrode pad 5A of the second semiconductor element 2, and a bump 6B is also formed on the corresponding ground electrode pad 3A of the first semiconductor element 1.
Are formed. Then, the conductive layer 7 is electrically connected to the ground electrode pads 3A and 5A by thermocompression bonding so that the extending portion 7A of the conductive layer 7 is sandwiched between the bumps 6A and 6B. Has become.

By adopting such a configuration, the conductive layer 7 is maintained at the ground potential between the first and second semiconductor elements 1 and 2, so that the first and second semiconductor elements 1 , 2 can be shielded by the conductive layer 7. As a result, crosstalk noise induced between the first and second semiconductor elements 1 and 2 can be further reduced.

In this case, the extending portion 7A of the conductive layer 7 interposed between the semiconductor elements 1 and 2 is bumped up and down from the bumps 6A and 6B.
The conductive layer 7 is electrically connected to the ground electrode pads 3A and 5A of the two elements, but the present invention is not limited to this, and the ground electrode pad 3A of one of the semiconductor elements or The same effect can be obtained even when the conductive layer 7 is electrically connected only to 5A.

[0034]

As described above, according to the semiconductor device of the present invention, since the conductive layer is interposed between the first and second semiconductor elements, the element formation regions of the respective semiconductor elements face each other. Even when the state is close to the state, leakage of a signal from one semiconductor element to the other semiconductor element can be suppressed by the conductive layer. This makes it possible to reduce crosstalk noise induced between these elements without increasing the size of the device, and to prevent malfunction of the semiconductor device.

According to the method of manufacturing a semiconductor device of the present invention, a semiconductor device having a structure in which a conductive layer is interposed between the first and second semiconductor elements is obtained. In the semiconductor device having such a structure, even if the element formation regions of the respective semiconductor elements are close to each other in an opposed state, the signal leakage from one semiconductor element to the other semiconductor element is suppressed by the conductive layer. Can be. Therefore, a semiconductor device having excellent operation reliability can be manufactured.

[Brief description of the drawings]

FIG. 1 is a sectional view of a main part of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a manufacturing process diagram (part 1) of the semiconductor device according to the embodiment of the present invention;

FIG. 3 is a manufacturing process diagram (part 2) of the semiconductor device according to the embodiment of the present invention;

FIG. 4 is a manufacturing process diagram (part 3) of the semiconductor device according to the embodiment of the present invention;

FIG. 5 is a diagram showing an application example of the semiconductor device according to the embodiment of the present invention.

FIG. 6 is a cross-sectional view of a main part of a conventional semiconductor device.

FIG. 7 is a manufacturing process diagram of a conventional semiconductor device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... 1st semiconductor element, 2 ... 2nd semiconductor element, 6 ... Bump, 7 ... Conductive layer

Claims (3)

[Claims] A first semiconductor element; a second semiconductor element mounted opposite to the first semiconductor element and electrically connected to the first semiconductor element via a bump. And a conductive layer interposed between the first and second semiconductor elements. 2. The semiconductor device according to claim 1, wherein the conductive layer is electrically connected to at least one of the ground electrode pads of the first and second semiconductor elements. 3. A step of forming a bump on at least one of the electrode pads of the first and second semiconductor elements, and forming a conductive layer on one of the element formation region surfaces of the first and second semiconductor elements. Attaching a film member having: and heating and pressing the first and second semiconductor elements in a state where they face each other, thereby forming the conductive layer between the first and second semiconductor elements. Electrically connecting the first and second semiconductor elements via the bumps with the interposition therebetween.