JP2001077048A - Low-resistance ohmic electrode to semiconductor diamond and formation method therefor - Google Patents

Low-resistance ohmic electrode to semiconductor diamond and formation method therefor

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Publication number
JP2001077048A
JP2001077048A JP24991099A JP24991099A JP2001077048A JP 2001077048 A JP2001077048 A JP 2001077048A JP 24991099 A JP24991099 A JP 24991099A JP 24991099 A JP24991099 A JP 24991099A JP 2001077048 A JP2001077048 A JP 2001077048A
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JP
Japan
Prior art keywords
metal
diamond
ohmic electrode
layer
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24991099A
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Japanese (ja)
Inventor
Tokuyuki Terachi
徳之 寺地
Satoshi Koizumi
聡 小泉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute for Research in Inorganic Material
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National Institute for Research in Inorganic Material
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Priority to JP24991099A priority Critical patent/JP2001077048A/en
Publication of JP2001077048A publication Critical patent/JP2001077048A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10122—Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/10125—Reinforcing structures
    • H01L2224/10126—Bump collar
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01042—Molybdenum [Mo]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01073—Tantalum [Ta]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]

Abstract

PROBLEM TO BE SOLVED: To provide an ohmic electrode with a low contact resistance excellent in heat-resistance with no heating process, by allowing the ohmic electrode to comprise an electrode metal layer and a metal-diamond transition layer, with element species which forms a low interface electric potential barrier used as metal. SOLUTION: An ohmic electrode comprises an electrode metal layer and a metal-diamond transition layer, with element species which forms a low interface electric potential barrier used for metal. By in planting ion to the semiconductor diamond layer, both the metal electrode layer and the metal-diamond transition layer are formed at the same time. By projecting metal ion onto the surface of diamond, an ohmic electrode to n-type and p-type semiconductor diamond is formed. As ion species, elements such as Ga and Al which is a metal of small work function is effective to an n-type diamond while Au and Pt which is a metal of large work function is effective to a p-type diamond.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】この発明は、ｎ型およびｐ型
半導体ダイヤモンドに対して、加熱処理も不純物原子の
高濃度ドーピング処理も共に介することなしに形成され
る、低接触抵抗および耐熱性を備えたオーミック電極お
よびその形成方法に関するものである。The present invention relates to an n-type and p-type semiconductor diamond having a low contact resistance and a low heat resistance which can be formed without performing both heat treatment and high-concentration doping of impurity atoms. And a method for forming the same.

【０００２】[0002]

【従来の技術とその課題】従来知られているｐ型ダイヤ
モンドに対する低接触オーミック電極の形成は、炭化物
を界面に形成するＴａ、Ｔｉ、Ｍｏ等の金属をダイヤモ
ンド上に堆積させ、４００℃以上で加熱処理するという
方法で行われている。2. Description of the Related Art A conventionally known low-contact ohmic electrode for p-type diamond is formed by depositing a metal such as Ta, Ti, or Mo on a diamond at 400 ° C. The heat treatment is performed.

【０００３】加熱処理無しに、ｐ型ダイヤモンドに対す
る低接触オーミック電極を形成する場合、不純物原子が
１０19ｃｍ-2以上に高濃度ドーピングされたダイヤモン
ドを作製し、その上に金属を堆積させる必要がある。In order to form a low-contact ohmic electrode with respect to p-type diamond without heat treatment, it is necessary to produce diamond with a high concentration of impurity atoms of 10 19 cm −2 or more and to deposit a metal thereon. is there.

【０００４】不純物原子密度が１０19ｃｍ-2以下の高抵
抗ｐ型ダイヤモンドに対して、熱処理無しに低接触オー
ミック電極を形成する場合、電極を形成すべき部分にあ
らかじめイオン打ち込み法により不純物を高濃度にドー
ピングを行う必要がある。この場合、打ち込んだ不純物
原子を電気的に活性化するために、ダイヤモンドをあら
かじめ４００℃以上で加熱処理する必要がある。[0004] with respect to the impurity atom density 10 19 cm -2 or less of the high-resistance p-type diamond, when forming a low contact ohmic electrode without heat treatment, the high impurity beforehand by ion implantation in a portion for forming the electrode It is necessary to dope the concentration. In this case, in order to electrically activate the implanted impurity atoms, it is necessary to heat-treat diamond at 400 ° C. or higher in advance.

【０００５】ｎ型ダイヤモンドに対するオーミック電極
の形成方法として、ダイヤモンド上にＴａ、Ｔｉ、Ｍｏ
等の金属炭化物を形成する金属を堆積させ、６００℃で
加熱処理するという手順がとられるが、界面に電子に対
する高い電位障壁が形成されるため、この方法によりオ
ーミック電極を形成することは困難である。As a method of forming an ohmic electrode for n-type diamond, Ta, Ti, Mo
The procedure of depositing a metal that forms a metal carbide such as a metal carbide and performing a heat treatment at 600 ° C. is adopted. However, since a high potential barrier against electrons is formed at the interface, it is difficult to form an ohmic electrode by this method. is there.

【０００６】不純物原子濃度が１０20ｃｍ-2以下のｎ型
ダイヤモンドに対して、この電位障壁の高さを減少させ
るために、アルミニウムなどの仕事関数の小さな金属を
オーミック電極に使用する手法が用いられている。しか
しながら、この方法を用いても、ドナー密度が１０20ｃ
ｍ-3以下の場合、電位障壁の高さをオーミック電極が得
られる程度まで減少させることが現在の技術ではできな
いため、この方法によるオーミック電極の形成は困難で
ある。また、この電極の熱的耐性は４００℃である。In order to reduce the height of the potential barrier for n-type diamond having an impurity atom concentration of 10 20 cm −2 or less, a technique using a metal having a small work function such as aluminum for the ohmic electrode is used. Have been. However, even with this method, the donor density is 10 20 c
In the case of m −3 or less, it is difficult to reduce the height of the potential barrier to the extent that an ohmic electrode can be obtained by the current technology, and it is difficult to form an ohmic electrode by this method. The thermal resistance of this electrode is 400 ° C.

【０００７】加熱処理無しに、ｎ型ダイヤモンドに対す
る低接触オーミック電極を形成する場合、不純物原子が
１０20ｃｍ-2以上に高濃度ドーピングされたダイヤモン
ドを作製し、その上にアルミニウムなどの仕事関数の小
さな金属を堆積させる必要がある。しかしながら、この
電極の熱的耐性は４００℃程度である。When a low-contact ohmic electrode for n-type diamond is formed without heat treatment, a diamond doped with impurity atoms at a high concentration of 10 20 cm −2 or more is formed, and a work function such as aluminum is formed thereon. Small metals need to be deposited. However, the thermal resistance of this electrode is about 400 ° C.

【０００８】高抵抗ｎ型ダイヤモンドの局部にオーミッ
ク電極を形成する場合、イオン打ち込み法により不純物
を高濃度にドーピングを行う必要があるが、打ち込んだ
不純物原子を電気的に活性なドナーに変えることが現在
の技術ではできないため、この方法によるオーミック電
極の形成は困難である。When an ohmic electrode is formed locally on a high-resistance n-type diamond, it is necessary to dope impurities at a high concentration by ion implantation, but it is necessary to convert the implanted impurity atoms into electrically active donors. The formation of an ohmic electrode by this method is difficult because it cannot be performed by the current technology.

【０００９】[0009]

【課題を解決するための手段】本発明は、上記の課題を
解決するためになされたものであって、不純物の高濃度
ドーピングも電極作成後の加熱処理もなしに、耐熱性に
優れた低い接触抵抗を持つオーミック電極と、その形成
技術を提供するものである。DISCLOSURE OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and has low heat resistance and excellent heat resistance without high concentration doping of impurities or heat treatment after electrode formation. An ohmic electrode having a contact resistance and a technique for forming the ohmic electrode are provided.

【００１０】本発明に関わる半導体ダイヤモンド層上の
耐熱性に優れた低抵抗及オーミック電極は、半導体ダイ
ヤモンド層上に形成されるオーミック電極において、電
極金属層と金属−ダイヤモンド遷移層を有し、金属には
低い界面電位障壁を形成する元素種を使用していること
を特徴とする。A low-resistance and ohmic electrode having excellent heat resistance on a semiconductor diamond layer according to the present invention is an ohmic electrode formed on a semiconductor diamond layer, comprising an electrode metal layer and a metal-diamond transition layer. Is characterized by using element species that form a low interface potential barrier.

【００１１】本発明に関わる半導体ダイヤモンド層上の
耐熱性に優れた低抵抗及オーミック電極の形成方法は、
半導体ダイヤモンド層上に、イオン打ち込みすることに
より、前記金属電極層及び金属−ダイヤモンド遷移層を
同時に形成することを特徴とする。The method for forming a low-resistance and ohmic electrode having excellent heat resistance on a semiconductor diamond layer according to the present invention is as follows.
The metal electrode layer and the metal-diamond transition layer are simultaneously formed by ion implantation on a semiconductor diamond layer.

【００１２】[0012]

【発明の実施の形態】この発明は、上記の通り、金属イ
オンをダイヤモンド表面に照射することにより、ｎ型お
よびｐ型半導体ダイヤモンドへのオーミック電極の形成
技術を提供するものである。また、形成技術に用いるイ
オン種としては、ｎ型ダイヤモンドに対しては、仕事関
数の小さい金属であるＧａ、Ａｌ等の元素が、またｐ型
ダイヤモンドに対しては、仕事関数の大きい金属である
Ａｕ、Ｐｔ等の元素がオーミック電極形成に有利な金属
としてあげられるが、なかでもオーミック電極の作製が
困難であるｎ型ダイヤモンドに対してＧａイオンを用い
て行われた例示が望ましいものとして以下に示される。 実施例１ ドナー密度が１×１０19ｃｍ-3のリンドーピングによる
ｎ型半導体ダイヤモンドにおいて、ＦＩＢのＧａイオン
（３０ｋｅＶ）照射（ドーズ量：３×１０16ｃｍ -2）に
より、直線性に優れた、界面抵抗率３．４×１０5 Ω-
ｃｍ2 のオーミック電極を形成した。（図１） 実施例２ ドナー密度が５×１０18ｃｍ-3のリンドーピングによる
ｎ型半導体ダイヤモンドにおいて、ＦＩＢのＧａイオン
（３０ｋｅＶ）照射（ドーズ量：３×１０16ｃｍ -2）
し、この照射部の上にボンディングのための表面層とし
て金を堆積させ、表面層に金線を用いてワイヤーボンデ
ィングを行った。ボンディングワイヤーを通して直線性
に優れた、界面抵抗率８．２×１０6 Ω-ｃｍ2 のオー
ミック電極を形成した。この電極は、２９３Ｋ−９７３
Ｋの温度範囲で安定に動作した。（図２−ａ）DETAILED DESCRIPTION OF THE INVENTION As described above, the present invention
By irradiating the diamond surface with ON, n-type and
Of ohmic electrode on p-type and semiconductor diamond
Offering technology. In addition, the a
As an on species, for n-type diamond,
Elements such as Ga and Al, which are small numbers of metals, are also p-type
High work function metal for diamond
Elements such as Au and Pt are metals that are advantageous for forming ohmic electrodes
Among them, the production of ohmic electrodes
Using Ga ions for difficult n-type diamond
Illustrative examples are given below as desirable. Example 1 Donor density of 1 × 1019cm-3By phosphorus doping
Ga ion of FIB in n-type semiconductor diamond
(30 keV) irradiation (dose amount: 3 × 1016cm -2)
More excellent interfacial resistivity 3.4 × 10FiveΩ-
cmTwoWas formed. (FIG. 1) Example 2 Donor density is 5 × 1018cm-3By phosphorus doping
Ga ion of FIB in n-type semiconductor diamond
(30 keV) irradiation (dose amount: 3 × 1016cm -2)
Then, as a surface layer for bonding,
To deposit gold, and wire bonding using gold wire on the surface layer.
Was performed. Straightness through bonding wire
Excellent interface resistivity 8.2 × 106Ω-cmTwoOh no
A mic electrode was formed. This electrode is 293K-973
It operated stably in the K temperature range. (FIG. 2-a)

【００１３】比較例１ ドナー密度が５×１０18ｃｍ-3のリンドーピングによる
ｎ型半導体ダイヤモンドにおいて、ＦＩＢのＧａイオン
（３０ｋｅＶ）照射（ドーズ量：１×１０16ｃｍ -2）で
は、整流性を示した。（図３）Comparative Example 1 A donor density of 5 × 1018cm-3By phosphorus doping
Ga ion of FIB in n-type semiconductor diamond
(30 keV) irradiation (dose amount: 1 × 1016cm -2)so
Showed rectification. (Fig. 3)

【００１４】比較例２ ドナー密度が５×１０18ｃｍ-3のリンドーピングによる
ｎ型半導体ダイヤモンドにおいて、Ｇａと仕事関数がほ
ぼ同じＡｌを蒸着した場合では、整流性を示した。（図
２−ｂ）Comparative Example 2 In an n-type semiconductor diamond doped with phosphorus having a donor density of 5 × 10 18 cm -3 , rectification was exhibited when Al having almost the same work function as Ga was deposited. (FIG. 2-b)

【００１５】[0015]

【発明の効果】オーミック電極は、半導体ダイヤモンド
の全ての電子デバイス応用、電気物性評価及び一部の光
物性評価において利用される。本技術は、これらの測定
を精度良く、且つ高温でも評価を行う場合に必要とな
る。また、集束イオンビーム装置による任意の場所へ
の、熱処理プロセスなしでの作製は、ダイヤモンドを用
いたデバイスプロセスに与える制限を、従来法に比較し
て、かなり小さくする。The ohmic electrode is used in all electronic device applications of semiconductor diamond, in evaluation of electrical properties, and in part of evaluation of optical properties. The present technology is required when performing these measurements with high accuracy and at high temperatures. In addition, the fabrication without any heat treatment process at any place by the focused ion beam apparatus makes the limitation on the device process using diamond considerably smaller than that of the conventional method.

【図面の簡単な説明】[Brief description of the drawings]

【図１】実施例１のオーミック電極の電圧−電流特性
図。FIG. 1 is a voltage-current characteristic diagram of an ohmic electrode of Example 1.

【図２】実施例２のオーミック電極の電圧−電流特性
図。FIG. 2 is a voltage-current characteristic diagram of an ohmic electrode of Example 2.

【図３】比較例２のオーミック電極の電圧−電流特性
図。FIG. 3 is a voltage-current characteristic diagram of an ohmic electrode of Comparative Example 2.

Claims (3)

【特許請求の範囲】[Claims] 【請求項１】 半導体ダイヤモンド層上に形成されるオ
ーミック電極において、電極金属層と金属−ダイヤモン
ド遷移層を有していることを特徴とする半導体ダイヤモ
ンド層上の低接触抵抗および耐熱性を備えたオーミック
電極。An ohmic electrode formed on a semiconductor diamond layer has an electrode metal layer and a metal-diamond transition layer, and has low contact resistance and heat resistance on the semiconductor diamond layer. Ohmic electrode. 【請求項２】 半導体ダイヤモンド層上に、イオン打ち
込みすることにより、前記金属電極層及び金属−ダイヤ
モンド遷移層を同時に形成することを特徴とする請求項
１のオーミック電極の形成方法。2. The method for forming an ohmic electrode according to claim 1, wherein the metal electrode layer and the metal-diamond transition layer are simultaneously formed by ion implantation on the semiconductor diamond layer. 【請求項３】 前記電極金属層の上に、ボンディングの
ための表面層として、Ａｌ，Ａｕ及びＰｔからなる群か
ら選択された少なくとも１種の材料を蒸着して形成する
ことを特徴とする請求項２記載のオーミック電極の形成
方法。3. The method according to claim 1, wherein at least one material selected from the group consisting of Al, Au and Pt is deposited on the electrode metal layer as a surface layer for bonding. Item 3. A method for forming an ohmic electrode according to Item 2.
JP24991099A 1999-09-03 1999-09-03 Low-resistance ohmic electrode to semiconductor diamond and formation method therefor Pending JP2001077048A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016152380A (en) * 2015-02-19 2016-08-22 国立研究開発法人産業技術総合研究所 Semiconductor-metal composite material and method of manufacturing the same
US9564491B2 (en) 2014-12-15 2017-02-07 Kabushiki Kaisha Toshiba Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9564491B2 (en) 2014-12-15 2017-02-07 Kabushiki Kaisha Toshiba Semiconductor device
JP2016152380A (en) * 2015-02-19 2016-08-22 国立研究開発法人産業技術総合研究所 Semiconductor-metal composite material and method of manufacturing the same

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