JP2001068720A - Optical reception device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical reception device, which is small-sized, is low in noise and crosstalks between channel and moreover, can be amplified in a wide band and is provided with an integrated digital circuit. SOLUTION: This optical reception device is constituted by integrating photodiodes 111 on an electronic circuit 120 via insulating films 121, connecting an AuZnNi layer, which is a first electrode to come into contact with a p+ InGaAs layer of the photodiode 111, with the circuit 120 by an Au wiring through a first contact hole 124a, and connecting an AuGeNi layer, which is a second electrode to come into contact with an n+InGaAs layer of the photodiode 111, with the circuit 120 by an Au wiring through a second contact hole 124b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical receiver for converting a high-speed optical signal into an electric signal.

[0002]

2. Description of the Related Art In a conventional optical receiving apparatus, as shown in FIG. 21, spatially multiplexed optical signals are divided into branching elements 190-1 to 190-n.
Through the photodiodes 191-1a and 191-1b
To 191-na and 191-nb, respectively, and amplifiers 192-1a and 192-1b to 192-na, respectively.
192-nb, and one of the signals is separated by the separation circuit 1 via the clock extraction circuits 193-1 to 193-n, respectively.
The other signals are directly input to the respective separation circuits 194-1 to 194-n and output for each channel.

[0003] When a device for converting a spatially multiplexed optical signal into an electric signal is configured, it is integrated in a frame indicated by a dotted line in the figure. That is, the branch element 190-
1-190-n, photodiodes 191-1a-191
-nb and amplifiers 192-1a to 192-nb are integrated.

FIG. 22 is a top view of the integrated portion. A branch is provided in the optical waveguide of the planar optical circuit board 201, and a photodiode (photodiode array) 20 is formed.
The optical signal is guided to the second light receiving section. This optical signal is converted into an electric signal by the photodiode 202, and the electric reception signal is transmitted through the transmission line 203 to the electronic circuit board 204.
Output to

FIG. 23 is a cross-sectional view of the portion “A” of FIG. 22. The planar optical circuit substrate 201 is composed of a SiO ₂ layer (lower clad) 206 and a SiO ₂ layer deposited on a silicon substrate 205.
(Core) 207 and SiO ₂ layer (upper cladding) 208. In the optical waveguide, a groove is formed in the middle,
A mirror made of the resin 209 and the reflection film 210 is provided. The light propagating through the core 207 has its optical path changed by this mirror and is incident on the photodiode 217. The signal photoelectrically converted by the photodiode 217 is connected to the electronic circuit board 204 via the electric wiring 212, the solder 213 and the wire 215, and the electronic circuit pad 216 formed on the low dielectric constant layer of the polyimide 211. I have. In general, a coplanar transmission line is used for the electric wiring 212.

With this configuration, the InP substrate 214
A photodiode 217 can be made above and integrated with the optical waveguide and connected to the electronic circuit pad 216 by a wire 215.

[0007]

However, in such a configuration, the size of the pad for attaching the solder 213 is required to be about 100 μm square, and the electronic circuit pad 2 is required.
The additional capacitance including 16 is about 200-500 fF. For this reason, in order to reduce the capacity of the photodiode 217 itself and operate at high speed, the diameter of the light receiving surface needs to be about 20 μm or less. As a result, since the maximum output current is very small (about 200 μA), the voltage amplitude is about 10 mV at the maximum when the load is 50 ohms, and is weak against external noise. There is a problem that cannot be avoided.

[0008] The input capacitance to the subsequent amplifier is:
Mostly determined by the additional capacity, 200-500
A value of about fF makes it difficult to amplify over a wide band, and further, the amplifier at the subsequent stage needs to match the input impedance to the transmission line impedance, and has a problem that the degree of freedom in design is small.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and it is an object of the present invention to provide a digital circuit which is small in size, has small noise and crosstalk between channels, and can amplify in a wide band. Is to provide an integrated optical receiving device.

[0010]

According to the present invention, there is provided an electronic circuit board comprising a protective layer provided on a surface of an electronic circuit, the electronic circuit board comprising: A photoelectric conversion element integrated on a circuit board via an insulating layer, wherein the protection layer is provided with a first contact hole for connecting a first electrode of the photoelectric conversion element to the electronic circuit; A second contact hole for connecting a second electrode of the photoelectric conversion element to the electronic circuit is provided. That is, a photodiode is integrated into an electronic circuit via an insulating layer, and a first electrode of the photodiode and the electronic circuit are connected through a first contact hole provided in a protective film of the electronic circuit, and An optical receiver is constructed by connecting a second electrode of a diode and an electronic circuit through a second contact hole provided in a protective film of the electronic circuit. Note that an MSM photodiode can be used as another photodiode.

The invention according to claim 2 is characterized in that the photoelectric conversion element is a single carrier traveling type photodiode.

Further, the invention described in claim 3 is the first invention.
3. The invention according to claim 2, further comprising removing means for removing a semiconductor substrate provided on the electronic circuit substrate via the insulating layer, except for a portion where the photoelectric conversion element is formed. It is.

According to a fourth aspect of the present invention, in the first, second or third aspect of the invention, the first stage input capacitance of the electronic circuit is Ca, and the capacitance of the photoelectric conversion element is C.
When d, 0.5Cd <Ca <3Cd.

The invention described in claim 5 is the first invention.
The invention according to any one of the above-described embodiments, wherein the diameter of the photoelectric conversion element is at least 20 microns.

[0015] The invention described in claim 6 is the first invention.
In any one of the above-described inventions, an optical amplifier is provided in an optical path at a stage preceding the electronic circuit.

Further, in an optical receiver for converting an optical signal into an electric signal, the optical receiver comprises an optical waveguide circuit, an optical path converter, an electronic integrated circuit in which a photoelectric conversion element and an electronic circuit are integrated. Things.

Further, an optical receiver is constituted by an optical amplifier, an optical waveguide circuit, an optical path converter, and an electronic integrated circuit in which a photoelectric conversion element and an electronic circuit are integrated.

Further, the optical receiver comprises an optical amplifier, a wavelength division optical waveguide circuit, an optical path converter, an electronic integrated circuit in which a photoelectric conversion element and an electronic circuit are integrated.

Further, a light receiving device is provided with a mirror provided between the insulating layer and the photoelectric conversion element.

[0020] Furthermore, light is received from an optical amplifier, a wavelength division optical waveguide circuit, a plurality of optical path converters, and an electronic integrated circuit in which a plurality of single-carrier traveling photodiodes and a plurality of electronic circuits are integrated. This is a device configuration.

Further, the electronic integrated circuit comprises a demultiplexing circuit for demultiplexing the time multiplexed signal into a low-speed time multiplexed signal to constitute an optical receiver.

[0022]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a view showing a first embodiment of an optical receiving apparatus according to the present invention.
An electronic circuit board 126 including a receiving circuit 102 is mounted thereon, and an optical waveguide 108, a branch 109, and the like are formed on the planar optical circuit board 101.
An electric wiring 106 and an LSI power supply line 107 are provided.

The difference from the conventional optical receiving apparatus shown in FIG. 22 is that not only the amplifiers 103a and 103b but also the clock extracting circuit 104 and the separating circuit 105
It is a point included in. Here, the case where only a single receiving circuit is used is described. However, it is apparent that amplifiers can be integrated into an array and configured as a receiving circuit array, similarly to a conventional optical receiving apparatus.

FIG. 2 is a cross-sectional view of the portion "B" in FIG. 1. The optical receiving device includes a planar optical circuit board 101, an electronic circuit board 126 provided thereon, and an electronic circuit board 126.
It consists of a photodiode 111 provided above. The planar optical circuit substrate 101 includes a SiO ₂ layer (lower clad) 113 and a SiO ₂ layer deposited on a silicon substrate 112.
(Core) 114 and SiO ₂ layer (upper cladding) 115. In the optical waveguide, a groove is formed in the middle,
A mirror made of the resin 116 and the reflection film 117 is provided.

The light propagating through the core 114 has its optical path changed by this mirror, and is incident on the photodiode 111 provided on the LSI substrate 110. The signal photoelectrically converted by the photodiode 111 is transmitted to the electronic circuit 1
20. A signal from the electronic circuit 120 is output to the electric wiring 106 formed on the low dielectric constant layer of the polyimide 118 via the solder 119 and supplied to an external device. In general, a coplanar transmission line is used for the electric wiring 106.

As shown in FIGS. 3A and 3B, the electronic circuit 120 including the receiving circuit 102 and the photodiode 111 are made of an insulating film 12 made of, for example, polyimide.
1 to constitute an electronic integrated circuit. The photodiode 111 has a p ⁺ -InGaAs layer, ap ⁺ -InP
Layer, an i-InGaAs layer, an n ⁺ -InP layer, and an n ⁺ -InGaAs layer.
2 have been deposited. An AuZnNi layer is used as a contact (first electrode) with the p ⁺ -InGaAs layer, and the n ⁺
AuGe as a contact (second electrode) with the -InGaAs layer
An Ni layer is used. Au is used for wiring to the electronic circuit 120. When the electronic circuit 120 is made of silicon, Al (aluminum) is used for the wiring of the electronic circuit 120, so that Pt / Ti is used to suppress the reaction.
Are inserted at the connection interface between the Au wiring and Al. Further, an electrode pad 123 for connection with the solder 119
Are provided on the electronic circuit board 126. Unnecessary semiconductor substrate around the photodiode 111 (InP substrate)
Is removed, the photodiode 111 and the electronic circuit 12 are removed.
The wiring with 0 is connected to the electronic circuit 120 in the contact holes 124a and 124b provided in the protective layer 125 on the electronic circuit board 126. That is, the first electrode A
The uZnNi layer is formed of the first contact hole 124 by Au.
a, the AuGeNi layer serving as the second electrode is connected to the electronic circuit 120 through the second contact hole 124 by Au.
b, it is connected to the electronic circuit 120.

In the configuration of the optical receiving apparatus of the present invention, since connection using the electronic circuit pad as shown in FIG. 23 is not performed, additional capacitance other than the intrinsic capacitance of the photodiode 111 + Wiring (Figure 3)
Left side) and the ground only. In this case, the wiring Au has a width of 10 μm and a length of 30 μm.
Assuming μm, the capacitance value is at most 5 fF.

In the case of the conventional optical receiver, since it is connected to the electronic circuit board 204 using the electronic circuit pad 216, the 100 μm square pad capacitance 150 fF of the photodiode 217 and the signal from the photodiode 217 to the electronic circuit pad 216. Wiring capacitance 20 fF and electronic circuit board 20
The 150 μF 100 μm square pad capacitance of No. 4 is an additional capacitance, for a total of 320 fF. That is, the additional capacity can be reduced to 1/10 or less. In order to reduce the additional capacitance in the conventional configuration, the electronic circuit pad 21
6, the size of the solder 213 and the connection of the wire 215 must be increased by 100 μm.
Sub-dimension dimensions were not possible. Further, in the conventional device, not only an additional inductance (about 1-2 nH) is added, but also because the transmission line is used, the output impedance is defined by the transmission line.
Fixed to 0 ohm.

Next, the operation of the optical receiver according to the first embodiment will be described with reference to FIGS.

The light propagating through the waveguide is changed its optical path by a mirror and is incident on the photodiode 111. In order to reduce the returning light, it is desirable that the angle of the optical path conversion is not about 90 degrees but about 70 degrees, about 110 degrees, or shifted from the plane of the paper. Planar optical circuit board 10
Since the core layer 114 is usually at a depth of 15 μm from the surface, the distance from the end face of the groove to the photodiode 111 is about 30 μm, and the spread of the light beam on the photodiode surface is about 15 μm in diameter. .

Considering the mounting tolerance and the electrode portion, it is appropriate that the mesa diameter of the photodiode 111 is about 25 μm. As a typical value, when the thickness of the depletion layer (InGaAs: absorption layer) is 2.0 μm, the capacitance of only the photodiode 111 is 30 fF. Generally, in a high-speed receiving circuit, a transimpedance type amplifier circuit is used in the first stage. Approximately, the voltage conversion gain of this amplifier circuit becomes the feedback resistance of the transimpedance type amplifier circuit. The higher the feedback resistance, the lower the noise and the higher the gain. However, C is determined by feedback resistance x input capacitance ル ー プ (open loop gain of the amplification stage).
The R time constant increases and the band is limited. In the configuration of this embodiment, the input capacitance of the receiving circuit including the additional capacitance is 35 f
F, whereas the conventional one is 355 as described above.
fF.

That is, when the open loop gain is 10, C
When the R time constant is set to 20 ps, the voltage conversion gain is 5700 in the present embodiment, whereas the conventional one is 570,
Indeed, a gain of 10 times can be achieved. If the wiring length on the planar optical circuit board 101 is １ ／ of the operating signal wavelength,
If it is longer than 0 (if it is longer than 1.5 mm for 10 GHz), the wiring on the planar optical circuit board 101 must be a transmission line, and its impedance is usually 50 ohms. In this case, the voltage conversion gain is 50,
With the configuration of the present embodiment, a gain of 100 times or more can be achieved.

The crosstalk is caused by the capacitance at the electronic circuit pad and the crosstalk via the finite resistance of the electronic circuit board. However, when there is no electronic circuit pad as in this embodiment, This crosstalk does not exist, and a high-density receiving circuit array can be realized.

In this embodiment, when the first stage input capacitance of the electronic circuit 120 is Ca and the capacitance of the photodiode 111 is Cd, the first stage input capacitance of the electronic circuit 120 is within the range of 0.5 Cd <Ca <3 Cd. Is set. The reason is that, as shown in FIG. 4, when the input capacitance at the first stage of the electronic circuit 120 is about 1.5 times the capacitance of the photodiode 111, it has been found that the band of the electronic circuit 120 is maximized. is there. This input capacitance is the first stage FET
Is 1 fF per 1 μm of gate width in a normal CMOS. In this embodiment, the photodiode 1
Since the capacitance of No. 11 is 30 fF, the first stage NMOS gate width of the electronic circuit 120 is set to 20 μm, and the PMOS gate width is set to 40 μm. It is unclear whether a similar relationship exists in the conventional device, but if the same relationship holds, it is estimated that the optimal gate width is ten times as large as that of the present embodiment. That is, since the size of the conventional FET is ten times as large, the power consumption may also be ten times.

In the present invention, as an electronic circuit substrate on the silicon substrate 112, a bipolar LSI, a CMOS LS
I, Bi-CMOS LSI, MESFE on GaAs substrate
T-type LSI, HBT-type LSI, HEMT on InP substrate
Can be used according to the purpose. For example, 10
For a Gbit / s class receiver, a silicon bipolar or GaAs-MESFET type LSI is optimal. In the case of silicon bipolar or GaAs-MESFET, In
Unlike the P-NEMT, an electronic circuit having a relatively large-scale logic circuit can be configured. Therefore, as shown in this embodiment,
Amplifiers, clock extraction circuits, and separation circuits can be integrated into one chip. If the separation circuit is integrated, for example, a signal of 10 Gbit / s can be expanded in parallel to 2.5 Gbit / s, so that connection with other devices becomes easy.

In the present embodiment, an amplifier, a clock extraction circuit, and a separation circuit are used as the electronic circuit 120. However, as shown in FIG. Synchronous digital hierarchy),
It goes without saying that the ATM (asynchronous transfer mode) or IP (Internet Protocol) protocol processing circuit 127 can be integrated. Alternatively, the receiving circuit 1
It is also possible to integrate a microprocessor or a digital signal processor at the subsequent stage of the 02. In the case of short-distance transmission, the clock may be transmitted on another channel, and in that case, the clock extraction circuit 104 is unnecessary. Alternatively, a configuration in which only a clock is received for a microprocessor is also possible. In this case, only one photodiode is required for one receiving circuit.

Further, as shown in FIG. 6, the positions of the photodiodes 111 need not always be arranged on the same straight line. In this case, there is an advantage that the degree of freedom in layout of the receiving circuit 102 is increased.

7 to 12 are views for explaining a method of manufacturing the optical receiver according to the present invention. For details on how to integrate photodiodes and LSIs, see T. Nakahara, HT
suda, K. Tateno, S. Matsuo, and T. kurokawa, "Hybrid in
integration of GaAs pinphotodiodes with CMOS transim
pedance amplifier circuits, "Electron Lett., Vo1.3
4, No. 13, pp. 1352-1353 (1998) ". First, as shown in FIG. 7, n ⁺ -InGaAs is formed on an InP substrate.
Layer, n ⁺ -InP layer, i-InGaAs layer, p ⁺ -InP layer, p ⁺ -
An InGaAs layer is sequentially grown epitaxially. Next, as shown in FIG. 8, the unevenness on the electronic circuit board 126 is flattened. This is possible by applying a polyimide and polishing after curing. Also, the electronic circuit board 1
A contact hole 124 is provided on 26 in advance.

Next, as shown in FIGS. 9A to 9C,
The epitaxial layer of the InP substrate is aligned with the electronic circuit substrate 126 and then bonded using polyimide (FIG. 9).
(A)) and temporarily fix at 200 ° C. (FIG. 9 (b)). Thereafter, unnecessary InP substrates are etched (FIG. 9).
(C)).

Next, as shown in FIGS. 10A and 10B, the epitaxial layer is partially etched to
It is divided into mm-square portions (FIG. 10A). Since the positioning of the photowork for this etching may be rough, the etching can be easily performed using a double-sided alignment type exposure device. At this stage, the adhesive polyimide is completely cured by heating to 350 ° C. In addition, a portion of the polyimide having no epitaxial layer is removed by an ashing device. As a result, an alignment mark previously formed simultaneously with the electronic circuit board 126 appears from the division groove portion (FIG. 10B).

Next, as shown in FIG. 11, photo-working and etching are performed using the alignment marks on the electronic circuit board 126 to produce a mesa structure of the photodiode.

Next, as shown in FIG.
An electric wiring is formed between the photodiode 0 and the photodiode 111.
That is, the AuZnNi layer, which is the first electrode, is made of Au to form
The AuGeNi layer serving as the second electrode is connected to the electronic circuit 120 through the second contact hole 124b by Au. Further, if necessary, a low reflection coating 122 is formed on the photodiode 111.

The mirror forming technology on a planar optical circuit is described in "H. Terui and K. Shuto," Novel Micromirror.
for Vertical Optical Path Conversion Formed in Sil
ica-Based PLC Using Wettability Control of Resin ",
Journal of Lightwave Technology, Vol.16.No.9, pp.1
631-1639 (1998) ".

The planar optical circuit and the electronic integrated circuit manufactured using the mirror forming technology are mounted using the flip chip soldering technology. Regarding this flip chip soldering technology, see "Y. Akahori, T. Ohyama, T. Yamada, K. Ka
toh, T.Ito "High-Speed Photoreceivers Using Solder
Bumps and Microstrip Lines Formed on a SiliconOpt
ical Bench ", IEEE Photonics Technology Letters, Vo
l.11, No.4, pp.454-456 (1999) ".

FIG. 13 is a view showing a second embodiment of the optical receiver according to the present invention, wherein an optical amplifier 128 and an arrayed waveguide diffraction grating 129 are added to the first embodiment. In the present embodiment, the arrayed waveguide diffraction grating 129 is arranged because a wavelength multiplexed signal is considered, but an optical amplifier 128 is arranged for each channel for a spatially multiplexed signal. Otherwise, the configuration is the same as that of the first embodiment. Optical amplifier 128
Has characteristics of a wide band (about 5 THz), a high gain (> 30 dB), and a high output (several tens mW to several W). In this configuration, since the signal is amplified by the optical amplifier 128 as much as possible, the input to the electronic circuit 120 can be increased, and low noise and crosstalk can be reduced.

However, in the configuration of the conventional optical receiver, a small-diameter photodiode is indispensable because the additional capacity of the photodiode section is large. So 10
In order to secure a band of GHz, the diameter of the photodiode has to be 20 μm or less. Typical 20
The maximum output current of a μm diameter photodiode is weak (20
0 μA), and with the configuration of the conventional optical receiver, the output level of the optical amplifier could not be increased to about 0.3 mW or more per channel. However, in an electronic integrated circuit in which the photodiode 111 is integrated, the diameter of the photodiode 111 is 60 μm
It can be as large as the diameter. That is, it is possible to increase the maximum output current to 2 mA and the output level of the optical amplifier 128 to about 3 mW per channel. The most difficult point when integrating analog circuits such as amplifiers and matching circuits and digital circuits such as clock extraction circuits is
An analog circuit malfunctions due to noise from a digital circuit.

It is very effective to increase the output of the photodiode 111 and improve the noise resistance as in the present invention in integrating digital circuits and analog circuits. Crosstalk of the receiving circuit array is mainly caused by feedback of the output of another channel which goes around the input side of the amplifier through a power supply line or the like. When the current and voltage amplitudes on the input side are large as in this embodiment, the feedback amount of these outputs is relatively small, so that noise and crosstalk of the receiving circuit are reduced.

FIG. 14 is a diagram showing the result of calculating the output current dependency of the error rate of the receiving circuit when noise is intentionally applied. If the current exceeds 200 μA, the error rate becomes 10
It was found to be below ^-12 . That is, if the diameter of the photodiode is 25 μm or more, it is expected that the malfunction will be less than the measurement limit.

As described above, in this embodiment, even if the digital circuit is integrated on the same substrate as the photoelectric conversion circuit, it is possible to reduce the malfunction. If the clock extraction circuit 104 and the separation circuit 105 are integrated, they can be converted into low-speed electric signals and output, so that output signals can be easily extracted and connected to other devices. For example, if the speed is divided into 1/4, the connectable distance to another device is increased 16 times.

In the structure of the present embodiment, the thickness of the upper cladding layer 115 is increased or the size of the solder bump for attaching the planar optical circuit board 101 and the electronic circuit board 126 is increased, so that the photodiode 111 and the waveguide end are removed. Can be manufactured so that light can be uniformly incident on the large-diameter photodiode 111 by increasing the distance.

FIGS. 15 and 16 show a third embodiment of the optical receiver of the present invention. FIG. 16 is a view showing the configuration of the LSI substrate in a cross section taken along the line "C" in FIG.

In the present embodiment, a photodiode is a single carrier traveling type photodiode (UTC-photodiode: Uni-Traveling-Car) in comparison with the second embodiment described above.
rierPhoto Diode) 111a. UTC-
The structure of the photodiode 111a is described in "T. Ishibashi,
S. Kodama, N. Shimizu, and T. Furuta, "High-Speed Resp
onse of Uni-Traveling Carrier Photodiodes, "Jpn.J.
Appl. Phys. Vol. 36, Part 1, No. lO, pp. 6263, (1997) ".

The UTC-photodiode 111a has p ⁺
-InGaAs layer, p ⁺ -InGaAsP layer, i-InP layer, n ⁺ -
InP layer, n-InP layer, n ⁺ -InP layer, n ⁺ -InGaAsP
It is composed of layers. In addition, since the UTC-photodiode 111a has a structure in which only electrons having a high drift speed travel, the reduction of the electric field in the depletion layer due to the space charge effect is small. It is possible to flow about 10 times the current with the same capacity). That is, since it is possible to obtain an output of 2-3 V without an amplifier, the matching circuits 130a and 13
At 0b, impedance matching and level shift are performed, and the logic circuit can be directly driven. Compared with the second embodiment, since the input current-voltage amplitude is further larger, there is an advantage that noise and crosstalk of the receiving circuit are further reduced.

FIG. 17 is a view showing a fourth embodiment of the optical receiver according to the present invention. The structure of this embodiment is different from that of the first to third embodiments in that the mirror 131 is different from the insulating layer 121 and the photodiode. Is provided. This is an epitaxial substrate including UTC-photodiode 111a and an LSI.
Before bonding the substrate 110, the mirror 131 can be formed on the epitaxial substrate by vapor deposition. In addition, in this configuration, the light that has not been absorbed among the light incident on the photodiode is transmitted again through the absorption layer by the mirror 131, so that the photoelectric conversion efficiency of the photodiode can be increased without increasing the traveling time. Is possible. Furthermore, in this configuration, the conversion efficiency of the photodiode is increased, so that the light input intensity can be reduced.

FIG. 18 is a view showing a fifth embodiment of the optical receiving apparatus according to the present invention, and FIG. 19 is a sectional view of a portion "D" in FIG. This embodiment has a configuration in which the UTC-photodiode array 102a is mounted on the planar optical circuit board 101. Since the UTC-photodiode array 102a has a high output, there is an advantage that the influence of noise is less than that of a conventional photodiode mounted. In addition,
In FIG. 18, 130-1a to 130-2b are matching circuits, 104-1 and 104-2 are clock extracting circuits, and 105
Reference numerals -1 and 105-2 denote separation circuits. Further, SiO ₂ -Ta ₂ O ₅ is used as the core layer 114a in FIG.

FIG. 20 is a view showing a sixth embodiment of the optical receiver according to the present invention. This embodiment has an inverted structure in which the planar optical circuit board 101 is mounted on the holding substrate 132. Adhesive 133
Has the refractive index matched to the effective refractive index of the core of the optical fiber 134. This configuration is effective when the circuit size of the electronic circuit is increased.

As described above, the sixth embodiment is similar to the sixth embodiment.
The optical receiver of the present invention shown in the embodiment can be used for a high-speed optical interconnect device, a transmission device, a LAN device, and the like.

[0059]

As described above, according to the present invention, an electronic circuit board having a protective layer provided on the surface of an electronic circuit, and a photoelectric conversion element integrated on the electronic circuit board via an insulating layer are provided. A first contact hole for connecting the first electrode of the photoelectric conversion element to the electronic circuit, and a second contact hole for connecting the second electrode of the photoelectric conversion element to the electronic circuit. With the provision, the photoelectric conversion element can be integrated with extremely small parasitic capacitance and inductance, so that an optical receiving device with low noise and high design flexibility can be configured.

Further, since the parasitic capacitance is small, the diameter of the photodiode having the same input capacitance becomes large, and the saturation output of the photodiode increases, so that the high power after amplifying the input signal using the optical amplifier is used. Can be photoelectrically converted without deterioration of the waveform, and the voltage amplitude of the input stage increases. This makes it possible to integrate a noisy digital circuit. That is, a high-speed electric signal can be separated into a low-speed electric signal and output by the digital circuit, so that the subsequent wiring becomes easy.

Furthermore, in the array configuration, since the capacitance at the connection between the photodiode and the electronic circuit is small, crosstalk at the input stage is small. Of course, if the signal amplified by the optical amplifier is used for input, the voltage amplitude at the input stage increases, and the crosstalk tolerance also increases. Further, it is possible to further increase the input optical signal strength by using the photodiode as a UTC-photodiode so that a digital circuit with less crosstalk can be easily integrated.

[Brief description of the drawings]

FIG. 1 is a configuration diagram illustrating a first embodiment of an optical receiver according to the present invention.

FIG. 2 is a sectional view of a portion B in FIG.

3A and 3B are a cross-sectional view and a top view of the electronic integrated circuit in FIG.

FIG. 4 is a diagram for explaining the capacitance of the photodiode in the first embodiment of the present invention.

FIG. 5 is a diagram showing a modification of the first embodiment of the present invention.

FIG. 6 is a diagram showing another modification of the first embodiment.

FIG. 7 is a diagram (part 1) for explaining the method of manufacturing the electronic integrated circuit in the first embodiment of the present invention.

FIG. 8 is a diagram (part 2) for explaining the method of manufacturing the electronic integrated circuit in the first embodiment of the present invention.

FIGS. 9A and 9B are views for explaining a method of manufacturing an electronic integrated circuit according to the first embodiment of the present invention (part 3), wherein FIG. 9A is a view of alignment between substrates, and FIG. FIG. 3C is a diagram showing an etched state.

FIGS. 10A and 10B are diagrams for explaining a method of manufacturing an electronic integrated circuit according to the first embodiment of the present invention (part 4), wherein FIG. 10A shows a divided state of a chip and FIG. FIG.

FIG. 11 is a view (No. 5) for explaining the method of manufacturing the electronic integrated circuit in the first embodiment of the present invention.

FIG. 12 is a view (No. 6) for explaining the method of manufacturing the electronic integrated circuit in the first embodiment of the present invention.

FIG. 13 is a configuration diagram showing a second embodiment of the optical receiver of the present invention.

FIG. 14 is a diagram for explaining an output current of a photodiode according to the second embodiment of the present invention.

FIG. 15 is a configuration diagram showing a third embodiment of the optical receiver of the present invention.

FIG. 16 is a sectional view of an electronic integrated circuit according to a second embodiment.

FIG. 17 is a configuration diagram showing a fourth embodiment of the optical receiver of the present invention.

FIG. 18 is a configuration diagram showing a fifth embodiment of the optical receiver according to the present invention.

FIG. 19 is a sectional view of a portion D in FIG. 18;

FIG. 20 is a configuration diagram showing a sixth embodiment of the optical receiver according to the present invention.

FIG. 21 is a configuration diagram of a conventional optical receiving device.

FIG. 22 is a top view of the integrated portion of FIG. 21;

FIG. 23 is a sectional view of a portion A in FIG. 22;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 101 Planar optical circuit board 102 Receiving circuit 103 Amplifier 104 Clock extraction circuit 105 Separation circuit 106 Electrical wiring 107 LSI power supply line 108 Optical waveguide 109 Branch 111 Photodiode 111a Single carrier traveling type photodiode (UT
C-photodiode) 112 Silicon substrate 113 SiO ₂ layer (lower clad) 114 SiO ₂ layer (core) 115 SiO ₂ layer (upper clad) 116 Resin 117 Reflective film 118 Polyimide 119 Solder 120 Electronic circuit 121 Insulating film 122 Low reflection coating 123 electrode pad 124a first contact hole 124b second contact hole 125 protective layer 126 electronic circuit board 127 protocol processing circuit 128 optical amplifier 129 arrayed waveguide diffraction grating 130 matching circuit 131 mirror 132 holding substrate 133 adhesive 134 optical fiber 201 Planar optical circuit board 202 Receiver circuit (array) 203 Transmission line 204 Electronic circuit board 205 Silicon substrate 206 SiO ₂ layer (lower clad) 207 SiO ₂ layer (core) 208 SiO ₂ layer (upper clad) 209 Resin 210 Reflective film 211 Polyimide etc. 212 Electrical wiring 213 Solder 214 InP substrate 215 Wire 216 Electronic circuit pad 217 Photo diode

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Noboru Ishihara 2-3-1 Otemachi, Chiyoda-ku, Tokyo Inside Nippon Telegraph and Telephone Corporation (72) Inventor Hiroshi Terui 2-3-3, Otemachi, Chiyoda-ku, Tokyo No. 1 Nippon Telegraph and Telephone Corporation (72) Inventor Tadao Ishibashi 2-3-1 Otemachi, Chiyoda-ku, Tokyo F-Term within Nippon Telegraph and Telephone Corporation 5F049 MA04 MB07 NA03 NA04 NB01 PA20 QA02 RA02 SE05 SS04 SZ01 TA11 TA14 UA20 5K002 AA03 BA07 BA31 CA13 CA21 FA01

Claims (6)

[Claims] 1. An electronic circuit board comprising a protective layer provided on a surface of an electronic circuit, and a photoelectric conversion element integrated on the electronic circuit board via an insulating layer. A first contact hole for connecting a first electrode of the conversion element to the electronic circuit is provided, and a second contact hole for connecting a second electrode of the photoelectric conversion element to the electronic circuit is provided. Optical receiving device. 2. The photoelectric conversion device according to claim 1, wherein the photoelectric conversion device is a single carrier traveling type photodiode.
The optical receiving device according to claim 1. 3. A removing means for removing a semiconductor substrate provided on said electronic circuit board via said insulating layer, except for a portion where said photoelectric conversion element is formed. 3. The optical receiver according to 2. 4. The relationship of 0.5 Cd <Ca <3 Cd when the first stage input capacitance of the electronic circuit is Ca and the capacitance of the photoelectric conversion element is Cd. Or the optical receiver according to 3. 5. The optical receiver according to claim 1, wherein the diameter of the photoelectric conversion element is 20 μm or more. 6. The optical receiver according to claim 1, wherein an optical amplifier is provided in an optical path at a stage preceding the electronic circuit.