JP2001068652A5

JP2001068652A5 -

Info

Publication number: JP2001068652A5
Application number: JP1999244018A
Authority: JP
Filing date: 1999-08-30
Publication date: 2005-06-09
Anticipated expiration: 2019-08-30

Description

この場合、前記トンネル酸化膜の膜厚より、前記第１酸化膜の膜厚の方が、厚くなるようにしてもよい。
また、本発明に係る不揮発性半導体記憶装置の製造方法は、メモリセルトランジスタが形成されるメモリセルトランジスタ形成領域と、前記メモリセルトランジスタに対する周辺トランジスタが形成される周辺トランジスタ形成領域とを有する、不揮発性半導体記憶装置の製造方法であって、
前記メモリセルトランジスタ形成領域における半導体基板上に、トンネル酸化膜を形成する工程と、
前記周辺トランジスタ形成領域における半導体基板上に、第１酸化膜を形成する工程と、
前記トンネル酸化膜と前記第１酸化膜と前記半導体基板の表面側とにおける各トレンチアイソレーション形成領域に開口を形成し、前記開口の間に位置する前記半導体基板表面側を活性領域とする工程と、
前記半導体基板の丸め酸化を行うことにより、少なくとも、前記活性領域上に位置する前記第１酸化膜部分に、バーズビークを侵入させる工程と、
前記メモリセルトランジスタ形成領域と前記周辺トランジスタ形成領域とにおける前記各トレンチアイソレーション形成領域の前記開口に、埋込酸化膜を埋め込んでトレンチアイソレーションを形成する工程と、
前記周辺トランジスタ形成領域における前記活性領域上の前記第１酸化膜を、除去する工程と、
を備えることを特徴とする。
In this case, the thickness of the first oxide film may be larger than the thickness of the tunnel oxide film.
Further, a method of manufacturing a nonvolatile semiconductor memory device according to the present invention includes non-volatile memory including a memory cell transistor formation region in which a memory cell transistor is formed and a peripheral transistor formation region in which a peripheral transistor for the memory cell transistor is formed. And a method of manufacturing a nonvolatile semiconductor memory device,
Forming a tunnel oxide film on the semiconductor substrate in the memory cell transistor formation region;
Forming a first oxide film on the semiconductor substrate in the peripheral transistor formation region;
Forming an opening in each trench isolation formation region on the tunnel oxide film, the first oxide film, and the surface side of the semiconductor substrate, and using the surface side of the semiconductor substrate located between the openings as an active region; ,
Causing the bird's beak to penetrate at least the first oxide film portion located on the active region by performing rounding oxidation on the semiconductor substrate;
Forming a trench isolation by embedding a buried oxide film in the openings of the trench isolation formation regions in the memory cell transistor formation region and the peripheral transistor formation region;
Removing the first oxide film on the active region in the peripheral transistor formation region;
And the like.

Claims

Forming a first oxide film on the semiconductor substrate;
Forming an opening in a trench isolation forming region on the first oxide film and the surface side of the semiconductor substrate, and using the surface side of the semiconductor substrate located between the openings as an active region;
Introducing a bird's beak into the first oxide film portion on the active region by performing rounding oxidation on the semiconductor substrate;
Embedding a buried oxide film in the opening of each of the trench isolation forming regions to form a trench isolation;
Removing the first oxide film on the active region;
A method of manufacturing a semiconductor device, comprising:

Forming a first gate oxide film on the active region from which the first oxide film has been removed;
Removing the first gate oxide film in a partial region above the active region;
Forming a second gate oxide film on the active region from which the first gate oxide film has been removed, and growing a film thickness of the first gate oxide film;
And further
In the step of forming the first oxide film,
Forming a thermal oxide film by thermal oxidation;
Forming a TEOS-based oxide film by a CVD method using Si (OC ₂ H ₅ ) ₄ ;
The method of manufacturing a semiconductor device according to claim 1, comprising:

The penetration amount of the bird's beak is controlled by changing the ratio of the thickness of the thermal oxide film to the thickness of the TEOS-based oxide film in the first oxide film .
An amount obtained by combining the amount of penetration of the bird's beak with the amount of receding of the active region generated when removing the first oxide film and the amount of receding of the active region generated when removing the first gate oxide film The method of manufacturing a semiconductor device according to claim 2 , wherein the control is performed so as to be larger than the size .

A method of manufacturing a nonvolatile semiconductor memory device, comprising: a memory cell transistor formation region in which a memory cell transistor is formed; and a peripheral transistor formation region in which a peripheral transistor for the memory cell transistor is formed.
Forming a tunnel oxide film on the semiconductor substrate in the memory cell transistor formation region;
Forming a polysilicon layer to be at least a part of a floating gate on the tunnel oxide film in the memory cell transistor formation region;
Forming a first oxide film on the semiconductor substrate in the peripheral transistor formation region;
Forming an opening in each trench isolation formation region on the tunnel oxide film, the first oxide film, and the surface side of the semiconductor substrate, and using the surface side of the semiconductor substrate located between the openings as an active region; ,
Causing the bird's beak to penetrate at least the first oxide film portion located on the active region by performing rounding oxidation on the semiconductor substrate;
Forming a trench isolation by embedding a buried oxide film in the openings of the trench isolation formation regions in the memory cell transistor formation region and the peripheral transistor formation region;
Removing the first oxide film on the active region in the peripheral transistor formation region;
A method of manufacturing a non-volatile semiconductor memory device, comprising:

A method of manufacturing a nonvolatile semiconductor memory device, comprising: a memory cell transistor formation region in which a memory cell transistor is formed; and a peripheral transistor formation region in which a peripheral transistor for the memory cell transistor is formed.
  Forming a tunnel oxide film on the semiconductor substrate in the memory cell transistor formation region;
  Forming a first oxide film on the semiconductor substrate in the peripheral transistor formation region;
  Forming an opening in each trench isolation formation region on the tunnel oxide film, the first oxide film, and the surface side of the semiconductor substrate, and using the surface side of the semiconductor substrate located between the openings as an active region; ,
  Causing the bird's beak to penetrate at least the first oxide film portion located on the active region by performing rounding oxidation on the semiconductor substrate;
  Forming a trench isolation by embedding a buried oxide film in the openings of the trench isolation formation regions in the memory cell transistor formation region and the peripheral transistor formation region;
  Removing the first oxide film on the active region in the peripheral transistor formation region;
  A method of manufacturing a non-volatile semiconductor memory device, comprising: