JP2001067206A - モジュラー乗算を実行するためのシステム並びに方法 - Google Patents

モジュラー乗算を実行するためのシステム並びに方法

Info

Publication number
JP2001067206A
JP2001067206A JP2000219243A JP2000219243A JP2001067206A JP 2001067206 A JP2001067206 A JP 2001067206A JP 2000219243 A JP2000219243 A JP 2000219243A JP 2000219243 A JP2000219243 A JP 2000219243A JP 2001067206 A JP2001067206 A JP 2001067206A
Authority
JP
Japan
Prior art keywords
multiplication
multiplication unit
partition
bit
integer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000219243A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001067206A5 (enExample
Inventor
Dominic Hugo Symes
ユーゴ サイムズ ドミニク
James Seale David
ジェームズ シール デビッド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd, Advanced Risc Machines Ltd filed Critical ARM Ltd
Publication of JP2001067206A publication Critical patent/JP2001067206A/ja
Publication of JP2001067206A5 publication Critical patent/JP2001067206A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/728—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic using Montgomery reduction

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
JP2000219243A 1999-07-21 2000-07-19 モジュラー乗算を実行するためのシステム並びに方法 Pending JP2001067206A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9917137A GB2352309B (en) 1999-07-21 1999-07-21 A system and method for performing modular multiplication
GB9917137.3 1999-07-21

Publications (2)

Publication Number Publication Date
JP2001067206A true JP2001067206A (ja) 2001-03-16
JP2001067206A5 JP2001067206A5 (enExample) 2007-01-25

Family

ID=10857681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000219243A Pending JP2001067206A (ja) 1999-07-21 2000-07-19 モジュラー乗算を実行するためのシステム並びに方法

Country Status (3)

Country Link
US (1) US6598061B1 (enExample)
JP (1) JP2001067206A (enExample)
GB (1) GB2352309B (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7080109B2 (en) * 2000-06-29 2006-07-18 State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Oregon State University Methods and apparatus for incomplete modular arithmetic
GB2383435A (en) * 2001-12-18 2003-06-25 Automatic Parallel Designs Ltd Logic circuit for performing modular multiplication and exponentiation
US7266577B2 (en) * 2002-05-20 2007-09-04 Kabushiki Kaisha Toshiba Modular multiplication apparatus, modular multiplication method, and modular exponentiation apparatus
US20040010530A1 (en) * 2002-07-10 2004-01-15 Freking William L. Systolic high radix modular multiplier
GB2396718B (en) * 2002-12-23 2005-07-13 Arithmatica Ltd A logic circuit and method for carry and sum generation and method of designing such a logic circuit
US7185039B2 (en) * 2003-05-19 2007-02-27 Lsi Logic Corporation Multiplier for modular exponentiation
KR20050088506A (ko) * 2004-03-02 2005-09-07 삼성전자주식회사 다중 세정도를 지원하는 확장형 몽고메리 모듈러 곱셈기
US20050257026A1 (en) * 2004-05-03 2005-11-17 Meeker Woodrow L Bit serial processing element for a SIMD array processor
US7519644B2 (en) * 2004-05-27 2009-04-14 King Fahd University Of Petroleum And Minerals Finite field serial-serial multiplication/reduction structure and method
US20060140399A1 (en) * 2004-12-28 2006-06-29 Young David W Pre-calculation mechanism for signature decryption
JP4182226B2 (ja) * 2005-08-24 2008-11-19 国立大学法人名古屋大学 剰余系の計算方法及び装置並びにプログラム
US7805479B2 (en) * 2006-03-28 2010-09-28 Michael Andrew Moshier Scalable, faster method and apparatus for montgomery multiplication
US8799343B2 (en) * 2011-09-22 2014-08-05 Intel Corporation Modular exponentiation with partitioned and scattered storage of Montgomery Multiplication results
CN115202616B (zh) * 2022-06-24 2025-12-19 上海途擎微电子有限公司 模乘器、安全芯片、电子设备及加密方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69329260T2 (de) * 1992-06-25 2001-02-22 Canon K.K., Tokio/Tokyo Gerät zum Multiplizieren von Ganzzahlen mit vielen Ziffern
US5513133A (en) * 1992-11-30 1996-04-30 Fortress U&T Ltd. Compact microelectronic device for performing modular multiplication and exponentiation over large numbers
FR2726667B1 (fr) * 1994-11-08 1997-01-17 Sgs Thomson Microelectronics Procede de mise en oeuvre de multiplication modulaire selon la methode montgomery
EP0890147B1 (en) * 1996-10-31 2004-02-25 Atmel Research Co-processor for performing modular multiplication
US6085210A (en) * 1998-01-22 2000-07-04 Philips Semiconductor, Inc. High-speed modular exponentiator and multiplier
FR2775369B1 (fr) * 1998-02-26 2001-08-03 Sgs Thomson Microelectronics Procede de mise en oeuvre d'une multiplication modulaire specifique relative a la methode de montgomery
EP0947914B1 (en) * 1998-03-30 2004-12-15 Rainbow Technologies Inc. Computationally efficient modular multiplication method and apparatus
US6240436B1 (en) * 1998-03-30 2001-05-29 Rainbow Technologies, Inc. High speed montgomery value calculation

Also Published As

Publication number Publication date
GB2352309A (en) 2001-01-24
US6598061B1 (en) 2003-07-22
GB9917137D0 (en) 1999-09-22
GB2352309B (en) 2004-02-11

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