JP2001060717A - Light emitting thyristor and self-scanning light emitting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the deterioration of device characteristics due to lattice mismatching or an unclear impurity level in a light emitting thyristor in which first conductive and second conductive AlGaAs layers are alternately laminated in four layers on a GaAs buffer layer on a GaAs substrate. SOLUTION: In this light emitting thyristor, AlGaAs layers are epitaxially grown by changing Al composition from 0 through 0.1, 0.2, and 0.3 to 0.35 on a GaAs buffer layer 12 on a GaAs substrate 10. That is, an AlGaAs layer 30-1 whose Al composition is 0.1, an AlGaAs layer 30-2 whose Al composition is 0.2, an AlGaAs layer 30-3 whose Al composition is 0.3, and an AlGaAs layer 30-4 whose Al composition is 0.35 are successively grown epitaxially.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a light emitting thyristor,
And a self-scanning light emitting device using such a light emitting thyristor.

[0002]

2. Description of the Related Art A self-scanning light-emitting device using a surface-emitting light-emitting thyristor is disclosed in Japanese Patent Application Laid-Open No. 2-14584.
The light-emitting thyristor for edge emission is disclosed in Japanese Patent Application Laid-Open No. Hei 9-85885 to the present applicant.

The basic structure of a surface emitting thyristor and an edge emitting thyristor are the same, for example, a G light emitting device on a GaAs substrate.
An AlGaAs layer (Al composition, for example, 0.35) is crystal-grown following the aAs buffer layer.

FIG. 1 is a schematic sectional view showing a basic structure of a light emitting thyristor. In FIG. 1, reference numeral 10 denotes a p-type GaAs.
a p-type GaAs buffer layer 12, a p-type AlGaAs layer 14, an n-type AlGaAs layer 1
6, p-type AlGaAs layer 18, n-type AlGaAs layer 20
Are sequentially laminated. A cathode electrode 22 is provided on the AlGaAs layer 20, a gate electrode 24 is provided on the AlGaAs layer 18, and an anode electrode 26 is provided on the back surface of the GaAs substrate.

In this example, a p-type layer, an n-type layer, a p-type layer, and an n-type layer are stacked in this order on a p-type GaAs substrate with a buffer layer interposed therebetween, but a buffer is formed on the n-type GaAs substrate. When an n-type layer, a p-type layer, an n-type layer, and a p-type layer are stacked in that order, the uppermost layer electrode is an anode electrode and the lowermost electrode is a cathode electrode.

The present inventors have realized that the self-scanning function of the emitted light can be realized by arranging the light emitting thyristors having such a structure in an array and giving appropriate interaction between the light emitting thyristor arrays. The above publication discloses that the light source for an optical printer can be easily mounted, the arrangement pitch of the light emitting elements can be reduced, and a compact self-scanning light emitting device can be manufactured.

[0007]

In the light emitting thyristor having the above structure, at the interface between the GaAs buffer layer on the GaAs substrate and the AlGaAs layer on the buffer layer, the Al composition greatly changes, for example, the Al composition. Since the Al composition changes from 0 to 0.35, the change in the lattice constant is small, but the abrupt change causes disturbance of the lattice at the interface or large deformation of the energy band. This increases the lattice mismatch at the interface,
Dislocation occurs. In addition, the energy gap difference at the interface increases, and the deformation of the energy band increases due to bonding.

As described above, in the light emitting thyristor formed by growing AlGaAs on a GaAs substrate with a GaAs buffer layer interposed, a GaAs layer and an AlG
At the interface with the aAs layer, there is a problem that device characteristics are deteriorated due to, for example, an increase in threshold current value and holding current due to induction of lattice defects due to lattice mismatch and formation of unclear impurity levels. . In addition, there is also a problem in that external quantum efficiency is reduced due to the generation of defects serving as carrier killers near these interfaces, and the amount of emitted light is reduced.

An object of the present invention is to provide a light-emitting thyristor which does not cause deterioration of device characteristics due to the above.

Another object of the present invention is to provide a self-scanning light emitting device using such a light emitting thyristor.

[0011]

According to the present invention, a first conductivity type and a second conductivity type are formed on a GaAs buffer layer on a GaAs substrate.
In a light-emitting thyristor in which four conductive AlGaAs layers are alternately stacked, A is located immediately above the GaAs buffer layer.
The 1GaAs layer changes so that the Al composition increases stepwise, or the AlGaAs layer immediately above the GaAs buffer layer changes so that the Al composition continuously increases. It is a light emitting thyristor characterized.

In such a light emitting thyristor, since the Al composition changes gradually, the GaAs buffer layer and the Al
Lattice defects such as dislocations due to lattice mismatch at the interface with the GaAs layer can be reduced, and extreme deformation of the energy band at the interface can be reduced.

In gradually changing the Al composition, insertion of a single or multiple quantum well or a strained superlattice structure using a strained layer is considered to be effective. At this time, by forming a quantum well layer or a superlattice layer that satisfies the high reflection condition, light to the substrate side is reflected, so that an improvement in the amount of emitted light can be expected.

If there is a possibility that misfit dislocations may occur in the AlGaAs layer in which the Al composition changes stepwise or continuously, the propagation of the misfit dislocations may be stopped by removing the misfit dislocations in the AlGaAs layer. May be provided with a quantum well layer or a strained superlattice structure.

According to the present invention, a self-scanning light emitting device having the following structure can be realized by using a light emitting thyristor as a light emitting element.

In the first structure, a plurality of light emitting thyristors are arranged, and a gate electrode of each light emitting thyristor is connected to a gate electrode of at least one light emitting thyristor located near the light emitting thyristor.
This is a self-scanning light-emitting device in which a plurality of wirings to which a voltage is applied from the outside are connected to an anode electrode of each light-emitting thyristor, which is connected through an electric element having electric resistance or an electric unidirectionality.

In the second structure, a plurality of thyristors are arranged, and a gate electrode of each thyristor is connected to at least one gate electrode of the thyristor located near the thyristor by an electric element having electric resistance or electric unidirectionality. A self-scanning switch element array formed by connecting a power supply line to the gate electrode of each thyristor using electrical means, and connecting a clock line to the anode electrode of each thyristor; and a light emitting thyristor. A plurality of light-emitting element arrays arranged, a plurality of light-emitting thyristors constituting the light-emitting element array, each gate electrode is connected to the gate electrode of the thyristor constituting the self-scanning switch element array by electrical means, Self-scanning light emitting device provided with a line for applying a current for light emission to the anode electrode of each light emitting thyristor It is.

According to the self-scanning light-emitting device having such a structure, it is possible to realize a light-emitting device having good external light-emitting efficiency, high definition, compactness, and low cost.

[0019]

FIG. 2 is a diagram showing a first embodiment, in which Al _{x is formed} on a GaAs buffer layer on a GaAs substrate.
This shows a state in which Ga _1-x As is epitaxially grown while the Al composition x is gradually increased stepwise from 0 (GaAs) to 0.35. In addition, GaAs, Al
Regardless of the conductivity type (n-type, p-type) of GaAs, the method of epitaxial growth is the same, and therefore, the embodiment will be described without distinguishing the conductivity type.

On the GaAs buffer layer 12 on the GaAs substrate 10, the Al composition is changed to 0, 0.1, 0.2, 0.3, 0.35 by changing the supply amount of the Al raw material. While growing, an AlGaAs layer is epitaxially grown. That is, an AlGaAs layer 30-1 having an Al composition of 0.1,
An AlGaAs layer 30-2 having an Al composition of 0.2, an AlGaAs layer 30-3 having an Al composition of 0.3, and an Al composition of 0.3
The five AlGaAs layers 30-4 are sequentially epitaxially grown.

As described above, the four AlGaAs layers 30-1, 30-2, 30-3, and Al-4 whose Al compositions are increased in a stepwise manner.
Reference numeral 30-4 corresponds to the AlGaAs layer 14 in FIG.

In this case, the GaAs buffer layers 12 to Al
The entire film thickness up to the GaAs layer 30-4 is set according to the carrier confinement efficiency.

The subsequent steps are the same as those of the conventional example shown in FIG. 1, in which AlGaAs layers having an Al composition of 0.35 or more are sequentially epitaxially grown.

FIG. 3 is a diagram showing a second embodiment.
Al _x Ga _{1 -x} on the GaAs buffer layer on the aAs substrate
As is epitaxially grown while continuously changing the Al composition x from 0 to 0.35. Such a change in the Al composition is realized by continuously changing at least one of the supply amounts of Al and Ga during epitaxial growth.

As described above, the G on the GaAs substrate 10
An AlGaAs layer 32-1 in which the Al composition continuously changes from 0 to 0.35 is formed on the aAs buffer layer 12, and subsequently, the AlGaAs layer 32 having an Al composition of 0.35 is formed.
-2 is formed.

As described above, the two AlGaAs layers 32-1 and 32-2 in which the Al composition is continuously increased correspond to A in FIG.
It corresponds to the lGaAs layer 14.

In this case, the GaAs buffer layers 12 to Al
The entire film thickness up to the GaAs layer 32-2 is set according to the carrier confinement efficiency.

The subsequent steps are the same as those of the conventional example shown in FIG. 1, in which AlGaAs layers having an Al composition of 0.35 or more are sequentially epitaxially grown.

As in the first and second embodiments described above, by gradually changing the Al composition, dislocations and the like due to lattice mismatch at the interface between the GaAs buffer layer and the AlGaAs layer are obtained. Lattice defects can be reduced, and extreme deformation of the energy band at the interface can be reduced. This reduces the effect on device characteristics.

The light emitting thyristor fabricated on the wafer was brought into contact with a probe of a manual prober on a cathode electrode and a gate electrode for each element, and the anode electrode was taken out of a metal plate brought into contact with the back surface of the substrate.

The threshold current, holding current and light output of the light emitting thyristor were measured by the following methods. As for the threshold current, a probe in contact with the three terminals of the thyristor was connected as shown in FIG. 4, the output of the constant current source I _k was changed, and the cathode voltage V _k and the gate current _Ig were measured. FIG. 5 shows a typical example of the measurement data. Immediately before the gate current was inverted, the maximum current was determined, and this was defined as the threshold current. On the other hand, the holding current was _obtained by measuring V _k while similarly changing I _k . FIG. 6 shows a typical example of the I _k -V _k characteristic. The holding current may not be shown as a clear transition point as shown in the figure,
It was defined as the point where the cathode voltage exceeded a certain value (for example, 0.2 V). The light output was _obtained by connecting the gate electrode to the anode electrode via a resistor, and measuring the light output with a photodiode when I _k was set to an appropriate value (for example, 13 mA). Since the absolute value of the light output changes depending on the area of the light emitting region and the degree of light shielding by the cathode electrode, the absolute values must be compared under the same structure and the same driving current. 15 to 20 devices were measured, and the obtained threshold current was reduced by about 20% on average and the holding current was reduced by about 15% as compared with the case without the intermediate layer. Light output increased on average by about 10%.

FIG. 7 is a diagram showing a third embodiment.
A quantum well layer 34 is formed on the GaAs buffer layer 12 on the aGaAs substrate 10, and an AlGaAs layer 14 and an AlGaAs layer are formed on the quantum well layer 34 in the same manner as in the conventional structure of FIG.
The layers 16 are formed by epitaxial growth. Such a quantum well layer functions similarly to the AlGaAs layer in which the Al composition is increased stepwise and the AlGaAs layer in which the Al composition changes continuously in the first and second embodiments.
Lattice defects such as dislocations due to lattice mismatch at the interface between the aAs buffer layer and the AlGaAs layer can be reduced, and extreme deformation of the energy band at the interface can be reduced.

In this case, by forming the quantum well layer so as to satisfy the high reflection condition, the light emitting thyristor having the surface light emission reflects the light toward the GaAs substrate, so that an improvement in the amount of emitted light can be expected. .

In this embodiment, the quantum well layer is made of GaAs.
It may be provided in the AlGaAs layer 14 instead of the interface between the buffer layer 12 and the AlGaAs layer 14. Similar effects can be obtained by using a strained superlattice structure instead of the quantum well layer.

Also, the AlGaAs of the first and second embodiments in which the Al composition is changed stepwise or continuously.
In the s layer, misfit dislocations generated due to lattice mismatch at the semiconductor interface may propagate through the AlGaAs layer to reach the upper layer, which may affect thyristor characteristics.

An embodiment in which the propagation of such misfit dislocations is reduced and stopped will be described below.

FIG. 8 shows a fourth embodiment. In the structure of FIG. 2, a quantum well layer or a strained superlattice structure 36 is provided in the AlGaAs layer 30-4. As a result, propagation of misfit dislocations can be stopped.

FIG. 9 shows a fifth embodiment. In the structure of FIG. 3, a quantum well layer or a strained superlattice structure 38 is provided in the AlGaAs layer 32-2. As a result, propagation of misfit dislocations can be stopped.

The following describes three basic structures of a self-scanning light-emitting device to which the light-emitting thyristor described above can be applied.

FIG. 10 is an equivalent circuit diagram of the first basic structure of the self-scanning light emitting device. Light emitting thyristors T (−2) to T (+2) are used as light emitting elements, and the light emitting thyristors T (−2) to T (+2) have gate electrodes G _{−2 to} G− ₂ , respectively.
₊₂ is provided. A power supply voltage V _GK is applied to each gate electrode via a load resistor _RL . Each of the gate electrodes G _{-2 to} G ₊₂ is connected to a resistor R in order to create an interaction.
It is electrically connected via _I. Also, three transfer clock lines (φ1, φ2, φ3) are connected to the anode electrode of each single light emitting thyristor every third element (as if repeated).

In operation, first, the transfer clock φ ₃
Becomes high level, and the light-emitting thyristor T (0) is turned on. At this time, from the characteristics of the three-terminal thyristor,
The gate electrode G ₀ is lowered to zero volts nearby. Assuming that the power supply voltage V _GK is 5 volts, the gate voltage of each light emitting thyristor is determined from the network of the load resistance R _L and the interaction resistance R _I. Then, the light emitting thyristor T (0)
, The gate voltage of the element close to
As the distance from (0) increases, the gate voltage increases. This can be expressed as:

V _G0 <V _G1 = V _G−1 <V _G2 = V _G−2 (1) The difference between these voltages is the load resistance R _L and the interaction resistance R _I
Can be set by appropriately selecting the value of.

It is known that the turn-on voltage V _ON on the anode side of the three-terminal thyristor is higher than the gate voltage by the diffusion potential V _dif .

V _ON ≒ V _G + V _dif (2) Therefore, if the voltage applied to the anode is set higher than the turn-on voltage V _ON , the light emitting thyristor is turned on.

[0045] Now a state where the light-emitting thyristor T (0) is turned on to apply a high-level voltage V _H to the next transfer clock pulse phi _1. This clock pulse φ ₁ is simultaneously applied to the light emitting thyristors T (+1) and T (−2),
When the value of the high level voltage V _H is set in the following range, only the light emitting thyristor T (+1) can be turned on.

V _G−2 + V _dif > V _H > V _{G + 1} + V _dif (3) The light emitting thyristors T (0) and T (+1) are simultaneously turned on. When the cut high-level voltage of the clock pulse phi _3, so that the light-emitting thyristor T (0) is able to transfer it becomes ON state and OFF.

As described above, in the self-scanning light-emitting device, the light-emitting thyristors can be provided with a transfer function by connecting the gate electrodes of the respective light-emitting thyristors by the resistance network. From the above-described principle, if the high-level voltages of the transfer clocks φ ₁ , φ ₂ , and φ ₃ are set so as to slightly overlap each other in order, the ON state of the light-emitting thyristor is sequentially transferred. That is, the light emitting points are sequentially transferred, and a self-scanning light emitting element array can be realized.

FIG. 11 is an equivalent circuit diagram of the second basic structure of the self-scanning light emitting device. This self-scanning light emitting device uses a diode as a method of electrical connection between gate electrodes of a light emitting thyristor. Light emitting thyristor T (-
2) to T (+2) are arranged in a line. G _{-2 to} G ₊₂ are light-emitting thyristors T (−2) to T (+
2) represents each gate electrode. R _L represents the load resistance of the gate electrode, and D _{−2 to} D ₊₂ represent diodes that perform electrical interaction. V _GK represents a power supply voltage. Two transfer clock lines (φ1, φ2) are connected to the anode electrode of each single light emitting thyristor every other element.

The operation will be described. Transfer clock phi ₂ becomes high level first, and the light-emitting thyristor T (0) is turned on. At this time, due to the characteristics of the three-terminal thyristor, the gate electrode G ₀ is lowered to near zero volt. Assuming that the power supply voltage V _GK is 5 volts, the gate voltage of each light emitting thyristor is determined from the network of the resistor R _L and the diodes D _{-2 to} D ₊₂ . Then, the gate voltage of the element close to the light emitting thyristor T (0) decreases most, and thereafter the gate voltage increases as the distance from T (0) increases.

However, due to the unidirectionality and asymmetry of the diode characteristics, the effect of lowering the voltage works only to the right of T (0). That is, the gate electrode G ₁ is set to a voltage higher than G ₀ by the forward rise voltage V _{dif of the} diode, and the gate electrode G ₂ is set to a voltage higher than G _{1 by} the forward rise voltage V _{dif of the} diode. Is done. On the other hand, the gate electrode G on the left side of T (0)
_{At -1,} no current flows because the diode D _-1 is reverse-biased, and therefore has the same potential as the power supply voltage V _GK .

The next transfer clock pulse φ ₁ corresponds to the nearest light emitting thyristors T (1), T (−1), and T (3).
And T (−3), among which:
The element with the lowest turn-on voltage is T (1),
Turn-on voltage of about G ₁ of the gate voltage of the T (1) + V
_dif , which is about twice V _dif . The element with the next lowest turn voltage is T (3), which is about four times V _dif . The ON voltage of T (-1) and T (-3) is about V _GK +
V _dif .

[0052] From the above, by setting the high-level voltage of the transfer clock pulses between about 2 times the V _dif of approximately 4 times the V _dif, it is possible to turn on only the light-emitting thyristor T (1), A transfer operation can be performed.

FIG. 12 is an equivalent circuit diagram of the third basic structure of the self-scanning light emitting device. This self-scanning light emitting device includes switch elements T (-1) to T (2) and write light emitting elements L (-1) to L (2). The configuration of the switch element portion shows an example using diode connection.
The gate electrodes G _{−1 to} G ₁ of the switch element are also connected to the gate of the light emitting element for writing. A write signal S _in is applied to the anode of the light emitting element for writing.

The operation of the self-scanning light emitting device will be described below. Now, assuming that the transfer element T (0) is in the ON state, the voltage of the gate electrode G ₀ falls below V _GK (here, 5 volts) and becomes almost zero volt. Therefore, when the voltage of the write signal S _in is equal to or higher than the diffusion potential of the pn junction (about 1 volt), the light emitting element L (0) can be made to emit light.

[0055] In contrast, the gate electrode G _-1 is about 5 volts, the gate electrode G ₁ is about 1 volt. Therefore, the writing voltage of the light emitting element L (-1) is about 6 volts,
The write voltage of the light emitting element L (1) is about 2 volts.
Now, the voltage of the write signal S _in which can write only in the light emitting element L (0) is a range of about 1 to 2 volts. When the light emitting element L (0) is turned on, that is, when the light emitting element enters a light emitting state, the voltage of the write signal S _in line is fixed at about 1 volt, so that an error that another light emitting element is selected can be prevented. it can.

The light emission intensity is determined by the amount of current flowing _{in the} write signal _Sin, and an image can be written at an arbitrary intensity. Further, in order to transfer the light emitting state to the next element, it is necessary to once lower the voltage of the write signal S _in line to zero volt and turn off the light emitting element once.

For a self-scanning light-emitting device in which such a light-emitting thyristor is integrated, an element having an intermediate layer inserted was also manufactured. The element manufacturing method may be the same as the conventional one except for the growth of the intermediate layer. As an integrated device, the threshold current and the holding current of each light emitting thyristor are not directly reflected, but the light output shows the same improvement as the single light emitting thyristor.

The self-scanning light-emitting device having the light-emitting element of the self-scanning light-emitting device using the light-emitting thyristor of the present invention can be applied to an optical print head and the like.
When used in an optical print head, high-quality printing can be realized because the external luminous efficiency of each light emitting element is improved.

[0059]

According to the present invention, a rapid change in the lattice constant can be prevented by gradually changing the Al composition of AlGaAs epitaxially grown on the GaAs buffer layer, and the deformation of the energy band can be suppressed. it can.

Therefore, since the occurrence of lattice defects is prevented and the unclear impurity levels are suppressed, an improvement in the amount of emitted light can be expected due to a reduction in device characteristics such as a threshold current and a holding current and a reduction in generation of carrier killers.

According to the present invention, it is possible to provide a self-scanning light-emitting device in which the light-emitting thyristors are arrayed and a self-scanning function is added to increase the external light-emitting efficiency.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of a conventional light emitting thyristor.

FIG. 2 is a diagram showing a first embodiment of the present invention.

FIG. 3 is a diagram showing a second embodiment of the present invention.

FIG. 4 is a diagram illustrating a circuit for evaluating characteristics of a light emitting thyristor.

FIG. 5 is a graph showing a measurement example of a threshold current.

FIG. 6 is a graph showing a measurement example of a holding current.

FIG. 7 is a diagram showing a third embodiment of the present invention.

FIG. 8 is a diagram showing a fourth embodiment of the present invention.

FIG. 9 is a diagram showing a fifth embodiment of the present invention.

FIG. 10 is an equivalent circuit diagram of a first basic structure of the self-scanning light emitting device.

FIG. 11 is an equivalent circuit diagram of a second basic structure of the self-scanning light emitting device.

FIG. 12 is an equivalent circuit diagram of a third basic structure of the self-scanning light emitting device.

[Explanation of symbols]

Reference Signs List 10 p-type GaAs substrate 12 p-type GaAs buffer layer 14 p-type AlGaAs layer 16 n-type AlGaAs layer 18 p-type AlGaAs layer 20 n-type AlGaAs layer 22 cathode electrode 24 gate electrode 26 anode electrode 30-1, 30-2, 30- 3,30-4 AlGaAs layer in which Al composition changes stepwise 32-1 AlGaAs layer in which Al composition changes continuously 34 Quantum well layer 36,38 Quantum well layer or strained superlattice structure

Claims (7)

[Claims] 1. A light-emitting thyristor in which four AlGaAs layers of a first conductivity type and a second conductivity type are alternately stacked on a GaAs buffer layer on a GaAs substrate, wherein the AlGaAs layer immediately above the GaAs buffer layer is , A
1. A light-emitting thyristor characterized in that the composition of 1 changes so as to increase stepwise upward. 2. An AlGa film immediately above said GaAs buffer layer.
2. The light emitting thyristor according to claim 1, wherein a quantum well layer or a strained superlattice structure is inserted in an uppermost layer of the As layer. 3. A light emitting thyristor in which four GaAs layers of a first conductivity type and a second conductivity type are alternately stacked on a GaAs buffer layer on a GaAs substrate, wherein the AlGaAs layer immediately above the GaAs buffer layer is , A
A light-emitting thyristor characterized in that the composition of 1 changes so as to increase continuously upward. 4. An AlGa film immediately above said GaAs buffer layer.
4. The light emitting thyristor according to claim 3, wherein a quantum well layer or a strained superlattice structure is inserted in the As layer. 5. A light-emitting thyristor in which four AlGaAs layers of a first conductivity type and a second conductivity type are alternately stacked on a GaAs buffer layer on a GaAs substrate, wherein the AlGaAs layer immediately above the GaAs buffer layer and A light emitting thyristor, wherein a quantum well layer or a strained superlattice structure is inserted between the AlGaAs layers or directly above the AlGaAs layer. 6. A plurality of light-emitting thyristors are arranged, and a gate electrode of each light-emitting thyristor is connected to a gate electrode of at least one light-emitting thyristor located near the light-emitting thyristor via an electric element having electric resistance or electric unidirectionality. A self-scanning light-emitting device in which a plurality of wirings for externally applying a voltage are connected to an anode electrode of each light-emitting thyristor, wherein the light-emitting thyristor is described in any one of claims 1 to 5. A self-scanning light emitting device, characterized in that it is a light emitting thyristor. 7. A plurality of thyristors are arranged, and a gate electrode of each thyristor is connected to a gate electrode of at least one thyristor located near the thyristor via an electric element having electric resistance or electric unidirectionality. A self-scanning switch element array formed by connecting a power supply line to the gate electrode of each thyristor using electrical means, and connecting a clock line to the anode electrode of each thyristor, and a plurality of light emitting thyristors are arranged. A light-emitting element array, wherein each gate electrode of the light-emitting thyristor constituting the light-emitting element array is electrically connected to a gate electrode of a thyristor constituting the self-scanning switch element array, and an anode of each light-emitting thyristor is formed. In a self-scanning light emitting device provided with a line for applying a current for light emission to the electrode, Optical thyristor is self-scanning light-emitting device which is a light-emitting thyristor which is described in any one of claims 1 to 5.