JP2001053820A - Digital demodulating device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a receiver for demodulating a wide band received signal with a ROM with a small capacity which can be loaded on a DSP. SOLUTION: A control circuit 7 detects the maximum value of channel signals outputted from low-pass filters 5a and 5b of a quadrature demodulator 10 from the sum of squares of co-phase components and quadrature components. When the number of quantization bits is converted into an n dynamic range, a DRC circuit 6 obtains a demodulator output signal normalized with the maximum value by a DRC circuit 6. Then, the normalized signal is multiplied by 1/2 of the n-th power of 2, and the figures below a decimal point are omitted so that a signal whose dynamic range is decreased can be obtained, and transmitted to a PM demodulating circuit 8. An ROM loaded on a present DSP copes with the arithmetic table of the PM demodulating circuit at that time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a demodulation apparatus using an operation table stored in a ROM in digital communication, and more particularly, to reducing a required ROM capacity by converting a dynamic range of a wideband received signal. The present invention relates to a demodulation device.

[0002]

2. Description of the Related Art In recent years, with the rapid development of digital circuit technology, an example of realizing a function realized by an analog circuit by a digital circuit is increasing. In the field of wireless communication, a received analog signal is digitized. Techniques for channel selection or modulation / demodulation using digital signal processing techniques have been actively used. FIG. 2 (a)
FIG. 11 is a schematic configuration diagram illustrating an example of a demodulator of a receiver using a conventional digital signal processing technique. As shown in the figure,
The present demodulator includes mixers 21a and 21b, a local signal generator 22, a 90 ° phase shifter 23, and a low-pass filter 24.
a, 24b, a quadrature demodulator 20, an A / D converter 2
5a and 25b and the demodulation unit 8.

In FIG. 1, a received signal is transmitted to a quadrature demodulator 20.
Are input to the mixers 21a and 21b, the received signal and the local signal from the local signal generator 22 are combined to obtain an in-phase component of a quadrature demodulated signal of a desired frequency. In the mixer 21b, the received signal and the 90 ° phase shifter 23
Are combined with the local signal from the local signal generator 22 whose phase is shifted by 90 ° to obtain an orthogonal component of an orthogonal demodulated signal of a desired frequency. From the output signals of the mixers 21a and 21b, signals other than the desired channel signal are removed by low-pass filters 24a and 24b, respectively.
Channel selection is performed. The low-pass filter 24
The channel signals output from a and 24b are A
The signals are converted into digital signals by the / D converters 25a and 25b, and output to the demodulation unit 8 as the in-phase component E ₁ (t) and the quadrature component E ₂ (t). For the channel signal selected as described above, it is necessary to secure S / N = 40 dB as the demodulator output in order to obtain normal reception performance. When this is converted into the number of quantization bits of the A / D converter, it becomes 5 bits. Therefore, the dynamic range of the A / D converter may be set to 5 bits or more. Therefore, a general-purpose 8-bit A / D converter can be used for the A / D converters 25a and 25b.

FIG. 2B is a functional block diagram showing an example of the demodulation section 8 having various demodulation circuits so that demodulation can be performed according to the modulation scheme of the communication system applied to the selected channel signal. In the figure, a PM demodulation circuit 8a, a differentiation circuit 8b, and an AM demodulation circuit 8c are configured. In the figure, the quadrature demodulated signals output from the A / D converters 25a and 25b are P when the quadrature demodulated signal is a PM modulated wave.
A demodulated signal is obtained by arc tan (inverse tangent) arithmetic processing in the M demodulation circuit 8a, and when the quadrature demodulated signal is an FM modulated wave, the output signal of the PM demodulation circuit 8a is further differentiated in a differentiation circuit 8b. As a result, a demodulated signal is obtained. Further, when the quadrature demodulated signal is an AM modulated wave, a demodulated signal is obtained by a square root operation in the AM demodulation circuit 8c. Usually arc tan (inverse tangent),
The arithmetic processing circuit for elementary functions such as differentiation and square root is ROM
(Read Only Memory). For example, when demodulating an FM modulated wave with a calculation table using a ROM, the outputs E ₁ (t) and E ₂ (t) of the A / D converters 25a and 25b are respectively used as addresses of the calculation table in the ROM as PM demodulation circuits. 8a,
The calculation result θ = tan ⁻¹ (E ₁ (t) / E ₂ (t)) is used as the differentiation circuit 8
b. In the differentiating circuit 8b, an FM demodulated output is obtained by differentiating (Δθ / Δt) the output of the PM demodulating circuit 8a. If the instantaneous output of the PM demodulation circuit 8a is θ ₁ , θ ₂ , θ ₃ ..., Δt = 1 / fs (fs: sampling frequency), the sampling frequency is constant. The value is obtained by taking the difference (θ ₁ −θ ₂ , θ ₂ −θ ₃ ...) For each data of the output (instantaneous phase) of the PM demodulation circuit 8a. For example, when the number of quantization bits of the output signals from the A / D converters 25a and 25b is 5, the capacity of the ROM required for the operation table for the arc tan (inverse tangent) operation is 2 ⁵ × 2 ⁵ = 1,024 words. The above elementary function operation processing is performed by DSP (Digit
al Signal Processor), the ROM mounted on the current DSP has a capacity of several M words, which is sufficient for the processing.

FIG. 3A is a schematic diagram showing another example of the demodulator of a conventional wideband digital radio. As shown in the figure, the demodulator of the present wideband digital radio includes an A / D converter 1, mixers 2a and 2b, a local signal generator 3, a 90 ° phase shifter 4, a low-pass filter 5a,
5b, a digitized quadrature demodulator 10 comprising:
And a demodulation unit 11. That is, in this example, the entire demodulator including the quadrature demodulator 10 is digitized. The demodulation unit 11 includes a PM demodulation circuit 11a, a differentiation circuit 11b, and an AM demodulation circuit 1 as shown in FIG.
1c, and has a function similar to that of FIG. In FIG. 3A, the reception input of the demodulation device is a wideband signal including a signal other than a desired channel. When receiving the wideband signal and performing A / D conversion, an A / D converter having a wide dynamic range is required. At present, the number necessary for A / D conversion of a high-frequency signal to the number 1
As an A / D converter having a high sampling rate of 0 MHz, one having a maximum quantization bit number of about 12 bits is available, so that the A / D converter 1 has a bit number of 12 bits. The description will be made on the assumption that a device having a bit dynamic range is used.

In FIG. 1, a received signal is an A / D converter 1
, And is output to the mixers 2a and 2b of the quadrature demodulator 10 formed of a digital circuit.
The received signals input to the mixers 2a and 2b are digitally processed and quadrature-demodulated by the quadrature demodulator 10 in the same manner as in the analog quadrature demodulator 20 shown in FIG. The channels are selected by the filters 5a and 5b, and the output signals E ₁ (t) and E ₂ (t) are demodulated by the demodulation unit 1
1 is output. As shown in FIG. 2B, the demodulation unit 11 can perform demodulation according to the modulation scheme of the communication system applied to the selected channel. It is composed of a demodulation circuit 11c. The function of the demodulation unit 11 is the same as that of the demodulation unit 8 in FIG.

[0007]

When the demodulation section 11 demodulates, for example, an FM-modulated reception signal, the output of the quadrature demodulator digitized by the A / D converter 1 having 12 quantization bits is used. The in-phase component E ₁ (t) and the quadrature component E ₂ (t) are subjected to arc tan (inverse tangent) arithmetic processing in the PM demodulation circuit 11a. When the arc tan (inverse tangent) operation is performed using the operation table of the ROM, the R
The processing capacity required for OM is 2 ¹² × 2 ¹² = 16,777,216 words = about 16 M words. However, even if the above-described arithmetic processing is performed by a ROM mounted on a DSP (Digital Signal Processor), as described above, the current D
Since the capacity of the ROM with SP is at most several M words,
At the very least, the above-mentioned computation table that requires a huge amount of
It is impossible to mount it on the ROM of the SP. Therefore, in the conventional wideband digital receiver, the DSP
In addition, a dedicated ROM for the operation table must be provided as a demodulation circuit. In addition, in order to perform the above-described operation using a DSP without using a dedicated ROM, in the case of the operation of arc tan (inverse tangent), a complicated operation such as an approximate calculation by Macrolein expansion is required. That is, if a dedicated ROM is provided in the demodulation device, the increase in equipment productivity due to the use of a common circuit is hindered, resulting in an increase in cost.
There is a problem that it takes a lot of time to perform high-speed arithmetic processing. SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has a small capacity R that can be mounted on a DSP.
It is an object of the present invention to provide a receiver capable of demodulating a wideband received signal by OM.

[0008]

In order to solve the above-mentioned problems, according to the present invention, a signal whose channel is selected after quadrature demodulation of an A / D-converted wideband reception signal by quadrature demodulation means is stored in a ROM. In the demodulation device that demodulates by the demodulation circuit using the elementary function operation table, the maximum value of the total amplitude of the channel-selected signal is a full range of the dynamic range of a predetermined quantum width at a stage preceding the demodulation circuit. The signal is quantized, and the quantized signal is input to the demodulation circuit.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on an embodiment shown in the drawings. FIG. 1 is a schematic configuration diagram of a demodulation device of a wideband digital receiver according to the present invention.
As shown in FIG. 1, the demodulator of the present wideband digital radio includes an A / D converter 1 having 12 quantization bits, mixers 2a and 2b, a local signal generator 3, and a 90 ° phase shifter 4.
And a low-pass filter 5a, 5b, and a digitized quadrature demodulator 10, and a DRC (Dynamic Demodulator) for adjusting a dynamic range by quantization of a signal level to a predetermined width.
Range Control) circuit 6, a control circuit 7 for controlling the operation of the DRC circuit 6, a PM demodulation circuit 8a and a differentiation circuit 8
b and a demodulation unit 8 composed of an AM demodulation circuit 8c. The functions and operations of the A / D converter 1 and the quadrature demodulator 10 are the same as those of the A / D converter 1 and the quadrature demodulator 1 shown in FIG.
Since the functions and operations are the same as those of the first embodiment, the following description will focus on the operations of the DRC circuit 6, the control circuit 7, and the demodulation unit 8, which are characteristic configurations of the present invention.

In FIG. 1, the wideband reception input is A / D
The signal is converted into a digital signal by the converter 1, and
The frequency is converted by b. Further, the mixers 2a, 2b
A desired channel is selected in the low-pass filters 5a and 5b from the output signal of
It is input to the C circuit 6. When a channel signal is input to the DRC circuit 6, the control circuit 7 detects the maximum value of the total amplitude of the input signal, and controls the DRC circuit so that the maximum value becomes the full range of the dynamic range of a predetermined quantization width.
A control signal is sent to the circuit 6. Upon receiving this control signal, the DRC circuit 6 re-quantizes the input signal with a predetermined number of quantization bits to convert the dynamic range, and outputs it to the demodulation unit 8. As described in the conventional example, S
Since the dynamic range for obtaining / N = 40 dB is sufficient if the number of quantization bits is 5 bits, in this embodiment, the channel signal quantized by 12 bits input to the DRC circuit 6 is And requantization by controlling the maximum value of the total amplitude to be the full range of the dynamic range quantized with the quantization bit number of 5 bits,
The requantized signal is output to the demodulation unit 8.

Here, the procedure of the requantization will be described. For example, the in-phase component of the output of the quadrature demodulator 10 is e ₁ = A cos θ, and the quadrature component is e ₂ = A sin θ. Said D
In the RC circuit 6, the sum of squares of the in-phase component and the quadrature component when the input channel signal has the maximum amplitude value Am (Am cos θ) ²
The maximum amplitude Am is obtained from the square root of + (Am sin θ) ² = Am ² , the output signals e ₁ and e ₂ of the quadrature demodulator 10 are divided by Am, and the demodulator output signal en ₁ normalized by Am. , En ₂
Get. Next, by multiplying the normalized signals en ₁ and en ₂ by ⁵ of 2 ⁵ , that is, 16 and further rounding down the decimal point, the signals e ₁ and e ₂ having a 12-bit dynamic range are converted into quantum signals. Are converted into signals E ₁ and E ₂ having a dynamic range of 5 bits.

The demodulation unit 8 comprises a PM demodulation circuit 8a, a differentiating circuit 8b and an AM demodulation circuit 8c, each of which is constituted by an operation table by ROM. Then, as described above, the channel signals E ₁ (t) and E ₂ (t) of the dynamic range with the quantization bit number of 5, for example,
In the case of the FM modulation wave, the output E ₁ (t) of the DRC circuit 6
And E ₂ (t) are input to the PM demodulation circuit 8a as addresses of an operation table, and the operation result θ = ta
_{^{n -1 (E 1 (t)}} / E 2 (t)) is output to the differentiation circuit 8b. In the differentiating circuit 8b, an FM demodulated output is obtained by differentiating (Δθ / Δt) the output of the PM demodulating circuit 8a. The capacity of the ROM necessary for calculating the arctan (inverse tangent) of the PM demodulation circuit 8a only needs to be ²⁵ × ²⁵ = 1,024 words, and the ROM mounted on the current DSP is sufficient. it can.

[0013]

As described above, according to the present invention,
Since the dynamic range of the broadband reception signal input to the digital radio demodulator is greatly reduced by the DRC circuit, the elementary function operation table constituting the demodulator can be constituted by a small-capacity ROM. For this reason, the demodulation unit can be constituted by a small-capacity ROM mounted on a general DSP used in a wideband digital radio, and therefore, it is necessary to prepare a dedicated ROM and perform complicated approximation calculations. There is no need for this, and a great effect can be obtained in providing a wireless device with a short signal processing time, a small circuit size, and low cost.

[Brief description of the drawings]

FIG. 1A is a schematic configuration diagram showing an embodiment of a demodulation device of a wideband digital receiver according to the present invention;
FIG. 2B is a functional block diagram illustrating an example of a demodulation unit 9 in FIG. 1A capable of demodulation according to a modulation scheme of various communication systems.

FIG. 2A is a schematic configuration diagram illustrating an example of a demodulator of a receiver using a conventional digital signal processing technique;
FIG. 2B is a functional block diagram illustrating an example of a demodulation unit 9 in FIG. 1A capable of demodulation according to a modulation scheme of various communication systems.

FIG. 3 (a) is a schematic configuration diagram showing an example of a demodulation device of a conventional wideband digital receiver, and FIG. 3 (b) is a diagram capable of demodulation according to the modulation method of various communication systems. FIG. 2 is a functional block diagram showing an example of a demodulation unit 11 of FIG.

[Explanation of symbols]

1 A / D converter, 2a, 2b mixer, 3 local signal generator, 4 phase shifter, 5a, 5b
Low-pass filter, 6 DRC circuit, 7 control circuit, 8 demodulation unit, 8a PM demodulation circuit, 8b differential circuit, 8c AM demodulation circuit, 10 quadrature demodulator, 1
1 demodulator, 11a PM demodulator circuit, 11b differentiator circuit, 11c AM demodulator circuit, 20 quadrature demodulator, 21a, 21b mixer, 22 local signal generator, 23 · 90 ° phase shifter, 24a, 24b · · · low-pass filter, 25a, 25b · · · A / D converter

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H04L 27/22 H04L 27/22 F

Claims (1)

[Claims] 1. A demodulator for demodulating a signal selected by a channel after quadrature demodulation of an A / D converted wideband received signal by quadrature demodulation means by a demodulation circuit using an elementary function operation table stored in a ROM. In the preceding stage of the demodulation circuit, the signal is quantized so that the maximum value of the total amplitude of the channel-selected signal becomes a full range of a dynamic range having a predetermined quantum width, and the quantized signal is subjected to the demodulation circuit. A digital demodulation device characterized in that the digital demodulation device is configured to input to the digital demodulation device.