JP2001042837A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make suppressible a display irregularity caused by both induced distortion and signal dullness at a practically allowable low cost. SOLUTION: A distortion compensation signal generating section 6 obtains change values DRQ1/DRQ2 of voltages V2a/V4a based on display data D and outputs compensation values T1/T2 indicating pulse widths to compensate for induced distortion. On the other hand, a power supply circuit 5 outputs a compensation voltage V2s to a signal side driving circuit 2 in response to the instruction from an integrated compensation signal generating section 8 during a first period indicated by a signal dullness compensation pulse signal S0 and the period having a length indicated by the value T1 and outputs a compensation voltage V4s during the first period and the period having a length indicated by the value T2. Although the circuit 5 outputs only the voltages V2s/V4s as compensation voltages, the fluctuation of effective values caused by induced distortion and signal dullness is compensated for by the difference between the both applied periods.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display using a simple matrix type liquid crystal display panel driven by a voltage averaging method.

[0002]

2. Description of the Related Art In recent years, with the spread of personal computers and word processors, instead of a CRT (Cathode-Ray-Tube) having a large size and large power consumption, a liquid crystal that can be measured and thinned and can be driven by a battery is used instead of a large-sized CRT (Cathode-Ray-Tube). Display devices are widely used.

[0005] Simple matrix driving, which is one of the driving methods of this liquid crystal display device, is relatively easy to manufacture since a non-linear element is not required for each pixel arranged in a matrix as compared with active matrix driving. In addition, the manufacturing cost can be kept low.

The above-mentioned conventional simple matrix driven liquid crystal display
The devices 100 interact with each other, for example, as shown in FIG.
A plurality of scanning electrodes Y arranged to be shifted₁~ Y_MAnd multiple
Signal electrode X₁~ X_NAnd a scanning drive circuit
Reference numeral 103 denotes a power supply circuit 105 to the sequentially selected scanning electrodes Y.
When the selection voltage V1 or V5 supplied from the
From the power supply circuit 105 to each of the unselected scan electrodes Y.
A non-selection voltage V3 is applied. On the other hand, the signal side driving circuit 10
2 indicates each signal electrode X according to the display data.₁~ X_NWhat,
A signal voltage V2 or V4 is applied. This allows the liquid crystal
Of the liquid crystal of the panel 101, the scanning electrode Y_jAnd signal electrode X
_i(The liquid crystal capacitor, the pixel PIX_{(i , j)})
Electrode X_i・ Y_jIs applied according to the potential difference of
The transmittance of the part depends on the effective voltage applied to the liquid crystal capacitance
Change. Therefore, each signal electrode X₁~ X_Nand
Scan electrode Y₁~ Y_MBy controlling the voltage to
All pixels PIX in liquid crystal panel 1_(1,1)~ PIX_{(N, M)}of
The display state is controlled, and an image based on the display data is displayed
Is done.

However, in the liquid crystal display device 100,
As the display capacity and the display area increase, crosstalk or the like depending on the display pattern occurs due to the driving characteristics thereof, and the display quality tends to deteriorate due to display unevenness.

Specifically, one of the display irregularities depending on the display pattern is a luminance irregularity which appears on a signal electrode unit basis. The luminance irregularity is classified into the following two from the cause. The first display unevenness is caused by induced distortion of the scanning signal waveform, and a change in signal voltage is induced toward the scanning electrode, and the capacitance component of the liquid crystal and the resistance components of the signal line and the scanning electrode are reduced. , That is, when the induced distortion occurs in the waveform of the scanning signal. The second display unevenness is due to charging and discharging of the liquid crystal capacitance. When the signal voltage changes, the applied waveform of the signal voltage itself becomes dull as a result of the charging and discharging of the liquid crystal capacitance depending on the time constant. It happens with things.

[0007] More specifically, as shown in FIG. 5, if you try to view the image vertically long block pattern is mixed, the signal electrode X _a is in either the scan electrodes Y _d ~Y _d + _9, instructs displays white (light), the signal electrode X _b, in any of the scan electrodes Y _d ~Y _d + ₉ also instructs the black display (non-lighting). However, as shown in FIG. 14, the logic of the AC signal FR is inverted at the timing of scanning the scan electrode Y _{d + 1} to drive the liquid crystal by AC. Therefore, the signal electrode X _a is changed from the voltage V4 to the voltage V2, the signal electrode X _b is changed from the voltage V2 to the voltage V4. At this point, the scanning electrode _Yc is not selected and the non-selection voltage V3 is applied.
Since the applied voltage is inverted on the signal voltage X side opposing the scan electrode _Yc , induced distortion due to the voltage fluctuation occurs.

[0008] Here, if you try to view the pattern of FIG. 5, for example, as the signal electrode X _a, the signal electrode number that varies from the voltage V4 to the voltage V2, to the located in one 9N / 10, Like the signal electrode _Xb , the voltage V2 to the voltage V
The number of signal electrodes changing to 4 is N / 10. Thus, the scan electrodes Y _c, greater direction, i.e., induced distortion occurs in the direction from the voltage V3 to the voltage V2. FIG.
In the example of 4, since the alternating signal FR is inverted every three lines, similarly, at the timing of scanning the scan electrodes Y _{d + 4} and Y _{d + 7} , the direction from the voltage V3 to the voltage V4 is also changed. , Induced distortion occurs in the direction from the voltage V3 to the voltage V2.

[0009] As a result, the voltage waveform applied to the pixel _A (X _a -Y _c) the voltage waveform applied to the pixel B (X _b -
Y _c ) is as shown in FIG. 14. If there is no induced distortion, the effective value of the driving voltage of the pixel A is actually reduced due to the induced distortion, though the effective value is the same, although the same effective value is obtained. Therefore, the effective value of the driving voltage of the pixel B increases. As a result, as shown in FIG. 15, even in an area where white is to be displayed, the luminance of the shaded area including the pixel B is higher than that of another white area (an area including the pixel A). As a result, white spots occur in the hatched portions.

On the other hand, as shown in FIG. 8, when an image in which horizontal stripe patterns for each line are mixed is to be displayed, the pixels A and B to display the same white due to other types of induced distortion. , The brightness of the pixel A is higher than that of the pixel B
, And blackening occurs in the shaded area as shown in FIG. Specifically, the AC signal F
During a period in which the polarity of R is not inverted, the signal electrode X _a
Voltage X _a which is applied to, as shown in FIG. 16, while scanning the scan electrodes Y _d ~X _d + _9, for each scanning clock LP, inverted between the voltage V2 and the voltage V4. On the other hand, the signal electrodes X _b, even when scanning either of the scan electrodes Y ₁ to X _M, since the instruction to the lighting, the voltage of the signal electrodes X _b is a constant value (here, V2) remains ,It does not change.

[0011] Here, the scan electrodes Y _c, while scanning the scan electrodes Y _d ~Y _d + _9, but the non-selection voltage V3 is applied, the scanning electrodes from the scan of the scan electrodes Y _d Y _{d + 1}
When the scanning shifts to the scanning of many signal electrodes X (9N / 10
), The applied voltage changes from the voltage V2 to the voltage V4, and the applied voltage remains unchanged at the voltage V2 at the remaining N / 10 electrodes. As a result, the scanning electrodes Y _c, the voltage V
Induction noise occurs in the direction from 3 to the voltage V4. Similarly, when shifting from scanning of the scanning electrode Y _{d + 1} to scanning of the scanning electrode Y _{d + 2} , induced distortion occurs in the scanning electrode Y _c in the direction from the voltage V3 to the voltage V2.

Accordingly, when displaying the pattern shown in FIG. 8, induced distortion for each line to the scan electrodes Y _c occurs repeatedly. This induced distortion, as shown in FIG.
It acts to reduce the effective value of the driving waveform of the pixel _A (X _a -Y _c). In pixel B, as shown in FIG. 16 as the drive waveform (X _b −Y _c ), the effective value decreases and increases alternately due to the induced distortion. Does not decrease. As a result, the luminance of the pixel A is lower than the luminance of the pixel B, and even in the areas where the same white display is instructed, the shaded area shown in FIG. 17 is smaller than the remaining white display area. It is displayed dark, and blackening occurs in the shaded area.

The second display unevenness is, for example, as shown in FIG.
As shown in Fig. 7, this occurs when displaying an image in which a staggered pattern for each pixel is mixed. That is, the alternating signal FR
In the period in which the polarity of not inverted, the voltage X _b applied to the signal electrode X _b, as shown in FIG. 18, while scanning the scan electrodes Y _d ~Y _d + _9, each scanning clock LP The voltage is inverted between the voltage V2 and the voltage V4. On the other hand, the voltage applied to the signal electrode X _a X _a is one of the scan electrodes Y
_Even when scanning _{1 to} X _M , the value indicating the lighting (here, V2) does not change.

[0014] Here, the scan electrodes Y _c, while scanning the scan electrodes Y _d ~Y _d + _9, the non-selection voltage V3 is applied. Further, as shown in FIG. 10, the display pattern is a staggered pattern for each pixel, and at the time of the transition of the scanning line, mutually opposite change voltages are output between the signal electrodes X adjacent to each other. Transient currents cancel each other. As a result, the scanning electrodes Y _c, induced distortion due to the signal electrode X ... voltage change does not substantially occur.

However, pixel A is compared with pixel B.
And the signal electrode X connected to the pixel A _aNow, the voltage is inverted
The signal electrode X connected to the pixel B
_bIn each of the scan lines, the voltage is inverted and the
Charge and discharge to the quantity are repeated. As a result, as shown in FIG.
As shown, the signal electrode X_bWaveform X_bDue to charging and discharging
Integral waveform dulling occurs. Therefore, pixel B
Drive waveform (X_b-Y_c) Is reduced, and the brightness of the pixel B is reduced.
The degree is lower than the luminance of the pixel A. This
Despite the fact that the same white display is instructed,
The shaded area shown in FIG. 19 is larger than the remaining white display area.
Are also displayed darkly.

In order to reduce the first display unevenness among the first and second display unevennesses, for example, Japanese Patent Laid-Open No. 2-89 is disclosed.
In the publication, when the induced distortion acts to increase the effective value of a pixel to be corrected, a correction voltage having a value for decreasing the effective voltage is superimposed on the normal output voltage V2 (V4) to form a signal electrode X. _{1 to} X _N , and when induced distortion acts to reduce the effective value, a correction voltage of a value that increases the effective value is superimposed on the normal output voltage V2 (V4) and output. (Hereinafter referred to as a first conventional technique) is disclosed.

On the other hand, in order to reduce the second display unevenness, for example, Japanese Patent Application Laid-Open No. 8-292744 discloses that even if the applied waveform becomes dull due to the change in the applied voltage in each scanning period and the effective value is reduced and decreased. A configuration in which a correction voltage for increasing the effective value is applied so as to compensate for the decrease in the effective value (hereinafter, referred to as a second related art) is disclosed.

[0018]

However, in the first prior art, two voltages (V2
It is necessary to provide two correction voltages for increasing the effective value and decreasing the effective value for each of V4), so that six potentials are required as the signal electrode output potential, which increases the circuit scale and the manufacturing cost. Is likely to rise.

Further, in each of the first and second prior arts, since only one of the first display unevenness and the second display unevenness is corrected, the other display unevenness cannot be corrected. It is difficult to ensure quality. If the first and second prior art configurations are independently provided to correct the first and second display unevenness, the circuit scale is further increased, and the manufacturing cost is increased. Resulting in.

The present invention has been made in view of the above problems, and its object is to provide a low-cost, practically applicable one.
An object of the present invention is to realize a liquid crystal display device having high display quality without display unevenness.

[0021]

In order to solve the above problems, a liquid crystal display device according to the present invention has a liquid crystal display in which a liquid crystal layer is provided between a plurality of signal electrodes and a plurality of scanning electrodes crossing each other. In a liquid crystal display device for driving a panel based on display data indicating a display image of the liquid crystal display panel, the following means are provided.

That is, a voltage corresponding to the display data is applied to each of the signal electrodes, and a voltage is applied to each of the scanning electrodes by a change in potential applied to each of the signal electrodes. First correction amount determining means for determining a correction amount for canceling a change in the effective voltage value to the liquid crystal caused by the waveform distortion (induced distortion), and a one-to-one correspondence with each voltage corresponding to the display data. And a correction power supply for generating each correction voltage and outputting the corrected voltage to the signal-side driving unit in place of each voltage. Further, the first
The correction amount determining means sets the correction amount as the correction amount so that the change in the effective voltage value to the liquid crystal can be canceled by the difference in the period length of the application of the correction voltage. To determine.

In the above configuration, when induced distortion occurs in the scanning electrode and the effective value to each liquid crystal element corresponding to the intersection of the scanning electrode and each signal electrode is about to change, the first correction amount determining means sets The application period length of the correction voltage is adjusted. Thus, the effective value for each liquid crystal element is adjusted according to the product of the difference between the voltage corresponding to the display data and the correction voltage and the application period length. Here, the length of the period for applying each of the correction voltages is set such that a change in the effective voltage value to the liquid crystal can be canceled out by the respective differences. Therefore, despite the fact that the correction power supply can output only a correction voltage corresponding to each voltage on a one-to-one basis, the liquid crystal display device reduces the luminance unevenness (first display unevenness) of each pixel due to the induced distortion. Can be suppressed. As a result, 2 for each voltage
Although the circuit configuration is simpler than that of the related art that outputs the correction voltage one by one and can be manufactured at lower cost, the first display unevenness caused by the induced distortion is suppressed, and the display quality is high. A liquid crystal display device capable of displaying can be realized.

Further, the liquid crystal display device according to the present invention is a liquid crystal display device for driving the liquid crystal panel based on the display data. In addition to the above, according to a change in the number at which the signal-side driving means outputs each voltage corresponding to the display data, the application period of a corresponding correction voltage is individually determined as a correction amount. It is characterized by comprising a correction amount determining means.

According to this configuration, the length of the period for applying each of the correction voltages is individually determined according to the change in the number of outputs of the corresponding voltage. As a result, induced distortion occurs in the scanning electrode, and even if the effective value for each liquid crystal element corresponding to the intersection of the scanning electrode and each signal electrode is about to change,
The difference between the application period lengths cancels out the change in the effective value caused by the induced distortion. Therefore, similar to the liquid crystal display device described above, the first display unevenness due to the induced distortion is suppressed, and a display with high display quality can be performed, although the circuit configuration is simple and can be manufactured at lower cost. Liquid crystal display device can be realized.

Further, the first correction amount determining means of each of the above-described structures includes weighting means for adjusting the application period of each of the correction voltages based on the number of signal electrodes outputting the respective correction voltages. Is more desirable.

According to this configuration, the application period of each correction voltage is equal to the number of signal electrodes that output each correction voltage, that is,
It is adjusted according to the size of the load. Therefore, when the load is large, the effective voltage applied to the liquid crystal due to the signal dullness is greater even if the signal waveform becomes larger than the light load in the driving waveform of each liquid crystal when the correction voltage is applied. You can negate the value. As a result, it is possible to suppress unevenness in luminance due to the difference in load, and to realize a liquid crystal display device capable of performing display with high display quality.

Further, the liquid crystal display device of each of the above constructions
When the voltage corresponding to the display data changes at each of the signal electrodes, control is performed so that one of the correction voltages is output from the signal-side driving unit for a certain period of time instead of the voltage. It is desirable to have a second correction amount determining means.

According to this configuration, when the voltage corresponding to the display data changes, one of the correction voltages is output to the signal electrodes for a certain period. Accordingly, even if the waveform output to the signal electrode becomes dull due to the change in the voltage corresponding to the display data, the change in the effective voltage value due to the dulling of the waveform is caused by the application of the correction voltage during the certain period. Thus, the second display unevenness caused by the waveform blunting is suppressed. As a result, it is possible to realize a liquid crystal display device capable of performing display with higher display quality without increasing the number of correction voltages that can be output by the correction power supply.

In each of the above-described configurations, the signal-side driving means includes a latch circuit for storing display data for one scanning horizontal period, and a voltage applied to each signal electrode based on an output of the latch circuit. And an output control circuit for determining the first correction amount.
It is desirable to determine the correction amount corresponding to the output of the latch circuit by referring to the signal having an earlier phase and the display data having a phase earlier by one scanning horizontal period than the output of the latch circuit.

According to this configuration, based on the display data and the alternating signal having a phase earlier than the output of the latch circuit,
Since the correction amount corresponding to the output of the latch circuit is calculated,
The first correction amount determination means can specify a correction amount in phase with the display data. As a result, more accurate correction becomes possible,
A liquid crystal display device capable of higher quality display can be realized.

Further, in each of the above structures, the first
It is preferable that the correction amount determining unit includes a parameter storage unit that stores a correction value or a correction coefficient to be referred to when determining each of the application periods. According to this configuration, the first
The correction amount determination means can set the application period of each correction voltage to an optimum value by referring to the correction value or the correction coefficient in the parameter storage means. Therefore, it is possible to realize a liquid crystal display device that has a simpler configuration than the case where the application period is calculated only by the calculation and is capable of performing display with higher display quality.

[0033]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the present invention.
This will be described below with reference to FIG.
That is, the liquid crystal display device according to the present embodiment drives a simple matrix type liquid crystal panel by a voltage averaging method,
FIG. 1 shows an image corresponding to display data.
As shown in FIG. 5, the display data is sent to the liquid crystal panel 1 in which the plurality of scanning electrodes Y _{1 to} Y _M and the plurality of signal electrodes X _{1 to} X _N are arranged to cross each other, and to each of the signal electrodes X _{1 to} X _N. A signal-side drive circuit (signal-side drive means) 2 for applying a signal voltage based on the above, a scan-side drive circuit 3 for applying a voltage line-sequentially to each of the scan electrodes Y ₁ to Y _M , and both drive circuits 2.3 A control circuit 4 for controlling the power supply and a power supply circuit (correction power supply) 5 for generating a voltage required for driving are provided.

In the following, for convenience of explanation, each electrode X
₁ If to X _N · Y ₁ to Y does not specify the location of _M, or when referred to collectively, for example, references omitted subscripts as the signal electrode X. On the other hand, when specifying the location, 1 to N, 1 to M itself, or 1
Reference is made by attaching an arbitrary integer i in the range of 1 to N and an arbitrary integer j in the range of 1 to M.

In the above configuration, each of the scanning electrodes Y _{1 to} Y _M
Are sequentially scanned, and the scanning-side drive circuit 3 applies the selected scan electrode Y to the selected scan electrode Y based on the scan clock LP from the control circuit 4, the AC signal FR, and the scan start signal FLM.
The selection voltage V1 or V5 supplied from the power supply circuit 5 is applied, and the power supply circuit 5
Is applied. On the other hand, the signal side driving circuit 2, the display data D from the control circuit 4, the data shift clock CK, based on the scan clock LP and alternating signal FR, according to the display data D, to the signal electrodes X ₁ to X _N , A signal voltage V2a or V4a is applied. Here, the voltages V1 to V5 are set as V1>V2a>V3>V4a> V5 (1) as shown in the following inequality (1). Further, in order to drive the liquid crystal of the liquid crystal panel 1 by AC, the signal-side drive circuit 2 outputs the AC signal FR.
, When the display data indicates ON, switching between outputting the voltage V2a and outputting the voltage V4a is performed, and the scanning side driving circuit 3 applies the voltage V1 or the voltage V5. Switch.

As a result, of the liquid crystal of the liquid crystal panel 1,
Scan electrode Y_jAnd signal electrode X_iBetween (LCD capacity, picture
Elementary PIX_{(i, j)}) Includes both electrodes X_i・ Y_jResponse to the potential difference
The same voltage is applied, and the transmittance of that part
It changes according to the applied effective voltage. Therefore, each
Signal electrode X₁~ X_NAnd scanning electrode Y₁~ Y_MVoltage to
To control all pixels PI in the liquid crystal panel 1.
X_(1,1)~ PIX_{(N, M )}Control the display state of the
Display images based on data. In the following, the theory
For the sake of clarity, when the liquid crystal panel 1 displays a negative image,
That is, as the effective voltage increases, each pixel PIX becomes brighter.
Will be described.
On the contrary, the present invention can be applied to the case of displaying a positive image.

Here, in the liquid crystal display device according to the present embodiment, further, the first display unevenness caused by the change in the signal voltage induced on the scan electrode Y side and the distortion of the scan signal waveform, and the signal voltage change The following configuration is provided in order to suppress both the second display unevenness caused by the dulling of the signal voltage due to the charging and discharging of the liquid crystal capacitance due to the change in the voltage. That is, the voltage generation unit 51 of the power supply circuit 5 according to the present embodiment uses the voltage V1 · V
In addition to 2.V3.V4.V5, the correction voltage V2s.V
4s can be generated. Further, the power supply circuit 5 has a switch 52 for selecting one of the voltages V2 and V2s and outputting the selected signal as the signal voltage V2a, and selecting one of the voltages V4 and V4s and outputting the selected signal as the signal voltage V4a. Switch 53 is provided. The two switches 52 and 53 are connected to a distortion correction signal generator (first correction amount determining unit) 6 as described later.
And the control signals S1 and S2 from the integrated correction signal generation unit 8 that integrates the signal generated by the dullness correction signal generation unit (second correction amount determination unit) 7, the conduction / interruption is controlled. The average value of the effective voltage applied to the liquid crystal capacitance is increased or decreased by the difference between the conduction periods of the switches 52 and 53. Thus, both the first and second display unevenness can be suppressed, although only one correction voltage V2s / V4s is provided for each voltage V2 / V4.

In the following, for convenience of explanation, the correction voltage V
2s · V4s is compared with the normal output voltage V2 · V4.
A value for increasing the effective voltage, specifically, V2 <V2s,
The case where V4> V4s is set will be described, but the value may be set to a value that reduces the effective voltage as described later.

On the other hand, based on the display data D, the distortion correction signal generator 6 generates the correction voltage V in accordance with the number of changes DRQ1 of the V2 side potential and the number of output electrodes K1 of the correction voltage V2s.
Based on the value T1 indicating the output period length of 2 s and the display data D, the change number DRQ2 of the V4 side potential and the correction voltage V4s
The value T2 indicating the output period length of the correction voltage V4s can be output in accordance with the number of output electrodes K2. More specifically, in the present embodiment, the correction value T1 is equal to the change number DRQ1,
The reference values according to DRQ2 are VAL1 and VAL, respectively.
Assuming that 2, T1 = VAL1 + K1 × VAL3 (2) T2 = VAL2 + K2 × VAL3 (3) as shown in the following equations (2) and (3). In Equations (2) and (3), VAL3 is a correction coefficient, and the parameter setting unit 9
Can be set arbitrarily. Further, in the present embodiment, since the correction voltages V2s and V4s are set to values that increase the effective value, the above-described reference values VAL1 and VAL2 are:
It is set to increase as the number of changes DRQ1 and DRQ2 increases.

The distortion correction signal generator 6 according to this embodiment
Are obtained from the table stored in the parameter setting unit (parameter storage means) 9 from the above-mentioned two change numbers DRQ1 and DRQ2.
Are read out, thereby reading out the reference values VAL1 and VAL2 and the correction coefficient VAL3. For example, as shown in FIG. 2, in the display data D indicating a certain scanning line (j-th line), In the data number storage unit 61 for storing the number of appearances (data number a) of the value indicating one signal voltage (for example, V4) and the display data D corresponding to the immediately preceding scan line (line j−1), The number of changes in which the both change numbers DRQ1 and DRQ2 are obtained by comparing the preceding row data number storage unit 62 storing the number of appearances of the value indicating the signal voltage (the number of data b) with the data numbers a and b of both scan lines. Detector 63 and both change numbers DRQ1 and DRQ
And an access unit 64 that accesses the parameter setting unit 9 based on the reference value 2 and obtains the reference values VAL1 and VAL2 and the correction coefficient VAL3. Further, the distortion correction signal generating section 6 refers to the data number storage section 61 and obtains the number of V2 data (number of output electrodes) K1 and the number of V4 data (number of output electrodes) K2 in the j-th row and the number of data to be obtained. The correction value T is obtained based on the acquisition unit 65, the values VAL1 to VAL3, K1, and K2, and the equations (2) and (3).
Correction value determination unit (weighting means) 66 for calculating 1 · T2
Are provided.

Further, in addition to the display data D, the distortion correction signal generator 6 determines a scan pulse LP indicating the acquisition timing of the display data D, and determines the correspondence between the display data D and the voltages V2 and V4. An alternating signal FRa whose phase is earlier by one scanning horizontal period than the alternating signal FR is applied.

When the AC conversion signal FRa is "H", the display data D corresponding to the voltage V4 is the display data D that is off (not lit). Therefore, the two data number storage units 61 and 62 store the display data D indicating OFF.
Is counted, the output numbers a and b of the voltage V4 in the j-th row and the j-1-th row can be obtained. On the contrary, when the AC signal FRa is “L”, the display data of ON (lighting) corresponds to the voltage V4. Therefore, the display data D
Among them, if the display data D indicating ON is counted, the output numbers a and b of the voltage V4 can be obtained.

Here, in each of the signal electrodes X _{1 to} X _N corresponding to the immediately preceding scan electrode Y _j−1 , the number b of output electrodes at the V4 level is changed from the V2 level to the V2 level.
Is Sa, the number of signal electrodes X from V2 level to V4 level is Sb, and the number of signal electrodes X from V4 level to V2 level, V4
Assuming that the number of signal electrodes X that have changed from the level to the V4 level is Sc and Sd, respectively, Sc + Sd, and the number a of the V4 level output electrodes a in the next scanning electrode _Yj is Sb
+ Sd. Accordingly, ba = Sc-Sb, that is, the difference between the number of signal electrodes changed from V4 to V2 and the number of signal electrodes changed from V2 to V4, and the number of changes DRQ1 of the voltage V2. Similarly, the change number DRQ of the voltage V4
2 becomes ab.

Therefore, the change number detecting section 63 can calculate the change numbers DRQ1 and DRQ2 from the two output numbers a and b. However, in the present embodiment, in order to facilitate access to the parameter setting unit 9, both change numbers DRQ are used.
1. To prevent DRQ2 from becoming negative, as shown in the following equations (4) and (5), DRQ1 = N + (ba) (4) DRQ2 = N + (ab) (5) Values obtained by adding the same offset N as the total number of electrodes in one scan line to the actual number of changes are set as the numbers of changes DRQ1 and DRQ2. Accordingly, for example, when the parameter setting unit 9 is realized by a storage unit such as a ROM or a RAM, the change numbers DRQ1 and DRQ2 can be set as the address addresses to be specified to the parameter setting unit 9, and the trouble at the time of access is reduced. it can. In the above equations (4) and (5), the offset is the number N of signal electrodes.
The value may be N or more as long as DRQ2 is within the address range that the storage means can take.

As shown in Table 1 below, the parameter setting section 9 stores a combination of the number of changes (DRQ1, DRQ2) and the corresponding reference value (VAL1, VAL2).

[0046]

[Table 1]

In this embodiment, the correction voltage V2s ·
Since V4s is set to a value that increases the effective value,
In Table 1 above, each of the reference values α0 to α6 is α0 <α1.
<... <α3 <... <α4 <α5 <α6.

Further, the dullness correction signal generation unit 7
In order to suppress the display unevenness, the correction pulse signal S0 is output to the integrated correction signal generator 8 and the correction pulse signal S0a is output to the signal side driving circuit 2. In response to this, while the correction pulse signal S0 is being output, the integrated correction signal generation unit 8 instructs the power supply circuit 5 to output the correction voltages V2s and V4s, and the signal-side driving circuit 2 outputs as shown, depending on the presence or absence of a change in the display data D for each signal electrode X, the signal electrodes a change in correction voltage V2s · V4s X ₁
ＸX _N to determine whether to transmit. Here, the pulse width of the correction pulse signal S0 is equal to the above-described reference value VAL1 · VAL.
Similarly to 2 and the like, the determination is made based on the correction value VAL read from the table stored in the parameter setting unit 9. When the signal side drive circuit 2 selects not to transmit the change, the correction pulse signal S0a is set so that the voltage change of the pulse width of the correction pulse signal S0 is not transmitted.
The pulse width is set to be equal to or larger than the pulse width of the correction pulse signal S0, and is applied simultaneously with the correction pulse signal S0 or at an earlier timing. In this embodiment, both correction pulse signals S
0 · S0a are applied simultaneously with the same pulse width.

Here, as shown in FIG. 3, for example, as shown in FIG. 3, the signal side drive circuit 2 performs one scan based on a scan register LP and a shift register 21 for transferring display data D in accordance with a data shift clock CK. When the transfer of the display data D for the line is completed, the A latch 22 holding each display data D corresponding to the scan line (the j-th row).
Similarly, based on the scanning clock LP, one immediately before (j
B holding each display data D of the scanning line of (-1st line)
A latch (latch circuit) 23, and both latches 22.2 based on the AC signal FR and the correction pulse signal S0a.
3, an output control circuit 24 for detecting the continuity or discontinuity of each display data D and outputting a signal for selecting an output voltage, a level shifter 25 for level shifting each output of the output control circuit 24, and a level shifter. 25, the voltage V2a / V4a applied from the power supply circuit 5, or the high impedance output (H
Z) and an output driver 26 for selecting any one of the above. Thus, the output of the signal side driving circuit 2 is controlled as in the truth table shown in Table 2 below.

[0050]

[Table 2]

Here, in Table 2 above, D _j , D _j-1
Indicates display data D for the scan line (j-th row) and display data D for the immediately preceding scan line (j-1-th row) in each signal electrode X. The “signal electrode output state” is determined by the output driver 26
The “actual output potential” indicates a potential actually output to each signal electrode X as a result of controlling the output state.

Note that the transfer data to the signal side drive circuit 2 is not the display data D but output voltage data, and the AC signal FR supplied to the signal side drive circuit 2 is fixed at the "H" level. Good. In this configuration, even a scan line when the AC signal FR is inverted can be controlled according to a change in the output potential of the signal electrode X, so that a more accurate correction operation can be performed. Note that even in this case, it can be realized by a simple logic circuit.

On the other hand, the integrated correction signal generator 8 calculates the correction values T1 and T2 notified from the distortion correction signal generator 6 and
Based on the correction pulse signal S0 from the dullness correction signal generator 7, as shown in FIGS. 6, 9 and 11, the period indicated by the correction pulse signal S0 and the period indicated by the correction value T1 In both cases, the control signal to both switches 52 and 53 is turned on so that the switch 53 is turned on both during the period indicated by the correction pulse signal S0 and during the period indicated by the correction value T2. S1 and S2 are output.

Here, in the control signal S1 (S2),
The pulse P1 (P2) corresponding to the correction value T1 (T2) is
If the pulse does not overlap with the pulse P0 corresponding to the correction pulse signal S0, the start timing can be set to an arbitrary time. However, if the start timing is too late, the pulse P1 (P2) may not end during the same scan if the correction value T1 (T2) is maximized. Control is performed at a somewhat earlier timing so that (P2) ends.

The parameter setting section 9 is realized by a general circuit such as a storage means such as a RAM or a ROM or an arithmetic circuit, or a combination thereof.・ VA
L1 to VAL3 can be instructed to both of the correction signal generators 6 and 7.

The operation of suppressing the first and second display unevenness in the above configuration will be described below in comparison with the conventional configuration. That is, when the display pattern shown in FIG. 5 is to be displayed on the liquid crystal panel 1,
In the prior art that does not correct the voltage, as shown in FIG.
Each time the AC signal FR is inverted, the effective value fluctuates due to induced distortion, and as shown in FIG. 15, the luminance of the pixel B increases more than the luminance of the pixel A, and the first display unevenness occurs.

On the other hand, in the present embodiment, when the display data D indicating the same display pattern is applied, FIG.
In, for example, as shown in Y _{d + 1} row period, the voltage V2a the period indicated by the signal S1, changes to the correction voltage V 2 s, the voltage V4a the period indicated by the signal S2, the correction voltage V4s Therefore, the driving waveform of the pixel A (X _a −Y
and _c), and the driving waveform of the pixel B (X _b -Y _c), is corrected as shown in FIG. As a result, the difference in the effective value caused by the induced distortion is corrected, and the luminance of the pixel A and the luminance of the pixel B become the same, so that the first display unevenness is suppressed.

More specifically, before the scanning-side drive circuit 3 starts scanning the (d + 1) -th scan line, the display data D on the (d + 1) -th row and the d-th row is transferred to the signal-side drive circuit 2. Number of appearances a · b of V4 potential level in each row
Are stored in the data number storage section 61 and the previous row data number storage section 62 shown in FIG. Therefore, the change number detection unit 63 calculates the change numbers DRQ1 and DRQ2 of the voltages V2 and V4 based on the values a and b, and the access unit 64 sends both the change numbers DRQ1 and DRQ2 to the parameter setting unit 9. By instructing, the reference values VAL1 and VAL2 are obtained.

Here, as shown in FIG. 5, when the alternating signal FR is inverted between the d-th row and the (d + 1) -th row in a display pattern including a vertically long block pattern, V4 is applied to the d-th row. The number (count value b) of the signal electrodes X at the potential level is (9N / 10), and V
Number of signal electrodes X having four potential levels (count value a)
Is (N / 10). Therefore, the change number detection unit 63 determines that the change number DRQ1 corresponding to the voltage V2 is (18N / 10) and the change number DRQ2 corresponding to V4 is based on the above Expressions (4) and (5). (2N / 1
0) is determined. As a result, the reference value VAL1 indicating the base period for applying the correction voltage V2s is (18N / 1
The value α4 corresponding to 0) is read from the parameter setting unit 9. Similarly, a value α2 corresponding to (2N / 10) is read as the reference value VAL2 indicating the base period of the application of the correction voltage V4s. Further, the parameter setting unit 9
The dullness correction signal generator 7 is provided by the value VAL obtained from
Outputs correction pulse signals S0 and S0a having a pulse width of VAL.

The data number acquiring unit 65 calculates (d + 1)
Based on the output number a of the voltage V4 in the row, the output numbers K1 and K2 of the voltages V2 and V4 in the row are (N
/ 10) and (9N / 10). These values,
Based on the value VAL3 obtained from the parameter setting unit 9, the correction value determining unit 66 corrects each of the base periods based on the above equations (2) and (3), and corrects the correction voltages V2s and V4s. Correction value T1 ·
Output T2.

Further, the integrated correction signal generator 8 outputs control signals S1 and S2 based on the correction pulse signal S0 and the correction values T1 and T2 as shown in FIG. As a result, the pulse P0 having the pulse width VAL and the pulse width (α4
+ N / 10 · VAL3), a pulse P1 and a pulse P0 and a pulse width (α2 + 9N /
10 · VAL3) pulse P2 and a control signal S2
Is output.

Here, between the d-th row and the (d + 1) -th row, since the alternating signal FR is inverted, the voltage X _a (X _b ) of each signal electrode X _a (X _b ) is also changed. It needs to be inverted. Therefore, the signal side drive circuit 2 controls the output of the output driver 26 to be the voltage V2a (V4a) instead of the high impedance during the period indicated by the correction pulse signal S0a, as shown in Table 2 above. . As a result,
During the pulse P0, the signal electrode X _a, the correction voltage V
2s is applied to the signal electrodes X _b, correction voltage V4s
Is applied. Accordingly, as shown in FIG. 6, the driving waveform of each pixel _{A · B (X a -Y c} ) · (X b -Y c) is
During the pulse P0, the correction is made so that the effective value increases. As a result, the effective value increases by an amount corresponding to the decrease in the effective value due to the waveform dulling caused by the voltage change of each of the signal electrodes _Xa and _Xb , and the occurrence of the second display unevenness caused by the waveform dulling is suppressed. You.

The pulse width of the pulse P1 is
Since the pulse width is set longer than the pulse width of the pulse P2,
The signal electrode X _a, longer than the period during which the signal electrodes X _b is corrected for voltage V4s applied, the correction voltage V2s is applied, a greater effective value is corrected. As a result, pixels induced distortions generated in the scan electrodes Y _c of the non-selected to reduce the effective value, i.e., for the pixel of V2 output side including the pixel A, the pixel in which the induced strain increases the effective value, That is, a larger correction is performed as compared with the pixel on the V4 output side including the pixel B.

[0064] Similarly, the alternating signal FR is inverted again (j + 4) In the row, the signal electrode X _a related pixel A, only for the period of T2 = α4 + 9N / 10 × VAL3, the correction voltage V4s is applied The signal electrode _Xb associated with the pixel B has a shorter period (T1 = α2 + N / 10 ×
VAL3), the correction voltage V2s is applied. As a result, pixels for which the induced distortion reduces the effective value, that is,
For the pixel on the V4 output side including the pixel A, the pixel whose induced distortion increases the effective value, that is, the V2 including the pixel B
A larger correction is performed as compared with the output side pixel.

On the other hand, for example, when the alternating signal FR is not inverted as in the case of scanning the scanning electrode Y _{d + 2} ,
Since the output voltage does not change, the second display unevenness due to waveform dulling does not occur. In this case, the signal side drive circuit 2 according to the present embodiment keeps the output of the output driver 26 at high impedance while the correction pulse signal S0a is applied. Therefore, during this period, the power supply circuit 5
There spite outputs the correction voltage V2s · V4s, the output voltage of the signal electrode X _a · X _b is kept remained V2 · V4, the signal-side drive circuit 2 does not correct the effective value.

When the alternating signal FR is not inverted, the first display unevenness caused by the induced distortion does not occur.
In this case, in the liquid crystal display device according to the present embodiment, the voltage V
The change numbers DRQ1 and DRQ2 of 2 · V4 have the same value (N), and the base periods of the pulse signals P1 and P2 have the same value (α3). Therefore, the pixels on the V2 output side including the pixel A and the pixels on the V4 output side including the pixel B are corrected in substantially the same size.

As a result, although the power supply circuit 5 generates only four voltages V2, V2s, V4, and V4s as signal electrode driving voltages, as shown in FIG. When a display pattern including the display pattern is displayed, the brightness of the pixel A and the brightness of the pixel B can be matched, and the first display unevenness can be prevented.

Further, the correction value determining section 6 according to the present embodiment.
6 is based on the number of outputs of the voltages V2 and V4, so that the pulse width becomes longer as the number of outputs increases.
The base period (VAL1 · VAL2) of 1 · P2 is weighted. Therefore, a voltage signal line having a large number of outputs and a large capacitive load has a larger effective value corrected.

Here, as shown in FIG. 7, as the load increases, the signal waveform becomes dull, and the effective value Z1
> Z2, the effective value decreases. As a result,
Regardless of the magnitude of the load, the correction voltage V2s is maintained for the same period.
When (V4s) is applied, the effective value of the drive waveform changes due to the difference in load capacitance, and there is a possibility that luminance unevenness may occur.

However, since the correction value determination unit 66 according to the present embodiment weights the base period based on the number of outputs, it is possible to suppress the difference in the effective value of the drive waveform due to the difference in the capacitive load. As a result, luminance unevenness is small,
A liquid crystal display device with higher display quality can be realized.

On the other hand, when the display pattern shown in FIG. 8 is to be displayed, in particular, in the prior art which does not correct the voltage,
As shown in FIG. 16, the effective value fluctuates due to the induced distortion every time the scanning line is switched, and as shown in FIG. 17, the luminance of the pixel A becomes lower than the luminance of the pixel B, thereby causing the first display unevenness. Will occur.

On the other hand, in the present embodiment, when display data D indicating a similar display pattern is applied, for example, in the period of the (d + 1) th row shown in FIG. 9, (d + 1)
Since the number of V4 potential outputs (count value b) in the row is 9N / 10 and the number of V4 potential outputs (count value a) in the d-th row is 0, the number of changes DRQ1 = N / 10 Number D
RQ2 = 19N / 10, V2 output number K1 = N / 10, and V4 output number K2 = 9N / 10 are calculated. As a result, the integrated correction signal generator 8 generates the control signal S1 including the pulse P0 having the pulse width VAL and the pulse P1 having the pulse width (α1 + N / 10 × VAL3), and the pulse P0 and the pulse width (α5 + 9N / 10 × VAL3). And a control signal S2 composed of the pulse P2 of the above. Here, the base period α5 of the pulse P2 is the base period α of the pulse P1.
It is set longer than 1. Therefore, as the pixels induced distortion occurring in the scan electrodes Y _c unselected acts to reduce the effective value, i.e., the direction of V4 output side of the pixel including the pixel A, to increase the effective value A larger correction is performed as compared with the working pixel, that is, the pixel on the V2 output side including the pixel B.

Further, as in the period of the (d + 2) -th row, the induced distortion generated in the non-selected scanning line _Yc is caused by the pixels A and B.
, Ie, the same voltage (V2 in this case) is applied to both pixels A and B.
When a) is applied, a correction for induced distortion of the same magnitude is made. The waveform blunting that causes the second display unevenness is corrected by outputting the correction voltage V2s or V4s only during the period of the pulse P0 when the voltage changes.

As a result, despite the fact that the power supply circuit 5 generates only four voltages for driving the signal electrodes, a display pattern in which horizontal stripe patterns for each line are mixed is displayed as shown in FIG. In this case, the brightness of the pixel A and the brightness of the pixel B can be matched, and the first display unevenness can be prevented.

In this case as well, as in the case of displaying the display pattern of FIG. 5, the base period is weighted by the number of outputs K1 and K2, so that the effective value due to the difference between the numbers of outputs K1 and K2 is obtained. The difference can be suppressed, and a liquid crystal display device with higher display quality can be realized.

Further, when the display pattern shown in FIG. 10 is to be displayed, in particular, in the prior art which does not correct the voltage, the signal voltage waveform becomes dull as shown in FIG. As described above, the brightness of the pixel B is lower than that of the pixel A due to the second display unevenness.

On the other hand, in the present embodiment, when the display data D indicating the same display pattern is applied, for example, in the period of the (d + 1) th row shown in FIG.
1) The number of V4 potential outputs (count value a) in the row is (N / 2
0) and the number of V4 potential outputs (count value b) on the d-th row is (N / 20), so the number of changes DRQ1 = N
Number, change number DRQ2 = N, V2 output number K1 = 19N / 2
0 and the V4 output number K2 = N / 20 are calculated.
As a result, the integrated correction signal generator 8 outputs the pulse P0 and the pulse width (α3 + N / 20 × VAL) of the pulse width VAL.
3) The control signal S1 consisting of the pulse P1, the pulse P0 and the pulse width (α3 + 19N / 20 × VAL3)
And a control signal S2 composed of the pulse P2 of the above.

Here, the base periods of both pulses P1 and P2 are set to the same length (α3). Thus, the voltage applied to the signal electrode X _a · X _b corresponding to the pixels A · B, regardless of whether the voltage V4a which is a voltage V2a, as a correction to the induction distortion of substantially the same size Correction is performed. Therefore, the correction voltage V is applied to both pixels A and B where no luminance difference is caused by the induced distortion.
No difference in brightness occurs despite the application of 2s or V4s.

On the other hand, the integrated correction signal generator 8 generates not only the pulse P1 (P2) for correcting the induced distortion but also the dullness having the same pulse width as the correction pulse signal S0a as the control signal S1 (S2). The pulse P0 is also output.
Therefore, for example, when the output voltage changes like the signal electrode _Xb in the (d + 1) th row, the signal side drive circuit 2 outputs the output driver 26 during the period indicated by the correction pulse signal S0a as shown in Table 2 above. Is controlled not to be high impedance but to be the voltage V2a (V4a). Conversely, the signal electrode X _a in the d + 1-th row
When the output voltage does not change, the output of the output driver 26 is kept at high impedance during the period indicated by the correction pulse signal S0a, and the output voltage up to that time is maintained. As a result, during the pulse P0, the potential of the signal electrodes X _a is kept remains potential V2, the signal electrode X _b, the correction voltage V4s is applied. Thus, as shown in FIG. 11, the driving waveforms (X _b -Y _c) is a pixel B, between the pulses P0, because they are corrected so that the effective value increases, the average value of the effective value, the waveform Due to the dulling, the effective value is increased by the decrease.

As a result, as shown in FIG. 10, the luminances of both pixels A and B are made uniform, and the occurrence of the second display unevenness due to the dull waveform is suppressed. In addition, since the waveform dullness is corrected by the same correction voltages V2s and V4s as the correction of the waveform distortion, the circuit scale of the power supply circuit 5 is reduced as compared with the case where both correction voltages are separately provided. Can be reduced.

Also in this case, as in the case where the display pattern of FIG. 5 is displayed, the base period is weighted by the number of outputs K1 and K2, so that the number of outputs K1 and K1
The difference in the effective value resulting from the difference between the two can be suppressed, and a liquid crystal display device with higher display quality can be realized.

Here, the operation of suppressing both display irregularities has been described by taking as an example a display pattern in which the first and second display irregularities caused by induced distortion and waveform dulling are most likely to appear. In addition, since both display unevenness due to induced distortion and waveform dulling can be reduced, the above-mentioned display unevenness can be reduced for other patterns, and a liquid crystal display device with high display quality can be realized.

In the present embodiment, each correction voltage V2
The case where s · V4s is set to increase the effective voltage has been described as an example, but the same effect can be obtained even if the effective voltage is set to decrease. In this case, in Table 1, each of the reference values α0 to α6 is α0>α1> α2.
>...>α3>...>α4>α5> α6 In addition, for example, by changing the logic of the output control circuit 24, the signal side drive circuit 2 may perform the operation shown in Table 3 below instead of Table 2 described above.

[0084]

[Table 3]

Further, when the correction voltages V2s and V4s are set so as to reduce the effective voltage, as shown in FIG. 12, the applied waveform is larger when the load is larger, as in FIG. Greater dullness. However, unlike the case shown in FIG. 7, in the correction portion, the effective value Z3 <Z4 holds. Therefore, in this case, when the correction value determination unit 66 corrects the base period, the number of outputs K1 and K2 decreases, and
If the correction is made in the direction of increasing the weighting amount as the load decreases, it is possible to prevent the occurrence of luminance unevenness due to the difference in the load capacity.

Further, the case where the distortion correction signal generator 6 according to the present embodiment counts the V4 level for each scanning horizontal period has been described, but may naturally count the V2 level. However, in this case, the above equation (4)
And equation (5) are interchanged, for example, the change number DRQ1
Is calculated from the right side of Expression (5).

Further, in the present embodiment, as an example of the configuration of the distortion correction signal generating section 6 and the parameter setting section 9, when the number of changes + offset is used as an address and the data is directly read from the address, that is, the number of changes is N Has been described as an example, but when the storage capacity of the parameter setting unit 9 needs to be reduced, for example, by dividing the number of changes by a predetermined value, the display unevenness can be sufficiently reduced. The range in which the number of changes can be taken may be reduced.

In the present embodiment, the distortion correction signal generator 6 reads out the reference values VAL1 and VAL2 from the table stored in the parameter setting unit 9 and corrects the correction values T1 and T1.
Although the case of calculating 2 has been described as an example, if the correction values T1 and T2 can be appropriately increased or decreased in accordance with the increase or decrease of the number of changes, the calculation may be performed by an arithmetic expression. Further, even when referring to the table, the reference values VAL1 and VAL2 are not read out, and the reference values VAL1 and VAL2 such as correction coefficients are not read.
May be read.

However, in many cases, it is difficult to determine an appropriate arithmetic expression. For example, the correction values T1 and T2
, While observing display unevenness that occurs on the liquid crystal panel 1, the correction value T1 ·
By obtaining T2 and storing the correction values T1 and T2 in a table, display unevenness can be reduced more appropriately with a simpler circuit configuration. For the same reason, referring to the table for the correction coefficient VAL3 and the pulse width VAL can obtain values that can more appropriately eliminate display unevenness with a simpler circuit configuration.

In the present embodiment, both switches 52 and 53 of the power supply circuit 5 are switched twice (both edges of the pulse P0) for the second display unevenness correction, and are used for the first display unevenness correction. Switching is performed twice (both edges of the pulse P1 (P2)), but is not limited thereto. For example,
The integrated correction signal generator 8 generates the control signal S1 as a single pulse obtained by combining the pulses P0 and P1, and generates the pulse P0
The control signal S2 may be generated as a single pulse including P2. Even in this case, the correction voltage V2
If the application period of s · V4s is the same, the same effect can be obtained. Further, in this configuration, the number of times of switching the power supply is reduced from four to two, so that the power consumption of the logic and power supply circuit unit can be reduced.

[0091]

As described above, the liquid crystal display device according to the present invention is caused by the waveform distortion (induced distortion) generated in each of the scanning electrodes due to the change in the potential applied to each of the signal electrodes by the signal side driving means. First correction amount determining means for determining a correction amount for canceling a change in the effective voltage value applied to the liquid crystal, and generating a correction voltage corresponding to each voltage corresponding to the display data on a one-to-one basis. A power supply for correction to be output to the signal-side drive means, and the first correction amount determination means determines a difference between the lengths of periods in which the correction voltages are applied by:
The configuration is such that the application period of each of the correction voltages is determined as the correction amount so as to cancel the change in the effective voltage value to the liquid crystal.

In the above configuration, the length of the period for applying each of the correction voltages is set such that a change in the effective voltage value to the liquid crystal can be canceled out by the respective differences, and the effective value to each liquid crystal element can be canceled out. Is adjusted according to the application period length. As a result, the correction power supply has a one-to-one correspondence with each voltage.
Despite being able to output only the correction voltage corresponding to
The liquid crystal display device can suppress luminance unevenness (first display unevenness) of each pixel due to induced distortion. As a result, the first display unevenness caused by the induced distortion is suppressed, and the liquid crystal display device capable of performing a display with high display quality can be realized, although the circuit configuration is simple and can be manufactured at lower cost. This has the effect.

As described above, in the liquid crystal display device according to the present invention, in addition to the signal-side driving means and the correction power supply, the number of times that the signal-side driving means outputs each voltage corresponding to the display data varies. In which the application period length of the corresponding correction voltage is individually determined as the correction amount.
The configuration includes a correction amount determining unit.

According to this configuration, the length of the period for applying each of the correction voltages is individually determined in accordance with the change in the number of outputs of the corresponding voltage. The change of the effective value due to the above is canceled. As a result, similar to the liquid crystal display device described above, the first display unevenness due to the induced distortion is suppressed, and the display with high display quality is achieved, although the circuit configuration is simple and the device can be manufactured at lower cost. There is an effect that a possible liquid crystal display device can be realized.

As described above, in the liquid crystal display device according to the present invention, the first correction amount determining means having the above-described configuration allows the first correction amount determining means to output the correction voltages based on the number of signal electrodes outputting the respective correction voltages. In this configuration, weighting means for adjusting the application period is provided.

According to this configuration, the application period of each correction voltage is equal to the number of signal electrodes that output each correction voltage, that is,
It is adjusted according to the size of the load. Therefore, it is possible to suppress luminance unevenness due to a difference in load, and to achieve a liquid crystal display device capable of performing display with high display quality.

As described above, in the liquid crystal display device according to the present invention, when the voltage corresponding to the display data changes at each signal electrode in each of the above-described configurations, the voltage is replaced with the voltage for a certain period of time instead of the voltage. The configuration is provided with a second correction amount determining means for controlling one of the correction voltages to be output from the signal side driving means.

According to this configuration, when the voltage corresponding to the display data changes, one of the correction voltages is output to each of the signal electrodes for a certain period of time, and the signal electrode is driven by the signal electrode. 2 display unevenness is suppressed. As a result,
There is an effect that a liquid crystal display device capable of displaying with higher display quality can be realized without increasing the number of correction voltages that can be output by the correction power supply.

As described above, in the liquid crystal display device according to the present invention, in each of the above-described structures, the signal-side driving means includes a latch circuit for storing display data for one scanning horizontal period, and an output of the latch circuit. And an output control circuit for determining a voltage to be applied to each signal electrode based on the first correction amount. The correction amount corresponding to the output of the latch circuit is determined by referring to the signal earlier than the output of the latch circuit and the display data having a phase earlier by one scanning horizontal period than the output of the latch circuit.

According to this configuration, based on the display data and the AC signal which are earlier in phase than the output of the latch circuit,
Since the correction amount corresponding to the output of the latch circuit is calculated,
The first correction amount determination means can specify a correction amount in phase with the display data. As a result, more accurate correction becomes possible,
There is an effect that a liquid crystal display device capable of displaying with higher display quality can be realized.

As described above, in the liquid crystal display device according to the present invention, in each of the above-described configurations, the first correction amount determining means includes:
The configuration includes a parameter storage unit that stores a correction value or a correction coefficient to be referred to when determining each of the application periods.

According to this configuration, the first correction amount determining means can set the application period of each correction voltage to an optimum value by referring to the correction value or the correction coefficient in the parameter storage means. Therefore, there is an effect that a liquid crystal display device having a simple configuration and capable of performing display with higher display quality can be realized.

[Brief description of the drawings]

FIG. 1, showing an embodiment of the present invention, is a block diagram illustrating a main part of a liquid crystal display device.

FIG. 2 is a block diagram illustrating the configuration of a distortion correction signal generator in the liquid crystal display device in further detail.

FIG. 3 is a block diagram illustrating a configuration example of a signal-side driving circuit in the liquid crystal display device.

FIG. 4 is a waveform chart showing an operation of the signal side driving circuit.

FIG. 5 shows a display example of the liquid crystal display device,
FIG. 9 is an explanatory diagram illustrating a case where a display pattern including a vertically long block is displayed.

FIG. 6 is a waveform chart showing an operation of the liquid crystal display device when displaying the display pattern.

FIG. 7 is an explanatory diagram showing a change in a signal application waveform caused by a difference in load.

FIG. 8 shows a display example of the liquid crystal display device,
FIG. 9 is an explanatory diagram illustrating a case where a display pattern including a vertically long block is displayed.

FIG. 9 is a waveform chart showing an operation of the liquid crystal display device when displaying the display pattern.

FIG. 10 illustrates a display example of the liquid crystal display device, and is an explanatory diagram showing a case where a display pattern including a horizontal stripe pattern for each dot is displayed.

FIG. 11 is a waveform chart showing an operation of the liquid crystal display device when displaying the display pattern.

FIG. 12 is a diagram illustrating a modification of the liquid crystal display device, and is an explanatory diagram illustrating a change in a signal application waveform caused by a difference in load.

FIG. 13 shows a conventional example, and is a block diagram showing a main configuration of a liquid crystal display device.

14 is a waveform chart showing the operation of the liquid crystal display device when displaying the display pattern of FIG.

FIG. 15 is an explanatory diagram showing a result of displaying the display pattern by the liquid crystal display device.

FIG. 16 is a waveform chart showing the operation of the liquid crystal display device when the display pattern of FIG. 8 is displayed.

FIG. 17 is an explanatory diagram showing a result of displaying the display pattern by the liquid crystal display device.

FIG. 18 is a waveform chart showing the operation of the liquid crystal display device when the display pattern of FIG. 10 is displayed.

FIG. 19 is an explanatory diagram showing a result of displaying the display pattern by the liquid crystal display device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Liquid crystal panel 2 Signal side drive circuit (signal side drive means) 5 Power supply circuit 6 Distortion correction signal generation part (first correction amount determination means) 7 Dullness correction signal generation part (second correction amount determination means) 8 Parameter setting part ( parameter memory means) 23 B latch (latch circuit) 26 outputs control circuit 66 the correction value determination section (weighting means) X ₁ to X _N signal electrodes Y ₁ to Y _M scanning electrodes

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiroyuki Watani 22-22, Nagaike-cho, Abeno-ku, Osaka, Osaka Inside (72) Inventor Nobuaki Takahashi 22-22, Nagaike-cho, Abeno-ku, Osaka, Osaka F term (reference) 2H093 NA07 NA34 NC04 NC13 NC21 NC49 ND15 ND36 ND54 5C006 AA11 AC24 AF50 BB12 BF03 BF04 BF46 FA22 5C080 AA10 BB05 DD05 EE29 FF12 GG12 JJ01 JJ02 JJ02 JJ04

Claims (6)

[Claims] 1. A liquid crystal display panel having a liquid crystal layer provided between a plurality of signal electrodes and a plurality of scanning electrodes crossing each other.
In a liquid crystal display device driven based on display data indicating a display image of the liquid crystal display panel, a signal side driving unit that applies a voltage corresponding to the display data to each of the signal electrodes; First correction amount determining means for determining a correction amount for canceling a change in an effective voltage value to the liquid crystal due to a waveform distortion generated in each of the scanning electrodes due to a change in potential applied to each of the signal electrodes; A correction power supply for generating each correction voltage corresponding to each of the voltages corresponding to 1 to 1 and outputting the corrected voltage to the signal-side driving means in place of each voltage, wherein the first correction amount determination means includes: The application period of each of the correction voltages is determined as the correction amount so that the change in the effective voltage value to the liquid crystal can be canceled by the difference in the period length of the application of each of the correction voltages. A liquid crystal display device characterized by the above-mentioned. 2. A liquid crystal display panel in which a liquid crystal layer is provided between a plurality of signal electrodes and a plurality of scanning electrodes crossing each other,
In a liquid crystal display device driven based on display data indicating a display image of the liquid crystal display panel, signal side driving means for applying a voltage corresponding to the display data to each signal electrode; A correction power supply for generating each correction voltage corresponding to the voltage on a one-to-one basis and outputting the correction voltage to the signal-side driving unit in place of each voltage; A liquid crystal display device comprising: a first correction amount determining unit that individually determines, as a correction amount, an application period length of a corresponding correction voltage according to a change in a number to be output. 3. The method according to claim 1, wherein the first correction amount determining means includes weighting means for adjusting an application period of each of the correction voltages based on the number of signal electrodes outputting the respective correction voltages. The liquid crystal display device according to claim 1. 4. When the voltage corresponding to the display data changes at each of the signal electrodes, one of the correction voltages is output from the signal side driving means for a certain period instead of the voltage. 4. A liquid crystal display device according to claim 1, further comprising a second correction amount determining means for controlling the correction amount. 5. A signal driving circuit comprising: a latch circuit for storing display data for one scanning horizontal period; and an output control circuit for determining a voltage to be applied to each signal electrode based on an output of the latch circuit. Wherein the first correction amount determination means comprises a signal having a phase earlier by one scanning horizontal period than an AC signal for AC driving the liquid crystal and a signal having one phase earlier than the output of the latch circuit. 5. The liquid crystal display device according to claim 1, wherein the correction amount corresponding to the output of the latch circuit is determined by referring to the display data having the earlier phase. 6. The apparatus according to claim 1, wherein said first correction amount determination means includes parameter storage means for storing a correction value or a correction coefficient to be referred to when determining each of said application periods. 6. The liquid crystal display device according to 3, 4, or 5.