TW516017B - Liquid crystal display device - Google Patents

Liquid crystal display device Download PDF

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TW516017B
TW516017B TW89114300A TW89114300A TW516017B TW 516017 B TW516017 B TW 516017B TW 89114300 A TW89114300 A TW 89114300A TW 89114300 A TW89114300 A TW 89114300A TW 516017 B TW516017 B TW 516017B
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correction
signal
voltage
liquid crystal
crystal display
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TW89114300A
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Chinese (zh)
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Takafumi Ishida
Hiroyuki Watatani
Toshiteru Nakawaki
Nobuaki Takahashi
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Sharp Kk
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Abstract

In an LCD device, a skew correction signal generating section determines change numbers DRQ1 and DRQ2 regarding voltages V2a and V4a in accordance with display data D, and outputs correction values T1 and T2 indicative of pulse widths for correcting inductive skews. On the other hand, a power source circuit, in response to instruction from an integrated correction signal generation section, outputs a correction-use voltage V2s to the signal-side driving circuit during a first period indicated by a pulse signal S0 for signal dullness correction use and during a period indicated by the correction value Tl, and outputs the correction-use voltage V4s during the first period and during a period indicated by the correction value T2. Consequently, though the power source circuit outputs only the correction-use voltages V2s and V4s as correction-use voltages, fluctuations of RMS values caused by inductive skews and signal dullness can be corrected by differing respective durations of application of the foregoing two. Therefore, display irregularities due to these can be suppressed.

Description

五、發明說明(l) 發明領域 本發明係祀於液晶顯示裝置,其係採用以電壓平均化法 驅動之單純矩陣型液晶顯示面板者。 發明背景 近來隨著個人電腦及文字處理機之普及,其顯示裝置方 面’應為採購用輕量薄型之可用電池驅動的液晶顯示袭 置’來取代大型之耗電大的CRT (Cathode-Ray-Tube, 極射線管)。 々 此液晶顯示裝置之驅動方法之1的單純矩陣驅動,與主 動:陣驅動相tb,因成矩陣配列之各圖素並不需要非線性 兀4之=,比較上製造較容易,可降低製造成本。 所ΐ述1知之單純矩陣驅動的液晶顯示裝置1 0 〇係如圖1 3 號配置之複數掃描電極ά,及複數信 極γ 1 Ν τ彳田側驅動電路1 〇3,向依序選擇之掃描電 Y外W由電源電路105所供結之選 之外,向非選擇之备檑炉干L 1示此 非選擇電壓V3。另一田兒極Y,施加來自電源電路105之 示資料,向各作於;:信號側驅動電路102因應於顯 ,夜晶顯示面㈣;之、施加信號電壓VMV4。依此 之間的部分(液日日泰六=中,在掃描電極I與信號電極\ .\的電位差對r θ素川(1, j)),被施加與兩電極I 至夜曰帝六之i的笔壓’該部分的透過率對應於被施加 號電電壓而變化。故,藉由控制施加至各信 之顯示狀態,顯示基於顧示資料之 ΗΝ, Μ) ^ ^ im!: } Pit1 ^Yl:^ - 1 ^ ^ ^ ^ ^ - 丄 6〇i7V. Description of the Invention (l) Field of the Invention The present invention relates to a liquid crystal display device, which uses a simple matrix type liquid crystal display panel driven by a voltage averaging method. BACKGROUND OF THE INVENTION Recently, with the popularization of personal computers and word processors, the display device 'should be used to purchase a lightweight and thin battery-driven liquid crystal display device' to replace large-scale CRT (Cathode-Ray- Tube). 々The simple matrix driving method 1 of the driving method of this liquid crystal display device and the active: array driving phase tb, because the pixels arranged in a matrix do not need non-linearity. The comparison is easier to manufacture and can reduce the manufacturing. cost. The above-mentioned liquid crystal display device 1 of the simple matrix driving device 100 is configured as shown in FIG. 1 with a plurality of scanning electrodes and a plurality of signal electrodes γ 1 Ν τ 彳 田 side drive circuit 1 〇3, which are sequentially selected. Scanning power Y is displayed by the power supply circuit 105, and the non-selection voltage V3 is displayed to the non-selection oven B1. The other field electrode Y applies the indicated data from the power supply circuit 105 to each: the signal-side driving circuit 102 responds to the display and the night crystal display surface; and, the signal voltage VMV4 is applied. According to this part (Liri Day Tailiu = Medium, the potential difference between scan electrode I and signal electrode \. \ Pairs r θ Sugawa (1, j)) is applied to both electrodes I to Yeyue Di Liu The pen pressure of 'i' The transmittance of this part changes according to the applied electric voltage. Therefore, by controlling the display state applied to each letter, display ΗΝ, Μ) based on the information shown ^ ^ im !:} Pit1 ^ Yl: ^-1 ^ ^ ^ ^ ^-丄 6〇i7

,2盆t述矿晶顯示裝置100依顯示電容及顯示面積增大 ,/、動特性所造成之依存於顯示圖案的交調失真 將會產生,因此會發生顯示不均,有使顯示 口口貝降低之傾向。 -it’ ?存於顯示圖案之顯示不均之-,係為以信號 σ 、早位王現之壳度不均,該亮度不均之原因可分為以 =1顯示不均(亮度不均)係因掃描信號波形之誘導歪斜The crystal display device 100 with 2 basins is increased in accordance with the display capacitance and display area, and the intermodulation distortion depending on the display pattern caused by the dynamic characteristics will be generated, so display unevenness will occur, which will cause the display mouth Shell's tendency to decrease. -it ’? The unevenness of the display in the display pattern-is caused by the signal σ and the unevenness of the shells appearing early. The cause of the uneven brightness can be divided into = 1. The uneven display (uneven brightness) is due to the scanning signal waveform. Induced skew

而造成者,在以下情況下出現,即信號電壓之變化被誘II 至2描電極侧,依存於液晶電容成分及信號線與掃描電柄 的電阻成分之時間常數的微分波形,即誘導斜歪 描信號的波形上時。 X玍隹士 第2頒示不均(壳度不均)係向液晶電容之充放電造成者 下情況下出㉟,即信號電壓變化時,依存於上述時 液晶電容被充放電,於是使信號電壓本身的施加 波形鈍化時。The cause is that the change in signal voltage is induced on the electrode side of II to 2 and depends on the differential waveform of the liquid crystal capacitor component and the time constant of the resistance component of the signal line and the scanning handle, which induces skew. Trace the waveform of the signal. The second presentation of the X Xishi (uneven case) is caused by the charging and discharging of the liquid crystal capacitor, that is, when the signal voltage changes, the liquid crystal capacitor is charged and discharged depending on the above, so the signal When the applied waveform of the voltage itself is passivated.

的:二主如圖5所示’在欲顯示混有縱長形之方塊圖案 ί ΐ 況下,信號電極Xa在掃描電極Yd〜Y㈣之任一者 冲日示白痛示(冗燈),號電極\在掃描電極Y〜γ 一者中皆指示黑顯示(不亮燈)。惟,如圖14所4示?9因 亡:;IL的驅動液晶,在掃描掃描電極I之時點中,交流化 仏唬F R的邏輯顛倒。故,信號電極、自電壓v 4變化為電壓 V2,信號電極\自電壓V2變化至電壓V4。在此時點,掃描: As shown in FIG. 5, when the two main masters want to display a long and long square pattern ΐ ,, the signal electrode Xa shows white pain (red light) on the scanning electrode Yd ~ Y㈣. No. electrode \ indicates a black display (not lit) in all of the scan electrodes Y to γ. However, as shown in Fig. 14 and Fig. 14, the cause of 9: the driving liquid crystal of IL, at the time of scanning the scanning electrode I, the logic of AC to frighten F R is reversed. Therefore, the signal electrode changes from the voltage v 4 to the voltage V 2, and the signal electrode changes from the voltage V 2 to the voltage V 4. At this point, scan

第7頁 16017 五、發明說明(3)Page 7 16017 V. Description of the invention (3)

電極Yc未被選擇,料} 描電極Yc,於嚷掃J 2 f電極I施加非選擇電壓V3。在掃 壓係顛倒之故,# ^ Yc相面對的信號電極X侧中施加電 。 务生了因該電壓變動所造成之誘導歪斜 :叫,自電壓V4 -其相對的,如信 篆電極數係為N/10 & f虎電極數 V3向電壓V2之方 ,交流化信綱 · Yd+7的時點 霞壓V3至電壓72的 的 區域之古碎 +甘 u。问牙' D的斜線部 ,^之冗度,比其他的白的區域(包含圖素A的區 在斜線部發生「脫白」現象。 曰 方面,如圖8所示,在欲顯示混合每一列的橫 圖像之情況下,依其他型的誘導歪斜, 、」、、Θ 的圖素A. Β中’圖素Α的亮度比圖素8低。因^同 如圖1 7 及施加至圖素 ,儘管若無誘導不 ^目同的實效值,^ 動電壓之實效值 大。於是,如囷 含圖素B的斜線^ 516017 - I __ 丨··· 五、發明說明(4) 所示,在斜線部會發生 — 號FR的極性沒‘有顛門、、:況。具體上,在交流 X ,俜如m fi矫- 功間,破施加至信號電朽γ a 圖6所不,在掃描掃垆雷炻v v a €極1之電壓 掃描區塊LP,於電壓V2 田電和d Yd+9』間,於每一 口老帝i v ~ V 2及電壓V4之間顛倒。足 唬笔極心即使在掃描掃描 任、另一方面,信 係指示亮燈之故,信號兩搞γ Υι Ym之任一者之情況下,因 處為V2),並不變化。’b电b之電壓保持為-定的值(此 知描電極γ。在掃描上述掃描 非選擇電㊃3,但在自掃描掃产間,雖被施加 Y叫時,多婁文的信號電極X ...田;入知描掃描電極 電壓V2變化至電壓V4,τ iU之电極)之施加電壓自 電壓V4的方向發生誘導雜電向 電厂堅V2的方向:生:;;日;,。於掃描電極I,自電㈣向 故,在顯示圖8所示之圖幸昧 皆反覆發生誘導歪斜。此讀墓不,於掃描電極乙在每一列 素A的驅動波形(χ_γ)之斜如圖16所示,會有使圖 圖U之驅動波形(aVY)戶/;;值六減少的效果。·又,圖案Β如 實效值之減少及辦"大C。因卜,人互發生因誘導歪斜造成之 ^ e , H 9 ,取其平均,實效值並未略减 ^ 7、疋圖素A的亮度變得t卜罔主^ 相應顯示白的區域,圖17所圖素M、,即使在被指示互 剩下的白顯示區砝也回士 μ I^斜線部的區域被顯不得比 516017 五、發明說明(5) 混有格號圖案之情況。即,在六、古 4^ 在又"丨吕號FR之極性未顛倒The electrode Yc is not selected, the electrode Yc is traced, and a non-selective voltage V3 is applied to the sweep J 2 f electrode I. When the voltage sweep is reversed, electricity is applied to the X side of the signal electrode # ^ Yc facing each other. Induced skew caused by this voltage change: called, from voltage V4-its relative, for example, the number of letter electrodes is N / 10 & the number of tiger electrodes V3 to the voltage V2 side, exchange the letter outline · The time when Yd + 7 is in the area of Xia pressure V3 to voltage 72 is ancient broken + Gan u. Ask the teeth 'D's oblique line, the redundancy of ^, than other white areas (the area containing pixel A, "whitening" phenomenon occurs in the oblique line. In terms of, as shown in Figure 8, In the case of a horizontal image of a column, according to other types of induced distortion, the brightness of the pixels A, B, ′, Θ is lower than that of pixel 8. Because of the same as shown in Figure 17 and applied to Pixels, although there is no different effective value if induced, the effective value of the dynamic voltage is large. So, for example, the diagonal line containing pixel B ^ 516017-I __ 丨 ··· V. Description of the invention (4) It is shown that the polarity of FR will occur in the oblique line. There is no change in the polarity of the FR. Specifically, in the AC X, such as m fi correction-work, the signal is applied to the signal decay. During the scan of the voltage scanning block LP of the scan voltage thunder vva € pole 1, between voltage V2 Tiandian and d Yd + 9 ”, reverse between each mouthful of the old emperor iv ~ V 2 and voltage V4. Even if Jixin scans and scans, on the other hand, the signal is on. On the other hand, in the case of any signal γ Υ 任 一 Ym, it is V2), and it does not change. The voltage of 'b electric b is kept at a fixed value (this electrode is known as γ. During the scanning of the above-mentioned scanning non-selective electrode ㊃3, when Y is applied during the self-scanning scan, the signal electrode X in Dolowen is X ... field; the scanning electrode voltage V2 changes to the voltage V4, τ iU (the voltage applied to the electrode) from the direction of the voltage V4 to induce miscellaneous electricity to the direction of the power plant V2: Health: ;; . For the scanning electrode I, since it is galvanically oriented, the skew shown in FIG. 8 is repeatedly induced in the graph shown in FIG. 8. In this grave reading, the slope of the driving waveform (χ_γ) of scan electrode B in each column of pixel A is shown in Fig. 16, and the driving waveform (aVY) of figure U will be reduced. Also, the pattern B will be reduced if the actual effect value is reduced. Due to the fact that humans have caused ^ e, H 9 due to induced skew, take the average, and the actual value has not decreased slightly. 7. The brightness of pixel A becomes t. The main display is the white area. The pixels M and 17 shown in the white display area, which are left in each other's instructions, return to the area of the oblique line μ I ^. It is not comparable to 516017. V. Description of the invention (5) A case with a grid pattern. That is, in Liu and Gu 4 ^ Zai " 丨 Lu No. FR, the polarity is not reversed

期間,被施加^至信號電極χ之雷 ^ J u. ^ ^ L 之電壓Xb係如圖1 8所示,在掃 也知也電極γ〜γ 期間,於备 > -M ,5 A I 於母一掃描區塊LP,在電壓¥2及During the period, the voltage Xb applied to the signal electrode χ ^ J u. ^ ^ L is shown in Fig. 18, during the period of scanning the electrode γ ~ γ, in the preparation > -M, 5 AI to the mother Scan a block LP at a voltage of ¥ 2 and

e ^ 面’被施加至信號電極xa之電壓X ,即使在掃描掃描電極γ〜γ夕权土 & 此— > 包征丨1 ^之任一者之情況下,亦保持於 才曰不焭燈之值(此處為V 2 )未有變化。 掃描電極Yc,在掃描上述掃 非廷擇電壓V3。又,顯示圖幸如m n私一也卜门* 如圖10所不,為母一圖素之 格子圖案,於掃描列之移扞士 认, Μ® π 订化,相鄰的信號電極X…間, 輸出互成逆向的轡化電壓,&、ra > ^ i ^ t J ^ ^ 各過渡電流互相抵消。於是, 押' 描電極γ並不合於生因作# c 个a心王 Ί°唬電極X…之電壓變化造成之 誘導歪斜。The voltage X of e ^ plane 'is applied to the signal electrode xa, and it is kept at no time even in the case of scanning the scanning electrodes γ to γ and the right land & The value of the chirp lamp (here V 2) has not changed. The scan electrode Yc scans the scan voltage V3. In addition, the display is fortunate as mn private and yemen * As shown in Figure 10, it is a grid pattern of mother and pixel, which is recognized in the scan row, Μ® π is customized, and the adjacent signal electrode X ... The output voltages are reversed to each other, and the transition currents &, ra > ^ i ^ t J ^ ^ cancel each other out. Therefore, the drawing electrode γ is not suitable for the induced distortion caused by the voltage change of the electrode c.

惟,將圖素Α與圖素Β作一比較,連接於圖素人之信號電 極Xa之電壓並未顛倒,相對於此,連接於圖素β之信號電 ,心則在每一次掃描列移行時,電壓顛倒,反覆進行向液 晶電容之充放電。於是,如圖丨8所示,於信號電極心之波 形Xb上發生因充放電造成之積分波形性鈍化。故,圖素B 之驅動波形(Xb —Yc)之實效值減少,圖素8的亮度變得比圖 素A低。依此,儘管彡相被指示進行白顯示,圖丨9所示斜 線部區域會變得比剩下的白顯示區域暗。 上述第1及第2顯示不均中,為了減低第1顯示不均,例 如曰本公開專利公報「特開平2__89號公報」(公開日199〇 =1月5曰)揭示以下構造(以下稱第i習知技術)。即,在誘 導歪斜使成為修正對象之圖素的實效值增大的情況下,將However, when comparing pixel A and pixel B, the voltage of the signal electrode Xa connected to the pixel is not reversed. In contrast, the signal voltage connected to the pixel β is shifted by the heart during each scan. The voltage is reversed, and the charging and discharging to the liquid crystal capacitor are repeated. Therefore, as shown in FIG. 8, the integral waveform passivation due to charge and discharge occurs on the waveform Xb of the signal electrode core. Therefore, the effective value of the driving waveform (Xb-Yc) of pixel B decreases, and the brightness of pixel 8 becomes lower than that of pixel A. Accordingly, although the phase is instructed to be displayed in white, the region of the oblique line shown in Fig. 9 becomes darker than the remaining white display region. Among the above-mentioned first and second display unevennesses, in order to reduce the first display unevenness, for example, this published patent publication "Japanese Unexamined Patent Publication No. 2__89" (publication date: 1990 = January 5) discloses the following structure (hereinafter referred to as "the first i know technology). That is, when the distortion is induced to increase the effective value of the pixel to be corrected, the

>16017 五、發明說明(6) 使實效電壓減少的值之修正電壓重疊於一般的輸出電壓V2 (V4)上,向信^號電極Xi〜XN輸出。又,在誘導歪斜使實效值 減少的情況下,將使實效值增加的值之修正電壓,重聂於 一般的輸出電壓V2(V4)上予以輸出。 、 另一方面為了減低第2顯不不均’如日本公開專利公報 「特開彳8-2 9 2 744號公報」(公開日1 9 9 6年11月5日)揭示 以下構造(以下稱第2習知技術)。即,即使依各掃描期間 之施加電壓的變化’施加波形純化,實效值減低,為了可 補償該實效值之減低,施加使實效值增大的修正電壓。 惟,上述第1習知技術必須在信號電極驅動用之2個電壓 (V 2 · V 4 )上各設實效值增大用及實效值減少用的2個修正 電壓。因此,信號電極輸出電位需要6個電位,產生了電 路規模增大,製造成本高騰的問題。 毛 又,上述第1及第2習知技術任一者皆僅係修正第1顯示 不均或第2顯示不均者’故無法修正另一種顯示不均’:、難 ϋΛ保顯示品質。又,為了修正第1及第2顯示不均, 右j g知技術之構造與第2習知技術的構造獨立設置, 則會更加增大電路規模,使製造成本更高升。 發明要點 本毛明係為解決上述課題而研發者,其目的在以可實用 ^的低成本,實現無顯示不均的高顯示品質之液晶顯示裝 於ί:達成上述目的,本發明之液晶顯示裝置,其特徵在 、/、 ·,夜晶顯米面板,其係在互相交叉之複數的信號電> 16017 V. Description of the invention (6) The correction voltage at which the effective voltage is reduced is superimposed on the general output voltage V2 (V4) and output to the signal electrodes Xi ~ XN. When the distortion is induced to reduce the effective value, the correction voltage of the value that increases the effective value is output to the general output voltage V2 (V4). On the other hand, in order to reduce the second significant unevenness, such as the Japanese Laid-Open Patent Publication "Japanese Patent Application Laid-Open No. 8-2 9 2 744" (publication date November 5, 1996), the following structure (hereinafter referred to as " No. 2 Know-how). That is, even if the applied waveform is purified in accordance with the change of the applied voltage in each scanning period, the effective value is reduced. In order to compensate for the decrease in the effective value, a correction voltage that increases the effective value is applied. However, the above-mentioned first conventional technique must set two correction voltages for increasing the effective value and decreasing the effective value on the two voltages (V 2 · V 4) for driving the signal electrode. Therefore, the output potential of the signal electrode requires 6 potentials, which causes problems such as an increase in circuit scale and high manufacturing cost. In addition, either of the first and second conventional techniques mentioned above only corrects the first display unevenness or the second display unevenness ', so it is impossible to correct another display unevenness': it is difficult to maintain the display quality. In addition, in order to correct the uneven display of the first and second displays, the structure of the known technology and the structure of the second known technology are provided independently, which will further increase the circuit scale and increase the manufacturing cost. SUMMARY OF THE INVENTION The present invention was developed by a developer to solve the above-mentioned problems. The purpose of the invention is to realize a liquid crystal display with high display quality without display unevenness at a practically low cost. Device, characterized by, /, ·, night crystal display rice panel, which is connected to a plurality of signal signals crossing each other

第11頁 B16017 五、發明說明(7) 極及複數的掃描電極之間設有液晶層,基於表示顯示圖像 之鮮員不貢料而-被驅動者, 信號侧驅動機構,其係將與上述顯示資料相對應之電壓 ,施加至上述各信號電極者; 修正用電源,其係產生與對應於顯示資料之上述各電壓 成1對1對應的各修正用電壓,將所產生之各修正用電壓取 代上述各電壓,向上述信號側驅動機構輸出者;及 第1修正量決定機構,其係對於被施加至液晶層之實效 電壓值之變化,以依上述各修正用電壓之施加期間之差可 將該變化予以打消之方式,決定上述各修正用電壓之施加 期間作為修正量者;上述實效電壓值之變化係因依自上述 信號側驅動機構向上述各信號電極施加之電位變化,於上 述各掃描電極所發生之波形的歪斜所造成者。 於上述構造中,若於掃描電極發生誘導歪斜,在該掃描 電極與各信號電極之交點所對應之向各液晶元件的實效值 發生變化,則第1修正量決定部將調整各修正用電壓之施 加期間(施加時間)。依此,向各液晶元件之實效值,可因 應:顯示資料所對應之電壓與修正用電壓之差,與施加期 間之積而作調整。 此處,上述各修正用電壓之施加期間,係被設定為可依 彼此之差,抵消向上述液晶之實效電壓值之變化者。故, 儘管上述修正用電源僅輸出與各電壓成1對1對應之修正用 電壓,液晶顯示裝置仍可抑制因誘導歪斜所造成之各圖素 的亮度不均(第1顯示不均)。Page 11 B16017 V. Description of the invention (7) A liquid crystal layer is provided between the electrode and the plurality of scanning electrodes. Based on the fact that the fresh person showing the displayed image is not expected-the driven person, the signal-side driving mechanism, which will be related to The voltage corresponding to the above-mentioned display data is applied to the above-mentioned signal electrodes. The power for correction is to generate each correction voltage corresponding to the above-mentioned voltage corresponding to the display data on a one-to-one basis. The voltage replaces each of the voltages and outputs it to the signal-side driving mechanism; and a first correction amount determining mechanism that changes the effective voltage value applied to the liquid crystal layer according to the difference between the application periods of the respective correction voltages. The change may be cancelled, and the application period of each of the correction voltages is determined as the correction amount. The change of the effective voltage value is due to the change in potential applied to the signal electrodes by the signal-side driving mechanism. Caused by the skew of the waveforms that occur at each scan electrode. In the above structure, if the induced distortion occurs at the scan electrode, and the actual value of the liquid crystal element corresponding to the intersection of the scan electrode and each signal electrode changes, the first correction amount determination unit will adjust the voltage of each correction voltage. Application period (application time). According to this, the actual value of each liquid crystal element can be adjusted according to the product of the difference between the voltage corresponding to the display data and the voltage for correction and the application period. Here, the application periods of the above-mentioned respective correction voltages are set so as to be able to offset changes in the effective voltage value to the liquid crystal according to the difference between them. Therefore, although the above-mentioned correction power supply only outputs the correction voltage corresponding to each voltage on a one-to-one basis, the liquid crystal display device can suppress uneven brightness of each pixel due to induced distortion (the first display unevenness).

第12頁 516017 五'發明說明(8) ' -- 於是,與對各電壓輸出各2個修正用電壓之習知技術相 比,電路構造更簡單,且製造成本更低,除此之外/可抑 制因誘導歪斜所造成之第1顯示不均,可實現顯示%質古 的液晶顯示裝置。 、° 上述液晶顯示裝置’其中具備第2修正量決定機構亦可 ,其係在上述各信號電極,上述顯示資料所對應之電壓有 變化之情況,以取代該電壓,在一定期間,將上述各修正 用電壓中之一,自上述信號侧驅動機構予以輸出之方式予 以控制者。 依上述構造,在與上 情況;於上述各信號電 電壓中之1個予以輸出( 之電壓發生變化,向信 該波形純化所造成之貝 之修正用電壓之施加予 造成之第2顯示不均。 於是,不必增加修正 目,即可實現更高顯示 本發明之其他目的’ 又,本發明之優異處依 迷_不貢料對應的電壓發生變化之 極,於一定期間係將上述各修正用 依此即使在因與顯示資料對應 號電極輸出之波形鈍化之情況下, 效電壓值之變化, 』、μ 又化 可依該一定期間 以抵消之故,可永 J抑制因波形鈍化所 用電源可輸出之仏x m ^ 〇 山<修正用電壓之數 口口貝之液晶顯示裝置。 特徵及優點依以π ^ 灸职 ㈤ 伙Μ下記載即可明白。 麥知附圖所作之 F <从下說明即可明白 置之要部方塊圖 圖1為本發明〆實施形態為液晶顯示穿Page 12 516017 Five 'Explanation of Invention (8)'-Therefore, compared with the conventional technique of outputting two correction voltages for each voltage, the circuit structure is simpler and the manufacturing cost is lower. The first display unevenness caused by the induced distortion can be suppressed, and a liquid crystal display device with a high-quality display can be realized. ° The above-mentioned liquid crystal display device may include a second correction amount determining mechanism, which is in the case where the voltage corresponding to the above-mentioned signal electrodes and the display data changes, instead of the voltage, the above-mentioned each One of the correction voltages is controlled by a method of outputting from the signal-side driving mechanism. According to the above structure, in the same situation as above; the voltage of one of the above-mentioned signal electric voltages is output (the voltage is changed, and the second display unevenness caused by the application of the correction voltage caused by the correction of the waveform) Therefore, it is possible to achieve higher display of the other objects of the present invention without adding correction items. Moreover, the advantages of the present invention depend on the poles where the voltage corresponding to the voltage changes, and the above corrections are used for a certain period of time. Therefore, even in the case of passivation due to the waveform of the electrode output corresponding to the display data, the change in the effective voltage value can be offset according to the certain period, and the power source used for waveform passivation can be suppressed forever. The output of xm ^ 〇 mountain < correction of the number of mouths of the liquid crystal display device. Features and advantages can be understood from the π ^ moxibustion post, the following document. Mai Zhi attached to the picture F < from The following is a block diagram of the essential parts that can be clearly understood. FIG. 1 is an embodiment of the present invention.

第13頁 516017 五、發明說明(9) 圖2為於上述液晶顯示裝置中將歪斜修正信號產生部之 構成更詳細說明之方塊圖。 圖3為於上述液晶顯示裝置中,信號側驅動電路之構成 例的方塊圖。 圖4為上述信號侧驅動電路之動作波形圖。 圖5為上述液晶顯示裝置之顯示例係顯示包含縱長方塊 之顯示圖案之情況之說明圖。 圖6為上述顯示圖案顯示時,上述液晶顯示裝置之動作 波形圖。 圖7為負荷相異造成之信號施加波形變化的說明圖。 圖8為上述液晶顯示裝置之顯示例係顯示包含縱長方塊 之顯示圖案之情況的說明圖。 圖9為上述顯示圖案顯示時,上述液晶顯示裝置之動作 波形圖。 圖1 0為上述液晶顯示裝置之顯示例係顯示在每一點包含 橫線圖案之顯示圖案之情況之說明圖。 圖11為上述顯示圖案顯示時,上述液晶顯示裝置之動作 波形圖。 圖1 2為上述液晶顯示裝置之變形例,負荷相異造成之信 號施加波形變化說明圖。 圖1 3為習知例為液晶顯示裝置之要部構造方塊圖。 圖1 4為圖5之顯示圖案顯示時,上述液晶顯示裝置之動 作波形圖。 圖1 5為上述液晶顯示裝置顯示上述顯示圖案之結果說明Page 13 516017 V. Description of the invention (9) Fig. 2 is a block diagram illustrating the structure of the skew correction signal generating section in the above-mentioned liquid crystal display device in more detail. Fig. 3 is a block diagram of a configuration example of a signal-side driving circuit in the liquid crystal display device. FIG. 4 is an operation waveform diagram of the signal-side driving circuit. Fig. 5 is an explanatory diagram of a case where the display example of the liquid crystal display device described above displays a display pattern including vertically long squares. Fig. 6 is an operation waveform diagram of the liquid crystal display device when the display pattern is displayed. FIG. 7 is an explanatory diagram of changes in signal application waveforms caused by different loads. Fig. 8 is an explanatory diagram of a case where the display example of the liquid crystal display device is to display a display pattern including vertically long squares. Fig. 9 is an operation waveform diagram of the liquid crystal display device when the display pattern is displayed. Fig. 10 is an explanatory diagram of a case where the display example of the above-mentioned liquid crystal display device shows a display pattern including a horizontal line pattern at each point. Fig. 11 is an operation waveform diagram of the liquid crystal display device when the display pattern is displayed. Fig. 12 is a diagram illustrating a variation of the above-mentioned liquid crystal display device, in which a signal applied waveform is changed due to different loads. FIG. 13 is a block diagram showing a structure of a main part of a conventional example of a liquid crystal display device. Fig. 14 is a waveform diagram of the operation of the liquid crystal display device when the display pattern shown in Fig. 5 is displayed. FIG. 15 is an explanation of the results of the display pattern displayed by the liquid crystal display device

第14頁 516017 五、發明說明(ίο) 圖。 圖1 6為圖8之顯示圖案顯示時,上述液晶顯示裝置之動 作波形圖。 圖1 7為上述液晶顯示裝置顯示上述顯示圖案之結果說明 圖。 · 圖1 8為圖1 0之顯示圖案顯示時,上述液晶顯示裝置之動 作波形圖。 圖1 9為上述液晶顯示裝置顯示上述顯示圖案之結果說明 圖。 發明之實施形態 以下基於圖1至圖1 2說明本發明之一實施形態。 本實施形態之液晶顯示裝置係依電壓平均化法驅動單純 矩陣型液晶顯示面板,顯示與顯示資料對應之圖像者。此 液晶顯示裝置係如圖1所示,具備液晶顯示面板1、信號側 驅動電路(信號侧驅動機構)2、掃描側驅動電路3、控制電 路4及電源電路(修正用電源)5。 液晶顯示面板1係將複數掃描電極Y i〜YM及複數信號電極 Xi〜XN互成父叉配置。信號側驅動電路2向各信號電極〜XN 施加基於顯示資料的信號電壓。掃描側驅動電路3向各掃 描電極Yi〜YM依序施加電壓。控制電路4控制兩驅動電路2 · 3。電源電路5產生驅動上必要的電壓。 以下為便於說明,在未特定指明各電極Xi〜XN · Yi〜YM之位 置或予以總稱時,於例如以信號電極X表示而省略下標。 另一方面,在有特定位置的情況,則以1〜N、1〜Μ或1〜N的Page 14 516017 V. Description of the Invention (ίο) Figure. Fig. 16 is an operation waveform diagram of the liquid crystal display device when the display pattern shown in Fig. 8 is displayed. FIG. 17 is a diagram illustrating the results of displaying the display pattern by the liquid crystal display device. Fig. 18 is an operation waveform diagram of the liquid crystal display device shown in Fig. 10 when the display pattern is displayed. FIG. 19 is a diagram illustrating a result of displaying the display pattern by the liquid crystal display device. Embodiment of the Invention An embodiment of the present invention will be described below based on Figs. 1 to 12. The liquid crystal display device of this embodiment drives a simple matrix liquid crystal display panel according to a voltage averaging method, and displays an image corresponding to display data. This liquid crystal display device is provided with a liquid crystal display panel 1, a signal-side driving circuit (signal-side driving mechanism) 2, a scanning-side driving circuit 3, a control circuit 4 and a power supply circuit (power supply for correction) 5 as shown in Fig. 1. The liquid crystal display panel 1 is configured by arranging a plurality of scanning electrodes Yi to YM and a plurality of signal electrodes Xi to XN to form a parent fork. The signal-side driving circuit 2 applies a signal voltage based on the display data to each of the signal electrodes to XN. The scan-side drive circuit 3 sequentially applies voltages to the scan electrodes Yi to YM. The control circuit 4 controls the two driving circuits 2 · 3. The power supply circuit 5 generates a voltage necessary for driving. For convenience of explanation, when the positions of the electrodes Xi to XN · Yi to YM are not specified or collectively referred to, the subscripts are omitted by using signal electrodes X, for example. On the other hand, when there is a specific position, the value is 1 to N, 1 to M, or 1 to N.

第15頁 )丄6017 五、發明說明(H) Μ的範圍内之任意整數〕·作為表示 範圍内之任意整數i 位置的下標。- 動ΐ 造來中白掃描電極被依序掃描,掃描側驅 掃描門奸"· ,F丨工制電路4之掃描時鐘Lp交流化信號FR及 掃描電極Y…,施加央、 卜,亚向非選擇之各 方 自電源電路5之非選擇電壓V3。另一 、資料:!號:二動電路2基於來自控制電路4之顯示資料d 顯示:ΐ :n :二掃描時鐘LP及交流化信號FR,因應於 。此二;::,°各k號電極χι〜XN,施加信號電壓V2a 4V4a 處/上述電壓V1〜V5係如下式⑴所示,被設定為: VI > V2a >V3 >V4a >V5 … 路2為了交驅動液晶顯示面板丨之液晶,信號側驅動電 因應於父流化信號FR,顯示資料表示,,0N"(亮燈)的 二:,將電壓V2a或電壓V4a予以切換並輸出,掃描側驅 ^略3則係將電㈣或電壓V5h切換並輸出。 電極x此,ΐ液晶顯示面板1之液晶中,掃描電極、與信號 於兩電ΐΓΥ部分(液晶電容、圖素PIX。,」)),被施加對應 於被λ 1〆電位差的電壓,該部分之透過率係因應 信加至液晶電容之實效電壓而變化。&,藉由控制向 板1 ^電極Xl〜Χν及掃描電極ν Υμ之電壓,可控制液晶顯示面 顯示Α之.王圖素1"1、1,υ〜ΡΙΧ(Ν' Μ)之顯示狀態,可顯示基於 板1 Α貝料之一圖像。Χ ’以下為便於說明,係對液晶顯示面 為負顯示之情;兄,即隨著實效電壓變大各圖素ριχ係被Page 15) 丄 6017 V. Description of the Invention (H) Any integer within the range of M]] as a subscript indicating the position of any integer i within the range. -Every time, the white and white scan electrodes are sequentially scanned, the scan side scans the scan gate, and the scan clock Lp AC signal FR and scan electrode Y of the circuit 4 are applied. To the non-selected parties, the non-selected voltage V3 of the power supply circuit 5 is applied. Another: Data:! Number: Two-action circuit 2 is based on the display data from control circuit 4. d Display: ΐ: n: Two-scan clock LP and AC signal FR, corresponding to. These two ::, ° K electrodes xι to XN, at the applied signal voltages V2a 4V4a / the above voltages V1 to V5 are shown in the following formula ⑴, and are set as: VI > V2a > V3 > V4a > V5… Road 2 is used to drive the liquid crystal of the liquid crystal display panel. The driving power of the signal side is based on the parent fluidized signal FR. According to the display data, 0N " (light on) 2: Switch the voltage V2a or V4a Output, scan side driver ^ 3 is to switch and output voltage or voltage V5h. Electrode x In the liquid crystal of the liquid crystal display panel 1, the scanning electrode and the signal are applied to a portion of the two electrodes (a liquid crystal capacitor, a pixel PIX, ...)), and a voltage corresponding to a potential difference of λ 1〆 is applied to the portion. The transmittance varies depending on the effective voltage applied to the liquid crystal capacitor. & By controlling the voltages to the electrode 1 ^ electrode X1 to χν and the scanning electrode ν Υμ, the display of the liquid crystal display surface A can be controlled. Wang Tusu 1 " 1, 1, υ ~ ΡΙχ (N'M) display Status, can display one image based on plate 1 Α shell material. Χ ’The following is for the convenience of explanation. It shows the negative display of the liquid crystal display surface. Brother, that is, as the effective voltage becomes larger, each pixel ριχ is

第16頁 516017 五、發明說明(12) 之 表示為冗的情況說明,但當然相反的亦 情況。 - 尺用於正顯 此處,本實施形態之液晶顯示裝置為了栓 ^ 不均,其係因信號電壓之變化被誘導至掃^ =之第1顯示 描信號波形歪斜而發生者;及第2顯示不岣'“極I側,掃 電壓變化所造成之向液晶電容之充放電,’其因信號 化而發生者;具備以下構造。 〜信號電壓鈍 即,電源電路5之電壓產生部51,除了 用的電壓VI · V2 · V3 · V4 · V5之外,尚可曰曰驅動上通常 壓V2s · V4s。又,電源電路5上設有:開生修正^之電 電壓V2 · V2s之任一者作為信號電壓V2a予’其係選擇 關53,其係選擇電壓V4 · ν“之任一 輸出者;及開 以輸出者。 马信號電壓V4a予 上述開關5 2 · 5 3係如後述,係由將歪斜修 (第1修正量決定機構)6之判定結果,及鈍 &唬產生部 ,第2修正量決定機構)7所產生之信號以統== ^號產生部8所發出之控制信號S1 · S2,予以控制盆導通/ 切斷。液晶顯示裝置依兩開關52 · 53之導通期二間之差,增 減被施加至上述液晶電容之實效電壓的平均值。依此 僅對各電壓V2 .V4,各設1個修正用電壓V2s .V4s,亦可 抑制上述第1及第2顯示不均雙方。 以下為便於說明,係說明將修正用電壓V 2 s · V 4 s設定為 對一般的輸出電壓V2 .V4,使實效電壓增大之值,具體上 係設定為V2 < V2 s且V4 < V4s之情況,但如後述設定為使實Page 16 516017 V. The description of invention (12) is shown as a redundant description, but of course the opposite is also true. -The ruler is used for the positive display here. In order to prevent unevenness in the liquid crystal display device of this embodiment, it is caused by the distortion of the first display trace signal waveform caused by the change in the signal voltage; and the second The display does not show "" Pole I side, charge and discharge to the liquid crystal capacitor caused by the sweep voltage change, "which occurs due to signalization; has the following structure. ~ The signal voltage is blunt, that is, the voltage generating unit 51 of the power supply circuit 5, In addition to the voltages VI · V2 · V3 · V4 · V5 used, it can be said that the normal voltage V2s · V4s is applied to the drive. In addition, the power supply circuit 5 is provided with any of the correction voltages V2 · V2s. One of them is the signal voltage V2a to 'its selection switch 53, which is to select any one of the output voltages V4 · ν'; and to turn on the output. The horse signal voltage V4a to the above-mentioned switch 5 2 · 5 3 is the result of the judgment of the skew correction (the first correction amount determination mechanism) 6 as described later, and the blunt & amp generation unit, the second correction amount determination mechanism. The generated signal is controlled by the control signal S1 · S2 sent from the unit == ^ to control the basin on / off. The liquid crystal display device increases or decreases the average value of the effective voltage applied to the liquid crystal capacitor according to the difference between the two on-times of the two switches 52.53. In this way, only one correction voltage V2s.V4s is set for each voltage V2.V4, and both the first and second display unevenness can be suppressed. The following is for convenience of explanation. It is explained that the correction voltage V 2 s · V 4 s is set to the value of the effective output voltage V2. V4 to increase the effective voltage. Specifically, it is set to V2 < V2 s and V4 & lt In the case of V4s, but set as

第17頁 516017 五、發明說明(13) ---- 效電壓減少之值亦可。 另一方面上述歪斜修正信號產生部6,基於顯示資料〇 ,對應於V2侧電位之變化數⑽!^及修正電壓V2s之輸出電 極數K1,將表示修正用電壓V2s之輸出期間之值丁丨^以輸 出。又,基於顯示資料D,對應於V4侧電位之變化數⑽^ 及修正用電壓V4s之輸出電極數K2,將表示修正用電壓V4s 之輸出期間之值T2予以輪出。又,上述變化數⑽卩丨、 及輸出電極數ΚΙ、K2將說明於後。Page 17 516017 V. Description of the invention (13) ---- The value of effective voltage reduction is also acceptable. On the other hand, based on the display data 0, the above-mentioned skew correction signal generating section 6 corresponds to the number of changes in the potential of the V2 side ⑽! ^ And the number of output electrodes K1 of the correction voltage V2s, and will indicate the value of the output period of the correction voltage V2s. ^ To output. In addition, based on the display data D, a value T2 representing the output period of the correction voltage V4s corresponding to the change number ⑽ ^ of the potential at the V4 side and the number of output electrodes K2 of the correction voltage V4s is rotated out. The above-mentioned change numbers 变化 丨 and output electrode numbers KI and K2 will be described later.

洋5己’於本貫施形態中,上述修正值了丨· τ 2係將對應於 上述變化數DRQ1、DRQ2之基準值,各設為“]^、VAL \ 下式(2)及(3)予以算出。 T1 =VAL1 +Klx VAL3 ·· (2) 丁 2 =VAL2 +Κ2 x VAL3 ...(3) 於式(2 )及(3 )中’ V A L 3係為修正係數,可於參數設定部 9任意設定。又,本實施形態中,係將修正用電壓v 2 s · V 4 s設定為使被施加至圖素之驅動電壓的實效值增大之值 ,故’上述各基準值VAL1 · VAL2之係被設定為隨著各變化 數DRQ1 · DRQ2之變大而增大。In the present embodiment, the above-mentioned correction value has been adjusted. Τ 2 is the reference value corresponding to the above-mentioned change numbers DRQ1 and DRQ2, each set to "] ^, VAL \ (2) and (3) ). T1 = VAL1 + Klx VAL3 · (2) ding 2 = VAL2 + Κ2 x VAL3 ... (3) In equations (2) and (3), 'VAL 3 is the correction coefficient, which can be set in the parameter The setting portion 9 is arbitrarily set. In the present embodiment, the correction voltage v 2 s · V 4 s is set to a value that increases the effective value of the driving voltage applied to the pixel. The system of VAL1 · VAL2 is set to increase as the number of changes DRQ1 · DRQ2 becomes larger.

又,歪斜修正信號產生部6,自儲存於參數設定部(參數 記憶機構)9之表,各讀出與上述自變化數drqi、DRQ2對應 之值,藉以讀出上述各基準值VAL1 · VAL2及修正係數VAL3 。即,歪斜信號產生部6如圖2所示,具備:資料數記憶部 6 1、前列資料數記憶部6 2、變化數檢知部6 3、存取部6 4、 資料數取得部6 5、及修正值決定部(加重機構)6 6。In addition, the skew correction signal generating section 6 reads the values corresponding to the above-mentioned self-variation numbers drqi and DRQ2 from the table stored in the parameter setting section (parameter memory mechanism) 9 and reads the reference values VAL1, VAL2 and Correction factor VAL3. That is, as shown in FIG. 2, the skew signal generation unit 6 includes a data number storage unit 6 1, a front-line data number storage unit 6 2, a change number detection unit 6 3, an access unit 6 4, and a data number acquisition unit 6 5 And the correction value determination section (weighting mechanism) 6 6.

第18頁 516017 五、發明說明(14)Page 18 516017 V. Description of the invention (14)

資料數記憶部6 1係於顯示某掃描列(第j列)之顯示資料D 中,將表示一一方之信號電壓(例如V4)的值的出現次數(資 料數a)予以儲存。前列資料數記憶部6 2在前面之掃描列 (第j -1列)所對應之顯示資料D中,將表示上述信號電壓的 值的出現次數(資料數b )予以儲存。變數檢知部6 3,比較 兩掃描列(第j到及第j -1列)之資料數a、b,求取上述兩變 化數DRQ1 .DRQ2。存取部64基於兩變化數drqi .DRQ2,向 上述參數設定部9進行存取’取得上述基準值vali .VAL2 及修正係數VAL 3。資料數取得部6 5參照上述資料數記憶部 61 ’求取弟j列之V2資料數(輸出電極數)κι及V4資料數(輸 出電極數)K2。修正值決定部66基於上述各值vaLI〜VAL3 · ΚΙ ·Κ2及上述式(2) ·式(3),算出上述修正值η ·Τ2。 又,歪斜修正信號產生部6被自控制電路4施加:顯示資 料D ;表示顯示資料D之取得時點之掃描脈衝Lp ;及用以判 定顯示資料D與電壓V2 · V4之對應,比上述交流化信號FR 早一掃描水平期間之相位的交流化信號FRa。The number-of-data storage unit 61 stores the number of occurrences (data number a) of a value indicating a signal voltage (for example, V4) in the display data D displaying a certain scanning column (column j). The front row data number memory section 62 stores the number of occurrences of the value of the signal voltage (the number of data b) in the display data D corresponding to the previous scan row (j-1 row). The variable detection unit 63 compares the data numbers a and b of the two scan columns (j-th and j-1 columns), and obtains the two variables DRQ1 and DRQ2. The access unit 64 accesses the parameter setting unit 9 based on the two change numbers drqi.DRQ2 to obtain the reference value vali.VAL2 and the correction coefficient VAL3. The number-of-data acquisition unit 65 refers to the above-mentioned number-of-data storage unit 61 ′ to obtain the number of V2 data (the number of output electrodes) and the number of the V4 data (the number of output electrodes) K2 of the j-th column. The correction value determination unit 66 calculates the correction value η · T2 based on the above-mentioned values vaLI to VAL3 · KI · K2 and the above-mentioned expressions (2) · (3). In addition, the skew correction signal generating section 6 is applied from the control circuit 4: display data D; a scan pulse Lp indicating the time at which the display data D is acquired; and a determination of the correspondence between the display data D and the voltages V2 and V4, which is more AC than the above. The signal FR is an AC signal FRa at a phase earlier in the horizontal period.

上述交流化信號FRa為「Η」之情況,於顯示資料d中, 與電壓V 4對應者為π關π (不亮燈)之顯示資料〇。故,上述 兩資料數記憶部61、62只要計算顯示”關"的顯示資料d, 使可取得第j列及第j — 1列之電壓ν 4之輪出數&、b。相反的 ,在父流化k號?1^8為「L」之情況,"開”(亮燈)之顯示資 料與電壓V 4對應。故,顯示資料d之中,只要計算顯示 11開"的顯示資料D,便可取得電壓V4之輸出數a、b。 此處若設定,In the case where the AC signal FRa is “Η”, in the display data d, the display data corresponding to the voltage V 4 is π off π (not lit). Therefore, as long as the above two data number memory sections 61 and 62 calculate and display the display data d of "off", the number of rounds &, b of the voltage ν 4 in the jth column and the j-1th column can be obtained. In the case where the parent fluidized k number? 1 ^ 8 is "L", the display data of " on " (on) corresponds to the voltage V 4. Therefore, in the display data d, as long as the calculation shows 11 on " Display data D, the output numbers a and b of voltage V4 can be obtained. If set here,

第19頁 516017 五、發明說明(15) 自…彻電 自V4 =成V"平之信號電極X =, 則於W面的掃描電極所對應之各 ,為Sd, 電平之輸出電極數b係為Sc + Sd。又广下二电f X厂、中,V4 電平的輸出電極數a係為Sb + Scl。 帝二掃描電極L之V4 為:b-a = Sc-Sb,即為自μ變化至之仁《V2之交化數⑽卩1 變化至V4之信號電極數之差。 $號電極數與自V2 DRQMa-b。 差问樣的’電壓V4之變化數 故,上述變化數檢知部6 3可自上述兩 !罐,_。惟,本實施形態中為=、二= 故疋部9之存取變得更為較易,將兩變對上述麥數 定為不為負值。即,如下式(4)及(5) , Q —、DRQ2設 數加上與一掃描列之總電極數 =1貝際之變化 作為DRQ1、DRQ2。 丨j之偏和(offset)值N, ...(4) DRQ1 = N+ (b—a) DRQ2 =N +(a —b) ^此,例如在以_ «AM等記憶機構作為來 之情況,可將該變化數DRQ1、DRQ2作^7 # & ^ 定之位址,可減少存取時之手續叫。作為對參數設定部9指P.19 516017 V. Description of the invention (15) Since… Electrically from V4 = to V " flat signal electrode X =, then the corresponding scanning electrode on the W plane is Sd, the number of output electrodes of level b The system is Sc + Sd. In addition, the number of output electrodes a of the V4 level a in the f X factory and the middle of the second power plant f is Sb + Scl. The V4 of Emperor II's scanning electrode L is: b-a = Sc-Sb, which is the difference between the number of signal electrodes that changes from μ to the kernel "V2 intersection number ⑽ 卩 1 to V4. The number of electrodes is the same as DRQMa-b from V2. The number of variations of the 'voltage V4' is different. Therefore, the above-mentioned variation detection unit 63 can be obtained from the above two tanks. However, in this embodiment, = and 2 =, so the access of the cymbal 9 becomes easier, and the two changes are set to a non-negative value for the wheat number. That is, the following equations (4) and (5), Q — and DRQ2 are set as DRQ1 and DRQ2 plus the change from the total number of electrodes in a scan line = 1 dB.丨 The offset value N of the j, ... (4) DRQ1 = N + (b—a) DRQ2 = N + (a —b) ^ This, for example, in the case of _ «AM and other memory mechanisms , The change number DRQ1 and DRQ2 can be used as the address of ^ 7 # & ^, which can reduce the procedure call when accessing. 9 points as parameter setting section

伯又,上述式⑷·⑸雖係以信號電極數N作為偏移值, 要上述變化數DRQ1、⑽㈣在上述記憶 址執圍内,亦可為N以上之值QIn addition, although the above formula ⑷ · ⑸ is based on the number of signal electrodes N as the offset value, the above-mentioned change number DRQ1 and ⑽㈣ are within the range of the memory address, and may also be a value Q of N or more.

第20頁 516017 五、發明說明(16) 又,於參數設定部9,如下表1所示儲存了變化數(drqi 、DRQ2)與拎所對應之基準值(VAU、vAL2)之组人。 【表1】 ' 變化數 0 N/10 2N/10 N 18N/10 19N/10 2 N 基準值 a 0 a 1 a 2 a 3 a 4 a 5 a 6 本實施形態中,上述修正用電壓V2s · V4s係被設定為使 被施加至圖素之驅動電壓的實效值增大之值,故,於上述 表1中,各基準值αΟ〜α6係被設定為α〇 < α1 <… <···<α4<α5<α6。 鲁 又,上述鈍化修正信號產生部7為了抑制第2顯示不均, 向統合修正信號產生部8輸出修正脈衝信號s〇,向信號側 驅動電路2輸出修正脈衝信號s〇a。才目對的,統合修正信號 產生部8在輸出修正脈衝信號s〇期間,指示向電源電路5輸 出修正用電壓V2s .V4s ’除此之外,信號側驅動電路2係 如圖4所示,因應於各信號電極χ有無顯示資料d之變化, 決定是否向為信號電極Χι〜χΝ傳送修正用電壓”3 v4s。 修正脈衝信號so之脈衝幅度係肖上述基準值VAU .vU2 係基於自上述參數設定部9所儲存之表所讀出的修扇 正^VAL而決定。又’在信號側驅動電路2選擇不傳達變化鲁 之h况下,以使修正脈衝信號S 〇之脈衝幅度之電壓變化 (修正脈衝信號S◦之電壓變化)不被傳達之方式,將修正脈 衝k唬SOa,設定為修正脈衝信號3〇之脈衝幅度以上,在 與修正脈衝信號SO同時’或較早之時點上施加。又,本實Page 20 516017 V. Description of the invention (16) In the parameter setting section 9, as shown in Table 1 below, a group of people storing the number of changes (drqi, DRQ2) and the reference values (VAU, vAL2) corresponding to 拎 are stored. [Table 1] 'Change number 0 N / 10 2N / 10 N 18N / 10 19N / 10 2 N reference value a 0 a 1 a 2 a 3 a 4 a 5 a 6 In this embodiment, the above-mentioned correction voltage V2s · V4s is set to increase the effective value of the driving voltage applied to the pixels. Therefore, in Table 1 above, each reference value α0 to α6 is set to α〇 < α1 < ... < ... < α4 < α5 < α6. In order to suppress the second display unevenness, the passivation correction signal generating section 7 outputs a correction pulse signal so to the integrated correction signal generating section 8 and outputs a correction pulse signal so to the signal-side driving circuit 2. It is only right that the integrated correction signal generating unit 8 instructs to output the correction voltage V2s. V4s to the power supply circuit 5 during the output of the correction pulse signal s ′. In addition, the signal-side driving circuit 2 is shown in FIG. 4. In response to the presence or absence of changes in the display data d of each signal electrode χ, it is determined whether to transmit a correction voltage “3 v4s” to the signal electrodes χ˜χΝ. The pulse amplitude of the correction pulse signal so is based on the above-mentioned reference value VAU.vU2 is based on the above parameters The trimming fan reading ^ VAL read from the table stored in the setting section 9 is determined. Also, in the case where the signal-side drive circuit 2 chooses not to transmit the change h, the voltage of the pulse amplitude of the correction pulse signal S 0 changes. (The voltage change of the correction pulse signal S◦) is not communicated. The correction pulse k SOA is set to a pulse width of the correction pulse signal 30 or more, and is applied at the same time as the correction pulse signal SO or earlier. ... and, really

第21頁 516017 五、發明說明(17) 施形態係將自修正脈衝信號S0 . s〇a互以相 同時施加。- 々U之脈衝幅度 此處,上述信號側驅動電路2如圖3所示,且 存=、Af-1鎖22、8閃鎖(閃鎖電路)23、輸出、制:位暫 、电平移位器2 5及輸出|區動器2 6。 工制电路2 4 矛夕位曰存杰2 1係將顯示資料d因 :欠 傳送。a «鎖22係基'm夕位時鐘CK而 資料D傳送結束的時點 ::f P :在-上描列分之顯示 顯示資料D予以保持。B門鎖23°相\列(弟j列)所對應之各 將前一個(第卜i列) ./同-的係基於掃描時鐘“, 控制電路24,基於丄田,J之D顯不貧料D予以保持。輸出 自兩卿2. ί =化信號1述修正脈衝丄出 不連續’將用以選二’檢測出各顯示資料D係為連續或 位器25係將輸出控電壓用之信號予以輪出。電'平移 驅動器26係基於電=路Μ之各輪出予以電平移位。輸出 5所施加之電壓”移:㈣,各輸出’選擇由電源電路 此,可由表2所〒 4a或咼阻抗輸出(ΗΖ)中之 ’控制信號側驅動電路2之輪出。 又 516017 五、發明說明(18) 【表2】 F R D j -1 D , S 0 a 輸出狀態 實際的輸出電位 L L L L V 2 a V 2 H HZ V 2 Η L L V 2 a V 2 H V 2 a V 2 s L H L V 4 a V 4 H V 4 a V 4 s Η H L V 4 a V 4 H HZ V 4 Η L L L V 4 a V 4 H HZ V 4 Η L L V 4 a V 4 H V 4 a V 4 s L H L V 2 a V 2 H V 2 a V 2 s Η H L V 2 a V 2 H HZ V 2 ❿ 於上述表2中,&、各表示在各信號電極X中,與該掃 描列(第j列)對應之顯示資料D、及與前一個掃描列(第j - 1 列)對應之顯示資料D。又,「輸出狀態」表示輸出驅動器 2 6對信號電極X之輸出狀態,「實際輸出電位」表示控制 輸出狀態後實際向各信號電極X輸出之電位。Page 21 516017 V. Description of the invention (17) The application mode is to apply the self-correcting pulse signals S0. Soa to each other simultaneously. -Pulse amplitude of 々U Here, the above-mentioned signal side drive circuit 2 is shown in Figure 3, and stores =, Af-1 lock 22, 8 flash lock (flash lock circuit) 23, output, system: bit temporary, level shift Positioner 25 and output | zone actuator 26. The industrial circuit 2 4 will show the data d due to the fact that Cunjie 2 1 is under transmission. a «Lock 22 is based on the clock CK and data D is transmitted at the end point:: f P: Displayed in the-line above Display data D is held. B door lock 23 ° phase \ column (column j column) will correspond to the previous one (column b i) ./ Same-based system is based on the scan clock ", control circuit 24, based on Putian, D of J The poor material D is maintained. The output is from the two qings 2. ί = the signal 1 describes the correction pulse that is discontinuous 'will be used to select two' to detect each display data D is continuous or the bit 25 is used to output the control voltage The signal is rotated out. The electric translation drive 26 is level-shifted based on the rounds of electricity = circuit M. The voltage applied to output 5 is shifted: ㈣, each output is selected by the power circuit. The 控制 4a or 咼 impedance output (ΗZ) is the output of the 'control signal side drive circuit 2'. 516017 V. Description of the invention (18) [Table 2] FRD j -1 D, S 0 a Actual output potential LLLLV 2 a V 2 H HZ V 2 Η LLV 2 a V 2 HV 2 a V 2 s LHLV 4 a V 4 HV 4 a V 4 s Η HLV 4 a V 4 H HZ V 4 Η LLLV 4 a V 4 H HZ V 4 Η LLV 4 a V 4 HV 4 a V 4 s LHLV 2 a V 2 HV 2 a V 2 s Η HLV 2 a V 2 H HZ V 2 ❿ In the above Table 2, &, each represents the display data D corresponding to the scanning column (column j) in each signal electrode X, and Display data D corresponding to one scan column (column j-1). In addition, "output state" indicates the output state of the output driver 26 to the signal electrode X, and "actual output potential" indicates the potential actually output to each signal electrode X after controlling the output state.

第23頁 516017 五、發明說明(19) 又,不將各該信號側驅動電路2 次 、 料D,而設為輸出電位資料, 认达貝料没為顯示資 之交流化信號FR,固定於「H」、:;=信號側驅勤電路2 即使是交流化信號FR顛倒時之:y。於:構造中, X之輸出電位變化而控制修正用j亦可士因應信號電極 更正確的進行修正動作。即使 之轭加W之故,可 路即可實現。 月况,以簡單的邏輯電 修正信號產生部7之修正脈衝信號so,:圖6、圖9 J鈍化 所示,在修正脈衝信號s〇所表示之終及修=圖" ϊ 正=52係導通,在修正脈衝信號s = ίι m二太/々 所表示之長度的期間,係以可導通 開關53的方式,各兩開關52 · 53輸出控制信號S1 . s: V通 此處,於控制信號S1(S2)中’與修正值τ 岸 脈賴Ρ2),若不與修正脈衝信號s〇所對應之脈:ρ以 ’則可將開始時點設定為任意的時點。惟,若開始時點; 遲,修正值Τ1(Τ2)變為最大之情況,在同一掃描中,有脈 衝Ρ 1 ( Ρ2 )熙法結束之虞。此處,開始時點係以可使脈衝 Ρ 1 ( Ρ 2 )結、束之方式,控制於某較早之時點。 又’上述芩數設定部9可由如r a Μ或R 0 Μ等記憶機構或演 算電路等之一般電路,或該等之組合予以實現'可自液晶 顯示裝置之外部,將上述各值VAL · vali〜VAL3向上述兩修 正信號產生部6 · 7指示。 516017 五、發明說明(20) 以下將上述構造之第1及第? ^ 構造作一比較-說明。 頒不不均的抑制動作與習知 即,在欲向液晶顯示面板1%、 況,特別於未修正電壓之習知枯、圖所不之顯示圖案的产 次交流化信號FR顛倒時,因讀、、.忖中’係如圖1 4所示,^ ,所示,圖素B之亮度= = 值變動,: 顯示不均。 ’、 儿又曰加,而發生第工 相對於此,本實施形態在祧-顯示資料D之情況,於圖6中,也义不同樣的顯示圖案之 =表一的期間,二 3在表示信號S2的期間’變化為修正用電壓V4 :故電壓 之驅動波形(Xa —YJ '及圖素B之驅動波形故、,圖 圖:所示般修正。於是’誘導歪斜所造成之實效值的破如 被修正,圖素A的亮度變成與圖素“目同之故’、=異 顯示不均。 I帀j Γ弟1 ,具體上,掃描側驅動電路3在第d+1列掃描列之掃扩 刖,向信號側驅動電路2傳送第dH列為第d列顯示資^J始 又i各列之V4電位電平的出現次數a · b,係被儲存於 所不之資料數記憶部6 1及前列資料數記憶部6 2。故,變化 數檢知部63基於此a · b值,算出電壓V2及電壓V4之變二數 DRQl、DRQ2,存取部64將兩變化數DRQ1、DRQ2向參^設定 部9指示,取得該基準部VAL1 · vaL2。 又疋 此處於圖5所示之包含縱長塊狀圖案之顯示圖案中,如 圖6所示,在交流化信號!;^在第d列及第(d+丨)列間顛倒之Page 23 516017 V. Description of the invention (19) In addition, instead of setting the signal-side driving circuit twice, material D, it is set to output potential data. It is recognized that the Dabbe material is not used as the display signal of the AC signal FR, which is fixed at "H",:; = signal side drive circuit 2 Even if the AC signal FR is reversed: y. In: In the structure, the output potential of X changes and the correction j can also perform the corrective action in response to the signal electrode. Even if the yoke is added to W, it can be achieved. For the monthly condition, the correction pulse signal so by the simple logic electrical correction signal generating section 7 is shown in Fig. 6 and Fig. 9 J. Passivation, at the end and the correction indicated by the correction pulse signal s〇 = 图 " ϊ 正 = 52 Is turned on, during the period indicated by the correction pulse signal s = ίι 二 二 太 / 々, the two switches 52 · 53 each output a control signal S1 in a manner that the switches 53 can be turned on. S: V is connected here, at In the control signal S1 (S2), 'and the correction value τ ani pulse P2), if it does not correspond to the pulse corresponding to the correction pulse signal s0: ρ', the starting time point can be set to an arbitrary time point. However, if the starting point is too late, the correction value T1 (T2) becomes the maximum, and in the same scan, the pulse P1 (P2) may end. Here, the starting point is controlled at an earlier point in time so that the pulses P 1 (P 2) can be knotted or bundled. The above-mentioned unit setting unit 9 can be realized by a general circuit such as a memory mechanism such as ra Μ or R 0 Μ or a calculation circuit, or a combination thereof. The above-mentioned values VAL · vali can be obtained from outside the liquid crystal display device. ~ VAL3 instructs the above-mentioned two correction signal generating sections 6 · 7. 516017 V. Description of the invention (20) In the following, the first and the first of the above structure? ^ Structure for a comparison-illustration. The uneven control action and the knowledge that the unevenness is caused, that is, when the liquid crystal display panel wants to be 1% of the liquid crystal display panel, especially the uncorrected voltage, the conventional AC signal FR of the display pattern that is not shown in the figure is reversed. The reading “,” and “忖 中” are shown in Figure 14 and ^. As shown, the brightness of pixel B = = the value changes, and the display is uneven. ', Er said again, and the first work occurred. In this case, the display mode D is shown in Fig. 6. In Fig. 6, the period of the display pattern is different from that of Table 1. The period of the signal S2 is changed to the correction voltage V4: the driving waveform of the voltage (Xa-YJ) and the driving waveform of the pixel B. Therefore, the correction is as shown in the figure. Therefore, the actual value of the induced distortion is If it is corrected, the brightness of pixel A becomes the same as that of the pixel, and the display is uneven. I 帀 j Γ brother 1, specifically, the scanning-side driving circuit 3 scans the column d + 1. Scanning and expansion, transmitting the dH column to the signal-side drive circuit 2 as the d column display data ^ J and the number of occurrences of the V4 potential levels a and b in each column are stored in the memory of the number of data The unit 61 and the former data number memory unit 62. Therefore, based on the value of a and b, the change number detecting unit 63 calculates the two variable DRQ1 and DRQ2 of the voltage V2 and the voltage V4, and the access unit 64 changes the two change numbers DRQ1. DRQ2 instructs the reference setting section 9 to obtain the reference section VAL1 · vaL2. Here again, the display including the vertically long block pattern shown in FIG. 5 is displayed here. In the pattern, as shown in Fig. 6, the AC signal is displayed! ^ Is reversed between column d and (d + 丨).

516017 五、發明說明(21) /月/兄…於第d列中,成為V4電位電平之信號電極X…的數 "^值b )係為(9 N / 1 〇 )個,第d + 1列之成為V 4電位電平之 仏號電極X ···的數(計算值a)係為(1^1 0)個。故,變仆數於 知部63基於上述式⑷及⑴,判定出與V2對應之^ =檢 DRQ1,(18n/1〇)個,與V4對應之變化數DRQ2為(2^10)。 於疋與(1 8 N / 1 〇 )對應之值α 4被自參數設定部9讀出,作 =表示修正用電壓V2s施加之基礎期間之基準值vau。 厂的’與(2N/1G)對應之值α2被讀出,作為表示修正用電 C之基礎期間之基準值VAL2。又,依自參數設定 。::之值VAL ’鈍化修正信號產生部7輸出脈 VAL之修正脈衝信號別· s〇a。 n a又管,貧料數取得部65基於第(d+1)列之電壓V4的輸出數516017 V. Description of the invention (21) / month / brother ... In the d-th column, the number of the signal electrodes X which become the V4 potential level " ^ value b) is (9 N / 1 0), the dth The number (calculated value a) of the 仏 electrode X ··· at the V 4 potential level in the +1 column is (1 ^ 1 0). Therefore, based on the above-mentioned formulas ⑷ and ⑴, the variable number determining unit 63 determines that ^ = DRQ1 corresponding to V2 is (18n / 10), and the number of changes DRQ2 corresponding to V4 is (2 ^ 10). The value α 4 corresponding to (1 8 N / 1 〇) is read from the parameter setting unit 9 and is used as a reference value vau representing the base period during which the correction voltage V2s is applied. The value α2 corresponding to the plant's (2N / 1G) is read out as the reference value VAL2 indicating the basic period of the correction power C. In addition, it is set according to the parameter. :: value VAL ′ The passivation correction signal generating section 7 outputs the correction pulse signal of pulse VAL · soa. n a again, the number of outputs of the lean material number obtaining unit 65 based on the voltage V4 of the (d + 1) th column

Kl、;2 、(Ν/1。?作為該列之電壓V2 . V4的輪出數 信 异值及自麥數設定部9所得之值VAL3,修正 值=部=基於上述式⑴及式(3),修正上述各基礎 將2不修正用電壓V2s .V4s之施加期間的修正值η Μ 丁以輸出。 修^估T?充合修正信號產生部8基於上述修正脈衝信號“及 夕正值ΤΙ . Τ2 ,輸出控制信號S1 . S2。即,自统人 號產生部8輸出:脈衝幅度VAL之脈衝p〇、及脈衝巾^ 。 (=4 + 9N/1〇 . VU3)之脈衝ρι形成之控制信號“;以及脈 =〇及脈衝幅度(a2 + N/10 . VLA3)之脈衝P2所成之控制信 苑S 2 。 此處在第d列至第d+l列之間,交流化信號FR係顛倒之故K1,; 2, (N / 1.? Are the singular value of the rotation number of the column V2. V4 and the value VAL3 obtained from the wheat number setting section 9, the correction value = section = based on the above formula ⑴ and formula ( 3) Correcting each of the above-mentioned basis will output the correction value η Μ 2 during the period of application of the voltages V2s and V4s without correction. The correction T? Filling correction signal generating section 8 is based on the correction pulse signal "and positive values". ΤΙ. Τ2, output control signals S1. S2. That is, the self-number generation unit 8 outputs: pulse p0 with a pulse width VAL and pulse ^. (= 4 + 9N / 1 10. VU3) pulse formation The control signal "; and the control letter S 2 formed by the pulse P2 of the pulse = 0 and the pulse amplitude (a2 + N / 10. VLA3). Here, it is exchanged between columns d to d + l. Signal FR is upside down

516017 五、發明說明(22) ^ ,各信號電極Xa(Xb)之電壓Xa(Xb)亦必須顛倒。 丄 驅動電路2如土述表2所示,在表示脈衝作加仏號側 出驅動器26之輸出’並非為高阻抗,而;‘控制K,輪 V2a(V4a)。於是,上述脈衝P〇之間,對信號電極^為電墨 正用電壓V2s,對信號電極Xb施加修正用電壓以3。3 =加修 圖6所示,各圖素A . B之驅動波形()ς —之)·(χ — γ ,如 脈衝P 0期間,被修正成被施加至圖素之驅動電壓每'^述 增大。於是,使實效值增大因各信號電極叉· X之:致值 化造成之波形鈍化所引起之實效值減少的部分b,ϋ變 波形鈍化所造成之第2顯示不均。 ^ Μ因 又,上述脈衝Ρ1之脈衝幅度被設定成比脈衝ρ2之脈 度長之故’於信號電極、施加修正用電壓V2s之期 - 對信號電極^施加修正用電壓V4s之期間長,可修正^ = 之實效值。於是,對於非選擇之掃描電極γ。所發生之 歪斜使實士值降低之圖素。即對於包含圖素Α之”輸出側 之因素而言,與上述誘導歪斜使實效值增大之圖素,即與 包含圖素Β之V4輸出側之圖素相比,可進行更大之修正。 同樣的’在交流化信號"再度顛倒之第(d + 4)列,與圖 素A相關之信號電極\,僅在Τ2= α 4 + 9N/1 〇 X VAL3之期間 ’被施加修正用電壓V4S,於與圖素β相關之信號電極&, 僅在比其短的期間(Π= α2 + Ν/10χ VAL3),被施加修正用 電^ V 2 ° 於疋’對誘導歪斜使實效值減少之圖素,即對 之含圖素A之V4輪出側之圖素而言,與誘導歪斜使實效值 增大之圖素’即與包含圖素B之V2輸出侧之圖素相比,可 516017 五、發明說明(23) 進行更大之修正。 另一方面,-如掃描掃插 Μ未顛倒之情況下,因輪 w之惴況,在父流化信號 波形鈍化造成之第2顯示電壓未變化之故,不會產生因 信號側驅動電路2在被施況下,本實施形態之 出驅動器26保持於高阻广》正脈衝信號S〇a之期間,將輸 出修正用電壓V2s .V4s ’此期間儘管電源電路5輪 &V9 VA 於% " 號電極xa · xb之輸出電壓保持 為V2 · V4,^號侧驅動雷故 1 1木诗 軔兒路2並不修正實效值。 又,在父流化信號FR未鲔柄々卜主 不处仏、土々——, 木顯倒之情況,並不會產生因誘導 歪斜所造成之苐1顯示不的 ^ 晶顯示裝置中,電壓V2》4?,下,本實施形態之液 值⑷上述兩脈衝信號丨v 值卿、卿互成相同 故,包含圖素A之”輸出側3礎:”相:值“”。 側之圖素,係進行大致相同大小的修正。 ^出 大該等結果使得儘管電源電路5僅產生v2 .仏·以.^ :4個—電I在作為唬電極驅動用之電壓,亦如圖5所示, 度與圖針之冑度成為一致,可防止第i顯示不均 儿 又’本,施形態之修正值決定部66,基於電㈣及Μ, 以使輸出^愈多脈衝幅度變為愈長的方式,於 Π .P2之基礎期間(VAL1 .VAL2)上進行加重處理丄: 出f多*電容負荷較大的電麼信號線纟,可被較 正實效值。 此處如圖”斤示’負荷若變為愈大,則信號波形鈍化在516017 V. Description of the invention (22) ^, the voltage Xa (Xb) of each signal electrode Xa (Xb) must also be reversed.丄 The driving circuit 2 is shown in Table 2 in the description. The output of the driver 26 on the side of the pulse plus sign 并非 is not high impedance, and ‘control K, wheel V2a (V4a). Therefore, between the above-mentioned pulse P0, the signal electrode ^ is the positive voltage E2 for the ink, and the correction voltage is applied to the signal electrode Xb to 3.3. The driving waveform of each pixel A. B is shown in Fig. 6 () — — — (Χ — γ), such as during the pulse P 0, is corrected so that the driving voltage applied to the pixel increases every time. Therefore, the effective value is increased due to each signal electrode fork. X The second part is the uneven display caused by the waveform passivation caused by the passivation caused by the value passivation. The second pulse is caused by the waveform passivation. ^ Because the pulse amplitude of the pulse P1 is set to be larger than the pulse ρ2. The reason why the pulse length is long is that the period during which the correction voltage V2s is applied to the signal electrode-the period during which the correction voltage V4s is applied to the signal electrode ^ can be corrected for the effective value of ^ =. Therefore, for the non-selected scan electrode γ. The pixels that cause the real value to fall due to the skew. That is, for the factors that include the output side of pixel A, the pixels that increase the effective value with the induced skew described above, that is, the output side that contains V4 with pixel B. Compared with pixels, larger corrections can be made. The same 'in communication The signal "quote (d + 4) of the column is reversed again. The signal electrode associated with pixel A is only applied with the correction voltage V4S during the period of T2 = α 4 + 9N / 1 〇 VAL3. The signal electrode & associated with the element β is only applied for a shorter period (Π = α2 + Ν / 10χ VAL3), and the correction power is applied ^ V 2 ° to the pixel that induces skew to reduce the effective value, That is, for the pixels on the output side of the V4 wheel containing pixel A, compared with the pixels that induce skew to increase the effective value, that is, compared with the pixels on the output side of V2 containing pixel B, it can be 516017. Explanation of the invention (23) Make a larger correction. On the other hand, if the scan and interpolation is not reversed, due to the condition of the wheel w, the second display voltage does not change due to the passivation of the parent fluidized signal waveform. Therefore, during the period when the signal-side driving circuit 2 is being applied, the driver 26 of this embodiment is kept at a high impedance and wide positive pulse signal S0a, and the correction voltage V2s.V4s will be output during this period. Although the power circuit of 5 rounds & V9 VA on% " electrode xa · xb output voltage remains V2 · V4, ^ side Dynamic Thunder 1 1 Mu Shiluer Road 2 does not modify the actual value. In addition, the parent fluidization signal FR is not stubborn, the master is not in a position, the soil is ——, the situation where the wood is down does not occur In the 晶 1 crystal display device which is not displayed due to induced skew, the voltage V2 is greater than or equal to 4? The liquid value of the present embodiment is the same as the two pulse signals. The values of v and v are the same as each other, including pixels. A of the "output side 3": "phase: value". The pixels on the side are modified approximately the same size. ^ The results are so large that although the power supply circuit 5 only produces v2. 仏 · to. ^: 4 Individual-The voltage of the electric I used as the driving electrode of the blunt electrode is also shown in Fig. 5. The degree is consistent with the degree of the needle, which can prevent the i-th display unevenness. Based on the electric voltage and M, in order to make the output pulse more long as the pulse amplitude becomes longer, the weighting process is performed on the basic period of Π.P2 (VAL1.VAL2). Any signal line can be corrected. Here, as shown in the figure, if the load becomes larger, the signal waveform will passivate at

第28頁 516017 五、發明說明(24) 修正部分實效值21>22成立之故,實效值將愈減 曰 ,不論負荷之一大小,在同_期間若施加修正電壓v2 4^Page 28 516017 V. Explanation of the invention (24) Since the actual value 21 of the modified part is established, the actual value will be reduced. Regardless of the size of one of the loads, if the correction voltage v2 is applied during the same period, 4 ^

,則依負何電谷之相異,驅動波形之實效 S 亮度不均之虞。 又化有發生 惟,本實施形態之修正值決定部66如上所$,基於 V2 04之輸出數,於基礎期間上加重之故,可抑制因:: 負何相異所造成之驅動波形之實效值的差異。依此可=^ 亮度不均少,且顯示品質更高之液晶顯示裝置。 貝, Depending on the difference of the negative power valley, the actual effect of the driving waveform S may be uneven brightness. Recurrence occurs, but the correction value determination unit 66 of this embodiment is as above. Based on the output number of V2 04, it is increased during the basic period. It can suppress the actual effect of the driving waveform caused by: Difference in values. According to this, a liquid crystal display device with less uneven brightness and higher display quality can be obtained. shell

另一方面,在欲顯示圖8所示之顯示圖案之情況,特 是在不修正電壓之習知技術中,係如圖1 6所示,在每一次 掃描線之切換時,因誘導歪斜使實效值變動,如圖丨7所= ’圖素A之亮度比圖素B低,會發生第1顯示不均。 相對於此,本實施形態中,在被施加顯示相同的顯示圖 案之顯示資料D之情況,如圖9所示之第(dH)列之期間, 第(d+Ι)列之V4電位輸出數(計算值b)為9N/10個,第d列之 V4電位輸出數(計算值3)為〇個之故,可算出變化數⑽…二 N/10 個、變化數DRQ2 = 19N/10、V2 輸出數K1 二N/10、及V4 輸On the other hand, in the case where the display pattern shown in FIG. 8 is to be displayed, especially in the conventional technique in which the voltage is not corrected, as shown in FIG. 16, each time the scanning line is switched, it is caused by induced distortion. The effect value changes, as shown in Figure 丨 7 = 'The brightness of pixel A is lower than that of pixel B, and the first display unevenness will occur. On the other hand, in the present embodiment, when display data D displaying the same display pattern is applied, as shown in the period (dH) in FIG. 9, the number of V4 potential outputs in the line (d + 1) (Calculated value b) is 9N / 10, and the number of V4 potential outputs (calculated value 3) in column d is 0, so the number of changes can be calculated ... two N / 10, the number of changes DRQ2 = 19N / 10, V2 output number K1 two N / 10, and V4 output

出數K 2 = 9 N / 1 0。於是,統合修正信號產生部§輸出:由脈 衝幅度VAL之脈衝p〇及脈衝幅度(αΐ+Ν/ΙΟχ VAL3)之脈衝 Ρ 1所成之控制信號S1 ;及由上述脈衝Ρ.0及脈衝幅度(α 5 + 9Ν/1 Q X VAL3)之脈衝ρ2所成之控制信號S2。此處,脈衝Ρ2 之基礎期間α 5係被設定為比脈衝Ρ 1之基礎期間1長。故 ,非選擇之掃描電極γ。上所發生之誘導歪斜使實效值減少 的圖素’即包含圖素Α之V4輸出側之圖素,與使實效值增The number K 2 = 9 N / 1 0. Then, the integrated correction signal generating section § outputs: a control signal S1 formed by the pulse p0 of the pulse amplitude VAL and the pulse P1 of the pulse amplitude (αΐ + N / IOχ VAL3); and the above-mentioned pulse P.0 and the pulse amplitude (Α 5 + 9N / 1 QX VAL3) is a control signal S2 formed by the pulse ρ2. Here, the base period α 5 of the pulse P2 is set to be longer than the base period 1 of the pulse P 1. Therefore, the non-selected scanning electrode γ. Pixels induced by the above-mentioned induced skew that reduce the actual value, that is, the pixels on the V4 output side of the pixel A, and increase the actual value

第29頁 516017 五、發明說明(25) 大之圖素,即包含圖素B之V 2輸出側之圖素相比,^ ^ u 進杆 較大之修正。- 又’在第(d + 2 )列期間,在非選擇之掃描電極γ I C上所發 生之誘導歪斜係使圖素A · B兩者皆減低實效值之情況, 在對兩圖素A · B施加同一電壓(此情況為V2a)之情況下即 係進行相同大小之對誘導歪斜之修正。又,第? g ’ &卩、、μ不不均 成因之波形鈍化可藉由在電壓變化時僅於脈衝ρ 〇期間 修正用電壓V2S或V4s予以修正。 / a %出 依S專結果’儘管電源電路5僅產生4個電壓作為传穿♦ 極驅動用之電壓,如圖8所示,在顯示每一列中混有°^〜線私 圖素之顯示圖案時,可使圖素A之亮度與圖素B 一致,/可防 止第1顯示不均。 即使在此情況亦與顯示圖5之顯示圖案之情況相同,對 輸出數K 1 · K 2相關之基礎期間施以加重處理之故,可抑制 ,輸出數ΚΙ , K2之相異所造成之實效值的差異,可實現更 高顯示品質之液晶顯示裝置。 、 又,在欲顯示圖10所示之顯示圖案之情況,特別是不修 正電壓之習知技術係如圖18所示,因信號電壓變化使信號 電壓波形鈍化,如圖19所示,因第2顯示不均,圖素B之亮 度降為比圖素A低。 相對於f :本實施形態中,在被施加顯示相同的顯示圖 顯不貝科D之情況,如圖11所示,第(dH)列期間,第 列之V4電位輸出數(計算值a)為(以2〇)個,第]列以 。位輸出數(σ十异值b)為(N/2〇 )個,故可算出變化數DRQJ二Page 29 516017 V. Description of the invention (25) Larger pixels, that is, pixels with larger input on the output side of V 2 that contains pixel B, have a larger correction compared to ^ u u. -Also in the case of the (d + 2) column, the induced skew occurring on the non-selected scan electrode γ IC makes the pixels A · B both reduce the effective value. In the case of the two pixels A · B When the same voltage is applied (in this case, V2a), the same amount of correction for induced distortion is performed. Again, the first? The waveform passivation of the cause of the unevenness of g ′ & 卩, μ can be corrected by the correction voltage V2S or V4s only during the pulse ρ 0 when the voltage changes. / a% is based on the result of S. Although the power circuit 5 only generates 4 voltages for the pass-through voltage, as shown in FIG. 8, each column displays the display of ° ^ ~ line private pixels. In the pattern, the brightness of the pixel A can be made the same as that of the pixel B, and the first display unevenness can be prevented. Even in this case, it is the same as the case where the display pattern shown in FIG. 5 is used. The base period related to the output numbers K 1 · K 2 is emphasized, and the effect caused by the difference between the output numbers KI and K2 can be suppressed. The difference in value can realize a liquid crystal display device with higher display quality. In the case where the display pattern shown in FIG. 10 is to be displayed, in particular, the conventional technique that does not modify the voltage is as shown in FIG. 18, and the signal voltage waveform is passivated due to the change in signal voltage, as shown in FIG. 19, because 2 Display unevenness, the brightness of pixel B is lower than that of pixel A. Relative to f: In this embodiment, when the same display image is applied to display Beco D, as shown in FIG. 11, during the (dH) column, the number of V4 potential output in the column (calculated value a) For (to 20), the first column is. The number of bit outputs (σ ten different values b) is (N / 20), so the number of changes DRQJ can be calculated.

第30頁 516017 五、發明說明(26) N個、變化數DRQ2 = N、V2輸出數K1二19N/20、及V4輸出數 K2 = N/20。於^是,統合修正信號產生部8輸出:由脈衝幅度 VAL之脈衝P0及脈衝幅度(3 + n/2q X VAL3)之脈衝P1所成 之控制信號S1 ;及由上述脈衝P〇及脈衝幅度(^ 3 + i9N/2〇 x VAL3)之脈衝P2形成之控制信號82。 此處’自脈衝P 1 · p 2之基礎期間係互被設定為相同長度 (α 3 t。依此,施加至與各圖素A · β對應之信號電極Xa · Xb 之$壓’不論係為電壓V2a或電壓V4a,在誘導歪斜之修正 上皆係進行相同大小之修正。故未發生因誘導歪斜造成亮 度差之兩圖素Α ·β上,不論係被施加修正用電壓V2s或V4s I ,皆不會發生亮度差。 f t方面’上述統合修正信號產生部8,在控制信號S 1 妗出盥面’不僅係上述誘導歪斜修正用脈衝1"1 (P2) ’亦 二ΡΠ、修正脈衝信號S〇a相同脈衝幅度之鈍化修正用之脈 ,輸出電壓i ί Γ驅ί電路2在如第d+i列之信號電極Xb般 正脈衝俨梦sn I之h况下,如上述表2所示,在顯示修 ,而係ϋ制月間,輸出驅動器26之輸出並非為高阻抗 列之信S:x,V2a (V4a)。與此相反的,在如第叫 脈衝信細’冑出電廢係變化之情況’在顯示修正崖 ,維持於至此B ,輸出驅動器2 6之輸出係保持於高阻抗· 信號電極X ^ ^、止之輸出電壓。於是,上述脈衝P0期間, 正用電壓va4s ΛΓ仍保持於電位V2,於信號電極心施加修 yc)在上述脈衝門如圖11所*,圖素β之驅動波形α- υ期間,貫效值被修正為增大,實效值之Page 30 516017 V. Description of the invention (26) N, the number of changes DRQ2 = N, the number of V2 outputs K1 to 19N / 20, and the number of V4 outputs K2 = N / 20. Therefore, the integrated correction signal generating unit 8 outputs: a control signal S1 formed by the pulse P0 of the pulse amplitude VAL and the pulse P1 of the pulse amplitude (3 + n / 2q X VAL3); and the above-mentioned pulse P0 and the pulse amplitude (^ 3 + i9N / 20x VAL3) is a control signal 82 formed by the pulse P2. Here, the basic period of the self-pulse P 1 · p 2 is set to the same length (α 3 t. According to this, the $ pressure applied to the signal electrodes Xa · Xb corresponding to each pixel A · β 'is not related to It is voltage V2a or voltage V4a, and the same correction is applied to the correction of induced distortion. Therefore, no two pixels A · β of brightness difference caused by induced distortion have occurred, regardless of whether the correction voltage V2s or V4s I is applied. In terms of ft, the above-mentioned integrated correction signal generating unit 8 displays the control signal S 1 on the surface. It is not only the above-mentioned induced skew correction pulse 1 " 1 (P2), but also the PΠ and the correction pulse. The signal S0a is a pulse for passivation correction with the same pulse amplitude. The output voltage i Γ Γ drives circuit 2 under the condition of positive pulses like dream signal sn I in column d + i, as shown in Table 2 above. As shown in the figure, during the display repair period, the output of the output driver 26 is not the letter S: x, V2a (V4a) of the high-impedance column. In contrast, the power is output when the pulse signal is called The situation of the change of the abolition system 'is displayed in the correction correction cliff, and it is maintained at this point B, and the output driver 2 6 The output is maintained at the high-impedance output voltage of the signal electrode X ^ ^. Therefore, during the pulse P0, the positive voltage va4s ΛΓ is still maintained at the potential V2, and a repair is applied to the signal electrode core. 11 *, during the driving waveform α-υ of the pixel β, the penetration value is modified to increase,

第31頁 516017 五、發明說明(27) " 平均增大了’因波形鈍化而使實效值減少的部分。 依該等結果,如圖1 〇所示,兩圖素A · b之亮度成為一致 二抑制了因波形鈍化造成之第2顯示不均的發生。此外, 係依與波形歪斜修正相同的修正用電壓V2s . v4s,進行波-7鈍化之修正之故,與各別設置兩者之修正用電壓的情況· 目比’可縮小電源電路5之電路規模。 又,即使在此情況下,亦與顯示圖5之顯示圖案之情況 相同,對輸出數ΚΙ · K2相關之基礎期間進行加重處理之故 每可抑=因輸出數ΚΙ ·Κ2之差異造成之實效值的差異,可 、見更南顯示品質之液晶顯示裝置。 你 成此處,雖上述係以最能表現出因誘導歪斜或波形鈍化造 之$第1及第2顯示不均的顯示圖案為例,說明自顯示不均 所:制動作,但如上所述,可減低因誘導歪斜或波形鈍化 上=成之兩種顯示不均之故,即使對其他圖案,亦可減低 述自顯示不均,可實現高顯示品質之液晶顯示裝置。 使^ ’本實施形態雖係以將各修正用電壓V2s · V4s設定為 少=1電壓增大之情況為例說明,但設定為使實效電壓減 ^ 情況亦可得相同之效果。此情況下,係於上述表i中 彡將各基準值α0〜α6,設定為α〇>α1>α2>···>α3 輯 > 广4 > α 5〉α 6。又,例如將輸出控制電路24之邏❸ 以變更,使信號側驅動電路2進行以下表3所示之動作 乂取代上述表2即可。 ’、Page 31 516017 V. Description of the invention (27) " Increases the part where the effective value is reduced due to waveform passivation on average. According to these results, as shown in FIG. 10, the brightness of the two pixels A · b becomes the same. Second, the occurrence of the second display unevenness caused by the waveform passivation is suppressed. In addition, it is based on the same correction voltage V2s.v4s as the waveform skew correction, and the correction of the wave-7 passivation, and the case where the two correction voltages are set separately. The ratio of the power supply circuit 5 can be reduced. scale. Moreover, even in this case, it is the same as the case of displaying the display pattern of FIG. 5, and the base period related to the output number KI · K2 is emphasized. Therefore, each constrained = the actual effect caused by the difference in the output number KI · κ2 The difference in value can be seen in the LCD display device with more southern display quality. You are here, although the above is an example of the display pattern that most shows the first and second display unevenness caused by induced distortion or wave passivation, to explain the self-display unevenness: control action, but as described above It can reduce the two types of display unevenness caused by induced distortion or waveform passivation. Even for other patterns, the self-display unevenness can be reduced, and a high-quality liquid crystal display device can be realized. Although ^ 'This embodiment is described by taking the case where the correction voltages V2s and V4s are set to be small = 1 and the voltage is increased as an example, the same effect can also be obtained when the effective voltage is reduced. In this case, it is shown in the above table i. 基准 Set each reference value α0 to α6 as α0> α1> α2> .. > α3 Series > Can 4 > α 5> α6. For example, the logic of the output control circuit 24 may be changed to cause the signal-side driving circuit 2 to perform the operations shown in Table 3 below, instead of Table 2 described above. ’,

516017 五、發明說明(28) 【表3】 F R D卜丨一 D i S 0 a 輸出狀態 實際的輸出電位 L Η L L V 2 a V 2 H HZ V 2 L L L V 2 a V 2 H V 2 a V 2 s Η H L V 4 a V 4 H V 4 a V 4 s L H L V 4 a V 4 H HZ V 4 Η Η L L V 4 a V 4 H HZ V 4 L L L V 4 a V 4 H V 4 a V 4 s Η H L V 2 a V 2 H V 2 a V 2 s L H L V 2 a V 2 H HZ V 2 又,在將各修正用電壓V2s · V4s設定為使實效電壓減少 之情況,如圖1 2所示,與圖7之情況相同,負荷大時’施 加波形將更加大幅鈍化。惟,與圖7所示情況相異,在修 正部分,實效值Z3 < Z4係成立。故,此情況下,修正值決 定部6 6在修正基礎期間時,若修正為輸出數K 1 · K2變為愈516017 V. Description of the invention (28) [Table 3] FRD, a D i S 0 a output state actual output potential L Η LLV 2 a V 2 H HZ V 2 LLLV 2 a V 2 HV 2 a V 2 s Η HLV 4 a V 4 HV 4 a V 4 s LHLV 4 a V 4 H HZ V 4 Η Η LLV 4 a V 4 H HZ V 4 LLLV 4 a V 4 HV 4 a V 4 s Η HLV 2 a V 2 HV 2 a V 2 s LHLV 2 a V 2 H HZ V 2 In addition, when the correction voltages V2s and V4s are set to reduce the effective voltage, as shown in FIG. 12, as in the case of FIG. 7, when the load is large 'The applied waveform will be more passivated. However, unlike the situation shown in Fig. 7, in the correction part, the effective value Z3 < Z4 is established. Therefore, in this case, when the correction value determination unit 66 corrects the output number K 1 · K 2 during the correction base period,

第33頁 五、發明說明(29) 小’負荷變為愈少,則重量俞 容相異所,成之亮度不均的發::大,則可防止因負街電 又本貫施形態之歪钭修正卢% * — ;:ΐ 平 丄情 化,以 定ί9’之本構貫么?:,在歪斜修正信號產生部6及參數設 為例說明,伸在1 :: :乂 W種值作為變化數之情況 如將變化數:指ί=:ΪΞ定部9之記憶容量時’例 的;度,=變以亦Ϊ可充分減低顯示不均 設定部9本所二 形態主雖係說明歪斜修正信號產生部6自參數 值Τ1 . 72之,卜子之表,讀出基準值VAL1 . ML2,算出修正 值丁1 · 了 ?^ A »仁因應交化數之增減,適當的增減修正 情沉,不將2 2 式予以算出亦可。又,即使在參照表的 係數等用以2出A jLl · VAL2本身予以讀出,而讀出修正 惟,大多 面對每一變化數倍佟,、疋出適當的凌异式之故,例如一 面板1上戶斤發生之顯乡示不值η/丁2變化…面觀測液晶顯示 值丁 1 · Τ2,將該修正值:寺’求取顯示不均最少的修正 :路構造,更適當的減低二表:$可依更簡單之 又VAL,亦以芩照表者可依更簡。口 516017 五、發明說明(30) 之電路構造,取得可適當消除顯示不均之值。 又,本實施^形態中,電源電路5之兩開關5 2 · 5 3係為了 修正第2顯示不均被切換2次(在脈衝P 0之兩邊),為了修正 第1顯示不均被切換2次(在脈衝PI (P2)之兩邊),但並不限 於此,例如統合修正信號產生部,亦可產生控制信號S 1 ,作為將脈衝P0 · P 1組合之單一脈衝,亦可產生控制信號 S 2,作為將脈衝P 0 · P 2組合之單一脈衝。即使在此情況下 ,若修正用電壓V 2 s · V 4 s之施加期間相同,便可得相同之 效果。又,此構造係將電源之切換次數自4次減少為2次之 故,可減少邏輯及電源電路部之耗電。 本發明之液晶顯示裝置係將上述液晶顯示面板基於上述 顯示資料予以驅動者,除了上述信號側驅動機構及修正用 電源之外,尚具備第1修正量決定機構,其係因應於上述 信號側驅動機構將與上述顯示資料對應之各電壓予以輸出 之數的變化,各別決定各相對應之修正用電壓之施加期間 以作為修正量者。 依該構造,施加上述各修正用電壓之期間,係因應於各 相對應之電壓的輸出數變化,而被分別決定。於是,即使 於掃描電極發生誘導歪斜’該掃描電極與各信號電極之交 點所對應之對各液晶元件之實效值發生變化,依上述各施 加期間之差異,可抵消因誘導歪斜所造成之實效值的變化 。故,與上述液晶顯示裝置相同的,儘管電路構造簡單, 製造成本更低,仍可抑制因誘導歪斜造成之第1顯示不均 ,可實現高顯示品質之液晶顯示裝置。Page 33 V. Description of the invention (29) The smaller the load becomes, the less the weight is, and the uneven the brightness is: :: Large, it can prevent the distortion caused by the negative street power and the inherent shape. Revise Lu% * —;: ΐ Ping 丄 丄 emotional, to determine the basis of ί 9 '? : In the skew correction signal generating section 6 and the parameters are set as an example, and it is extended to 1::: 乂 W when the values are the number of changes, such as when the number of changes: refers to the memory capacity of the setting section 9 Degree, = can also be reduced to fully reduce the display unevenness setting section 9 of the two forms of the main office although the description of the skew correction signal generating section 6 from the parameter value T1. 72, the table of the bu, read the reference value VAL1 ML2, calculate the correction value D1. ^ A »Ren responds to the increase or decrease in the number of crosses, and corrects the increase or decrease in the appropriate amount. It is not necessary to calculate the formula 2 2. In addition, even if the coefficients of the reference table are used to read out A jLl · VAL2 itself, and the correction is read, most of them are faced with each change several times. The change of the display value η / ding2 occurred on the panel 1 on the panel 1 ... Observe the liquid crystal display value ding1 · Τ2, and this correction value: Temple 'to find the correction with the least display unevenness: road structure, more appropriate The second table of reduction: $ can be more simple and VAL, and those who follow the table can be simpler. Mouth 516017 5. The circuit structure of invention description (30) is a value that can properly eliminate display unevenness. In addition, in this embodiment, the two switches 5 2 · 5 3 of the power supply circuit 5 are switched twice to correct the second display unevenness (on both sides of the pulse P 0), and to correct the first display unevenness 2 (On both sides of the pulse PI (P2)), but is not limited to this. For example, the integrated correction signal generating section can also generate the control signal S 1. As a single pulse combining the pulses P0 · P 1, it can also generate the control signal. S 2 is a single pulse combining pulses P 0 · P 2. Even in this case, if the application period of the correction voltage V 2 s · V 4 s is the same, the same effect can be obtained. In addition, this structure reduces the number of times the power supply is switched from four to two, thereby reducing the power consumption of the logic and power circuit sections. The liquid crystal display device of the present invention is a driver that drives the liquid crystal display panel based on the display data. In addition to the signal-side driving mechanism and the power source for correction, the liquid crystal display device also includes a first correction amount determining mechanism that is driven on the signal side. The mechanism changes the number of output voltages corresponding to the above-mentioned display data, and individually determines the application period of the corresponding correction voltage as the correction amount. According to this structure, the periods during which each of the above-mentioned correction voltages are applied are determined in accordance with changes in the output number of the corresponding voltages. Therefore, even if induced distortion occurs at the scanning electrode, the actual value of the liquid crystal element corresponding to the intersection of the scanning electrode and each signal electrode changes. According to the difference between the above application periods, the actual value caused by the induced distortion can be offset. The change. Therefore, similar to the liquid crystal display device described above, although the circuit structure is simple and the manufacturing cost is lower, the first display unevenness caused by induced distortion can be suppressed, and a liquid crystal display device with high display quality can be realized.

第35頁 516017 五、發明說明(31) 又,上述各構造之上述第1修正量決定機構亦可具備加 重機構,其僚*基於輸出上述各修正用電壓之信號電極數, 調整上述各修正用電壓之施加期間者。 依該構造,各修正用電壓之施加期間,可因應於輸出各 修正用電壓之信號電極數,即負荷之大小而調整。故,在 負荷大的情況下,在修正用電壓之施加時之各液晶的驅動 波形中,即使在發生比負荷小的情況大的信號鈍化之情況 ,亦可抵消因信號鈍化所造成之對液晶的實效電壓值。於 是,亦可抑制因負荷相異所造成之亮度不均,進而可實現 高顯示品質之液晶顯示裝置。 又,於上述各構造中,上述信號侧驅動機構具備:閂鎖 電路,其係儲存一掃描水平期間分之顯示資料者;及輸出 控制電路,其係基於該閂鎖電路之輸出,決定向各信號電 極施加之電壓者;上述第1修正量決定機構係參照相位比 用以父流化驅動液晶之父流化信號僅早一個掃描水平期間 分之信號,及參照相位比上述閂鎖電路之輸出僅早一個掃 描水平期間分之顯示資料,以決定與上述閂鎖電路之輸出 相對應之修正量。 依該構造,基於相位比閂鎖電路之輸出早的顯示資料及 交流化信號,可算出與閂鎖電路之輸出對應之修正量之故 ,第1修正量決定機.構可指示與顯示資料同相位的修正量 。於是,可更正確的進行修正,可實現顯示品質更高之液 晶顯不裝置。 又,於上述各構造中,上述第1修正量決定機構亦可具P.35 516017 V. Description of the invention (31) In addition, the above-mentioned first correction amount determining mechanism of each structure may further include an aggravating mechanism, and its staff * adjusts each of the corrections based on the number of signal electrodes that output the voltages for each correction. During the application of voltage. According to this structure, the application period of each correction voltage can be adjusted according to the number of signal electrodes that output each correction voltage, that is, the load. Therefore, in the case of a large load, in the driving waveform of each liquid crystal when the correction voltage is applied, even when a signal passivation larger than the case of a small load occurs, the liquid crystal caused by the signal passivation can be offset. Effective voltage value. Therefore, it is possible to suppress the uneven brightness caused by the different load, thereby realizing a liquid crystal display device with high display quality. Further, in each of the above structures, the signal-side driving mechanism includes: a latch circuit that stores display data for one scanning horizontal period; and an output control circuit that determines the output to each of the circuits based on the output of the latch circuit. The voltage applied by the signal electrode; the above-mentioned first correction amount determining mechanism refers to the signal whose phase is only one scanning horizontal period earlier than the parent fluidized signal used for the parent fluidization to drive the liquid crystal, and the reference phase is output from the latch circuit The data is displayed only in the early one horizontal scanning period to determine the correction amount corresponding to the output of the above-mentioned latch circuit. According to this structure, based on the display data and the AC signal that are earlier in phase than the output of the latch circuit, a correction amount corresponding to the output of the latch circuit can be calculated. The first correction amount determination mechanism. The structure can indicate the same as the display data. The amount of phase correction. Therefore, correction can be performed more accurately, and a liquid crystal display device with higher display quality can be realized. Further, in each of the above structures, the first correction amount determining means may be provided.

第36頁 516017 五、發明說明(32) 備參數記憶機構,其係將在決定上述各施加期間時所參照 之修正值或修^正係數予以記憶者。 依該構造,第1修正量決定機構藉由參照參數記憶機構 之修正值或修正係數,可將各修正用電壓之施加期間各設 定於最適當的值。故,與僅依演算出施加期間之情況相比 ,可實現構造簡單且可顯示品質更高之液晶顯示裝置。 於發明說明中之具體實施樣態或實施例,僅係用以說明 本發明之技術内容者,而非用以狹義限定本發明者。在本 發明之精神及下述申請專利範圍内,可進行各種變更實施 Φ 〇 【符號說明】 1 液晶顯不面板 2 信號側驅動電路(信號側驅動機構) 5 電源電路 6 歪斜修正信號產生部(第1修正量決定機構) 7 鈍化修正信號產生部(第2修正量決定機構) 8 參數設定部(參數記憶機構) 23 B閂鎖(閂鎖電路) 26 輸出控制電路 6 6 修正值決定部(加重機構)Page 36 516017 V. Description of the invention (32) A parameter storage mechanism is used to memorize the correction values or correction coefficients that are referred to when determining each of the above application periods. With this structure, the first correction amount determining means can set the application period of each correction voltage to the most appropriate value by referring to the correction value or correction coefficient of the parameter memory means. Therefore, compared with the case where the application period is calculated only by calculation, a liquid crystal display device having a simple structure and a higher display quality can be realized. The specific implementation forms or embodiments in the description of the invention are only used to explain the technical content of the present invention, rather than to limit the present invention in a narrow sense. Within the spirit of the present invention and the scope of the following patent application, various changes can be implemented Φ 〇 [Description of symbols] 1 LCD display panel 2 Signal-side driving circuit (signal-side driving mechanism) 5 Power supply circuit 6 Skew correction signal generating unit ( 1st correction amount determination mechanism) 7 Passivation correction signal generation section (2nd correction amount determination mechanism) 8 Parameter setting section (parameter memory mechanism) 23 B latch (latch circuit) 26 Output control circuit 6 6 Correction value determination section ( Weighting agency)

Xi〜XN 信號電極 Y丨〜掃描電極Xi ~ XN signal electrode Y 丨 ~ scan electrode

第37頁Page 37

Claims (1)

516017 六、申請專利範圍 1. 一種液晶顯示裝置,其特徵在於具備: 液晶顯不面^板’其係在互相父叉之複數的信號電極及複 數的掃描電極之間設有液晶層,基於表示顯示圖像之顯示_ 貢料而被驅劝者, 信號側驅動機構,其係將與上述顯示資料相對應之電壓-,施加至上述各信號電極者; 修正用f源,其係產生與對應於顯示資料之上述各電壓 成1對1對應的各修正用電壓,將所產生之各修正用電壓取 代上述各電壓,向上述信號側驅動機構輸出者;及 第1修正量決定機構,其係對於被施加至液晶層之實效 電壓值之變化,以依上述各修正用電壓之施加期間之差可 將該變化予以打消之方式,決定上述各修正用電壓之施加 期間作為修正量者;上述實效電壓值之變化係因依自上述 信號側驅動機構向上述各信號電極施加之電位變化,於上 述各掃描電極所發生之波形的歪斜所造成者。 2. 如申請專利範圍第1項之液晶顯示裝置,其中上述第1 修正量決定機構具備加重機構,其係基於將上述各修正用 電壓予以輸出之信號電極數,調整上述各修正用電壓之施 加期間者。 3. 如申請專利範圍第1項之液晶顯示裝置,其中具備第2 修正量決定機構,其係在上述各信號電極,上述顯示資料 所對應之電壓有變化之情況,以取代該電壓,在一定期 間,將上述各修正用電壓中之一,自上述信號側驅動機構 予以輸出之方式予以控制者。516017 6. Scope of patent application 1. A liquid crystal display device, comprising: a liquid crystal display panel ^ panel, which is provided with a liquid crystal layer between a plurality of signal electrodes and a plurality of scanning electrodes which are mutually crossed, based on the display Display image display _ For those who are encouraged, the signal-side driving mechanism is a voltage- corresponding to the above-mentioned display data, which is applied to each of the above signal electrodes; the f source for correction is used to generate and respond to Those correction voltages corresponding to the one-to-one voltages in the display data are replaced by the generated correction voltages and output to the signal-side driving mechanism; and a first correction amount determining mechanism, which is For the change of the effective voltage value applied to the liquid crystal layer, the change period of the application voltage of each correction voltage can be used to cancel the change, and the application period of each correction voltage is determined as the correction amount; The change in the voltage value is due to the change in potential applied to each of the signal electrodes according to the signal-side driving mechanism. Caused by the skew of the waveform. 2. For the liquid crystal display device of the first item of the scope of patent application, wherein the first correction amount determining mechanism includes an aggravating mechanism, which adjusts the application of the respective correction voltages based on the number of signal electrodes that output the respective correction voltages. Period. 3. For example, the liquid crystal display device of the first patent application scope includes a second correction amount determining mechanism, which is based on the situation where the voltage corresponding to the above-mentioned signal electrodes and the display data changes, instead of the voltage, in a certain degree. During this period, one of the above-mentioned correction voltages is controlled by a method of outputting it from the signal-side driving mechanism. 第38頁 516017 ^、申請專利範圍 4. 如申請專利範圍第1項之液晶顯示裝置,其中 上述信號你驅動機構具備:閂鎖電路,其係儲存一掃描 水平期間分之顯示資料者;及輸出控制電路,其係基於該 閂鎖電路之輸出,決定對各信號電極施加之電壓者;., 上述第1修正量決定機構,並參照相位比用以將液晶予 · 以交流化驅動之交流化信號僅前進一掃描水平期間之J言號 ;及參照相位比上述閃鎖電路之輸出僅前進一掃描水平期 間之顯示資料;以決定與上述閂鎖電路相對應之修正量。 5. 如申請專利範圍第1項之液晶顯示裝置,其中上述第1 修正量決定機構具備參數記憶機構,其係將在決定上述各 施加期間時所參照之修正值或修正係數予以記憶者。 > 6. 如申請專利範圍第3項之液晶顯示裝置,其.中具備統 合修正信號產生機構,其係在第1修正量決定機構所決定 之施加期間,及第2修正量決定機構所指示之時點,將指 示輸出前述修正用電壓之控制信號向前述修正~電源輸出 ,並與第1修正量決定機構及第2修正量決定機構共通的一. 個機構。 7. 如申請專利範圍第1項之液晶顯示裝置,其中上述液 晶顯示面板係被交流化驅動者。 8. 如申請專利範圍第5項之液晶顯示裝置,其中上述參 ' 數記憶機構所記憶之修正值或修正係數,係因應於將與顯 示資料對應之各電壓予以輸出之數的變化數而被設定者。 9. 如申請專利範圍第5項之液晶顯示裝置,其中上述第1 修正量決定機構係基於自上述參數記憶機構得到之修正值Page 38 516017 ^ Patent application scope 4. For the liquid crystal display device of the patent application scope item 1, in which the above-mentioned signal driving mechanism is equipped with: a latch circuit, which stores the display data in a scanning horizontal period; and output The control circuit determines the voltage to be applied to each signal electrode based on the output of the latch circuit. The above-mentioned first correction amount determination mechanism refers to the phase ratio and is used to drive the liquid crystal to an AC drive. The signal advances only the J signal during a scanning horizontal period; and the reference phase ratio is the display data of the above-mentioned flash lock circuit output only during a scanning horizontal period; to determine the correction amount corresponding to the latch circuit. 5. For the liquid crystal display device of the first scope of the patent application, the above-mentioned first correction amount determining mechanism is provided with a parameter memory mechanism, which memorizes the correction value or correction coefficient that is referred to when determining each of the above application periods. > 6. If the liquid crystal display device according to item 3 of the patent application scope includes integrated correction signal generating means, it is in the application period determined by the first correction amount determination means and instructed by the second correction amount determination means. At this point, a control signal instructing to output the aforementioned correction voltage is output to the aforementioned correction ~ power supply, and is a common mechanism with the first correction amount determining mechanism and the second correction amount determining mechanism. 7. The liquid crystal display device according to item 1 of the patent application range, wherein the liquid crystal display panel is driven by an AC drive. 8. For the liquid crystal display device of the scope of application for patent No. 5, in which the correction value or correction coefficient memorized by the above-mentioned parameter memory mechanism is based on the number of changes corresponding to the number of voltages corresponding to the display data being output. Setter. 9. For the liquid crystal display device in the scope of claim 5, the first correction amount determination mechanism is based on the correction value obtained from the parameter storage mechanism. 第39頁 、申請專利範国 或修正係婁之, 上述各修疋 =j π貪料對應之各 10.如申。堡的施加期間者。I的-出數,決定 晶顯示面叔專利範圍第3頊夕、广a g 以輪出上塊 ^叫丄嗖佟工 、丨、叫伋之交流 11 · 1H用電壓之方式控制者。 夜晶顯禾::示裝置’其特徵在於具備 斜應於被^被交流化驅動,:;二裝置―,其中上述液 以輪φ. u、.,. σ至液晶顯示面板之一々置決定機構係' 電壓之古々化化咸的反轉動作, 數:::顯h板,二其特徵在於具備: 歎的掃描部X L /、(丁、於相互$ 5 >、一杏/_ 資袓^ 1兔祛之間設有液曰# a禝數的信號電極及複 貝枓而被驅動者; 83層,基於表示顯示圖像之顯示 信號側驅動機構,其係將與上述 施加至上述各信號電極者; ‘ /、貝料對應之電壓, 修正用電源,其係產生與 1對1對應的各修正用電壓,取= ^ = 3 =成 動機構輸出者;及 白上述乜號側驅 .第1修正量決定機構,並係因麻 所輪出之與上述顯示資料對應的V電壓的 决定各對應的修正用電壓的施加期間作為修正=。1 第項之液晶顯示裝置,其中上述 修正董广決疋,構具備加重機構,其係基於輸出上述各 。: 電極數,職上述各修正用電壓之施加 :3·如申請專利範圍第η項之液晶顯示裝置,直中呈備 弟2修正量決定機構,其係在上述各信號電極,上述顯示On page 39, the patent application country or amendment is Lou Zhi. The above repairs = j π. Fort imposing period. The number of I-outs determines the third display range of the patent for the crystal display surface, and the wide ag is used to rotate the last block ^ called 丄 嗖 佟 工, 丨, and 汲 of the exchange 11 · 1H is controlled by voltage. Yejingxianhe :: display device is characterized by having an oblique response to be driven by AC :: two devices, where the liquid is determined by the arrangement of wheels φ. U,.,. Σ to one of the liquid crystal display panels The mechanism is the reverse action of the ancient transformation of voltage. Number ::: display h plate. Second, it is characterized by: Scanning section XL / ((Ding, Yu $ 5 >, Yi Xing / _)袓 兔 1 rabbit is provided with a liquid signal electrode and a compound electrode which are driven between them; 83 layers, based on the display signal side drive mechanism representing the display image, which is applied to the above For each of the above signal electrodes; '/, the voltage corresponding to the shell material, the power supply for correction, which generates the voltage for correction corresponding to 1 to 1, taking = ^ = 3 = the output of the moving mechanism; and the above 乜Side drive. The first correction amount determination mechanism, and the V voltage corresponding to the above-mentioned display data determined by the Institute of Ma, and the application period of each corresponding correction voltage is used as correction =. 1 The liquid crystal display device of the first item, wherein The above amendment Dong Guang decided that the structure has aggravating mechanism, which is based on the output The number of electrodes: the application of the voltage for each of the above corrections: 3. If the liquid crystal display device of the nth item of the scope of patent application is applied, the correction amount determination mechanism of Beidi 2 is provided, which is based on the above signal electrodes. display 516017 六、申請專利範圍 資料所對應之電壓有變化之情況,以取代該電壓,在一定 期間,將上述-各修正用電壓中之一,自上述信號侧驅動機 構予以輸出之方式予以控制者。 1 4.如申請專利範圍第1 1項之液晶顯示裝置,其中 胃 上述信號侧驅動機構具備:閂鎖電路,其係儲存一掃描 , 水平期間分之顯示資料者;及輸出控制電路,其係基於該 閂鎖電路之輸出,決定對各信號電極施加之電壓者; 上述第1修正量決定機構,並參照相位比用以將液晶予 以交流化驅動之交流化信號僅前進一掃描水平期間之信號 ;及參照相位比上述閂鎖電路之輸出僅前進一掃描水平期 # 間之顯不貢料,以決定與上述閃鎖電路相對應之修正量。 1 5.如申請專利範圍第1 1項之液晶顯示裝置,其中上述 第1修正量決定機構具備參數記憶機構,其係將在決定上 述各施加期間時所參照之修正值或修正係數予以記憶者。 1 6.如申請專利範圍第1 3項之液晶顯示裝置,其中具備 統合修正信號產生機構,其係在第1修正量決定機構所決 定之施加期間,及第2修正量決定機構所指示之時點,將 指示輸出前述修正用電壓之控制信號向前述修正用電源輸 出,並與第1修正量決定機構及第2修正量決定機構共通的 g 一個機構。 1 7.如申請專利範.圍第1 1項之液晶顯示裝置,其中上述 液晶顯示面板係被交流化驅動者。 1 8.如申請專利範圍第1 5項之液晶顯示裝置,其中上述 參數記憶機構所記憶之修正值或修正係數,係因應於將與516017 VI. Scope of patent application If there is a change in the voltage corresponding to the data in the patent application, it will replace the voltage, and in a certain period of time, one of the above-each correction voltage will be output from the signal-side drive mechanism to the controller. 14. The liquid crystal display device according to item 11 of the scope of patent application, wherein the above-mentioned signal-side driving mechanism of the stomach is provided with: a latch circuit that stores a scan and displays data in a horizontal period; and an output control circuit that is Those who determine the voltage to be applied to each signal electrode based on the output of the latch circuit; the above-mentioned first correction amount determining mechanism, and referring to the phase ratio of the AC signal used to AC drive the liquid crystal, only advances the signal during one scanning level ; And the reference phase ratio is not more than a scan horizontal period # of the output of the above-mentioned latch circuit to determine the correction amount corresponding to the above-mentioned flash-lock circuit. 1 5. The liquid crystal display device according to item 11 of the scope of patent application, wherein the first correction amount determining mechanism includes a parameter memory mechanism that memorizes a correction value or a correction coefficient referred to in determining each of the application periods described above. . 16. The liquid crystal display device according to item 13 of the scope of patent application, which includes an integrated correction signal generating mechanism, which is in the application period determined by the first correction amount determination mechanism and at the time indicated by the second correction amount determination mechanism. A mechanism that outputs a control signal instructing to output the correction voltage to the correction power supply, and shares the same mechanism with the first correction amount determining means and the second correction amount determining means. 1 7. The liquid crystal display device as claimed in claim 11. The liquid crystal display panel described above is driven by an AC drive. 1 8. The liquid crystal display device according to item 15 of the scope of patent application, wherein the correction value or correction coefficient memorized by the above parameter memory mechanism is based on the 第41頁 516017 t、申請專利範圍 顯示資料對應之各電壓予以輸出之數的變化數而被設定者 〇 一 1 9.如申請專利範圍第1 5項之液晶顯示裝置,其中上述 第1修正量決定機構係基於自上述參數記憶機構得到之修 正值或修正係數,及與顯示資料對應之各電壓的輸出數, 決定上述各修正用電壓的施加期間者。 2 〇.如申請專利範圍第1 3項之液晶顯示裝置,其中上述 液晶顯示面板係被交流化驅動,上述第2修正量決定機構/ 係對應於被施加至液晶顯示面板之交流化信號的反轉動作 ,以輸出上述修正用電壓之方式控制者。Page 41 516017 t. The number of changes in the number of output voltages corresponding to the display data of the patent application is set by the user. 1-1 9. If the liquid crystal display device of the patent application scope No. 15 item, the above-mentioned first correction amount The decision mechanism determines the application period of each of the correction voltages based on the correction value or correction coefficient obtained from the parameter storage mechanism and the output number of each voltage corresponding to the display data. 2 〇. The liquid crystal display device according to item 13 of the scope of patent application, wherein the liquid crystal display panel is driven by AC, and the second correction amount determining mechanism / system corresponds to the reaction of the AC signal applied to the liquid crystal display panel. The controller rotates to output the correction voltage. 第42頁Page 42
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JP2006047510A (en) * 2004-08-02 2006-02-16 Oki Electric Ind Co Ltd Display panel driving circuit and driving method
CN100449364C (en) * 2004-10-01 2009-01-07 罗姆股份有限公司 Method of supplying power to scan line driving circuit, and power supply circuit
JP4974623B2 (en) * 2006-09-14 2012-07-11 ルネサスエレクトロニクス株式会社 Driving circuit and data driver for flat display device
JP5276812B2 (en) * 2007-08-24 2013-08-28 新日本無線株式会社 Driving circuit for liquid crystal display device
TWI377553B (en) * 2008-03-18 2012-11-21 Chimei Innolux Corp Liquid crystal display and driving method thereof
CN107430837A (en) * 2015-03-05 2017-12-01 夏普株式会社 Display device
CN105930305B (en) * 2016-04-14 2017-07-21 清华大学深圳研究生院 A kind of three pulses are intersected close to method of guidance
US11145269B2 (en) * 2019-08-02 2021-10-12 Sakai Display Products Corporation Display apparatus accurately reducing display non-uniformity

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