JP2001036182A - Silicon platform for optical module - Google Patents

Silicon platform for optical module

Info

Publication number
JP2001036182A
JP2001036182A JP11209163A JP20916399A JP2001036182A JP 2001036182 A JP2001036182 A JP 2001036182A JP 11209163 A JP11209163 A JP 11209163A JP 20916399 A JP20916399 A JP 20916399A JP 2001036182 A JP2001036182 A JP 2001036182A
Authority
JP
Japan
Prior art keywords
optical module
lead
dielectric film
silicon
silicon substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11209163A
Other languages
Japanese (ja)
Other versions
JP3434473B2 (en
Inventor
Takehiko Nomura
剛彦 野村
Masayuki Iwase
正幸 岩瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP20916399A priority Critical patent/JP3434473B2/en
Priority to CA002331970A priority patent/CA2331970A1/en
Publication of JP2001036182A publication Critical patent/JP2001036182A/en
Application granted granted Critical
Publication of JP3434473B2 publication Critical patent/JP3434473B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4219Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4236Fixing or mounting methods of the aligned elements
    • G02B6/4245Mounting of the opto-electronic elements
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4246Bidirectionally operating package structures
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4249Packages, e.g. shape, construction, internal or external details comprising arrays of active devices and fibres
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4274Electrical aspects
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • G02B6/4201Packages, e.g. shape, construction, internal or external details
    • G02B6/4219Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
    • G02B6/4236Fixing or mounting methods of the aligned elements
    • G02B6/4244Mounting of the optical elements
    • HELECTRICITY
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • HELECTRICITY
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399Material
    • H01L2224/854Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/85444Gold (Au) as principal constituent
    • HELECTRICITY
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    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399Material
    • H01L2224/854Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/8547Zirconium (Zr) as principal constituent
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
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    • H01L2924/30111Impedance matching

Abstract

PROBLEM TO BE SOLVED: To provide a silicon platform which can supply a small-sized optical module, capable of high-speed transmission at low cost. SOLUTION: This silicon platform 100 for optical module has a light receiving and light emitting element 101 mounted on a silicon substrate 102 and a dielectric film 106 is formed on the silicon substrate 102 and a lead-out wiring part 107 of the light receiving and emitting element is provided on the dielectric film 106, and a bonding pad part 108 of the lead-out wiring part 107 is formed in a state with the dielectric film 106 on the silicon substrate 102 removed.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、光デバイス実装用
の光モジュール用シリコンプラットフォームに関し、更
に詳しくは、シリコン基板上に導体配線が施された受発
光素子等の素子を搭載する光モジュール用シリコンプラ
ットフォームに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a silicon platform for an optical module for mounting an optical device, and more specifically, to a silicon for an optical module on which an element such as a light emitting / receiving element having conductor wiring formed on a silicon substrate is mounted. About the platform.

【0002】[0002]

【従来の技術】光通信システムや光データ通信システム
においては、レーザダイオード等の発光素子を組み込ん
だ光モジュールが用いられる。この光モジュールは、近
年のコンピュータハードウェア、通信ネットワークの発
展に伴い、家庭にまで設置されるなど、小型化、高集積
化、低コスト等の要求が高まっている。
2. Description of the Related Art In an optical communication system or an optical data communication system, an optical module incorporating a light emitting element such as a laser diode is used. With the development of computer hardware and communication networks in recent years, demands for miniaturization, high integration, low cost, and the like are increasing, for example, the optical modules are installed in homes.

【0003】光モジュールの小型化、高集積化、低コス
ト化の要求を実現するための手段の一つとして、必要に
より導体配線が施された基板を使用し、この基板上に受
光素子、発光素子を搭載したものを一部品として構成
し、これをパッケージに組み込んで通信用の光ファイバ
や光導波路部品と接続する方式が、上記の要求に沿うも
のとして開発が進められている。
As one of means for realizing demands for downsizing, high integration, and low cost of an optical module, a substrate provided with conductor wiring as necessary is used, and a light receiving element, a light emitting device, Development of a system in which an element is mounted as one component, which is incorporated in a package and connected to a communication optical fiber or an optical waveguide component is being developed as meeting the above requirements.

【0004】この場合、発光素子、受光素子を搭載する
ための基板としては、シリコン基板が好適である。シリ
コン(Si)は品質の安定した素材を安価に入手でき、
放熱性が優れると伴に、加工性に優れているので、受発
光素子を搭載する際の位置決めをするためのアライメン
トマークや、光ファイバーなどとの位置決めをするため
のV溝の形成が容易であるなどの利点があるためであ
る。
In this case, a silicon substrate is suitable as a substrate on which the light emitting element and the light receiving element are mounted. Silicon (Si) can obtain a stable material at low cost,
Since it has excellent heat dissipation and excellent workability, it is easy to form an alignment mark for positioning when mounting a light receiving and emitting element and a V-groove for positioning with an optical fiber or the like. This is because there are advantages.

【0005】本発明では、このような目的に用いるシリ
コン基板、あるいは、該シリコン基板上に受発光素子及
び導体配線を搭載し、必要によって位置決めのためのア
ライメントマークやV溝を形成したものを、光モジュー
ル用シリコンプラットフォームと呼ぶ。
In the present invention, a silicon substrate used for such a purpose, or a device having a light receiving / emitting element and a conductor wiring mounted on the silicon substrate and forming alignment marks and V-grooves for positioning as required, is provided. This is called a silicon platform for optical modules.

【0006】図5に、光モジュール用シリコンプラット
フォームの概念図を示す。図中の505は厚さ1mmの
シリコン基板であり、SiO絶縁層(507)を介し
て導体パターン(506)が形成されている。発光素子
(504)、受光素子(501)は、光モジュール用シ
リコンプラットフォーム上に搭載され、ハンダ及びボン
ディングワイヤ(502)により、光モジュール用シリ
コンプラットフォーム上の導体パターン(506)に接
続されている。図5において、508は発光素子(50
4)または受光素子(501)の引き出し配線部、50
9はポリイミド膜よりなる誘電体膜である。
FIG. 5 shows a conceptual diagram of a silicon platform for an optical module. In the figure, reference numeral 505 denotes a silicon substrate having a thickness of 1 mm, on which a conductor pattern (506) is formed via an SiO 2 insulating layer (507). The light emitting element (504) and the light receiving element (501) are mounted on a silicon platform for an optical module, and are connected to a conductor pattern (506) on the silicon platform for an optical module by soldering and bonding wires (502). In FIG. 5, reference numeral 508 denotes a light emitting element (50
4) or lead-out wiring portion of light receiving element (501), 50
9 is a dielectric film made of a polyimide film.

【0007】上記のように構成された光モジュール用シ
リコンプラットフォームは、図6に示すように必要に応
じてプリアンプIC(603)やドライバーIC、外部
接続端子、あるいは、光フェルール(613)のような
外部光ファイバ(612)との接続構造とともにパッケ
ージされて、双方向通信用の光モジュールとして完成さ
れる。図6において、608はグラウンド、611はリ
ードフレームである。
As shown in FIG. 6, the optical module silicon platform configured as described above may be provided with a preamplifier IC (603), a driver IC, an external connection terminal, or an optical ferrule (613) as necessary. It is packaged together with the connection structure with the external optical fiber (612) to complete the optical module for bidirectional communication. In FIG. 6, 608 is a ground, and 611 is a lead frame.

【0008】以下、図6において、図5と同一部分には
同一符号を付して詳細な説明は省略する。
In FIG. 6, the same parts as those in FIG. 5 are denoted by the same reference numerals, and detailed description thereof will be omitted.

【0009】また、図6では受発光素子を搭載した双方
向通信用モジュールを例にとったが、図7に示すように
伝送レートの増大を目的として、発光素子、または受光
素子をアレイ(701)上に配置した発光素子アレイモ
ジュール、受光素子アレイモジュールも注目されてい
る。
FIG. 6 shows an example of a bidirectional communication module equipped with a light receiving / emitting element. However, as shown in FIG. 7, a light emitting element or a light receiving element is arranged in an array (701) for the purpose of increasing the transmission rate. The light emitting element array module and the light receiving element array module arranged above are also attracting attention.

【0010】以下、図7において、図5と同1部分には
同一符号を付して詳細な説明は省略する。
In FIG. 7, the same parts as those in FIG. 5 are denoted by the same reference numerals, and detailed description is omitted.

【0011】[0011]

【発明が解決しようとする課題】ところで、上記の光モ
ジュール用シリコンプラットフォームは、データの伝送
速度が高速化するにつれ、ボンディングワイヤー(50
2)や引き出し配線部(508)で発生する伝送信号の
劣化が問題となっている。
By the way, the silicon platform for the optical module described above requires a bonding wire (50%) as the data transmission speed increases.
2) and deterioration of the transmission signal generated in the lead-out wiring portion (508) is a problem.

【0012】この伝送信号の劣化をおさえるためには、
ボンディングワイヤー(502)を短くして寄生インダ
クタンス成分を抑えること、発光素子(501)と引き
出し配線部(508)分のインピーダンス整合を取るこ
とが重要となる。
In order to suppress the deterioration of the transmission signal,
It is important to reduce the parasitic inductance component by shortening the bonding wire (502) and to achieve impedance matching between the light emitting element (501) and the lead-out wiring portion (508).

【0013】一般に発光素子(501)として用いられ
るレーザダイオードの直列抵抗は5〜10Ω程度であ
り、発光素子(501)側の引き出し配線部(508)
分の特性インピーダンスZoも5〜10Ω程度にするこ
とが望ましい。
The series resistance of a laser diode generally used as a light emitting element (501) is about 5 to 10Ω, and a lead wiring section (508) on the light emitting element (501) side.
It is desirable that the characteristic impedance Zo also be about 5 to 10Ω.

【0014】引き出し配線部分のインピーダンス整合を
取るために引き出し配線部分をマイクロストリップライ
ンで形成する場合、たとえば特性インピーダンスZo=
10Ωにするためには、配線幅Wと配線下の誘電体膜の
厚さHの比W/H=16.5となり、誘電体膜厚Hに比
べて配線幅Wがかなり大きくなってしまう。
When the extraction wiring portion is formed by a microstrip line in order to match the impedance of the extraction wiring portion, for example, the characteristic impedance Zo =
In order to make 10Ω, the ratio W / H of the wiring width W to the thickness H of the dielectric film under the wiring becomes 16.5, and the wiring width W becomes considerably larger than the dielectric film thickness H.

【0015】一方、光モジュールの小型化を図る上で
は、受発光素子を搭載する基板のサイズを小型化するこ
とが好ましい。例えば、現在の光ファイバテープの規格
は光ファイバ間のピッチが250μmであり、現状の光
ファイバーテープとの接続を前提とすれば、発光素子や
受光素子を250μmピッチで配置したアプリケーショ
ンが構成できれば最も理想的である。
On the other hand, in order to reduce the size of the optical module, it is preferable to reduce the size of the substrate on which the light receiving and emitting elements are mounted. For example, the standard of the current optical fiber tape is that the pitch between optical fibers is 250 μm, and assuming the connection with the current optical fiber tape, it is most ideal if an application in which light emitting elements and light receiving elements are arranged at a pitch of 250 μm can be configured. It is a target.

【0016】ここで、隣接チャンネル間のクロストーク
を考慮に入れると、引き出し配線の配線幅Wは100μ
mを超えない程度にすることが望ましい。この場合、誘
電体膜の厚さはおおよそ5μm以下にする必要がある。
Here, taking into account the crosstalk between adjacent channels, the width W of the lead wiring is 100 μm.
m. In this case, the thickness of the dielectric film needs to be approximately 5 μm or less.

【0017】ところが、誘電体膜の厚さが薄いと、誘電
体膜上に形成した配線にワイヤーをボンディングする際
の衝撃で配線が剥がれてしまうという問題が発生する。
誘電体膜上の配線が剥がれないようにするには、誘電体
膜の厚さが20〜30μm以上必要に成るという問題が
ある。
However, if the thickness of the dielectric film is small, there is a problem that the wiring is peeled off by the impact of bonding the wire to the wiring formed on the dielectric film.
In order to prevent the wiring on the dielectric film from peeling off, there is a problem that the thickness of the dielectric film needs to be 20 to 30 μm or more.

【0018】本発明は、上記従来の課題を解決するため
になされたものであり、その目的は、高速伝送可能な小
型光モジュールを、低コストに供給することが可能にな
る光モジュール用シリコンプラットフォームを提供する
ことにある。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and an object of the present invention is to provide an optical module silicon platform capable of supplying a small optical module capable of high-speed transmission at low cost. Is to provide.

【0019】[0019]

【課題を解決するための手段】上記目的を達成するため
に、本発明は次のような構成をもって課題を解決する手
段としている。すなわち、本第1の発明の光モジュール
用シリコンプラットフォームは、シリコン基板上に受発
光素子を搭載する光モジュール用シリコンプラットフォ
ームであって、前記シリコン基板上に誘電体膜が形成さ
れ、前記誘電体膜上に前記受発光素子の引き出し配線部
が設けられ、前記引き出し配線部のボンディングパッド
部はシリコン基板上の誘電体膜が除去された状態で形成
されている構成をもって課題を解決する手段としてい
る。
Means for Solving the Problems In order to achieve the above object, the present invention has the following structure to solve the problems. That is, the silicon platform for an optical module of the first invention is a silicon platform for an optical module having a light receiving / emitting element mounted on a silicon substrate, wherein a dielectric film is formed on the silicon substrate. A lead wiring portion of the light emitting / receiving element is provided thereon, and a bonding pad portion of the lead wiring portion is formed in a state where a dielectric film on a silicon substrate is removed, thereby providing means for solving the problem.

【0020】本第1の発明は、配線電極のボンディング
パッド部分の直下の誘電体膜を除去した状態にして、ボ
ンディングパッド部分のみ基板上に形成することによっ
て、ワイヤーボンディング時の剥がれの問題を回避する
ものである。
The first aspect of the present invention avoids the problem of peeling during wire bonding by forming only the bonding pad portion on the substrate with the dielectric film immediately below the bonding pad portion of the wiring electrode removed. Is what you do.

【0021】かかる構成の本第1の発明によれば、受発
光素子の引き出し配線部の配線電極のボンディングパッ
ド以外の部分は、厚さ数μm程度の誘電体膜上に形成す
ることができるので、配線幅を100μm以下にして
も、レーザーダイオードの直列抵抗と引き出し配線部分
の特性インピーダンスの整合を取ることができる。
According to the first aspect of the present invention, the portions other than the bonding pads of the wiring electrodes of the lead wiring portion of the light receiving / emitting element can be formed on the dielectric film having a thickness of about several μm. Even if the wiring width is set to 100 μm or less, the series resistance of the laser diode can be matched with the characteristic impedance of the lead wiring portion.

【0022】一方、基板上に形成したボンディングパッ
ド部分は、ワイヤーボンディングする際に衝撃を受けて
も誘電体膜と異なり剥がれることが無いので、引き出し
配線部の損傷がなくなり実装・組み立てが容易となる。
On the other hand, the bonding pad portion formed on the substrate does not peel off unlike a dielectric film even when subjected to an impact during wire bonding, so that the lead-out wiring portion is not damaged and mounting and assembly are facilitated. .

【0023】よって、小型、かつ高集積化した高速伝送
可能な光モジュールが低コストに提供される。
Therefore, an optical module that is compact, highly integrated, and capable of high-speed transmission is provided at low cost.

【0024】また、本第2の発明の光モジュール用シリ
コンプラットフォームは、引き出し配線部分が、マイク
ロストリップライン構造となっている構成をもって課題
を解決する手段としている。
Further, the silicon platform for an optical module according to the second aspect of the present invention is a means for solving the problem by having a configuration in which a lead wiring portion has a microstrip line structure.

【0025】かかる構成の本第2の発明によれば、受発
光素子と引き出し配線部間の特性インピーダンスの整合
をより容易に取ることができる。
According to the second aspect of the present invention, it is possible to more easily match the characteristic impedance between the light emitting / receiving element and the lead wiring portion.

【0026】したがって、より小型、かつ高集積化した
高速伝送可能な光モジュールが低コストに提供される。
Therefore, an optical module that is smaller and highly integrated and capable of high-speed transmission is provided at low cost.

【0027】第1の実施形態例 図1は、本発明に係る第1の実施形態例の光モジュール
用シリコンプラットフォームを用いた光モジュールの一
部を示す模式図である。
First Embodiment FIG. 1 is a schematic view showing a part of an optical module using a silicon platform for an optical module according to a first embodiment of the present invention.

【0028】図1において、100は光モジュール用シ
リコンプラットフォーム、101はレーザーダイオード
アレイである。本実施の形態例では、レーザーダイオー
ドアレイ(101)はレーザーダイオードが6個配置さ
れたものである。102はレーザーダイオードアレイド
(101)を搭載するための、厚さ1mmで比抵抗が2
000Ωcm、6×3mmのサイズのシリコン基板であ
る。
In FIG. 1, reference numeral 100 denotes a silicon platform for an optical module, and 101 denotes a laser diode array. In the present embodiment, the laser diode array (101) includes six laser diodes. Reference numeral 102 denotes a 1 mm thick and specific resistance 2 for mounting the laser diode array (101).
It is a silicon substrate having a size of 000 Ωcm and a size of 6 × 3 mm.

【0029】シリコン基板(102)表面全体にSiO
酸化絶縁膜(103)が熱酸化法により形成されてい
る。その上に、銅または金よりなる配線パターン(10
4)およびグラウンド(105)が蒸着および、フォト
リソグラフィーを用いた周知のリフトオフ法により所定
の形状に形成されている。その上に更に、厚さ2μmの
ポリイミド膜よりなる誘電体膜(106)が形成されて
いる。
The entire surface of the silicon substrate (102) is made of SiO.
A dioxide insulating film (103) is formed by a thermal oxidation method. A copper or gold wiring pattern (10
4) and the ground (105) are formed in a predetermined shape by a known lift-off method using vapor deposition and photolithography. Further thereon, a dielectric film (106) made of a polyimide film having a thickness of 2 μm is formed.

【0030】ポリイミド膜の形成にあたってポリイミド
を塗布後、引き出し配線部のマイクロストリップライン
を構成する部分を残して、フォトリソグラフィーおよび
ドライエッチングを用いてパターニングした。
In forming the polyimide film, after applying the polyimide, patterning was carried out by photolithography and dry etching except for a portion constituting the microstrip line of the lead-out wiring portion.

【0031】このパターニングで、ボンディングパッド
(108)が形成される場所の誘電体膜(106)は除
去され、SiO酸化絶縁膜(103)が露出される。
In this patterning, the dielectric film (106) where the bonding pad (108) is to be formed is removed, and the SiO 2 oxide insulating film (103) is exposed.

【0032】誘電体膜(106)のその上に引き出し配
線(107)が蒸着および、フォトリソグラフィーを用
いた周知のリフトオフ法により形成されている。
A lead wiring (107) is formed on the dielectric film (106) by vapor deposition and a well-known lift-off method using photolithography.

【0033】引き出し配線(107)はレーザーダイオ
ードアレイ(101)の直列抵抗(5Ω)とインピーダ
ンスが整合するように引き出し配線幅を70μmと設定
した。引き出し配線(107)のボンディングパッド
(108)は、上記したように誘電体膜(106)が除
去されたSiO酸化絶縁膜(103)上に形成されて
いる。
The width of the lead wire (107) was set to 70 μm so that the impedance matched the series resistance (5Ω) of the laser diode array (101). The bonding pad (108) of the lead wiring (107) is formed on the SiO 2 oxide insulating film (103) from which the dielectric film (106) has been removed as described above.

【0034】レーザーダイオードアレイ(101)は、
配線パターン(104)をアライメントマークとして用
いて位置決めし、ハンダにより固定した。その後、レー
ザーダイオードアレイ(101)、引き出し配線(10
7)、ドライバーIC(110)間をボンディングワイ
ヤー(109)によって接続した。
The laser diode array (101)
The positioning was performed using the wiring pattern (104) as an alignment mark, and the wiring pattern (104) was fixed with solder. After that, the laser diode array (101) and the lead wiring (10
7) The driver ICs (110) were connected by bonding wires (109).

【0035】本実施の形態例では、レーザーダイオード
アレイ(101)として、InP基板上にダブルヘテロ
構造のInGaAsP活性層による共振器が形成された
公知の端面出射型の発光素子で、発振波長1.31μ
m、しきい値電流5mAのものを用いた。
In the present embodiment, as a laser diode array (101), a known edge-emitting type light-emitting element in which a resonator composed of an InGaAsP active layer having a double hetero structure is formed on an InP substrate has an oscillation wavelength of 1. 31μ
m and a threshold current of 5 mA.

【0036】レーザーダイオードアレイ(101)の光
出射方向は、図1に示す光ファイバ(111)と結合す
る方向で、光結合の容易性を考慮して、シリコン基板
(102)の端部に設置されている。
The light emitting direction of the laser diode array (101) is the direction of coupling with the optical fiber (111) shown in FIG. 1, and is set at the end of the silicon substrate (102) in consideration of the easiness of optical coupling. Have been.

【0037】なお、実際には、シリコン基板上にV溝を
形成し、外部光ファイバとの接続における位置合わせと
し、また、光ファイバ(111)との接続を行うための
光フェルールが取り付けられている。
In practice, a V-groove is formed on a silicon substrate to adjust the position in connection with an external optical fiber, and an optical ferrule for connecting to an optical fiber (111) is attached. I have.

【0038】また、シリコン基板(102)、ドライバ
ーIC(110)はリードフレーム上に設置され、必要
に応じてドライバーIC(110)の端子とリードフレ
ームの外部出力端子が接続される。図1では、作図の都
合上、これらの図示は省略した。
The silicon substrate (102) and the driver IC (110) are installed on a lead frame, and the terminals of the driver IC (110) and the external output terminals of the lead frame are connected as necessary. In FIG. 1, these illustrations are omitted for convenience of drawing.

【0039】更に、リードフレームや各端子、あるいは
光フェルールは、光モジュールの強度や信頼性、外部部
品との接続の便宜などを考慮して、材料、形状などの設
計が行われるが、これらは本発明の必須要件を構成する
ものではないので、詳細についての説明は省略する。
Further, materials and shapes of the lead frame, each terminal, and the optical ferrule are designed in consideration of the strength and reliability of the optical module, convenience of connection with external components, and the like. Since it does not constitute an essential requirement of the present invention, a detailed description thereof will be omitted.

【0040】第2の実施形態例 図2は、本発明に係る第2の実施形態例の光モジュール
用シリコンプラットフォームを用いた光モジュールの一
部を示す模式図である。
Second Embodiment FIG. 2 is a schematic view showing a part of an optical module using a silicon platform for an optical module according to a second embodiment of the present invention.

【0041】図2に示す光モジュールでは、光モジュー
ル用シリコンプラットフォーム(100)とドライバー
IC(202)間に、配線部分として上記の方法でシリ
コン基板(203)上にマイクロストリップライン(2
05)を形成した光モジュール用シリコンプラットフォ
ーム(201)を用いている。
In the optical module shown in FIG. 2, a microstrip line (2) is formed on a silicon substrate (203) as a wiring portion between the optical module silicon platform (100) and the driver IC (202) by the above-described method.
05) is used.

【0042】マイクロストリップライン(205)はシ
リコン基板(203)上に形成されたSiO酸化絶縁
膜(206)およびSiO酸化絶縁膜(206)の上
に形成されたポリイミド膜からなる誘電体膜(207)
の上に形成されているが、そのボンディングパッド(2
08)は、上記と同様に誘電体膜(207)が除去され
たSiO酸化絶縁膜(206)上に形成されている。
The microstrip line (205) is a dielectric film composed of an SiO 2 oxide insulating film (206) formed on a silicon substrate (203) and a polyimide film formed on the SiO 2 oxide insulating film (206). (207)
Is formed on the bonding pad (2
08) is formed on the SiO 2 oxide insulating film (206) from which the dielectric film (207) has been removed in the same manner as described above.

【0043】図2において209は、ボンディングワイ
アーである。
In FIG. 2, reference numeral 209 denotes a bonding wire.

【0044】図1に示す実施の形態と同様の部分につい
ては詳細な説明は省略する。
Detailed description of the same parts as in the embodiment shown in FIG. 1 is omitted.

【0045】第3の実施形態例 図3に光送受信モジュールに適用した場合の光モジュー
ル用シリコンプラットフォーム(300)の模式図を示
す。
Third Embodiment FIG. 3 is a schematic diagram of an optical module silicon platform (300) when applied to an optical transceiver module.

【0046】図3において、301は発光素子、302
は受光素子である。
In FIG. 3, reference numeral 301 denotes a light emitting element;
Is a light receiving element.

【0047】303はシリコン基板、304はSOB
(Silicon Opyical Bench )配線、305はSiO
化絶縁膜である。SOB配線(304)、グラウンド
(307)はSiO酸化絶縁膜(305)上に形成さ
れている。
303 is a silicon substrate, 304 is SOB
(Silicon Opyical Bench) wiring, 305 is a SiO 2 oxide insulating film. The SOB wiring (304) and the ground (307) are formed on the SiO 2 oxide insulating film (305).

【0048】一方引出し配線(308)は、SiO
化絶縁膜(305)上に形成されている誘電体膜(30
9)の上に形成されているが、そのボンディングパッド
(310)は、上記と同様に誘電体膜(309)が除去
されたSiO酸化絶縁膜(305)上に形成されてい
る。
On the other hand, the lead wiring (308) is formed on the dielectric film (30) formed on the SiO 2 oxide insulating film (305).
9), the bonding pad (310) is formed on the SiO 2 oxide insulating film (305) from which the dielectric film (309) has been removed in the same manner as described above.

【0049】図3において311は、ボンディングワイ
アーである。
In FIG. 3, reference numeral 311 denotes a bonding wire.

【0050】図1に示す実施の形態と同様の部分につい
ては詳細な説明は省略する。
A detailed description of the same parts as in the embodiment shown in FIG. 1 will be omitted.

【0051】その他の実施形態例 図4に光送受信モジュールに適用した場合のその他の実
施形態例の光モジュール用シリコンプラットフォーム
(400)の模式図を示す。
Other Embodiments FIG. 4 is a schematic view of an optical module silicon platform (400) of another embodiment when applied to an optical transceiver module.

【0052】本実施の形態の光モジュール用シリコンプ
ラットフォーム(400)の特徴は、発光素子(40
1)および受光素子(402)に接続される引き出し配
線(408)がボンディングワイヤーを介さずそれぞれ
の素子直下の部分まで延長したことである。
The feature of the optical module silicon platform (400) of the present embodiment is that the light emitting element (40)
1) and the lead-out wiring (408) connected to the light receiving element (402) is extended to a portion directly below each element without using a bonding wire.

【0053】このことにより、上記の実施の形態の光モ
ジュール用シリコンプラットフォームで必要であった引
出し配線(408)と発光素子(401)および受光素
子(402)間のボンディングワイヤーを不要にし、ワ
イヤーの寄生インダクタンスの抑制、製造工程の削減が
可能になることである。
This eliminates the need for the bonding wire between the lead-out wiring (408) and the light emitting element (401) and the light receiving element (402), which is required for the optical module silicon platform of the above embodiment. That is, the parasitic inductance can be suppressed and the number of manufacturing steps can be reduced.

【0054】本実施の形態では、シリコン基板(40
3)上のSiO酸化絶縁膜(405)の一部に高さ調
節のために厚膜SiO酸化絶縁膜(411)を設けて
いる。
In this embodiment, the silicon substrate (40
For height adjustment part 3) on the SiO 2 oxide insulating film (405) is provided with a thick SiO 2 oxide insulating film (411).

【0055】シリコン基板(403)に用いているSi
は通常レザーダイオードの放熱用ヒートシンクを兼ねて
おり、あまりSiO酸化絶縁膜(405)を厚くする
と放熱性が低下するため、SiO酸化絶縁膜の厚さは
せいぜい500nm程度である。
Si used for the silicon substrate (403)
Usually also serves as a radiation heat sink for laser diode, to lower the heat dissipation and to increase the much SiO 2 oxide insulating film (405), the thickness of the SiO 2 oxide insulating film is at most about 500 nm.

【0056】一方、Siは導電性であるため、Si/S
iO上に形成された配線部分には、寄生容量が付加さ
れる。従って、高周波特性を向上するためには、SiO
は厚いほうがよい。
On the other hand, since Si is conductive, Si / S
Parasitic capacitance is added to the wiring portion formed on iO 2 . Therefore, in order to improve the high frequency characteristics, it is necessary to use SiO 2
2 should be thicker.

【0057】本実施の形態例では、SiOを熱CVD
法でシリコン基板全面に2μm成膜し、リソグラフィに
よるパターニングとエッチングによって、ボンディング
パッド(409)直下と引き出し配線部の厚膜SiO
酸化絶縁膜(411)直下以外のSiO酸化絶縁膜部
分を500nmまで薄くした。これによって、放熱性を
損なわずに、寄生容量による高周波特性の劣化を防ぐこ
とができる。
In the present embodiment, SiO 2 is formed by thermal CVD.
A 2 μm film is formed on the entire surface of the silicon substrate by the lithography method, and a thick film SiO 2 just under the bonding pad (409) and the lead-out wiring portion is formed by patterning and etching by lithography.
The portion of the SiO 2 oxide insulating film other than immediately below the oxide insulating film (411) was thinned to 500 nm. As a result, it is possible to prevent high-frequency characteristics from deteriorating due to parasitic capacitance without impairing heat dissipation.

【0058】図1に示す実施の形態と同様の部分につい
ては詳細な説明は省略する。
Detailed description of the same parts as in the embodiment shown in FIG. 1 is omitted.

【0059】また、上記の実施の形態では、光素子と外
部の光ファイバを直接結合させる光モジュールを中心に
説明したが、シリコン基板上に受光素子、発光素子と伴
に、平面導波路(PLC)を搭載し、該導波路を介して
光ファイバとの結合を行う光モジュールなど、各種の光
モジュールに適用することができることは当然である。
In the above embodiment, the optical module for directly coupling an optical element and an external optical fiber has been mainly described. However, a planar waveguide (PLC) is provided on a silicon substrate together with a light receiving element and a light emitting element. ) Can be naturally applied to various optical modules such as an optical module that couples to an optical fiber via the waveguide.

【0060】なお、本発明は、上記した実施の形態に限
定されるものではなく、例えば、光モジュール用シリコ
ンプラットフォームは光ファイバとの接続を容易にする
ためにリードフレームの端部に設置される。一方、ドラ
イバーIC、リードフレームのピン配置によってはリー
ドフレームの後方に配置したほうが望ましい場合もあり
うる。
The present invention is not limited to the above-described embodiment. For example, a silicon platform for an optical module is installed at an end of a lead frame to facilitate connection with an optical fiber. . On the other hand, depending on the driver IC and the pin arrangement of the lead frame, it may be desirable to arrange it behind the lead frame.

【0061】[0061]

【発明の効果】以上説明したように、本発明の光モジュ
ール用シリコンプラットフォームによれば、発光素子と
引き出し配線間のインピーダンス整合を可能にし、高速
伝送可能な小型光モジュールを、低コストに提供され
る。
As described above, according to the silicon platform for an optical module of the present invention, it is possible to provide a small-sized optical module capable of high-speed transmission by enabling impedance matching between a light emitting element and a lead wiring at low cost. You.

【0062】即ち、本第1の発明によれば、受発光素子
の引き出し配線部の配線電極のボンディングパッド以外
の部分は、厚さ数μm程度の誘電体膜上に形成すること
ができるので、配線幅を100μm以下にしても、レー
ザーダイオードの直列抵抗と引き出し配線部分の特性イ
ンピーダンスの整合を取ることができる。
That is, according to the first aspect of the present invention, the portions other than the bonding pads of the wiring electrodes of the lead wiring portion of the light emitting / receiving element can be formed on the dielectric film having a thickness of about several μm. Even if the wiring width is 100 μm or less, matching between the series resistance of the laser diode and the characteristic impedance of the lead-out wiring portion can be achieved.

【0063】一方、基板上に形成したボンディングパッ
ド部分は、ワイヤーボンディングする際に衝撃を受けて
も誘電体膜と異なり剥がれることが無いので、引き出し
配線部の損傷がなくなり実装・組み立てが容易となる。
On the other hand, the bonding pad portion formed on the substrate does not peel off unlike a dielectric film even when subjected to an impact during wire bonding, so that the lead-out wiring portion is not damaged and mounting and assembly are facilitated. .

【0064】よって、小型、かつ高集積化した高速伝送
可能な光モジュールが低コストに提供される。
Accordingly, an optical module that is compact, highly integrated, and capable of high-speed transmission is provided at low cost.

【0065】また、本第2の発明の光モジュール用シリ
コンプラットフォームによれば、引き出し配線部分が、
マイクロストリップライン構造となっているので、受発
光素子と引き出し配線部間の特性インピーダンスの整合
をより容易に取ることができる。
According to the silicon platform for an optical module of the second aspect of the present invention,
Because of the microstrip line structure, matching of the characteristic impedance between the light emitting / receiving element and the lead-out wiring portion can be more easily achieved.

【0066】したがって、より小型、かつ高集積化した
高速伝送可能な光モジュールが低コストに提供される。
Therefore, an optical module which is smaller, highly integrated, and capable of high-speed transmission is provided at low cost.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る光モジュール用シリコンプラット
フォームの第1の実施形態を示す説明図で、(a)は断
面図、(b)は平面図である。
FIG. 1 is an explanatory view showing a first embodiment of a silicon platform for an optical module according to the present invention, wherein (a) is a cross-sectional view and (b) is a plan view.

【図2】本発明に係る光モジュール用シリコンプラット
フォームの第2の実施形態を示す説明図で、(a)は断
面図、(b)は平面図である。
FIGS. 2A and 2B are explanatory views showing a second embodiment of the silicon platform for an optical module according to the present invention, wherein FIG. 2A is a cross-sectional view and FIG.

【図3】本発明に係る光モジュール用シリコンプラット
フォームの第3の実施形態を示す説明図で、(a)は断
面図、(b)は平面図である。
3A and 3B are explanatory views showing a third embodiment of the silicon platform for an optical module according to the present invention, wherein FIG. 3A is a cross-sectional view and FIG. 3B is a plan view.

【図4】本発明に係る光モジュール用シリコンプラット
フォームのその他の実施形態を示す説明図で、(a)は
断面図、(b)は平面図である。
4A and 4B are explanatory views showing another embodiment of the silicon platform for an optical module according to the present invention, wherein FIG. 4A is a cross-sectional view and FIG. 4B is a plan view.

【図5】本発明に係る光モジュール用シリコンプラット
フォームの概念を示す説明図である。
FIG. 5 is an explanatory view showing the concept of a silicon platform for an optical module according to the present invention.

【図6】本発明に係る光モジュール用シリコンプラット
フォームを使用した光送受信モジュールの概念を示す説
明図である。
FIG. 6 is an explanatory view showing the concept of an optical transceiver module using a silicon platform for an optical module according to the present invention.

【図7】本発明に係る光モジュール用シリコンプラット
フォームを使用した発光素子アレイモジュールの概念を
示す説明図である。
FIG. 7 is an explanatory view showing the concept of a light emitting element array module using a silicon platform for an optical module according to the present invention.

【符号の説明】[Explanation of symbols]

100 光モジュール用シリコンプラットフォーム 101 レーザーダイオードアレイ 102 シリコン基板 103 SiO酸化絶縁膜 106 誘電体膜 107 引き出し配線 108 ボンディングパッド 109 ボンディングワイヤーREFERENCE SIGNS LIST 100 silicon platform for optical module 101 laser diode array 102 silicon substrate 103 SiO 2 oxide insulating film 106 dielectric film 107 lead-out wiring 108 bonding pad 109 bonding wire

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5F073 AB05 AB28 BA02 CA12 EA14 FA07 FA13 FA18 5F088 BA02 BA15 BB01 FA05 GA03 JA03 LA01  ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F073 AB05 AB28 BA02 CA12 EA14 FA07 FA13 FA18 5F088 BA02 BA15 BB01 FA05 GA03 JA03 LA01

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 シリコン基板上に受発光素子を搭載する
光モジュール用シリコンプラットフォームであって、前
記シリコン基板上に誘電体膜が形成され、前記誘電体膜
上に前記受発光素子の引き出し配線部が設けられ、前記
引き出し配線部のボンディングパッド部はシリコン基板
上の誘電体膜が除去された状態で形成されていることを
特徴とする光モジュール用シリコンプラットフォーム。
1. A silicon platform for an optical module, on which a light emitting / receiving element is mounted on a silicon substrate, wherein a dielectric film is formed on the silicon substrate, and a lead-out wiring part of the light emitting / receiving element on the dielectric film. Wherein the bonding pad portion of the lead-out wiring portion is formed in a state where the dielectric film on the silicon substrate is removed.
【請求項2】 前記引き出し配線部分が、マイクロスト
リップライン構造となっていることを特徴とする請求項
1記載の光モジュール用シリコンプラットフォーム。
2. The silicon platform for an optical module according to claim 1, wherein the lead wiring portion has a microstrip line structure.
JP20916399A 1999-07-23 1999-07-23 Silicon platform for optical module Expired - Fee Related JP3434473B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP20916399A JP3434473B2 (en) 1999-07-23 1999-07-23 Silicon platform for optical module
CA002331970A CA2331970A1 (en) 1999-07-23 2001-01-19 Silicon platform for optical modules

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP20916399A JP3434473B2 (en) 1999-07-23 1999-07-23 Silicon platform for optical module
CA002331970A CA2331970A1 (en) 1999-07-23 2001-01-19 Silicon platform for optical modules

Publications (2)

Publication Number Publication Date
JP2001036182A true JP2001036182A (en) 2001-02-09
JP3434473B2 JP3434473B2 (en) 2003-08-11

Family

ID=25682346

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (2)

Country Link
JP (1) JP3434473B2 (en)
CA (1) CA2331970A1 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6934448B2 (en) 2001-12-27 2005-08-23 Hitachi, Ltd. Optical element-mounting substrate and method of producing the same
US7355862B2 (en) 2003-03-11 2008-04-08 The Furukawa Electric Co., Ltd. Printed wiring board, method of manufacturing the printed wiring board, lead frame package, and optical module
JP2010157763A (en) * 2010-03-11 2010-07-15 Sanyo Electric Co Ltd Semiconductor laser apparatus, optical pickup apparatus and optical recording medium driving apparatus
JP2014036100A (en) * 2012-08-08 2014-02-24 Furukawa Electric Co Ltd:The Optical module
US8923659B2 (en) 2012-03-19 2014-12-30 Fujitsu Limited Optical switching apparatus and method
CN107658691A (en) * 2016-07-26 2018-02-02 新光电气工业株式会社 Optical semiconductor device
JP2019036624A (en) * 2017-08-15 2019-03-07 日本電信電話株式会社 Optical device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6934448B2 (en) 2001-12-27 2005-08-23 Hitachi, Ltd. Optical element-mounting substrate and method of producing the same
US7355862B2 (en) 2003-03-11 2008-04-08 The Furukawa Electric Co., Ltd. Printed wiring board, method of manufacturing the printed wiring board, lead frame package, and optical module
CN100440500C (en) * 2003-03-11 2008-12-03 古河电气工业株式会社 Printed wiring board, method for manufacturing same, lead frame package and optical module
US7832092B2 (en) 2003-03-11 2010-11-16 The Furukawa Electric Co., Ltd. Method of manufacturing a printed wiring board lead frame package
JP2010157763A (en) * 2010-03-11 2010-07-15 Sanyo Electric Co Ltd Semiconductor laser apparatus, optical pickup apparatus and optical recording medium driving apparatus
US8923659B2 (en) 2012-03-19 2014-12-30 Fujitsu Limited Optical switching apparatus and method
JP2014036100A (en) * 2012-08-08 2014-02-24 Furukawa Electric Co Ltd:The Optical module
CN107658691A (en) * 2016-07-26 2018-02-02 新光电气工业株式会社 Optical semiconductor device
CN107658691B (en) * 2016-07-26 2021-08-10 新光电气工业株式会社 Optical semiconductor device
JP2019036624A (en) * 2017-08-15 2019-03-07 日本電信電話株式会社 Optical device

Also Published As

Publication number Publication date
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CA2331970A1 (en) 2002-07-19

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