JP2001035838A - Manufacture of silicon carbide semiconductor element - Google Patents
Manufacture of silicon carbide semiconductor elementInfo
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- JP2001035838A JP2001035838A JP20705899A JP20705899A JP2001035838A JP 2001035838 A JP2001035838 A JP 2001035838A JP 20705899 A JP20705899 A JP 20705899A JP 20705899 A JP20705899 A JP 20705899A JP 2001035838 A JP2001035838 A JP 2001035838A
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Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は炭化珪素(以下Si
Cと記す)を材料とする半導体素子の製造方法に関す
る。The present invention relates to silicon carbide (hereinafter referred to as Si)
C) as a material.
【0002】[0002]
【従来の技術】近年、珪素(以下Siと記す)に代わる
半導体材料の一つとしてSiCが注目されている。Si
Cは、バンドギャップが4H−SiCで3.25eVと、
Siのそれ(1.12eV)に比べて3倍近く大きいた
め、動作上限温度を高くできる。また、絶縁破壊電界強
度が4H−SiCで3.0MV/cm と、Siのそれ(0.
25MV/cm)に比べて約1桁大きいため、絶縁破壊電界
強度の3乗の逆数で効いてくるオン抵抗が低減され、定
常状態でのパワーロスを低減できる。更に、熱伝導度も
4H−SiCで4.9W/cmK とSiのそれ(1.5W/cm
K )に比べて3倍以上高いので、熱冷却効果が高く冷却
装置を小型化できるという利点も生まれる。2. Description of the Related Art In recent years, attention has been paid to SiC as one of semiconductor materials replacing silicon (hereinafter referred to as Si). Si
C has a band gap of 4.25 eV in 4H-SiC,
Since it is nearly three times as large as that of Si (1.12 eV), the operating upper limit temperature can be increased. Further, the breakdown electric field strength of 3.0 MV / cm for 4H-SiC is higher than that of Si (0.
25 MV / cm), which is about one order of magnitude larger, so that the on-resistance that is effective by the reciprocal of the cube of the breakdown electric field strength is reduced, and power loss in a steady state can be reduced. Furthermore, the thermal conductivity of 4.9 W / cmK for 4H-SiC and that of Si (1.5 W / cmK)
Since it is at least three times higher than that of K), there is an advantage that the cooling effect is high and the size of the cooling device can be reduced.
【0003】このようなことからSiCは、パワーデバ
イスや高周波デバイス、高温動作デバイスなどへの応用
が期待されている。現在、MOSFET、pnダイオー
ド、ショットキーダイオード等が試作され、絶縁耐圧と
オン抵抗に関してはSiの特性を越えるデバイスが続出
している。[0003] For these reasons, SiC is expected to be applied to power devices, high-frequency devices, high-temperature operating devices, and the like. At present, MOSFETs, pn diodes, Schottky diodes, and the like have been prototyped, and devices that exceed the characteristics of Si in terms of withstand voltage and on-resistance continue to appear.
【0004】これらの素子作成には、選択した領域に導
電型やキャリア濃度を制御する技術が必要である。その
方法には、熱拡散法とイオン注入法がある。SiC 中
においては不純物の拡散係数が非常に小さいため、Si
半導体子で広く用いられている熱拡散法はSiCには適
用が難しい。そのため、SiCでは通常イオン注入法が
用いられている。[0004] In order to produce these devices, a technique for controlling the conductivity type and carrier concentration in a selected region is required. The method includes a thermal diffusion method and an ion implantation method. Since the diffusion coefficient of impurities is very small in SiC,
The thermal diffusion method widely used for semiconductor chips is difficult to apply to SiC. Therefore, the ion implantation method is usually used in SiC.
【0005】注入されるイオン種としては、n型に対し
ては窒素(以下Nと記す)リン(以下Pと記す)が用い
られ、p型に対してはアルミニウム(以下Alと記す)
またはほう素(以下Bと記す)が多く用いられる。As ion species to be implanted, nitrogen (hereinafter referred to as N) and phosphorus (hereinafter referred to as P) are used for the n-type, and aluminum (hereinafter referred to as Al) for the p-type.
Alternatively, boron (hereinafter referred to as B) is often used.
【0006】イオン注入とそれに引き続くプロセスは、
以下のように行われる。先ず、選択的なイオン注入のた
めには、マスクとしてレジストや酸化膜などの皮膜形成
とパターニングをおこなった後、イオン注入をおこな
う。この場合、イオン注入による結晶ダメージを最小限
に抑えるため時として数100℃〜1000℃の雰囲気
中においてイオン注入が行われる。[0006] The ion implantation and the subsequent process are as follows:
It is performed as follows. First, for selective ion implantation, a film such as a resist or an oxide film is formed and patterned as a mask, and then ion implantation is performed. In this case, ion implantation is sometimes performed in an atmosphere at a temperature of several 100 ° C. to 1000 ° C. in order to minimize crystal damage due to the ion implantation.
【0007】注入後はマスクとしたレジストや酸化膜な
どを全て除去し、SiC表面が露出した状態にする。こ
れは、その後の高温アニール時にSiC上に熱酸化膜な
どが堆積されているとSiCとの反応が起こり、エッチ
ングが起こることを防ぐためである。特に、イオン注入
された領域には結晶ダメージがあり、各原子間の結合力
が弱いため他の領域よりエッチングされやすいので注意
が必要である。After the implantation, all the resist, oxide film and the like used as a mask are removed to leave the SiC surface exposed. This is because if a thermal oxide film or the like is deposited on the SiC during the subsequent high-temperature annealing, a reaction with the SiC occurs to prevent the etching from occurring. In particular, attention must be paid to the fact that the ion-implanted region has crystal damage and is weaker in bonding strength between atoms, so that it is more easily etched than other regions.
【0008】その後、注入された不純物を電気的に活性
化するための高温アニールをおこなう。不純物を完全に
活性化するためには、N、Alでは1500℃、Bでは
1700℃の高温が必要である。高温アニール時には、
イオン注入したSiCのサンプルは多結晶SiC容器中
に入れられる。これは、高温における表面近傍の原子の
昇華を防止するためである。Thereafter, high-temperature annealing for electrically activating the implanted impurities is performed. In order to completely activate the impurities, a high temperature of 1500 ° C. is required for N and Al, and 1700 ° C. for B. During high temperature annealing,
The ion-implanted SiC sample is placed in a polycrystalline SiC container. This is to prevent sublimation of atoms near the surface at high temperatures.
【0009】高温アニール後には、その後のプロセス前
に表面清浄化をおこなう。表面清浄化のための前処理法
としては例えば、過酸化水素溶液を用いる、下記のよう
ないわゆるRCA洗浄法が知られている。After the high-temperature annealing, the surface is cleaned before the subsequent process. As a pretreatment method for surface cleaning, for example, the following so-called RCA cleaning method using a hydrogen peroxide solution is known.
【0010】まず、有機物、貴金属の除去のために硫酸
過水(H2 SO4 :H2 O2 = 4:1、120〜150
℃)により10分処理した後、自然酸化膜の除去のため
に希HF(0.5%、RT)処理を行う。その後、自然
酸化膜中に存在するパーティクルを除去するために水酸
化アンモニウム(NH4 OH:H2 O2 :H2 O=0.
05:1:5、80〜90℃)処理を行う。その後、自
然酸化膜中に存在していた金属を除去するために塩酸過
水(HCl:H2 O2 :H2 O=1:1: 6、80〜9
0℃)処理を行う。最後に、これらのプロセス中で新た
に生じた自然酸化膜を除去するために再度希HF処理を
行う。これらの処理の間には純水により5分程度のリン
スをおこなう。この後、例えば絶縁ゲート構造のMOS
素子の場合には、熱酸化膜を形成する。また、ショット
キーダイオードの場合は、ショットキー電極を形成す
る。First, in order to remove organic substances and precious metals, sulfuric acid and hydrogen peroxide (H 2 SO 4 : H 2 O 2 = 4: 1, 120 to 150)
C.) for 10 minutes, and then a dilute HF (0.5%, RT) treatment is performed to remove the natural oxide film. Thereafter, ammonium hydroxide (NH 4 OH: H 2 O 2 : H 2 O = 0.0) is used to remove particles existing in the natural oxide film.
05: 1: 5, 80-90 ° C.). Thereafter, Nature hydrochloric acid to remove metals that were present in the oxide film peroxide (HCl: H 2 O 2: H 2 O = 1: 1: 6,80~9
(0 ° C.). Finally, a dilute HF treatment is performed again to remove a natural oxide film newly generated in these processes. Rinse with pure water for about 5 minutes between these treatments. Thereafter, for example, MOS having an insulated gate structure
In the case of an element, a thermal oxide film is formed. In the case of a Schottky diode, a Schottky electrode is formed.
【0011】[0011]
【発明が解決しようとする課題】上記の高温アニールの
前には、熱処理用の容器内を十分真空引き、ガス置換等
をおこなうが、水分や残留空気など若干の残留成分が存
在する。この微量の残留水分、酸素などがSiC表面と
高温アニール中に反応すると、表面酸化膜ができてしま
う。Prior to the above-described high-temperature annealing, the inside of the heat treatment container is sufficiently evacuated and replaced with gas. However, some residual components such as moisture and residual air are present. If the trace amounts of residual moisture, oxygen, and the like react with the SiC surface during high-temperature annealing, a surface oxide film is formed.
【0012】水分などのヒータ上の表面吸着物が、加熱
時に脱離してSiC表面へ堆積して自然酸化膜となった
り、ヒータ材料自体が蒸発して、SiC表面上へ堆積す
ることもある。また、高温アニールにより、SiC中の
蒸気圧の高いSiが優先的に蒸発して、表面がC(炭
素)リッチとなることもある。[0012] The surface adsorbed substances on the heater such as moisture may be desorbed during heating and deposited on the SiC surface to form a natural oxide film, or the heater material itself may evaporate and deposit on the SiC surface. In addition, by high-temperature annealing, Si having a high vapor pressure in SiC may be preferentially evaporated, and the surface may become C (carbon) rich.
【0013】更にエピタキシャルウェハの場合には、通
常、表面が(0001)面から<11−20>または<
1−100>方向に数度傾くように研磨されたオフ基板
を用いている。そしてエピタキシャル層はオフ方向に横
方向成長するため、最終的な表面の断面形状は、各原子
層が数nmの幅を持つステップ形状となっている。Further, in the case of an epitaxial wafer, the surface is usually <11-20> or <11-20> from the (0001) plane.
An off-substrate polished so as to be inclined several degrees in the <1-100> direction is used. Since the epitaxial layer grows laterally in the off direction, the sectional shape of the final surface is a step shape in which each atomic layer has a width of several nm.
【0014】1500℃以上の高温アニールにより、こ
の表面の各ステップが統合されて表面凹凸が激しくなる
ステップバンチングという現象が発生することがある。
このように、アニール後のSiC表面には好ましくない
堆積物が存在したり、組成が変化したり、表面形状が変
化したりしている。Due to the high-temperature annealing at 1500 ° C. or more, there is a case where a phenomenon called step bunching, in which the steps on the surface are integrated and the surface unevenness becomes severe, occurs.
As described above, undesirable deposits are present on the SiC surface after annealing, the composition is changed, and the surface shape is changed.
【0015】このような問題をさけるために清浄化処理
をおこなうが、もし、清浄化が不十分なままプロセスを
続行しデバイスを作製すると、例えばショットキーバリ
アダイオードにおいては障壁高さが減少して、逆方向バ
イアス時のリーク電流が増加したり、耐圧が低下するな
どの問題が発生する。また、MOSFETにおいては、
酸化膜と半導体との界面にキャリアが蓄積したり、移動
キャリアが表面凹凸により散乱されたりして移動度が低
下するという問題を生じる。従って、高温アニール後に
は、一旦、酸化膜を形成し、その酸化膜除去をおこなう
ことが勧められている。In order to avoid such a problem, a cleaning process is performed. However, if the process is continued with insufficient cleaning to produce a device, for example, in a Schottky barrier diode, the barrier height is reduced. However, problems such as an increase in leakage current at the time of reverse bias and a decrease in breakdown voltage occur. In MOSFET,
There is a problem that carriers are accumulated at the interface between the oxide film and the semiconductor, and that the moving carriers are scattered due to surface irregularities, thereby lowering the mobility. Therefore, it is recommended to form an oxide film once after the high-temperature annealing and to remove the oxide film.
【0016】図2(a)ないし(c)はその工程を説明
する工程順の断面図である。基板1上にエピタキシャル
層2を成長し、そのエピタキシャル層2の表面層にイオ
ン注入層3を形成したウェハに、過酸化水素溶液を用い
た上述のRCA洗浄をおこなう[図2(a)]。RCA
洗浄により容器壁からのヒータ材料金属の堆積物、アニ
ール中に形成された自然酸化膜をある程度除去すること
ができる。FIGS. 2A to 2C are sectional views in the order of steps for explaining the steps. The above-mentioned RCA cleaning using a hydrogen peroxide solution is performed on a wafer having an epitaxial layer 2 grown on a substrate 1 and an ion-implanted layer 3 formed on the surface layer of the epitaxial layer 2 [FIG. 2 (a)]. RCA
By cleaning, deposits of the heater material metal from the container wall and natural oxide films formed during annealing can be removed to some extent.
【0017】その後、水素(以下H2 と記す)と酸素
(以下O2 と記す)との混合ガスによるパイロジェニッ
ク酸化を1100℃、5時間おこなって膜厚30nm程度
の熱酸化膜4を形成する[同図(b)]。Thereafter, pyrogenic oxidation is performed at 1100 ° C. for 5 hours with a mixed gas of hydrogen (hereinafter referred to as H 2 ) and oxygen (hereinafter referred to as O 2 ) to form a thermal oxide film 4 having a thickness of about 30 nm. [FIG. 2 (b)].
【0018】BHF溶液により10分間エッチングを行
い、熱酸化膜4を除去して清浄な表面を出現させる[同
図(c)]。酸化膜を成膜し、BHF溶液で酸化膜を除
去することにより、Cリッチ層が形成されていれば熱酸
化時にCOあるいはCO2 として除去される。このた
め、このプロセスの後では化学量論組成に近いSiC表
面とすることができる。Etching is performed for 10 minutes using a BHF solution to remove the thermal oxide film 4 to make a clean surface appear (FIG. 3C). By forming an oxide film and removing the oxide film with a BHF solution, if a C-rich layer is formed, it is removed as CO or CO 2 during thermal oxidation. For this reason, after this process, a SiC surface close to the stoichiometric composition can be obtained.
【0019】しかし、酸化膜形成と除去には長時間を要
する難点がある。このような問題に鑑み本発明の目的
は、アニール後のSiC表面の異常堆積物、組成変化、
表面形状の変化等の影響を除去し、良好な特性のデバイ
スを作製する方法を提供することにある。However, there is a problem that it takes a long time to form and remove the oxide film. In view of such problems, an object of the present invention is to provide an abnormal deposit on the SiC surface after annealing, a change in composition,
An object of the present invention is to provide a method for manufacturing a device having good characteristics by removing the influence of a change in surface shape or the like.
【0020】[0020]
【課題を解決するための手段】上記の問題点を解決する
ため本発明は、イオン注入された不純物を活性化するた
めのアニール後、プラズマによる表面エッチングをおこ
なうものとする。H2 とO2 との混合ガスを用いたプラ
ズマ、フッ素原子を含むガスを用いたプラズマ、溶融ア
ルカリ等の高温溶融塩による表面エッチングのいずれで
もよい。According to the present invention, in order to solve the above-mentioned problems, plasma etching is performed after annealing for activating ion-implanted impurities. Any of plasma using a mixed gas of H 2 and O 2 , plasma using a gas containing fluorine atoms, and surface etching using a high-temperature molten salt such as a molten alkali may be used.
【0021】H2 とO2 との混合ガスを用いれば、表面
がエッチング除去されるだけでなく、Cリッチ層やC原
子を含んだ表面汚染物がCOあるいCO2 として表面か
ら除外される効果がさらに高められる。When a mixed gas of H 2 and O 2 is used, not only is the surface etched away, but also a C-rich layer and surface contaminants containing C atoms are removed from the surface as CO or CO 2. The effect is further enhanced.
【0022】フッ素原子を含むガスは、H2 とO2 との
混合ガスのプラズマに比べて活性度が高いため、エッチ
ング速度が大きく、短時間でエッチングでき、しかも深
く大きな欠陥に対して効果が大きい。溶融アルカリ等の
高温溶融塩による表面エッチングもエッチング速度が大
きく、短時間でエッチングできる。これらによるエッチ
ングはステップバンチングや基板成長時に生じた表面凹
凸の除去に効果がある。Since the gas containing fluorine atoms has a higher activity than plasma of a mixed gas of H 2 and O 2 , the etching rate is high, the etching can be performed in a short time, and the effect on deep and large defects can be obtained. large. Surface etching with a high-temperature molten salt such as a molten alkali also has a high etching rate and can be etched in a short time. Etching by these is effective in removing step unevenness and surface irregularities generated during substrate growth.
【0023】[0023]
【発明の実施の形態】以下実施例に基づき、本発明の実
施の形態を説明する。 [実施例1]図1(a)、(b)は本発明の方法を説明
する工程順の断面図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below based on examples. [Embodiment 1] FIGS. 1 (a) and 1 (b) are sectional views in the order of steps for explaining a method of the present invention.
【0024】ウェハとしては、(0001)Si面から
8°オフした面のn型4H−SiCの基板1上にエピタ
キシャル層2を成長したエピタキシャルウェハを用い
た。基板1のキャリア濃度は1×1018/cm3であり、エ
ピタキシャル層2のキャリア濃度は1×1016/cm 3 、
厚さ10μm である。エピタキシャル層2の表面層に
は、0.5μmの深さまで、平均不純物濃度1×1018/
cm3のアルミニウム(以下Alと記す)のイオン注入層
3が形成されている。As the wafer, an epitaxial wafer in which an epitaxial layer 2 was grown on an n-type 4H-SiC substrate 1 at a plane 8 ° off from the (0001) Si plane was used. The carrier concentration of the substrate 1 is 1 × 10 18 / cm 3 , the carrier concentration of the epitaxial layer 2 is 1 × 10 16 / cm 3 ,
The thickness is 10 μm. The surface layer of the epitaxial layer 2 has an average impurity concentration of 1 × 10 18 /0.5 μm.
An ion implanted layer 3 of aluminum (hereinafter, referred to as Al) of cm 3 is formed.
【0025】Alイオン注入とそれに引き続く1500
℃、30分間の高温アニール後にRCA洗浄を以下の手
順でおこなった。まず、有機物、貴金属の除去のために
硫酸過水(H2 SO4 :H2 O2 = 4:1、120〜1
50℃)により10分処理した後、自然酸化膜の除去の
ために希HF(0.5%、RT)処理をおこなう。その
後、自然酸化膜中に存在するパーティクルを除去するた
めに水酸化アンモニウム(NHOH:H2 O2 :H2 O
=0.05:1:5、80〜90℃)処理をおこなう。
その後、自然酸化膜中に存在していた金属を除去するた
めに塩酸過水(HCl:H2 O2 :H2 O=1:1:
6、80〜90℃)処理をおこなう。最後に、これらの
プロセス中で新たに生じた自然酸化膜を除去するために
再度希HF処理をおこなう。これらの処理の間には純水
により5分程度のリンスをおこなう。[図1(a)]。Al ion implantation followed by 1500
After annealing at a high temperature of 30 ° C. for 30 minutes, RCA cleaning was performed in the following procedure. First, organic matter, SPM for the removal of precious metal (H 2 SO 4: H 2 O 2 = 4: 1,120~1
(50 ° C.) for 10 minutes, and then a dilute HF (0.5%, RT) treatment is performed to remove a natural oxide film. Thereafter, ammonium hydroxide (NHOH: H 2 O 2 : H 2 O) is used to remove particles existing in the natural oxide film.
= 0.05: 1: 5, 80-90 ° C.).
Then, in order to remove the metal present in the native oxide film, hydrochloric acid / hydrogen peroxide mixture (HCl: H 2 O 2 : H 2 O = 1: 1:
6, 80-90 ° C). Finally, a dilute HF treatment is performed again to remove a natural oxide film newly generated in these processes. Rinse with pure water for about 5 minutes between these treatments. [FIG. 1 (a)].
【0026】RCA洗浄が終わった後にH2 とO2 との
混合ガスのプラズマによるプラズマエッチングをおこな
う[同図(b)]。プラズマエッチングの条件は、H2
/ O 2 比=1、50Pa、RF200Wである。基板温度
は200〜300℃である。エッチング時間は15分で
120nmエッチングされた。従って、エッチング速度は
8nm/minとなる。After the RCA cleaning, HTwoAnd OTwo With
Performs plasma etching with mixed gas plasma
[FIG. (B)]. The condition of plasma etching is HTwo
/ O Two Ratio = 1, 50 Pa, RF200W. Substrate temperature
Is 200 to 300 ° C. The etching time is 15 minutes
It was etched by 120 nm. Therefore, the etching rate is
It becomes 8 nm / min.
【0027】上記のプラズマエッチングをおこなった表
面のオージェ電子分光分析(AES)をおこなったとこ
ろ、C/Si比は1.1で、表面組成が化学量論的な組
成に近づいていた。すなわち、従来のようなC/Si比
が1.5のCリッチ層は検出されなかった。Auger electron spectroscopy (AES) of the surface subjected to the plasma etching described above showed that the C / Si ratio was 1.1 and the surface composition was close to the stoichiometric composition. That is, a C-rich layer having a C / Si ratio of 1.5 as in the related art was not detected.
【0028】また、表面のAFM(原子間力顕微鏡)観
察をおこなったところ、研磨傷の深さや幅が軽減されて
おり、表面粗さRaは1nm以下であった。この値は従来の
約1/5に相当する。When the surface was observed by AFM (atomic force microscope), the depth and width of the polishing flaw were reduced, and the surface roughness Ra was 1 nm or less. This value corresponds to about 1/5 of the conventional value.
【0029】さらに、このウェハを用いてニッケル(N
i)をバリア金属とするショットキーバリアダイオード
を作製したところ、障壁高さが従来の1.3eVから1.
6eVへ増加し、逆方向バイアス時のリーク電流も−20
0Vにおいて10-3A/cm2から10-6A/cm2へ減少した。Further, nickel (N
When a Schottky barrier diode using i) as a barrier metal was fabricated, the barrier height was increased from 1.3 eV to 1.
Increased to 6 eV and leakage current at reverse bias was -20
At 0 V, it decreased from 10 −3 A / cm 2 to 10 −6 A / cm 2 .
【0030】また、このウェハを用いてMOSFETを
作製し、CV測定をおこなったところ、界面準位は処理
をしない場合の1013/cm2から1012/cm2へと減少し
た。キャリア移動度も、本発明の処理をすることによっ
て、20から60cm2/Vsへと増加した。すなわち、本発
明の方法では、僅か15分のエッチングにもかかわら
ず、表面の清浄化が十分におこなわれたことがわかる。When a MOSFET was fabricated using this wafer and CV measurement was performed, the interface state was reduced from 10 13 / cm 2 when no treatment was performed to 10 12 / cm 2 . Carrier mobility was also increased from 20 to 60 cm 2 / Vs by the treatment of the present invention. That is, it can be seen that the surface of the method of the present invention was sufficiently cleaned despite the etching of only 15 minutes.
【0031】プラズマエッチング用のガスとしては、上
記のH2 、O2 の混合ガス以外に、臭化ふっ化炭素(C
BrF3 )、四ふっ化炭素(CF4 )、六ふっ化硫黄
(SF 6 )、三ふっ化窒素(NF3 )などのふっ素原子
(F)を含むガスが用いられる。エッチング速度は例え
ばNF3 を用いた場合においては50〜200nm/minで
あり、H2 とO2 の混合ガスプラズマの場合より更に1
桁エッチング速度を速くできる。As the plasma etching gas,
HTwo, OTwoOther than the mixed gas of carbon bromide (C)
BrFThree ), Carbon tetrafluoride (CFFour ), Sulfur hexafluoride
(SF 6 ), Nitrogen trifluoride (NFThree ) And other fluorine atoms
A gas containing (F) is used. Etching rate
NFThree At 50-200 nm / min
Yes, HTwoAnd OTwo 1 more than in the case of mixed gas plasma
Digit etching speed can be increased.
【0032】[実施例2]実施例1のRCA洗浄が終了
後に、例えばアルカリ等の高温溶融塩によるエッチング
をおこなっても良い。[Second Embodiment] After the RCA cleaning of the first embodiment is completed, etching may be performed using a high-temperature molten salt such as an alkali.
【0033】水酸化カリウム(KOH)をNiるつぼ中
に入れ、外部のセラミックヒータにより460℃に加熱
して溶融させ、その中にエピタキシャルウェハを浸して
エッチングした。周囲の雰囲気は乾燥空気とした。Potassium hydroxide (KOH) was placed in a Ni crucible, heated to 460 ° C. by an external ceramic heater and melted, and an epitaxial wafer was immersed in the melt and etched. The surrounding atmosphere was dry air.
【0034】エッチング時間を10秒としたところ、約
0.1μmエッチングされた。従って、エッチング速度
は0.8μm/minである。溶融KOHによるエッチング
をおこなったウェハにおける表面の特性は実施例1とほ
ぼ同等であった。KOHの入手は容易であり、それほど
高温も要しないので、本実施例の方法は極めて容易に実
行でき、しかも十分な清浄化効果が得られる。When the etching time was set to 10 seconds, about 0.1 μm was etched. Therefore, the etching rate is 0.8 μm / min. The surface characteristics of the wafer etched with molten KOH were almost the same as those in Example 1. Since KOH is easily available and does not require a very high temperature, the method of this embodiment can be carried out extremely easily, and a sufficient cleaning effect can be obtained.
【0035】[0035]
【発明の効果】以上説明したように本発明によれば、水
素と酸素との混合ガスのプラズマ、フッ素原子を含むガ
スのプラズマ等で表面エッチングをおこなうことによ
り、SiC表面の異常堆積物、組成変化、表面形状の変
化等の影響を除去し、良好な特性のSiC半導体デバイ
スを作製することができる。溶融アルカリ等の高温溶融
塩中において表面エッチングをおこなっても同様の効果
が得られることを示した。従って本発明は、炭化珪素半
導体素子の普及、発展に大きな貢献をなすものである。As described above, according to the present invention, by performing surface etching with a plasma of a mixed gas of hydrogen and oxygen, a plasma of a gas containing fluorine atoms, etc., abnormal deposits and compositions on the SiC surface can be obtained. By removing the influence of the change, the change in the surface shape, and the like, a SiC semiconductor device having good characteristics can be manufactured. It has been shown that the same effect can be obtained by performing surface etching in a high-temperature molten salt such as a molten alkali. Therefore, the present invention makes a great contribution to the spread and development of silicon carbide semiconductor devices.
【図1】(a)、(b)は本発明の前処理方法を説明す
る工程順の断面図FIGS. 1A and 1B are cross-sectional views in the order of steps for explaining a pretreatment method of the present invention.
【図2】(a)ないし(c)は従来の前処理方法を説明
する工程順の断面図FIGS. 2A to 2C are cross-sectional views in the order of steps for explaining a conventional pretreatment method.
1 … サブストレート 2 … エピタキシャル層 3 … イオン注入層 4 … 熱酸化膜 1… Substrate 2… Epitaxial layer 3… Ion implanted layer 4… Thermal oxide film
Claims (5)
のアニール後、プラズマによる表面エッチングをおこな
うことを特徴とするに炭化珪素半導体素子の製造方法。1. A method of manufacturing a silicon carbide semiconductor device, comprising performing surface etching by plasma after annealing for activating an ion-implanted impurity.
により表面エッチングすることを特徴とする請求項1に
記載の炭化珪素半導体素子の製造方法。2. The method according to claim 1, wherein the surface is etched by plasma using a mixed gas of hydrogen and oxygen.
より表面エッチングすることを特徴とする請求項1に記
載の炭化珪素半導体素子の製造方法。3. The method according to claim 1, wherein the surface is etched by plasma using a gas containing a fluorine atom.
のアニール後、高温溶融塩中において表面エッチングを
おこなうことを特徴とする炭化珪素半導体素子の製造方
法。4. A method for manufacturing a silicon carbide semiconductor device, comprising performing surface etching in a high-temperature molten salt after annealing for activating an ion-implanted impurity.
なうことを特徴とする請求項4に記載の炭化珪素半導体
素子の製造方法。5. The method of manufacturing a silicon carbide semiconductor device according to claim 4, wherein the surface is etched with a molten alkali.
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