JP2001034502A - Information processor and its voltage control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an information processor which can identify an optimum voltage at power-on time on a system device even in case of a defective having a deficiency in voltage margin, improve the yield of a semiconductor device, and secure high reliability by adjusting an optimally the operating voltage. SOLUTION: This is a system device which is composed of units such as a power unit 10 and a CPU board 20 and on the CPU board 20, multiple processors 21, multiple VRAMs 22 which supply voltages to the processors 21, a voltage control microcomputer 23 which performs control so that the voltages of the processors are set in the respective VRAMs 22, ROM 24 for program storage, etc., are mounted. At power-on time, the voltage control microcomputer 23 vary the supply voltages of the processors 21, and tests are conducted with the respective voltages to find optimum voltages for the processor 21, which are placed in operation with the optimum voltages.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage control technique for an information processing apparatus, and more particularly to information for improving the yield of semiconductor devices and optimizing a voltage margin to realize high reliability against environmental changes. The present invention relates to a technology effective when applied to a processing device.

[0002]

2. Description of the Related Art For example, as a technique studied by the present inventor, a semiconductor device such as a microprocessor used in an information processing apparatus usually has a normal voltage (+5 V ± 5%, + 3.3%).
(V ± 5%, etc.), a voltage margin is secured, and those that do not operate at this normal voltage are treated as defective.

On the other hand, for example, June 2, 1997
Nikkei Electronics (no.
690) "P113-P122, the so-called VRM (Volt
The age regulation module has a different supply voltage for internal operation for each type of microprocessor, and the microprocessor has four signal pins for requesting the magnitude of the voltage (power) from the VRM. The microprocessor uses this pin to request a voltage in the range of + 2.1V to + 3.5V in 100mV increments. VRM is a technology that reads this code and supplies a necessary voltage to a microprocessor.

[0004]

By the way, with respect to the technology of the so-called VRM power supply module,
As a result of the study by the present inventors, the following has become clear. That is, since the power supply module has a voltage control signal output corresponding to a required voltage determined for each type of microprocessor, it is necessary to treat a microprocessor without a voltage margin as a defective product. Is a factor that lowers the yield.

Therefore, an object of the present invention is to pay attention to the above-mentioned factor for lowering the yield of semiconductor devices, and to operate even a defective product with insufficient voltage margin by identifying an optimum voltage at power-on on a system device. An information processing apparatus capable of improving the yield of semiconductor devices is provided.

Another object of the present invention is to secure high reliability by adjusting an optimum operating voltage with respect to changes in the device environment (ambient temperature, humidity, etc.). is there.

[0007]

In order to achieve the above object, the present invention provides a semiconductor device and a system device equipped with the semiconductor device, which identify an optimum voltage for each semiconductor device at power-on, and A function necessary for normal operation at an optimum voltage is added. That is, it has means for making the supply voltage of the semiconductor device variable and for causing the semiconductor device to perform a function test at each voltage.

In detail, the information processing apparatus according to the present invention finds an optimum voltage for each microprocessor, and in order to operate each microprocessor at the optimum voltage, a plurality of microprocessors and power are supplied to each microprocessor. A plurality of power supply modules to be supplied, respectively, and when the system power is turned on, each voltage varied within a predetermined range is supplied to each microprocessor to perform a voltage margin diagnosis, and based on a result of the voltage margin diagnosis, a microprocessor of each microprocessor is provided. Voltage control means for calculating an optimum voltage and controlling the calculated voltages to be set in the respective power supply modules corresponding to the respective microprocessors. It supplies electric power of various voltages.

In this configuration, the power supply of each microprocessor is supplied from a common channel, an optimum voltage for the device is found, and in order to operate at the optimum voltage, a single power supply module is provided, and voltage control means is provided. Is
The center voltage of each voltage of each microprocessor is calculated, the calculated center voltage is set in the power supply module, and power of the center voltage is commonly supplied from the power supply module to each microprocessor. .

Furthermore, in order to check even the frequency margin for the voltage, the operating clock frequency of each microprocessor is varied for each voltage, and the frequency margin diagnosis is performed.

In the voltage control method for an information processing apparatus according to the present invention, at the time of system power-on, a voltage margin diagnosis is performed by supplying each voltage varied within a predetermined range to each microprocessor; The method includes a step of calculating an optimum voltage of each microprocessor based on a result of the diagnosis, and a step of setting each of the calculated voltages to each power supply module corresponding to each microprocessor.

[0012]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is a block diagram showing a system apparatus equipped with a plurality of microprocessors as an embodiment of an information processing apparatus according to the present invention, and FIG. 2 is a system apparatus of the present embodiment. 3 is a flowchart for explaining a voltage control method, and FIG. 3 is a graph showing a voltage margin diagnosis result and a calculated optimum voltage.

First, an example of the configuration of the system device of the present embodiment will be described with reference to FIG. The system device of the present embodiment includes, for example, a power supply unit 10 and a CPU board 2
It is composed of units such as 0. On the CPU board 20, a plurality of processors (microprocessors) 21, a plurality of VRMs (power supply modules) 22 for respectively supplying a voltage (power) to each processor 21, and a voltage of each processor 21 is set to each VRM 22. A voltage control microcomputer (voltage control microcomputer: voltage control means) 23 for controlling, a ROM (Read Only) for storing programs
Memory) 24, a bus conversion module 25, and the like. Each processor 21 and ROM 24 are connected to a bus, respectively, and are connected via a bus conversion module 25.

The power supply unit 10 includes a 3.3 V DC power supply 31 and a DC 5 power supply for operating each unit on the CPU board 20.
V power supply 32 for generating the D power
The C 3.3 V power supply 31 is supplied to each processor 21, and the DC 5 V power supply 32 is connected to each VRM 22 and the voltage control microcomputer 2.
3 respectively.

Each processor 21 is a means for executing various controls and processes in the system device during a normal operation, and controls and processes based on a normal operation program stored in the ROM 24. Each processor 21 includes:
A 3.3 V DC power supply 31 is supplied directly from the power supply unit 10 for inputting an I / O section operation power supply, and a processor internal operation power supply 33 obtained by converting a 5 V DC power supply 32 via each VRM 22 is supplied and operated. Each of the processors 21 is controlled by the voltage control microcomputer 23 based on a voltage margin diagnosis program stored in the ROM 24 when the system power is turned on.

Each VRM 22 is a means for generating a processor internal operation power supply 33 from a DC 5 V power supply 32, and a DC 5 V power supply 32 supplied from the power supply unit 10.
Is converted into a processor internal operation power supply 33 and supplied to each processor 21.

When the system power is turned on, the voltage control microcomputer 23 supplies each processor 21 with a variable voltage within a predetermined range to perform a voltage margin diagnosis. Based on the result of the voltage margin diagnosis, the voltage control microcomputer 23 An optimum voltage is calculated, and each of the calculated voltages is assigned to each processor 2.
1 is a means for performing control so as to set each VRM 22 corresponding to 1.
1 to monitor a TestOK (diagnosis program normal end) signal 42 from each processor 21 and a TRST (diagnosis reset) signal 43, R
An ST (system reset) signal 44 is output. The voltage control microcomputer 23 includes a power supply unit 10
Is supplied with a DC5V power supply 32 to operate.

The ROM 24 is a means for storing various control programs, and includes a voltage margin diagnosis program area 24a for storing a program for executing a function test of the processor 21 and a program for executing a normal operation (initial operation). A normal operation program area 24b for storing diagnostics, BIOS, etc.) is provided.

In the above system configuration, each processor 21 fetches a program (instruction) from the ROM 24 and executes it.
When the ST signal 43 is asserted, the voltage margin diagnosis program area 24a is fetched, and when the RST signal 44 is asserted, the normal operation program area 24b is fetched and executed.

In particular, when the voltage margin diagnosis program is executed, the voltage control microcomputer 23
It monitors that the TestOK signal 42 from 1 is asserted within a specified time. When the TestOK signal 42 is asserted or a specified time has passed after waiting for the signal to be asserted, the voltage control microcomputer 23 stores the test result and performs voltage control to output the voltage of the next step to each VRM 22. The output of the signal 41 is changed, and the TRST signal 43 is asserted again. By executing this process for each step voltage, the optimum voltage of each processor 21 is determined. This optimum voltage is supplied from each VRM 22 to each processor 21.

Next, the operation of this embodiment will be described with reference to FIG.
The processing procedure of the voltage control method will be described based on the flowchart of FIG. In addition, the results of the voltage margin diagnosis of each processor 21 and the optimum voltages calculated from the results will be described with reference to the graph of FIG.

First, when the system device is powered on, a 3.3 V DC power supply 31 and a 5 V DC power supply 32 are supplied from the power supply unit 10 to the respective parts on the CPU board 20, and the voltage control microcomputer 23 operates (S201, 202).

Then, the voltage control microcomputer 23 first
The voltage control signal (1) 41 is output so that the output of the VRM (1) 22 for the processor (1) 21 becomes an initial value (S203). After confirming that the voltage of the processor internal operation power supply (1) 33 has reached the expected voltage, a TRST (1) signal 43 indicating reset of the voltage margin diagnosis is issued to the processor (1) 21 (S20).
4).

Further, upon receiving the TRST (1) signal 43, the processor (1) 21 loads the voltage margin diagnosis program from the voltage margin diagnosis program area 24a in the ROM 24, and executes the voltage margin diagnosis program (S205, S205). 206). After the execution, the voltage margin diagnosis program ends (S207).

At this time, whether or not the voltage margin diagnosis program has been normally completed is determined by the voltage control microcomputer 23 from the processor (1) 21 by sending a TestOK (1) signal 42 indicating that the voltage margin diagnosis program has been normally completed within a specified time. (S208).
If the TestOK (1) signal 42 is not asserted within the specified time, the result is inoperable.

Then, the voltage control microcomputer 23 stores the operation result of the voltage margin diagnosis program, and determines whether the test voltage has reached the final value of the predetermined range, for example, 3.5 V (S209, 210). . If the voltage has not reached 3.5 V, the processing from S203 is repeated, and the voltage control signal (1) is sent to the VRM (1) 22 to execute the voltage margin diagnosis program of the processor (1) 21 at the next voltage. After changing the output of 41 and confirming that the voltage of the processor internal operation power supply (1) 33 is output as expected, the TRST (1) signal 43 is asserted to execute the voltage margin diagnosis program. .

At this time, when the processor (1) 21 executes the voltage margin diagnosis program at each of 16 variable voltages (V = V + 0.1) in the range of 2.1 V to 3.5 V in steps of 100 mV, for example, Next processor (2
Regarding to (n) 21, the voltage margin diagnosis program is executed in the same procedure, and the diagnosis result is stored. The above processing is sequentially performed up to the processor (n) 21 (k = k +
1) Repeatedly (S211).

Subsequently, when the voltage margin diagnosis up to the processor (n) 21 is completed, the voltage control microcomputer 23
The optimum voltage of each processor (k: 1 to n) 21 is, for example, as shown in FIG. As each VRM
A voltage control signal (k) 41 corresponding to the optimum voltage is output to (k) 22 (S212, 213).

Center value = [(upper limit value−lower limit value) / 2 + lower limit value] Then, when the voltage control microcomputer 23 confirms that the processor internal operating power supply (k) 33 has the expected voltage, the system device RST (k) signal 44 indicating the reset of the system device is issued to each unit (S214). Each processor (k) 21 receiving the RST (k) signal 44 loads the normal operation program from the normal operation program area 24b in the ROM 24 and starts the normal operation starting from the initial diagnosis program (S215).

Therefore, according to the system apparatus of the present embodiment, the CPU board 20 on which a plurality of processors 21 and a plurality of VRMs 22 corresponding to each processor 21 are mounted.
A voltage control microcomputer 23 for controlling the voltage of each processor 21 to be set to each VRM 22 is mounted thereon, so that at power-on, the supply voltage of each processor 21 is made variable, and each processor 21 , The optimum voltage for each processor 21 is found, and each processor 21 can be operated at the optimum voltage.

Therefore, the processor 2 with insufficient voltage margin
Even in the case of 1, the operation can be performed by identifying the optimum voltage for each processor 21, the failure rate of each processor 21 can be reduced, and the reliability of the system device can be improved.

(Embodiment 2) The system apparatus of the present embodiment differs from the first embodiment in that each processor 21
And the processor internal operating power supply 33, which is separately supplied to the power supply. That is, in the present embodiment, the power supply of each processor 21 is supplied from a common channel, an optimum voltage is found as a system device, and the VRM 22 is set to one of a plurality of processors 21 in order to operate at the optimum voltage. And configured to be controlled by the voltage control microcomputer 23.

In this configuration, the voltage control microcomputer 23
In the same manner as in the first embodiment, the voltage is changed, and the operation result of each processor 21 at that time is stored. Based on this result, in the present embodiment, the optimum voltage is set as the center value of the voltage range in which all the processors 21 have normally completed the voltage margin diagnosis program. That is, a center voltage of a voltage range in which each processor 21 can operate is calculated, and the calculated center voltage is used as a common VRM 22.
Is set to VRM2 for each processor 21.
2 can supply an optimum center voltage as a system device in common.

Therefore, according to the system device of the present embodiment, it is possible to find the optimum voltage for the system device and operate at the optimum voltage. Rate can be reduced, the reliability of the system device can be improved, and the VRM 22 can be compared with the first embodiment.
Can be reduced.

(Embodiment 3) The system apparatus of the present embodiment confirms even the frequency margin with respect to the voltage in the first embodiment. That is, in the present embodiment, for each voltage, each processor 2
By executing the diagnostic program while changing the operation clock frequency of the first operation, the frequency margin for each voltage can be confirmed, and the operation reliability can be ensured.

Therefore, according to the system apparatus of the present embodiment, it is possible to confirm even the frequency margin for each voltage and secure the operation reliability. The defect rate can be reduced, the reliability of the system device can be improved, and the operation reliability can be further ensured by the optimum voltage including the frequency margin as compared with the first embodiment. Becomes possible.

The present invention is not limited to the above-described embodiment, and it goes without saying that various modifications can be made without departing from the scope of the invention. For example, the present invention is not limited to the processor, and can be similarly applied to other semiconductor devices.

[0039]

As described above, according to the present invention,
Even a semiconductor device with insufficient voltage margin can be operated by identifying the optimum voltage, the yield of the semiconductor device can be improved, and the cost of the semiconductor device can be reduced. In addition, when the system device is powered on, the optimum voltage is identified. If there is a change in the device environment (ambient temperature, humidity, etc.), the optimum voltage under that environment can be identified, and high reliability can be achieved. Can be secured.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a system device equipped with a plurality of microprocessors, which is an embodiment of an information processing device according to the present invention.

FIG. 2 is a flowchart illustrating a voltage control method in the system device according to the embodiment of the present invention;

FIG. 3 is a graph showing a voltage margin diagnosis result and a calculated optimum voltage in the system device according to the embodiment of the present invention;

[Explanation of symbols]

10 power supply unit, 20 CPU board, 21 processor, 22 VRM, 23 voltage control microcomputer, 24
... ROM, 24a ... voltage margin diagnosis program area
24b: normal operation program area, 25: bus conversion module, 31: 3.3V DC power supply, 32: 5V DC power supply,
33: Processor internal operating power supply, 41: Voltage control signal,
42 ... TestOK signal, 43 ... TRST signal, 44 ...
RST signal.

Claims (3)

[Claims] 1. A plurality of microprocessors, a plurality of power supply modules for respectively supplying power to each of the plurality of microprocessors, and supply of each voltage varied within a predetermined range to each of the microprocessors when a system power is turned on. To perform a voltage margin diagnosis, calculate an optimal voltage of each of the microprocessors based on the result of the voltage margin diagnosis, and apply the calculated voltages to the plurality of power supply modules corresponding to the microprocessors. An information processing apparatus, comprising: voltage control means for controlling so as to set the power supply; and supplying power of an optimal voltage from each of the power supply modules to each of the microprocessors. 2. The information processing apparatus according to claim 1, wherein
With the power supply module as one, the voltage control means calculates a center voltage of each voltage of each of the microprocessors, sets the calculated center voltage in the power supply module, and for each of the microprocessors An information processing apparatus, wherein power of a center voltage is commonly supplied from the power supply module. 3. A plurality of microprocessors, a plurality of power supply modules for respectively supplying power to each of the plurality of microprocessors, and a voltage for controlling a voltage of each of the microprocessors to be set to each of the plurality of power supply modules. A voltage control method for an information processing apparatus having control means, wherein at the time of system power-on, a voltage margin diagnosis is performed by supplying each voltage varied within a predetermined range to each of said microprocessors; Calculating an optimum voltage of each of the microprocessors based on a result of the margin diagnosis, and setting the calculated voltages to the plurality of power supply modules corresponding to the microprocessors. A voltage control method for an information processing apparatus characterized by the above-mentioned.