JP2001013180A - Signal analyzer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable broadband observation without missing a strong signal suddenly occurring with a simple configuration. SOLUTION: In this analyzer, a power/frequency detection means 21 detects an instantaneous power and instantaneous frequency of a signal within an analysis target band inputted to an input terminal 20a in parallel, and sequentially outputs them as digital values to a histogram detection means 40. The histogram detection means 40 receives the instantaneous power and instantaneous frequency sequentially outputted from the power/frequency detection means 21, and gets a two-dimensional histogram H(p, f) comprising pairs of the instantaneous powers and instantaneous frequencies. A characteristic estimation means process means 50 executes a process for characteristic estimation of the signal inputted to the input terminal 20a on the basis of the two-dimensional histogram H(p, f) detected by the histogram detection means 40. An output means 60 displays or prints the processed result from the characteristic estimation means process means 50, or output it to another device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal analyzer for use in observing an interfering wave in communication by radio waves or light so that a signal within an analysis band can be observed with a simple configuration without overlooking the signal. Related to the technology.

[0002]

2. Description of the Related Art When analyzing an interference wave or the like, it is necessary to observe at what frequency and at what intensity a signal exists.

Conventionally, a spectrum analyzer is mainly used to perform such observation.

Conventional spectrum analyzers include:
(A) a reception frequency sweep type for detecting while sweeping the reception frequency, and (b) an FFT for performing a fast Fourier transform operation on a data sequence obtained by sampling an input signal and detecting a level for each frequency. And (c) a parallel reception type in which a plurality of narrow-band receivers having different reception frequencies are provided in parallel to detect a level for each frequency, and there are three types of parallel reception types. It is possible to grasp the intensity of each signal.

[0005]

However, when observing an interference wave or the like using these conventional spectrum analyzers, there are the following problems.

In the case of the reception frequency sweeping type, since only one frequency signal is always received in the analysis target band, a suddenly strong signal other than the reception frequency is missed during the sweeping.

In the case of the FFT type, a band to be analyzed is limited by a sampling period, and a wide band analysis cannot be performed.

In the case of the parallel reception type, the circuit scale becomes very large, and the device itself becomes large and expensive.

SUMMARY OF THE INVENTION It is an object of the present invention to solve this problem and to provide a signal analyzer which has a simple configuration and enables wideband observation without overlooking a suddenly generated strong signal.

[0010]

According to a first aspect of the present invention, there is provided a signal analyzing apparatus comprising: an input terminal (2);
0a) and the power / frequency detecting means (2) for detecting the instantaneous power and the instantaneous frequency of the signal within the analysis target band inputted to the input terminal in parallel, and sequentially outputting the digital values.
1) and a histogram detection means (40) for receiving an instantaneous power and an instantaneous frequency sequentially output from the power / frequency detection means and obtaining a two-dimensional histogram in which the instantaneous power and the instantaneous frequency are paired, The signal input to the input terminal is analyzed based on the two-dimensional histogram detected by the histogram detecting means.

According to a second aspect of the present invention, in the signal analyzer of the first aspect, the power / frequency detecting means determines the intensity of a signal in the analysis target band input to the input terminal. A log video amplifier (29) for detecting and outputting an intensity signal corresponding to the signal intensity, and limitingly amplifying and outputting the input signal; , An instantaneous power and an instantaneous frequency are detected and output as digital values.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows the overall configuration of a signal analyzer 20 according to an embodiment of the present invention.

As shown in FIG. 1, the signal analyzer 20 includes an input terminal 20a for inputting a signal, a power / frequency detecting means 21, a histogram detecting means 40,
Characteristics evaluation processing means 50, output means 60 including a display device, a printing device or a communication device, and signal analysis device 20
And a control means 70 for switching the operation mode of the above.

The power / frequency detecting means 21 sequentially detects the instantaneous power and the instantaneous frequency of the signal component of the analysis target band of the signal S (t) input to the input terminal 20a at the same timing, and outputs a digital value. .

2 to 6 show power / frequency detecting means 21.
An example of a specific configuration will be shown. In the power / frequency detecting means 21 shown in FIG. 2, the signal S input to the input terminal 20a is
(T) is converted to a band to be analyzed (for example, 1 GHz ± 250 MH)
The signal component S (t) ′ of the band to be analyzed is extracted by input to the filter 22 having a pass band corresponding to z), and the signal component S (t) ′ is input to the amplifier 23.

The amplifier 23 has a signal component S in the band to be analyzed.
(T) ′ is logarithmically amplified and input to a power detection circuit 24 and a frequency-voltage conversion circuit 25.

The power detection circuit 24 detects the output signal of the amplifier 23 and changes the voltage according to the logarithmic value of the power of the signal component S (t) 'in the analysis target band.
(T) is output.

The frequency-to-voltage conversion circuit 25 comprises a frequency discrimination circuit, and outputs a discrimination signal Vf (t) whose voltage changes according to the frequency of the output signal of the amplifier 23.

The intensity signal Vp (t) output from the power detection circuit 24 is input to an A / D converter 26, and the discrimination signal Vf (t) output from the frequency / voltage conversion circuit 25 is A
/ D converter 27.

The two A / D converters 26 and 27 output the intensity signal Vp in synchronization with the same observation clock signal CK.
Since sampling is performed on (t) and the discrimination signal Vf (t), the A / D converters 26 and 27 at the same time (each sampling time t _S ) of the signal component S (t) ′ in the analysis target band. Are detected in parallel, and the instantaneous power data Dp and the instantaneous frequency data Df, which are converted into digital values, are output to the histogram detection means 40.

Note that the first sampling time is t₀ ,
The sampling period is T_S Then, the u-th sampling
Time t_S Is t_S = T₀ + (U-1) · T_S Is expressed as
The instantaneous power data and instantaneous frequency data
Are denoted as Dp (u) and Df (u), respectively.

The power / frequency detecting means 21 shown in FIG. 3 uses a frequency counting circuit 28 instead of the frequency / voltage converting circuit 25 and the A / D converter 27 shown in FIG.

The frequency counting circuit 28 includes an A / D converter 26
A clock signal CK that determines the sampling timing of the clock signal CK is received as a signal that determines the start timing of counting, and a certain time (1
The number of cycles of the signal output from the amplifier 23 is counted within a period of time equal to or less than the cycle), and the counting result is output as digital instantaneous frequency data Df.

The power / frequency detecting means 21 shown in FIGS. 4 and 5 is obtained by replacing the amplifier 23 and the power detecting circuit 24 shown in FIGS. 2 and 3 with a log video amplifier (LVA) 29.

The log video amplifier 29 logarithmically amplifies the input signal, outputs an intensity signal Vp (t) whose voltage changes according to the logarithmic value of the power of the signal, and makes the amplitude of the input signal constant. As shown in FIG. 4, the intensity signal Vp (t) corresponding to the power of the signal component S (t) ′ in the analysis target band is provided. The signal is input to the A / D converter 26, sampled at a predetermined sampling period, converted into a digital instantaneous power data Dp and output, and the frequency of the limited amplified output is discriminated by the frequency-voltage conversion circuit 25. The A / D converter 27 converts the signal Vf (t) into a signal Vf (t).
It samples in synchronization with the / D converter 26, converts the sampled value into digital instantaneous frequency data Df, and outputs it.

In FIG. 5, the A / D converter 2 converts the intensity signal Vp (t) corresponding to the logarithmic value of the power of the signal component S (t) 'in the analysis band of the log video amplifier 29 into an A / D converter 2.
6 to obtain digital instantaneous power data Dp, and a limited amplified output to the frequency counting circuit 28 to obtain digital instantaneous frequency data Df.

By using a log video amplifier 29 having a limiting amplification function and a power detection function as in the power / frequency detection means of FIGS. 4 and 5, the configuration itself of the power / frequency detection means 21 can be greatly improved. It can be simplified and the whole device can be downsized. In addition, since the fluctuation component of the amplitude is removed from the limited amplified output, it is possible to eliminate a frequency detection error due to the amplitude fluctuation.

The power / frequency detecting means 21 shown in FIG. 6 is for analyzing an optical signal. The power / frequency detecting means 21 converts the optical signal of the band to be analyzed inputted to the input terminal 20a into a demultiplexer 3.
0 and two optical paths, one of which is an optical power detector 3
1 and the other is input to the optical wavelength detector 32.

The optical power detector 31 receives the input light by a light receiving element (not shown) and outputs an intensity signal Vp (t) whose voltage changes according to the power of the input light.

The optical wavelength detector 32 includes, for example, a fixed diffraction grating for inputting the input light at a predetermined angle and diffracting the input light at an angle corresponding to the wavelength in order to detect the wavelength of the input light. And a light-receiving position detector that outputs a discrimination signal Vf (t) whose voltage changes in accordance with the light-receiving position of the diffracted light.

The intensity signal Vp (t) output from the optical power detector 31 is input to an A / D converter 26, where it is sampled at a predetermined sampling cycle, and the sampled value is converted into digital instantaneous power data Dp. , The discrimination signal Vf (t) output from the optical wavelength detector 32 is
The signal is input to the A / D converter 27, is sampled in synchronization with the A / D converter 26, is converted into digital data Df, and is output to the histogram detection means 40 together with the instantaneous power data Dp.

Although the power / frequency detecting means 21 detects the wavelength of the input light, the light is also a kind of electromagnetic wave and the wavelength and the frequency correspond one-to-one.
In the following description, the input signal including light is referred to as an input signal, the light wavelength is regarded as equivalent to the frequency, and the data Df output from the A / D converter 27 is referred to as instantaneous frequency data.

In the frequency counting circuit 28, a signal to be counted is input to a binary counter for a certain counting time and counted, and after the counting time has elapsed, the counting result is latched and the binary counter is reset. A conventional frequency counter type for the next counting can be used, but a configuration shown in FIG. 7 which can operate at higher speed can also be used.

The frequency counting circuit 28 shown in FIG.
The exclusive OR of the outputs of the two predetermined stages of the shift register having a stage configuration is fed back to the first stage to generate 2 ^H -1 different patterns of H bits. A clock-synchronous counter 33 that receives an amplified output as a shift clock, a first latch circuit 34 that latches an H-bit output of the counter 33 in synchronization with a clock signal CK, and a clock that outputs the first latch circuit 34 A second latch circuit 35 that latches in synchronization with the signal CK, and a counter 33 that outputs the difference between the output of the first latch circuit 34 and the output of the second latch circuit 35, that is, during one cycle of the clock signal CK. And a step count detecting circuit 36 for calculating the step count.

Here, the number-of-steps detecting circuit 36 comprises, for example, a memory in which data indicating the relationship between two different output patterns of the counter 33 and the number of steps between the patterns is stored in advance. The number of steps is output from the pattern latched by the latch circuit 34 and the pattern latched by the second latch circuit 35.

As described above, the counter 33 which feeds back the exclusive OR of the outputs of the two predetermined stages of the shift register having a plurality of (H) stages to the first stage to generate 2 ^H -1 different H-bit patterns is provided. The frequency counting circuit 28 of the type that detects the number of times the counter 33 steps up during one cycle of the clock signal has no delay due to a carry operation such as a binary counter, and furthermore, without resetting the counter. Operation can be performed in an efficient manner, so that high-speed counting can be performed.

The instantaneous power data Dp and the instantaneous frequency data Df output from the power / frequency detecting means 21
May be either the absolute amount of the instantaneous power and the instantaneous frequency of the signal in the analysis target band or the relative amount to the reference value.

However, in order for the instantaneous power data Dp to indicate the absolute amount of the instantaneous power, the power detection circuit 24 or the optical power detector 31 is configured so that the voltage value of the intensity signal Vp matches the instantaneous power value. Or the A / D converter 26 is configured so that its output data coincides with the instantaneous power value, or an arithmetic means for converting the output data of the A / D converter 26 into an instantaneous power value is provided. .

When the instantaneous power data Dp is output in an absolute amount as described above, for example, if the range of the instantaneous power of the signal within the analysis target band is +10 dBm to -100 dBm and the resolution is 1 dBm, one bit for the sign is included. The instantaneous power data Dp may be output in at least 8 bits.

In order for the instantaneous frequency data Df to indicate the absolute amount of the instantaneous frequency, the frequency / voltage conversion circuit 25
Alternatively, the optical wavelength detector 32 is configured so that the voltage value of the discrimination signal Vf matches the instantaneous frequency value, or the A / D converter 27 is configured so that the output data matches the instantaneous frequency value. Alternatively, a calculating means for converting output data of the A / D converter 27 into an instantaneous frequency value is provided.

In the case of using the frequency counting circuit 28 as shown in FIGS. 3 and 5, the counting time is set to a unit time (for example, 10 μsec, 1 μsec, 0.1 μsec, etc.),
The instantaneous frequency data Df can be made to match the absolute amount of the instantaneous frequency.

As described above, when the instantaneous frequency data Df is output in an absolute amount, for example, the analysis target band is set to 1 GHz ± 250 MHz (750 to 1250 MHz) as described above.
z), assuming that the resolution is 1 MHz, the instantaneous frequency data D
It is sufficient to output f with at least 11 bits.

When the instantaneous power data Dp and the instantaneous frequency data Df are represented by relative amounts with respect to the instantaneous power value and the instantaneous frequency value, they may be converted into absolute values in the subsequent processing.

In this case, the width of the power is set to +1 as described above.
0 dBm to -100 dBm is set to 110 dBm, and in order to output this as a relative amount, it is only necessary to output at least 7 bits since one bit for a code is not necessary. Similarly, the 500 MHz width of 750 to 1250 MHz described above is used. When outputting in relative amount, it is sufficient to output at least 9 bits.

As described above, the instantaneous power data Dp and the instantaneous frequency data Df may be either absolute amounts or relative amounts. In the following description, it is assumed that the instantaneous power data Dp and the instantaneous frequency data Df are output in a relative amount requiring a small number of bits, It is assumed that the characteristic evaluation processing means 50 converts the relative amount into an absolute amount.

The power / frequency detecting means 21
Is a broadband type that detects the power and frequency of the signal in the entire analysis target band, and when a plurality of signal components are simultaneously present in the analysis target band, the superposition component of the plurality of signal components Although the instantaneous power and the instantaneous frequency are detected, as described above, in the power / frequency detecting means 21, the input signal is logarithmically amplified or limited amplified by the amplifier 23 or the log video amplifier 29. Even if a signal is present, the other signal components are masked by the signal having the highest intensity.

Therefore, the instantaneous power and instantaneous frequency of a signal having a large intensity, which is important in observing an interference wave, are not overlooked.

In the power / frequency detection means 21 shown in FIGS. 2 to 6, the delay time of the power detection circuit 24 itself, the difference between the delay times of the power detection circuit 24 and the frequency / voltage conversion circuit 25, the log video amplifier Although the description has been made assuming that the difference in the delay time between the detection output and the limited amplification output of the N. 29 is negligible, if the delay time or the difference in the delay time becomes a problem, the power detection circuit 24, the frequency-voltage conversion circuit 25. A delay circuit may be inserted in the output of the log video amplifier 28 or the like to adjust the instantaneous power and instantaneous frequency at the same time.

From the power / frequency detecting means 21 configured as described above, each sampling time t ₀ , t ₀ + T
A set of data corresponding to the instantaneous power and the instantaneous frequency of the input signal sampled at _S , t ₀ + 2 · T _S ,.
[Dp (1), Df (1)], [Dp (2), Df
(2)], [Dp (3), Df (3)],...

The histogram detecting means 40 receives the instantaneous power data Dp and the instantaneous frequency data Df from the power / frequency detecting means 21, and obtains a two-dimensional histogram in which the instantaneous power and the instantaneous frequency are paired.

The histogram detecting means 40 is provided, for example, in FIG.
As shown in FIG. 2, a readable / writable memory 41, a read / write control circuit 42 for controlling reading / writing of data from / to this memory 41, and 1 /
, And a latch circuit 44 that latches output data of the adder 43 and inputs the data to the memory 41.

Here, the memory 41 has an address space of N + M bits, of which, for example, the upper N bits are:
The lower-order M bits correspond to the number of bits of the instantaneous frequency data Df output from the power / frequency detector 21, and the lower M bits correspond to the number of bits of the instantaneous power data Dp output from the power / frequency detector 21.

The read / write control circuit 42 receives a mode signal M from the control means 70 described later. When the mode signal M designates the observation mode, the upper N bits of the address for the memory 41 are the instantaneous power data Dp. The specified lower M bits are set to the state specified by the instantaneous frequency data Df, and the data at the address specified by the instantaneous power data Dp and the instantaneous frequency data Df are read out from the memory 41 and input to the adder 43. A series of processes in which the result of the addition is latched in the latch circuit 44 and the latched data is written to the same address in the memory 41 is output from the power / frequency detecting means 21 as a set of the instantaneous power data Dp and the instantaneous frequency data Df. (In FIG. 8, symbol R is a read signal, symbol Lc is a latch signal, symbol It is a write signal).

Therefore, the power / frequency detecting means 21
From the set of instantaneous power data and instantaneous frequency data [Dp
(U), Df (u)], the data D
The data stored in the address of the memory 41 designated by p (u) and Df (u) is updated by one, and after a predetermined observation time has elapsed, as shown in FIG. The instantaneous power and instantaneous frequency of the signal input to each address of the memory 41 during the observation time are used as elements 2
Dimensional histograms H (p ₀ , f ₀ ) to H (p _K , f
_L ) (where K = 2 ^N −1,
L = 2 ^M -1).

It is to be noted that if the memory 41 is reset immediately before the observation time is started by the read / write control circuit 42 or the like and the histogram H (p _i , f _j ) of each address is initialized to 0, then observation is started. When the observation time ends, the histogram H (p _i , f _j ) of each address is
The frequency value for each observation time is shown.

There is also a method of obtaining a histogram for each observation time without resetting the memory 41. That is,
Immediately before the start of the observation time, the storage value Ha (p _i , f _j ) stored at each address of the memory 41 is stored in another memory (not shown). Address storage value Hb (p _i , f _j )
The increase in the stored value Ha (p _i , f _j ) is calculated for each set of power and frequency by the calculating means.
The histogram H (p _i , f _j ) during this observation time can also be detected. In this case, it is possible to detect a histogram for each observation time and a histogram of a total of a plurality of observations.

When the mode signal M specifies the characteristic evaluation mode, the read / write control circuit 42 outputs the histogram H (p _i , f _j ) stored in the memory 41,
Alternatively, the histogram H (p _i , f _i ) detected by calculating the increase of the storage value Hb with respect to the storage value Ha
_j ) is output to the characteristic evaluation processing means 50.

When detecting the instantaneous frequency, click noise may occur when the instantaneous amplitude is close to zero.
When no signal other than the background noise (white noise) is present in the analysis target band, a histogram of the background noise itself is detected. A histogram for noise may not be needed.

In such a case, the instantaneous power data Dp output from the power / frequency detecting means 21 by the comparator 45 and the preset threshold value Dr (like the histogram detecting means 40 shown in FIG. 10). (A value larger than the instantaneous power of the background noise) and a comparator 45
In the above, if the read / write control circuit 42 is configured to increase and update the histogram of the memory 41 only when it is determined that the instantaneous power data Dp is larger than the threshold Dr, the influence of the click noise can be reduced. It is not necessary to detect useless histograms, and it is possible to evaluate signal components other than background noise.

When a strong signal outside the observation target appears in the analysis target band, the threshold Dr is set to the upper limit Dr.
1 and the lower limit value Dr2, and the instantaneous power data Dp
By increasing and updating the histogram only when is between the upper limit Dr1 and the lower limit Dr2, the background noise and the histogram of the strong signal outside the observation target can be omitted.

As described above, the histogram detection can be restricted not only for power but also for frequency. For example, when it is known in advance that a signal outside the observation target appears at a specific frequency in the analysis target band, the histogram detection unit 40 restricts the histogram from being detected at the specific frequency.

The histogram detecting means 40 can be constructed not only using the memory 41 as shown in FIGS. 9 and 10, but also using a counting circuit as shown in FIGS.

The histogram detecting means 40 shown in FIG.
Converts the instantaneous power data Dp and the instantaneous frequency data Df output from the power / frequency detecting means 21 into a decoder 4.
6 is entered. The decoder 46 combines the instantaneous power data Dp and the instantaneous frequency data Df, that is, the data Dp.
A combination (0, 0) to (K, L) of p = 0 to K and data Df = 0 to L is detected, and pulse signals synchronized with the clock signal CK are output one by one from output terminals corresponding to the combination. Output.

The pulse signal output from each output terminal of the decoder 46 is input to the counting circuit 47. Each counting circuit 47 is constituted by, for example, a synchronous binary counter or the like, and counts pulses output from each output terminal of the decoder 46, respectively.

The count result of each counting circuit 47 is stored in the latch circuit 4
8 and output as a histogram.

For example, when the mode signal M from the control means 70 designates the observation mode, the control circuit 49 causes each counting circuit 47 to count pulse signals output from each output terminal of the decoder 46, and the mode signal M Is switched to the characteristic evaluation mode, the latch signal Lc is output to the latch circuit 48 to latch the counting results of the respective counting circuits 47 and output to the characteristic evaluation processing means 50.

The reset signal C from the control circuit 49
If each counting circuit 47 is reset immediately before the observation time is started by L and the output of each counting circuit 47 is initialized to 0, and then the observation is started, when the observation time ends, each counting circuit 47 is reset. The counting result indicates the frequency value at the observation time.

Further, similarly to the counting circuit described with reference to FIG.
Without resetting each counting circuit 47, the output value of each counting circuit 47 immediately before the start of the observation time is stored in a memory (latch circuit) (not shown), and the counting circuit 47 when the observation time ends is stored. It is also possible to calculate the increase of the output from the stored counting result by the calculating means and detect the histogram at this observation time.

In such a case, the exclusive OR of the outputs of two predetermined stages of the shift register having a plurality of (H) stages is used without using the binary counter as in the counter circuit described in FIG. May be fed back to the first stage to generate 2 ^H -1 different H-bit patterns, and a clock-synchronous counter, and means for detecting the number of steps of the counter.

Thus, the output of the counting circuit is latched,
In the method of reading the latched data, the counting result of the previous observation time can be read while the counting circuit is performing the counting operation of the next observation period, so that continuous observation is possible.

As described above, the memory 41 is used in the histogram detecting means 40 in which the instantaneous power data Dp and the instantaneous frequency data Df are decoded, and the decoded output is counted by each counting circuit 47. Although the scale of the circuit is slightly larger than that of the circuit, the operation speed is remarkably increased, and the sampling speed of the power / frequency detection means 21 can be increased.

The histogram detecting means 40 shown in FIG.
The comparator 45 compares the instantaneous power data Dp with the reference value Dr, similarly to the histogram detection means 40 shown in FIG. 10, and operates the decoder 46 only when the instantaneous power data Dp is larger than the reference value Dr. To prevent detection of a histogram of background noise. Also in this case, as described above, the reference value Dr is set to the upper limit value Dr1 and the lower limit value Dr2, so that not only the background noise,
It is possible to omit a histogram of a strong signal outside the observation target in the analysis target band.

The specific evaluation processing means 50 is input within the observation time based on the two-dimensional histogram H (p _i , f _j ) in which the instantaneous power and the instantaneous frequency detected by the histogram detection means 40 are paired. A process for evaluating the characteristics of the signal is performed, and the processing result is output to the output unit 60. The output unit 60 displays, prints, or outputs the processing result of the specific evaluation processing unit 50 to another device via a communication network (not shown).

The processing for characteristic evaluation includes histogram display processing, spectrum detection processing, power probability distribution detection processing, and the like.
Specified by

In the histogram display processing, the two-dimensional histogram H detected by the histogram detection means 40 is used.
(P _i, f _j) is displayed as it is, or processing for printing out the two-dimensional histogram H (p _i, f _j) which is detected by the histogram detecting unit 40, for example, a portion in FIG. 13 Are displayed three-dimensionally in a three-dimensional coordinate space of a frequency axis X, a power axis Y, and a frequency axis Z.

As described above, when the power / frequency detecting means 21 detects the instantaneous power and the instantaneous frequency in relative amounts, the frequency axis X and the power axis Y is scaled by converting the relative amount of power and frequency into an absolute amount.

The spectrum detection processing is for obtaining the average value and peak value of the instantaneous power for each frequency and displaying the average value and the peak value on the frequency axis.

That is, among the histograms H (p _i , f _j ) detected by the histogram detection means 40, the average power Pa of the histograms having the same frequency is obtained for each frequency by the following calculation.

[0079] Pa (f ₀₎ = _{[Σ i p i · H (p} i, f 0) ] / A Pa (f ₁₎ = _{[Σ i p i · H (p} i, f 1) ] / A ... ... Pa (f _L ) = [Σ _{i pi} · H (p _i , f _L )] / A

Here, the symbol Σ _i indicates the sum of i = 0 to K, p _i indicates the instantaneous power, and f _{0 to} f _L indicate the instantaneous frequency. A is the total number of samples (the number of samplings during the observation time), and can be expressed as A = Σ _{i, j} H (p _i , f _j ) (the symbols Σ _{i, j} are i = 0 to K, j = 0 to L).

Then, the average power Pa (f _j ) for each frequency obtained by this calculation is displayed on the frequency axis as shown in FIG.

From this display, it is possible to grasp the average power for each frequency of the signal input during the observation time.

When calculating the m-th moment for each frequency, the following equation is calculated. _{Pm (f j) = Σ i} p i m · H (p i, f j) / A

When the spectrum detection process is performed on the peak power Pp, the histogram H (p _i , f _j ) of the same frequency having the maximum instantaneous power is obtained for each frequency, and the histogram H (p _i , f _j ) is obtained as shown in FIG. Thus, the maximum instantaneous power value Pp (f _j ) for each frequency is displayed on the frequency axis.

In the power probability distribution detecting process, the probability of the sum of the histograms H (p _i , f _j ) having the same instantaneous power is obtained for each instantaneous power by the following calculation.

Q (p ₀ ) = Σ _j H (p ₀ , f _j ) / A Q (p ₁ ) = Σ _j H (p ₁ , f _j ) / A Q (p _K ) = Σ _j H (p _K , f _j ) / A

Then, the probability Q (p _i ) of the frequency for each instantaneous power obtained by this calculation is displayed on the power axis, for example, as shown in FIG.

From this display, the probability distribution of the power of the signal input during the observation time can be grasped.

The control means 70 controls the switching of the operation mode of the signal analyzer 20 based on the observation time and the evaluation method designated by an operation unit (not shown).

For example, in the case of performing a single observation, the signal analyzer 20 is set to the observation mode for a specified observation time from a predetermined timing, and is switched to the characteristic evaluation mode after the observation time has elapsed. Further, in the characteristic evaluation mode, the characteristic evaluation processing unit 50 is instructed to perform an evaluation process corresponding to the evaluation method specified by the operation unit.

As described above, the signal analyzer 20 of the embodiment
Then, the instantaneous power and the instantaneous frequency of the signal in the analysis target band are detected in parallel, a two-dimensional histogram in which the instantaneous power and the instantaneous frequency are set is obtained, and the characteristic of the signal is evaluated based on the histogram. Like that.

Therefore, with a simple configuration, a wide analysis band can be secured without overlooking a strong signal that suddenly appears in the band to be analyzed during the observation time and without being limited by the sampling speed or the like.

[0093]

As described above, in the signal analyzer of the present invention, the power / frequency detecting means detects the instantaneous power and the instantaneous frequency of the signal in the analysis target band in parallel, and the instantaneous power and instantaneous power are detected. A two-dimensional histogram having a set of frequencies is obtained by a histogram detecting means, and the characteristic of the signal is evaluated based on the histogram.

[0094] For this reason, even with a simple configuration, it is possible to observe a wide analysis band without overlooking a strong signal that suddenly appears in the analysis target band during the observation time and without being limited by a sampling speed or the like. Becomes

In the case where the log / video amplifier is used as the power / frequency detecting means, the configuration of the power / frequency detecting means itself can be simplified, and the entire apparatus can be downsized.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the overall configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration example of a main part of the embodiment.

FIG. 3 is a block diagram showing a configuration example of a main part of the embodiment.

FIG. 4 is a block diagram showing a configuration example of a main part of the embodiment.

FIG. 5 is a block diagram showing a configuration example of a main part of the embodiment.

FIG. 6 is a block diagram showing a configuration example of a main part of the embodiment.

FIG. 7 is a block diagram showing a configuration example of a main part of the embodiment.

FIG. 8 is a block diagram illustrating a configuration example of a main part of the embodiment.

FIG. 9 is a diagram showing a histogram stored in a memory;

FIG. 10 is a block diagram showing a configuration example of a main part of the embodiment.

FIG. 11 is a block diagram illustrating a configuration example of a main part of the embodiment.

FIG. 12 is a block diagram showing a configuration example of a main part of the embodiment.

FIG. 13 is a diagram illustrating an example of a processing result according to the embodiment;

FIG. 14 is a diagram illustrating an example of a processing result according to the embodiment;

FIG. 15 is a diagram illustrating an example of a processing result according to the embodiment;

[Explanation of symbols]

 Reference Signs List 20 signal analyzer 20a input terminal 21 power / frequency detecting means 22 filter 23 amplifier 24 power detecting circuit 25 frequency / voltage converting circuit 26, 27 A / D converter 28 frequency counting circuit 29 log video amplifier 31 optical power detector 32 optical wavelength Detector 40 Histogram detecting means 41 Memory 42 Read / write control circuit 43 Adder 44 Latch circuit 45 Comparator 46 Decoder 47 Count circuit 48 Latch circuit 49 Control circuit 50 Characteristic evaluation processing means 60 Output means

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G01S 7/32 G01S 7/32 F 7/36 7/36 H03M 1/12 H03M 1/12 C (72) Inventor Osamu Tagiri 6-6-6 Minamiyoshinari, Aoba-ku, Sendai-shi, Miyagi F-term in the Environmental Electromagnetic Technology Research Institute, Inc. (reference) 5J022 AA01 BA07 BA08 CA07 CE05 CF02 5J070 AA02 AH19 AH25 AH31 AH33 AJ13 AK40 BH12

Claims (2)

[Claims] A power / frequency detecting means for detecting an input terminal (20a) in parallel with an instantaneous power and an instantaneous frequency of a signal in an analysis target band inputted to the input terminal, and sequentially outputting digital values. (21) and a histogram detecting means (40) for receiving the instantaneous power and the instantaneous frequency sequentially output from the power / frequency detecting means and obtaining a two-dimensional histogram in which the instantaneous power and the instantaneous frequency are paired. A signal analyzer that analyzes a signal input to the input terminal based on a two-dimensional histogram detected by the histogram detection unit. 2. The power / frequency detecting means detects the strength of a signal in an analysis target band input to the input terminal, outputs an intensity signal corresponding to the signal strength, and outputs the input signal. A log video amplifier (29) for limiting and amplifying and outputting the detected power, wherein an instantaneous power and an instantaneous frequency are detected from the intensity signal output and the limited amplified output of the log video amplifier and output as digital values. The signal analyzer according to claim 1, wherein