JP2000353965A - Method and device for interleaving, turbo encoding method and turbo encoder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently randomize a data sequence by a little amount of operation by inputting a data group having plural blocks of length, based on a prime number P, performing a given operation to an element of a finite body whose reference number is P, reordering its order, generating order replace data and replacing orders of data of the inputted data sequence. SOLUTION: An input sequence (an output of a bit addition processing part 21 and, for example, 664 bit), is N divided and is written into a two-dimensional arrangement (a buffer). A primitive element of a finite body of a reference number P is obtained and a table in order of its index expression is prepared. The table is made to be an order replacing table to refer to in order to replace orders of data on the first line of a two-dimensional buffer. By order replacing table for replacing orders of the data from the first line to the eighth line, orders of the data of a block are replaced. That is, the orders of the data of the block are replaced by the order replacing table.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a turbo coding technique which is effective against a burst error.
In addition, the present invention relates to an interleaving method, an interleaving device, a turbo coding method, and a turbo coding device that reduce the amount of calculation.

[0002] The present invention is applied to a field where it is required to improve the reliability of communication using an error correction code such as digital transmission and digital recording, and particularly to a field where communication flexibility is required such as multimedia. It is valid.

[0003]

2. Description of the Related Art In recent years, a turbo encoder using an error correcting code having a high capability is composed of a plurality of encoders, and an interleaver (interleaving) is used in order to reduce the correlation of redundant sequences between the encoders. The encoders are connected to each other through a means for performing processing. This interleaver is very important in determining the capability of the turbo code.

FIGS. 1A and 1B are diagrams showing a configuration example of a turbo encoder. As shown in FIG. 1 (a), the turbo encoder comprises a plurality of recursive systematic convolutional encoders (R
SC1) 12, (RSC2) 13 and interleaver 1
1 is provided. As shown in FIG. 1B, each of the recursive systematic convolutional encoders 12 and 13 includes adders 14 and 15 and unit delay elements (D) 16 and 17 connected as shown. . As in the example shown in FIG. 1A, the turbo encoder outputs outputs X1 to X3 as an encoded sequence for an input d (K bits). Here, in order to reduce the correlation between the redundant bits X1 and X2, a recursive systematic convolutional encoder (RS
C2) Interleaver 11 is inserted before 13. Also, as shown in FIG. 1C, the turbo decoder is composed of two decoders 1, 2, two interleavers 3, 4, and a deinterleaver 5 for performing the inverse processing of the interleaver.

[0005] In the case of a digital system, rearrangement in interleaving is performed in units of bits or symbols.

[0006] The rearrangement method includes a method of writing data into a buffer or the like and reading the data, and a method of interchanging the order by interleaving (hereinafter referred to as an "interleave pattern"). There is a way to sort by reference.

Next, an example in which rearrangement is performed on a bit-by-bit basis using an interleave pattern will be described.

FIG. 2 shows an example in which a 16-bit sequence is interleaved. In FIG. 2, bit-by-bit interleaving is performed by referring to the interleave pattern table. In FIG. 2, the sequence 67 of the input 16 bits to be interleaved is rearranged in the order of the bits in the input sequence according to the order stored in the interleave pattern table 68. Also, the order shown in the interleave pattern table shown therein is read out as 0, 8, 4, 12, 2,... Output a bit sequence.

[0009]

By the way, the interleaver for performing interleaving has the following requirements. (1) To cope with various frame lengths (for example, thousands to 10,000 types). (2) It can be generated with a small number of parameters. (3) There are three problems that the amount of calculation for generating the interleaving pattern is small.

The first problem, that is, if all the frames are simply prepared in order to cope with various frame lengths, the number of parameters to cope with all frame lengths becomes enormous. This is impractical because the required memory for storing is huge. Further, there is a problem in that the calculation processing time for obtaining the optimum parameters individually for each frame length becomes enormous.

In order to solve this problem, as shown in the problem (2), a countermeasure for generating an interleaver with a small number of parameters is considered. However, in order to be able to generate an interleaver with a small number of parameters, a conventional method of creating an interleaver for a frame length of a power of 2 and thinning out the data from the interleaver is the optimum method for thinning out the data. However, there is a problem that the parameters for the conversion are increased, and there is no guarantee that excellent characteristics can be obtained at all frame lengths. For example, there is a problem that the characteristics are good in a certain frame length but deteriorate in other frames.

In order to improve this, a method of reducing the number of thinned data can be considered.

The third problem is solved by reducing the number of thinned data. As a countermeasure against this third problem, the present applicant has proposed a method (PCT application / JP98 / 05027) in which thinning is reduced and characteristics are improved. However, this method also has a problem that the amount of processing (the amount of arithmetic processing) for generating patterns of the interleaver increases.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and an interleaving method, an interleaving device, a turbo encoding method, and a turbo encoding device include:
It is an object of the present invention to efficiently realize sequence randomization with a small amount of calculation even with various frame lengths.

[0015]

According to a first aspect of the present invention, there is provided a first step of inputting a data sequence having a plurality of blocks of a length based on a prime number P, and a finite element having a characteristic P Perform a given operation on the body, rearrange the order,
An interleaving method comprising: a second step of generating the permuted data; and a third step of permuting the data of the input data series using the permuted data. . By using a data sequence having a plurality of blocks of a length based on the prime number P, it is possible to finely cope with various frame lengths and realize a randomization of an input data sequence efficiently with a small amount of calculation. it can.

[0016] According to a second aspect of the invention, a first step of generating or recording a prime number P, N blocks _B 1 of length P of the input _sequence, B 2, is divided into · · · _{B N} A second step, and a third step of generating or recording a series in which the elements of the finite field having the characteristic P are arranged in the order of the values of the exponent part of the original exponential expression as the first permutation data; P-1) and disjoint the (N-1) integers _{p 1, p 2, ··· p} N-1
A fourth step of generating or recording, the repeat cyclically read out to obtain the sequence permutation data of the i processing the first order replacement data series p _i pieces fly by i = 1 to N-1 A fifth step of generating or recording the second to N-th order permutation data, and a fifth step of permuting the order in the blocks B ₁ , B ₂ ,... B _N using the first to N-th order permutation data. An interleaving apparatus comprising: a sixth step; and a seventh step of reading each data from the rearranged N blocks in a predetermined order. The input sequence is divided into N blocks B ₁ , B ₂ ,.
By dividing the input data into _N and using the prime field, the order of the input data is changed, so that various frame lengths can be finely handled. realizable. Also, since interleaving is performed in the fifth and sixth stages, the memory (buffer) and the amount of calculation can be reduced.

[0017] According to a third aspect of the invention, a first step of generating or recording a prime number P, N blocks _B 1 of length P of the input _sequence, B 2, is divided into · · · _{B N} A second step of generating or recording a sequence in which elements of a finite field having a characteristic P are arranged in the order of the value of the exponent part of the original exponential expression;
, A fourth step of generating or recording _N integers q ₁ , q ₂ ,..., Q _N which are disjoint from the primitive element used in the power expression, and a 0-th order permutation data sequence the process of the series of values of exponent parts of added resulting original to express q ₁ by law P to each data with the sequence permutation data of the i i = 1
To N, a fifth step of repeatedly generating the first to N-th order rearranged data, and data in the blocks B ₁ , B ₂ ,... B _N using the first to N-order rearranged data. And a seventh step of reading out each data in a predetermined order from the rearranged N blocks in a predetermined order. The input sequence is divided into _N blocks B ₁ , B ₂ ,..., B _N, and the order of the input data is rearranged using a prime field, so that various frame lengths can be finely handled. At the same time, randomization of a data sequence to be input efficiently can be realized with a small amount of calculation. Also, since interleaving is performed in the fifth and sixth stages, the memory (buffer) and the amount of calculation can be reduced.

According to a fourth aspect of the present invention, a first step of generating or recording a prime number P, and a step of converting an input sequence into N blocks B ₁ , B ₂ ,. The second to divide into _N
And a third step of generating or recording a sequence obtained by deleting the last data of a sequence in which elements of a finite field whose characteristic is P are arranged in order of the value of the exponent part of the original exponential expression. , (P
-1) and relatively prime is (N-1) integers _{p 1, p 2,}
.. A fourth step of generating or recording p _N-1 and a first step
The sequence permutation data series p _i pieces fly through cyclically read out to obtain the sequence permutation data of the i processing i = 1～N-
A fifth step of generating or recording the sequence permutation data of the second to N repeated as 1, block B _1, B 2 with the sequence permutation data from the first to the _N, in · · · B _N An interleaving method comprising: a sixth stage of changing the order; and a seventh stage of reading each data in a predetermined order from the rearranged N blocks. As a result, the number of bits to be processed in the thinning process can be reduced, and it is possible to flexibly cope with various frame lengths.

[0019] The invention of claim 5 includes a first step of generating or recording a prime number P, N blocks _{B 1,} B 2 of the length of the input sequence (P + 1), the · · · _{B N} Second to split
And a third step of generating or recording a sequence obtained by adding the prime number to the last data of a sequence in which elements of a finite field whose characteristic is P are arranged in the order of the value of the exponent part of the original exponential expression. And (P-1) are disjoint (N-1) integers p
_1, p _2, the process of obtaining a fourth step of generating or recording ··· p _{N -1,} the sequence permutation data of the i reads cyclically the first order replacement data series p _i pieces fly To i
= 1 to N−1 to generate or record the second to Nth order permutation data, and block B ₁ , B ₂ ,... Using the first to Nth permutation data.
An interleaving method, comprising: a sixth stage of permuting the order in B _N; and a seventh stage of reading each data in a predetermined order from each of the rearranged N blocks. It is. As a result, the number of bits to be processed in the thinning process can be reduced, and it is possible to flexibly cope with various frame lengths.

The invention according to claim 6 is characterized in that the predetermined order of the seventh step is based on a value of an error floor in the turbo code. The interleaving method described in the section. Since the reading order is determined in the seventh stage in consideration of the value of the error floor, the occurrence of the error floor can be suppressed low.

According to a seventh aspect of the present invention, the number of divisions N is predetermined k (k is an integer of 2 or more), and the first to N-order permutation data generated in the sixth stage is k The interleaving method according to any one of claims 2 to 5, wherein the data is generated as described above, and the permutation data of the division number having the best characteristic is used. This allows
Since the most suitable order permutation data can be selected, optimal interleaving can be performed.

According to the present invention, a first means for inputting a data sequence having a plurality of blocks of a length based on a prime number P, and a predetermined operation based on a finite field having a characteristic P And a second means for rearranging the order to generate the permuted data, and a third means for permuting the data of the input data series using the permuted data.
And an interleaving device. The same operation and effect as those of the first aspect are obtained.

According to a ninth aspect of the present invention, a first means for generating or recording a prime number P and an input sequence are divided into _N blocks B ₁ , B ₂ ,. A second means, and a third means for generating or recording, as first permuted data, a series in which elements of a finite field having a characteristic P are arranged in the order of values of exponent parts of the original exponential expression, P-1) and disjoint the (N-1) integers _{p 1, p 2, ··· p} N-1
And fourth means for generating or recording, the repeat cyclically read out to obtain the sequence permutation data of the i processing the first order replacement data series p _i pieces fly by i = 1 to N-1 2 and fifth means for the N generate or record the sequence permutation data of the block B ₁ with the sequence permutation data from the first to _N, B _2, the reordered in · · · B _N An interleaving apparatus comprising: means (6); and (7) means for reading each data from the rearranged N blocks in a predetermined order. The same operation and effect as those of the second aspect are obtained.

According to a tenth aspect of the present invention, a first means for generating or recording a prime number P and an input sequence are divided into _N blocks B ₁ , B ₂ ,. A second means for generating or recording a sequence in which elements of a finite field whose characteristic is P are arranged in the order of values of exponent parts of the original exponential expression;
, A fourth means for generating or recording _N integers q ₁ , q ₂ ,..., Q _N which are disjoint from the primitive element used for this power expression, and a zero-order permuted data sequence The process of setting the sequence of values of the exponent part of the original exponential expression obtained by adding q _i to the data of the above by modulo P to the i-th permuted data is i = 1
And fifth means for generating a sequence permutation data of the first to N is repeated until to N, the block B ₁ with the sequence permutation data from the first to _N, B _2, data in · · · B _N And a seventh means for reading out each data from the rearranged N blocks in a predetermined order. The same operation and effect as those of the third aspect are obtained.

According to an eleventh aspect of the present invention, the first means for generating or recording the prime number P and the input sequence having a length (P-1)
A second means for dividing into _N blocks B ₁ , B ₂ ,..., B _N , and a sequence in which elements of a finite field whose characteristic is P are arranged in the order of the value of the exponent part of the original exponential expression A third means for generating or recording a sequence from which the last data of the sequence has been deleted;
1) is a disjoint number of (N-1) integers p ₁ , p ₂ ,.
· · P and fourth means for the _N-1 to generate or record, the first order permutation data series p _i number jumps to cyclically read out the processing to obtain the sequence permutation data of the i i = 1 to N -1
And fifth means for repeatedly generating or recording the sequence permutation data of the second to N only, the block B ₁ with the sequence permutation data from the first to _N, B _2, the order in · · · B _N And a seventh means for reading out each data from the rearranged N blocks in a predetermined order. The same operations and effects as those of the fourth aspect are obtained.

According to the twelfth aspect of the present invention, a prime number P is generated.
Or the first means for recording, and the length of the input sequence (P + 1)
N blocks B of₁, B₂, ... B_NDivided into
2 means and an elementary representation of a finite field with characteristic P
At the end of the series arranged in order of the value of the exponent part of
Third means for generating or recording a sequence to which a prime number has been added;
N primitive integers disjoint from the primitive element used for this power expression
q₁, Q₂, ... q _NFourth means for generating or recording
And q in each data of the 0th order permutation data series_iThe law
The series of values of the exponent part of the original exponential expression obtained by adding P
The processing for the i-th order permutation data is repeated from i = 1 to N.
Fifth to generate the first to N-th order permutation data
Means and the data of the order change from the first to the N
Block B₁, B₂, ... B_NEnter the order of the data in
Sixth means for replacing, and each of the N rearranged blocks
Read out each data in a predetermined order from
Interleaving characterized by having
Device. The same operation and effect as those of the fifth aspect are obtained.

According to a thirteenth aspect of the present invention, the predetermined order of the seventh means is based on a value of an error floor in the turbo code. It is an interleaving device as described in the item. The same operation and effect as the sixth aspect are obtained.

[0028] According to a fourteenth aspect of the present invention, the number of divisions N
Are determined in advance (k is an integer of 2 or more), and k pieces of first to N order permutation data generated by the fifth means are generated, and the permutation data of the division number having the best characteristic is generated. The interleaving device according to any one of claims 9 to 12, wherein the interleaving device is used. Claim 7
The same operation and effect as described above can be obtained.

The invention according to claim 15 is a turbo coding method in which the interleaving method according to any one of claims 1 to 5 is used as an internal interleaving method of a turbo coding device. It is possible to provide a turbo coding method having the functions and effects of the first to fifth aspects of the present invention.

According to the present invention, when the number of input bits is less than a predetermined number of bits, the step of increasing the number of bits to match the predetermined number of bits is provided. The turbo coding method according to claim 15, further comprising the step of reducing the number to the number of bits before increasing the number of bits. As a result, the amount of calculation can be reduced without performing the thinning process.

According to a seventeenth aspect of the present invention, there is provided the turbo encoding method according to the sixteenth aspect, wherein the number of bits is increased using bit repetition. This defines an example of increasing the number of bits.

The invention according to claim 18 is a turbo encoding device comprising a plurality of encoders and the interleaving device according to any one of claims 8 to 12.
It is possible to provide a turbo coding method having the functions and effects of the inventions as set forth in claims 8 to 12.

The invention according to claim 19 is a means for increasing the number of bits to match the number of input bits when the number of input bits is less than a predetermined number of bits; 19. The turbo coding apparatus according to claim 18, further comprising means for reducing the number to the number of bits before increasing the number of bits.

A twentieth aspect of the present invention is the turbo encoding apparatus according to the nineteenth aspect, wherein the number of bits is increased using bit repetition.

[0035]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 3 shows a block configuration of the turbo encoder according to the first embodiment of the present invention. The difference from the conventional turbo encoder shown in FIG. 1 is the addition of a bit addition processing unit 21 and the addition of a new configuration of an interleaver 22 and a puncturing processing unit 23.

Hereinafter, the above-mentioned three units will be described in detail with reference to the flowchart shown in FIG. (Bit addition processing) As pre-processing for performing interleaving, this is processing for adjusting the number of bits suitable for interleaving (steps 101 to 103 in FIG. 10).

As a specific example of the bit addition processing, general error correction coding can be used. Among error correction coding, bit repetition in which bits are periodically repeated is a preferable example because its flexibility and processing are simple.

Here, the number of input bits to the encoder is N _IN
Assuming (corresponding to K in FIG. 3), the bit repetition processing method will be described in detail. (1) First, N _IN is divided by 8 to obtain its value n. (2) Find a prime number P that is not less than n and is closest to n. (3) The difference between eight times P and N _IN is determined, and is defined as a. (4) A bit (dummy bit) is added to the N _IN bit as an input.

For example, a case where N _IN is 650 will be described. (1) Since 650/8 = 81.25, n = 81.
25 is obtained. (2) The prime number equal to or greater than 81.25 and closest to 81.25 is 83 as shown in FIG. Therefore, P = 83
Is found. (3) Since 83 * 8 = 664, a = 14 is obtained. * Represents multiplication (the same applies hereinafter). (4) In the case of 650-bit input, a process of adding 14-bit dummy bits is performed.

The (N _IN + a) bits obtained as described above, that is, the (K + a) bits in FIG. 3 are always divided by 8 in the above example, and the quotient is a prime number. The reason why eight is used is that the number of rows of the two-dimensional array handled in the first stage of interleaving in the interleaver 22 is eight in the present embodiment, as described later. Therefore, 2 of the interleaver 22 that is
Depending on the number of rows in the dimensional array, any value other than 8, such as 10 or 20, can be used. That is, when the number of rows in the first stage of the interleaver for turbo code is 10 or 20, the processing in the above (1) to (3) is 10 instead of 8.
Or a numerical value of 20.

Considering this point, the bit addition processing unit 2
In the process 1, the number of rows of the two-dimensional array is determined in step 101 of FIG. 10, the number of columns, which is a prime number, is determined in step 102 as described above, and the value obtained by multiplying the number of rows and the number of columns and the input data Dummy bits of the number of bits that differ from the number of bits
03 is added to the input data.

Although an example using bit repetition has been described here, block coding, convolutional coding and the like can also be applied as bit addition processing. Further, as a bit addition process, a method of adding a known bit to a known location may be considered as a simple method. (Interleaver) Interleaver 2 used in this embodiment
Two types of configuration examples 2 will be described.

FIG. 5 shows a first configuration example. This interleaver includes a first stage 41 (corresponding to step 104 in FIG. 10) and a second stage 42 (step 10 in FIG. 10).
5 to 108) and a third stage 43 (corresponding to step 109 in FIG. 10). (1) First stage 41: The input sequence 40 (the output of the bit addition processing unit 21, for example, 664 bits) is divided into N (in this example, divided into eight blocks B _{1 to} B ₈ ) to obtain 2 Write to a dimensional array (buffer). In this example, the number of rows is 8, and the number of columns is 83.

As described above, the bit addition processing unit 2
By adding the dummy bit at 1, the number of rows in the two-dimensional buffer can be divided by 8, and the number of columns is a prime number. (2) Second stage 42: As will be described later, the order of data in each row is changed (intra-permuta).
Tion processing). (3) Third stage 43: The order of the rows is changed in units of rows (inter-permutation processing).
For example, the order of the rows is changed in units of one row by using an intersecting pattern between the rows determined in advance by learning (the learning criterion is to increase the free distance).

As described above, the processing of the first to third stages is performed, and finally the data is read out in the vertical direction (column direction) (step 110 in FIG. 10) to obtain the interleaved coded sequence 44.

Hereinafter, the processing in the second stage will be described in detail.

The process of changing the order of data in the second stage processes input data written in a two-dimensional buffer using a table generated by executing the following steps as an address table. . Hereinafter, description will be made in the order of steps.

Step S1: A primitive element g0 of a finite field of characteristic P (corresponding to the number of columns 83 in FIG. 5) is obtained (step 105 in FIG. 10), and a table of the exponential expression order (the element of the finite field is true) A table (t0), which is expressed in numbers and arranged in the order of exponential expression, is created. However, this table t0 can be generated and stored in advance.

For example, when P = 83, the primitive element of 83 is 2 as shown in FIG. Elements of the finite field having characteristic 83 are 0, 1, 2,... 82. This expresses the finite field elements in antilogarithm, when exponential notation in a former law ^{2, 2 0 (mod83),} 2 1 (mod83), 2 2 (mo
d83),..., 2 ⁸² (mod 83) = 1, 2,
4, 8, 16, 32, 64, 45, 7, 14, ...,
42,0 are obtained.

When this is made into a table, a table t0 shown in FIG. 7B is obtained. In FIG. 7B, the exponent is represented by numerical values in the vertical axis direction and the horizontal axis direction. For example, an index 16 is indicated by 1 on the vertical axis and 6 on the horizontal axis. 2 ² mod83 calculation result mod83 operation result of ^{4,2 16} is 49. In addition,
In the case of ²⁸² , it is set to 0. Step S2: The table t0 is stored in the first two-dimensional buffer.
An order change table to be referred to for changing the order of the data of the row (when the parameter I indicating the row number is set to 1 in step 106 of FIG. 10). That is, the numerical values defined in the order change table t0 indicate the positions of the input data after the change. As shown in FIG.
The order change table t0 has the following arrangement (pattern) in order from the upper left.

Table t0: 1, 2, 4, 8, 16,..., 42, 0 (1) For example, the input data arranged in the first row of the two-dimensional buffer is A ₀ , A ₁ , A ₂ , A ₃ ,..., A ₈₂ (2), the arrangement of the first row is permuted as follows by referring to the permutation table t0. For example, A ₀ corresponding to 1 in the order permutation table t0 is placed at the same position, A ₁ corresponding to 2 is also at the same position, A ₂ corresponding to 4 is replaced at the fourth, and the next 8 corresponding _{a 3} is replaced by the 8 th. The same applies to the following, and since A ₈₂ corresponding to the last 0 is 0, the position remains as it is. This processing is step 107 in FIG.

Therefore, the data in the column (2) is replaced as follows.

A ₀ , A ₁ , A ₇₂ , A ₂ , A ₂₇ , A ₇₆ , A ₈ ,..., A ₈₂ (3) Step S3: The number obtained by subtracting 1 from the characteristic of the finite field Obtain a relatively prime number (number of rows -1). In the above example, P = 83,
The number of rows since 8, 82 (= P-1 = 83-1) the relatively prime numbers and 7 (= 8-1) number _{determined, p 1, p 2, p} 3, p
_4, and _{p 5, p 6, p 7} . For example, P-1 (82 =
41 * 2) are (N−1) integers (N−
1 = 7) p ₁ , p ₂ , p ₃ , p ₄ , p ₅ , p ₆ , p
₇ is, for example, 3, 5, ₇ , 11, 13, 17, 19
(Excluding 1 and 2). Step S4: Here, in step 108 of FIG.
Is determined to be smaller than the number of rows in the two-dimensional array, and the process returns to step 107 if YES. here,
I = 2. Then, an order change table for changing the order of the data in the second row is created as follows. Reads the value of the order permutation table t0 cyclically to jump _one p, the sequence lined it to t1. For example, if p ₁ is 3, the sequence permutation table t as described above
0 Table t0: 1, 2, 4, 8, 16,..., 42, 0... (1) are read out at intervals of p ₁ (= 3) to obtain the next table t1 .

Table t1: 1, 16, 7 (4) In this processing, a primitive element g1 different from g0 is obtained, and an exponential expression table is obtained using the primitive element g1. Can also be realized (it is mathematically equivalent). However, g1 = (g0) ^p1 (mod 83). Step S5: Then, the table t1 is set as an order change table referred to for changing the order of the data in the second row. Step S6: Similarly, p ₂ , p ₃ , p ₄ , p ₅ ,
using p _6, p _7, by repeating the processing of steps S4 and S5, it generates the sequence t2 t7, the third row of each of the two-dimensional buffer in order to replace the order of the eighth row of data This is the order change table to be referred.
That is, steps 106 to 108 can be described as follows.

First, a prime l _i (i = 2) satisfying the following condition:
To r, r is the number of rows).

(I) (83-1, l_i) = 1 (8
2 and l_iAre relatively prime) (ii) l_i> 6 For example, when r = 8, the prime number to be obtained is l₂~ L₈And figure
From the table of No. 6, 7, 11, 13, 17, 19, 2
3 and 19. Then, the value of the table t0 is _iIndividual flight
Read cyclically (excluding the last 0)
The exchange tables t2 to t7 are created. Step S7: The order of the data in the first to eighth rows is changed.
By the order change table (t0 to t7)
Block B₁, B₂, ... B₈Swap data order
I can. That is, block B₁The order of the data
Replace with the table t0. Block B₂Data order
The order is changed in the order change table t1. Hereinafter, similarly
And block B₈The order of the data in the table
Replace at t7. In FIG. 10, the order is changed for each row.
This is the procedure for creating a table and performing the replacement process.
As described above, after creating the eight permutation tables
Then, a replacement process for each row may be performed.

The processing of the second stage can also be realized by creating the above-mentioned order change table in advance and using a method of referring to this table.

The second type of the interleaver 22 used in the present invention
Will be described with reference to FIG. The second configuration example is the same as the first configuration example described above except for the second stage.

The process of changing the data order in the second stage of this configuration example is realized by using a table generated by the following process as an address table. Step S11: A primitive element g0 of a finite field of characteristic 83 is obtained, and a table T0 in the order of exponential expression (a table in which elements of the finite field are expressed by antilogarithms and arranged in exponential expression) is created. However, this table can be generated and stored in advance. Step S11 is the same as step S1 of the first configuration example described above. Therefore,
The table T0 is the same table as the table t0 shown in FIG. Step S12: 8 the number relatively prime with primitive element g0 (i.e., a number equal to the number of rows 2D buffer) number _{determined, q} 1,
It is assumed that q ₂ , q ₃ , q ₄ , q ₅ , q ₆ , q ₇ , q ₈ . For example, when the prime number is 83, P = 83 and the primitive element = 2, so eight integers relatively prime to this primitive element are, for example, 3, 5, 7, 11, 13, 17, 19, 21 (1, 2
Excluding). Step S13: obtained in step S12, it adds _{q 1} to the data of the table T0 and (Mod83), to create the table T1 by converting the obtained value (true number) in exponential notation, the first row An order change table is used.

That is, T0: 1, 2, 4, 8, 16,..., 42, 0... (5) Therefore, when q ₁ = 3, , To obtain 4, 5, 7, 11, 19,... 45, 3,.

Further, this is converted into an exponential expression. 7 (A) is the inverse operation of FIG. 7 (B), and when it is used, 2, 27, 8, 24,..., 7, 72 (7) are obtained. This is the order change table T1. Step S14: Similarly, q ₂ , q ₃ , q ₄ ,
with _{q 5, q 6, q 7} , q 8, by repeating the process of step S13, the table T2 and create a table T8, for interchanging the order of the data from the second row to the eighth row An order change table is used. Step S15: The data order of the blocks B ₁ , B ₂ ,..., B ₈ is exchanged by using the first to eighth order exchange tables (T1 to T8).

The processing of the second stage can also be realized by preparing the above table in advance and using a method of referring to this table.

Next, the interleaver 22 used in the present invention
The third configuration example will be described with reference to FIG.

In FIG. 9, for example, after a 1140-bit input sequence 80 is written to the interleaver 600 in a 72 × 16 two-dimensional array, the 72 × 16 interleaver 600
16 bits are read for each row. The first row is a 4 × 4 interleaver 610, the second row is a 6 × 3 interleaver 620, and the third row is an 8 × 2 interleaver 630.
And so on, interleaving is performed by changing the shape of the interleaver for each row. However, the same type of interleaver may be used for each row. Also, a part of the interleaving may use the same type of interleaver.

The interleaved data is read out in the vertical direction (0, 16, 32, 48,...).
.), An output data sequence 90 can be obtained.

Since the last row has only 4 bits, a 4 * 1 interleaver is used for the last row in FIG.
However, an interleaver of 4 * 4, 2 * 2, etc. may be used. At the time of reading, 1136, 1137, 1138,
Although it is possible to read out as 1139, in FIG. 9, it is possible to read out in reverse order, ie, 1139, 1138, 1137, 1136.
I read.

Since the last row has only 4 bits, the last row may be read out (ie, only 71 rows), and the data of the last row may be inserted at predetermined intervals thereafter.

The first to third interleavers described above
The encoded data is generated using any of the configuration examples.
Then, step 110 in FIG. 10, that is, the third stage 43 in FIGS. 5 and 8 is performed.

Here, in the first and second configuration examples of the interleaver 22 described above, step 110 in FIG.
By devising the processing in the above, it is possible to prevent the occurrence of a pattern that causes the occurrence of an error floor of the turbo code.

FIG. 11 is a graph for explaining an error floor. The error floor refers to a bit error rate (BER: Bit Error) even if the S / N ratio is improved.
(Rate) is not so much improved. FIG.
At 1, the error floor starts to occur when the BER is 10 ⁻⁷ to 10 ⁻⁸ , and little improvement is seen below.

In consideration of this phenomenon, the order of reading data from the two-dimensional array (buffer) is not fixed, and reading in a plurality of orders is possible. That is, the rearranged N
The predetermined order in which each data is read from each of the blocks is determined based on the value of the error floor in the turbo code, so that the occurrence of the error floor in the turbo code can be suppressed low. For example, 1
If the block is divided into 0 blocks (first to tenth blocks), the reading order is 10, 9, 8, 7,.
6, 5, 4, 3, 2, 1 and 20 blocks (first
From the 20th block to the 20th block), the reading order is 19, 9, 14, 4, 0, 2, 5, 7, 1
2, 18, 16, 13, 17, 15, 15, 3, 1, 6, 1
1, 8, and 10. In the case of 20 pieces, another order, 19, 9, 14, 4, 0, 2, 5, 7, 12, 1
8, 10, 8, 13, 17, 3, 1, 16, 6, 15,
11 is also applicable.

As described above, one of the reading orders in several orders is selected to suppress the occurrence of the error floor in the turbo code. A method of simply reversing the reading order, as in the case of dividing into ten blocks, is simple and highly effective. (Puncturing process) In the conventional turbo encoder, as shown in FIG. 1, (3 * K + T1 + T
2) Since output (encoded) bits are obtained, encoded bits having the same number of bits are also output in the present invention (where T1 is the number of tail bits of RSC1 and T2 is the number of tail bits of RSC2). .

Since the number of input bits is increased from N (corresponding to K in FIG. 3) to (N + a) by the dummy bit addition processing in bit addition processing section 21 shown in FIG. Compared to the case without processing, (3
* A) Extra bits are required. Therefore, puncturing is performed by the puncturing processing unit 23 in order to reduce (3 * a) bits. As a punching method for turbo codes, a method of periodically deleting only redundant bits is generally used, and this method is also applicable to the present invention. As a result, the output of the puncturing processing unit 23 is
An encoded output of (3 * K + T1 + T2) bits is obtained for k input bits.

Next, a second embodiment of the present invention will be described.

FIG. 12 is a block diagram showing the configuration of the turbo encoder according to the second embodiment of the present invention. 12, the same components as those shown in FIG. 3 are denoted by the same reference numerals. The configuration of FIG.
1 is placed only in the preceding stage of the interleaver 22. That is, the coded sequence X1 is the input data sequence itself from the information source, and the RSC 12 processes the input data sequence from the information source as it is. Further, a pruning (decimation processing) unit 123 is provided between the interleaver 22 and the RSC 13 in order to delete the dummy bits added by the bit addition processing unit 21. Interleaver 22
Can be configured by any of the above-described first to third configuration examples. However, here, a case will be described in which the fourth configuration example is newly used. The fourth configuration example is obtained by slightly modifying the first and second configuration examples. This change is a device for obtaining a prime number with reference to the table in FIG. 4, in other words, a device for determining the number of columns in a two-dimensional array. This will be described below.

First, the bit repetition processing here is as follows. However, the number of rows in the two-dimensional array is eight. (1) First, N _IN is divided by 8 to obtain its value n. (2) The prime number P which is not less than n and is closest to n and (prime number -1)
And (prime number + 1), a number greater than or equal to n and closest to n is obtained. (3) The difference between eight times P and N _IN is determined, and is defined as a. (4) A bit (dummy bit) is added to the N _IN bit as an input.

For example, a case where N _IN is 660 will be described. (1) Since 660/8 = 82.5 (the quotient is 82 and the remainder is 4), n = 82.5 is obtained. (2) The prime number equal to or greater than 82.5 and closest to 82.5 is 8
3, (prime number-1) = 82, (prime number + 1) = 8
Since it is 4, the number that is 82.5 or more and is closest to 82.5 is 83. Therefore, P = 83 is obtained. (3) Since 83 * 8 = 664, a = 664-66
0 = 4 is obtained. (4) In the case of a 660-bit input, a process of adding a 4-bit dummy bit is performed.

The (N _IN + a) bits obtained as described above, that is, the (K + a) bits in FIG. 3 are always divided by 8 in the above example, and the quotient is a prime number, (prime number−
1) or (prime number + 1).

When the quotient of the above calculation matches the prime number, the method of generating the order permutation table is as described with reference to FIG. 5, for example. When the quotient matches (prime number-1) or (prime number + 1), that is, as shown in FIG.
When the number of columns in the dimensional buffer becomes, for example, 82 or 84, these order change tables cannot use the order change table t0 for changing the order of the column number 83. The order change table having 82 or 84 columns is created by processing the order change table t0 having 83 columns as follows.

FIG. 14A shows an order permutation table t0 having 83 columns. This is the same as the order permutation table t0 in FIG. As shown in FIG. 14B, the order permutation table having 82 columns (to be referred to as t0 ₋₁ ) is
This is obtained by deleting the last 0 of the order permutation table t0 having 83 columns. When this is developed in a line, the following pattern is obtained.

Table t0 _-1 : 1, 2, 4, 8, 1
6, ..., 42 However, the range of elements in the table _{t0 -1} has a 1 to 82, subtract 1 from all elements (and hence, as the range of elements from 0 81) treated by applying the , Is used as an order change table. Further, as shown in FIG. 14C, the order permutation table t0 _{+ 1} having 84 columns is obtained by adding a prime number P, that is, 83 to the last 0 of the permutation table t0 having 83 columns. When this is developed in a line, the following pattern is obtained.

Table t0 _{+ 1} : 1, 2, 4, 8, 1
6,..., 42, 0, 83 Then, by executing the processing of steps 106 to 108 described above, the order change tables t0, t0 ₋₁ , t0
₊₁ order permutation table from the second row to each to the eighth row _{t1~t7, t1 -1 ~t7 -1, t1} +1
To t7 _{+ 1} . As described above, these tables may be created and registered in advance.

As described above, the difference between the number of bits of the input data sequence and the number of bits to be processed by interleaver 22 can be reduced.
3 (FIG. 12) can be reduced, easily adaptable to various frame lengths, and an excellent interleaving pattern can be obtained.

The above processing may be applied to the interleaver 22 in the configuration of FIG.

In the structures of the first and second embodiments described above, the input data sequence is divided into a plurality of blocks by a predetermined single division number. However, the number of divisions N of the input data sequence may be k (k is an integer of 2 or more), k interleavers may be created, and the interleaver having the best number of divisions may be selected.

Assume that k = 2 and the cases of 10 and 20 are considered.
It is assumed that the input bits to the interleaver 22 are 640 bits. When the number of blocks is 10, the number of blocks having a 64-bit length is 10, and an interleaver reordering table (pattern) created based on the blocks is # 1.
On the other hand, when the number of blocks is 20, the number of blocks having a 32-bit length is 20, and an interleaver permutation table (pattern) created based on the blocks is # 2. Unlike interleaver patterns # 1 and # 2,
The one with good characteristics such as the bit error rate and the frame error rate is selected. Different input bits have different numbers of blocks suitable for them. That is, the characteristics can be improved by selectively changing the number of blocks according to the number of input bits.

[0088]

As described above, according to the present invention,
By using a prime field, it is possible to frequently cope with various frame lengths, and it is possible to efficiently realize sequence randomization with a small amount of calculation.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an example of conventional turbo coding and decoding.

FIG. 2 is a diagram for explaining an example in which conventional 16-bit sequence interleaving is performed.

FIG. 3 is a diagram illustrating a turbo encoder according to a first embodiment of the present invention.

FIG. 4 is a table of prime numbers up to 200;

FIG. 5 is a diagram illustrating a first configuration example of an interleaver according to the present invention.

FIG. 6 is a table of prime numbers of 150 or less and their minimum primitive roots.

FIG. 7 is a diagram illustrating an example of an order change table for changing the order of data.

FIG. 8 is a diagram illustrating a second configuration example of the interleaver according to the present invention.

FIG. 9 is a diagram illustrating a third configuration example of the interleaver according to the present invention.

FIG. 10 is a flowchart showing the operation of the turbo encoder according to the present invention.

FIG. 11 is a diagram for explaining an error floor.

FIG. 12 is a diagram illustrating a turbo encoder according to a second embodiment of the present invention.

FIG. 13 is a diagram illustrating a fourth configuration example of the interleaver according to the present invention.

FIG. 14 is a diagram showing an order change table used in the fourth configuration example shown in FIG. 13;

[Explanation of symbols]

 11, 22 Interleaver 12, 13 RSC 21 Bit addition processing 23 Puncturing 40, 80 Input bit sequence 41 First stage 42 Second stage 43 Third stage 44, 90 Output data sequence

Claims (20)

[Claims] 1. A first step of inputting a data sequence having a plurality of blocks of a length based on a prime number P, performing a predetermined operation on a finite field having a characteristic P, and arranging the order. Interleaving, comprising: a second step of generating permuted data, and a third step of permuting the data of the input data series using the permuted data. Method. 2. A first step of generating or recording a prime number P, and converting an input sequence into N blocks B ₁ , B ₂ ,.
A second step of dividing into _BN, and a third step of generating or recording a series in which elements of a finite field having a characteristic of P are arranged in order of the value of the exponent part of the original exponential expression as first permutation data. And (P-1) are disjoint (N-1) integers p ₁ , p
_2, a fourth step of generating or recording · · · p _N-1, the cyclically reads obtain the sequence permutation data of the i processing the first order replacement data series p _i pieces fly i = 1 to
A fifth step of generating or recording the second to N-th permuted data by repeating N-1; and a block B using the first to N permuted data.
_1, B _2, further comprising a sixth step of interchanging the order in · · · B _N, and a seventh step of reading the respective data by a predetermined order from the sorted N number of blocks An interleaving method. 3. A first step of generating or recording a prime number P
And N blocks B of length P₁, B₂...
B_NAnd dividing the element of the finite field whose characteristic is P into the exponent part of the original exponential expression
Third stage for generating or recording a sequence arranged in order of value
The floor and the primitive elements used in this power expression are disjoint N integers
q₁, Q₂, ... q _NFourth step of generating or recording
And q for each data of the 0th order permutation data series._iBy law P
The sequence of values of the exponent part of the original exponential expression obtained is denoted by i
Is repeated from i = 1 to N
To generate the first to N-th order permutation data
Block B using the floor and the permutation data from 1 to N
₁, B₂, ... B_NChange the order of data in the sixth
And a predetermined order from the rearranged N blocks.
Having a seventh stage of reading each data according to the introduction
An interleaving method. 4. A first step of generating or recording a prime number P, and converting an input sequence into N blocks B ₁ of length (P−1),
A _second stage of dividing into B ₂ ,... B _N , and the last data of a sequence in which elements of a finite field with characteristic P are arranged in order of the value of the exponent part of the original exponential expression A third step of generating or recording the deleted sequence, and (P-1) being disjoint (N-1) integers p ₁ , p
_2, a fourth step of generating or recording · · · p _N-1, the cyclically reads obtain the sequence permutation data of the i processing the first order replacement data series p _i pieces fly i = 1 to
A fifth step of generating or recording the second to N-th permuted data by repeating N-1; and a block B using the first to N permuted data.
_1, B _2, further comprising a sixth step of interchanging the order in · · · B _N, and a seventh step of reading the respective data by a predetermined order from the sorted N number of blocks An interleaving method. 5. A first step of generating or recording a prime number P, and converting an input sequence into N blocks B ₁ of length (P + 1),
A _second stage of dividing into B ₂ ,... B _N , and the last data of a series in which the elements of the finite field whose characteristic is P are arranged in order of the value of the exponent part of the original exponential expression a third step of generating or recording a sequence obtained by adding the prime number, (P-1) and disjoint the (N-1) integers p _1, p
_2, a fourth step of generating or recording · · · p _N-1, the cyclically reads obtain the sequence permutation data of the i processing the first order replacement data series p _i pieces fly i = 1 to
A fifth step of generating or recording the second to N-th permuted data by repeating N-1; and a block B using the first to N permuted data.
_1, B _2, further comprising a sixth step of interchanging the order in · · · B _N, and a seventh step of reading the respective data by a predetermined order from the sorted N number of blocks An interleaving method. 6. The interleaving method according to claim 2, wherein the predetermined order of the seventh step is based on an error floor value of the turbo code. 7. The number of divisions N is k (k is an integer of 2 or more)
4. The method according to claim 2, wherein k pieces of first to N-order permutation data to be generated in the fifth stage are generated in advance and the permutation data having the best number of divisions is used. 6. The interleaving method according to claim 5. 8. A first means for inputting a data sequence having a plurality of blocks having a length based on a prime number P, performing a predetermined operation on a finite field having a characteristic P, and arranging the order. Interleaving, comprising: second means for generating reordered data, and third means for reordering the data of the input data series using the reordered data. apparatus. 9. A first means for generating or recording a prime number P, and converting an input sequence into N blocks B ₁ , B ₂ ,.
A second means for dividing into _BN , a third means for generating or recording as a first permutation data a series in which elements of a finite field having a characteristic P are arranged in the order of values of exponent parts of the original exponential expression. And (P-1) are disjoint (N-1) integers p ₁ , p
_2, a fourth means for generating or recording · · · p _N-1, the cyclically reads obtain the sequence permutation data of the i processing the first order replacement data series p _i pieces fly i = 1 to
Fifth means for generating or recording the second to Nth order permutation data by repeating N-1 times, and block B using the first to Nth permutation data
_1, B _2, having a seventh means for reading a sixth means for interchanging the order in · · · B _N, each data by a predetermined order from the sorted N number of blocks An interleaving device. 10. A first means for generating or recording a prime number P, and converting an input sequence into N blocks B ₁ , B ₂ ,.
Second means for dividing the B _N, and third means target speed is sequentially generates a sequence arranged in parallel to or recording the value of the finite field based on index portion of the original to expression of P, the A fourth means for generating or recording _N integers q ₁ , q ₂ ... Q _N which are disjoint from the primitive element used for the power expression, and q _i for each data of the 0-th order permutation data sequence To the exponent part of the original exponential expression obtained by adding
Fifth means for generating the first to N-th order permuted data by repeating the process of setting the permuted data of i to 1 to N, and the block B using the first to Nth permuted data
_{1, B} 2, 6 to replace the order of the data in the · · · _{B N}
And a seventh step of reading out each data from the rearranged N blocks in a predetermined order. 11. A first means for generating or recording a prime number P, and converting an input sequence into N blocks B ₁ of length (P-1),
_Second means for dividing into B ₂ ,... B _N , and the last data of a series in which elements of a finite field with characteristic P are arranged in the order of the exponent part value of the original exponential expression are deleted third means for generating or recording a sequence, (P-1) and disjoint the (N-1) integers _p 1, p
_2, a fourth means for generating or recording · · · p _N-1, the cyclically reads obtain the sequence permutation data of the i processing the first order replacement data series p _i pieces fly i = 1 to
Fifth means for generating or recording the second to Nth order permutation data by repeating N-1 times, and block B using the first to Nth permutation data
_1, B _2, having a seventh means for reading a sixth means for interchanging the order in · · · B _N, each data by a predetermined order from the sorted N number of blocks An interleaving device. 12. A first means for generating or recording a prime number P, and converting an input sequence into N blocks B ₁ of length (P + 1),
B ₂ ,..., B _N , and a prime number at the end of a sequence in which elements of a finite field whose characteristic is P are arranged in order of the value of the exponent part of the original exponential expression. And a fourth means for generating or recording N integers q ₁ , q ₂ ... Q _N which are disjoint from the primitive element used for this power expression. Means, and a sequence of values of the exponent part of the original exponential expression obtained by adding q _i to each data of the 0-th order permutation data sequence by the modulus P,
Fifth means for generating the first to N-th order permuted data by repeating the process of setting the permuted data of i to 1 to N, and the block B using the first to Nth permuted data
_{1, B} 2, 6 to replace the order of the data in the · · · _{B N}
An interleaving apparatus comprising: means for reading out data from each of the rearranged N blocks in a predetermined order. 13. The interleaving apparatus according to claim 9, wherein the predetermined order of said seventh means is based on a value of an error floor in a turbo code. 14. The number of divisions N is determined in advance by k (k is an integer of 2 or more), and k kinds of permutation data from 1 to N generated by the fifth means are generated, and The interleaving apparatus according to any one of claims 9 to 12, wherein the permutation data having a good number of divisions is used. 15. A turbo coding method, wherein the interleaving method according to claim 1 is used as an internal interleaving method of a turbo coding device. 16. When the number of input bits is less than a predetermined number of bits, the number of bits is increased to match the number of bits, and the number of encoded bits is increased by increasing the number of bits. The turbo encoding method according to claim 15, further comprising the step of reducing the number of bits to the number of bits before the encoding is performed. 17. The turbo encoding method according to claim 16, wherein the number of bits is increased using bit repetition. 18. A method according to claim 8, further comprising the steps of:
3. A turbo encoding device comprising: the interleaving device according to any one of 2. 19. When the number of input bits is less than a predetermined number of bits, means for increasing the number of bits to match the predetermined number of bits, and increasing the number of encoded bits by increasing the number of bits 19. The turbo encoding apparatus according to claim 18, further comprising means for reducing the number of bits to a value before the encoding is performed. 20. The turbo encoding device according to claim 19, wherein the number of bits is increased using bit repetition.