JP2000353705A - Manufacture of semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve embeddability of a Cu film into a groove or a hole provided on the insulating film on a semiconductor substrate. SOLUTION: Cu atoms consisting a Cu film 6 by performing a reflow treatment on a semiconductor substrate 1 are made to flow into a groove 4 through fluidization phenomenon. The reflow treatment is performed in a decompressed atmosphere of 1 to 100 Torrs or thereabout, and besides the mixed gas containing hydrogen of 30 to 70% and nitrogen or the mixed gas containing hydrogen of 30 to 70% or thereabout and inert gas is used for the decompressed atmosphere.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a technology for manufacturing a semiconductor integrated circuit device, and more particularly to a technology effective when applied to a semiconductor integrated circuit device having copper (Cu) wiring formed by a damascene process. .

[0002]

2. Description of the Related Art Cu wiring has a low resistance and a high electromigration resistance.
Promising as a wiring layer for processes of 0.2 μm or less. A damascene process is employed for forming the Cu wiring because of difficulty in etching Cu or embedding an interlayer insulating film. That is, after forming an interlayer insulating film on a semiconductor substrate, a groove or hole shape of a wiring is formed in the interlayer insulating film, and then Cu is formed on the interlayer insulating film by a sputter reflow method. By flattening the surface by chemical mechanical polishing (CMP) technology, a Cu film is buried in a groove or a hole to form a Cu wiring.

In the sputter reflow method, a wiring material is sputter-deposited on an interlayer insulating film in which a groove or a hole is formed, and then the wiring substrate is heated to about 450 ° C. in a hydrogen atmosphere to change the wiring material. Alternatively, it is a film forming technique of flowing into the inside of a hole.
Vol. 627, 1998, pp. 297-303, etc., a Cu film formed by a sputter reflow method.
There is a description about wiring.

[0004]

However, as a result of investigations by the present inventors, it has been considered that the following problems may occur in a Cu film formed by a sputter reflow method.

A Cu film deposited on a semiconductor substrate by a sputtering technique is subjected to a reflow treatment, and hydrogen having an effect as a heat transfer medium or a reducing action is used in the atmosphere. Here, the reducing action is, for example, an effect of removing a thin native oxide layer on the surface of the Cu film. However, on the other hand, since hydrogen has a large thermal conductivity and acts to deprive heat to the outside, the effective temperature of the semiconductor substrate is about 4 ° C. even if the set temperature of the reflow treatment is about 450 ° C., for example.
The temperature drops to about 20 ° C. This decrease in the temperature of the semiconductor substrate causes deterioration of the embedding property of the Cu film in the groove or the hole. For example, in order to desorb oxygen, 20 Torr
This remarkably appears when the reflow treatment is performed in a hydrogen atmosphere at a reduced pressure, and the phenomenon of the Cu flowing into the grooves or holes is suppressed.

A method of increasing the effective temperature of the semiconductor substrate by increasing the set temperature of the reflow process has been studied. However, the difference between the set temperature and the effective temperature of the semiconductor substrate becomes large, and the temperature control of the heater becomes difficult. It becomes difficult, and it may become difficult to manage the effective temperature of the semiconductor substrate.

Further, by using a hot-wall type furnace body for the apparatus for performing the reflow treatment, a decrease in the effective temperature of the semiconductor substrate can be suppressed. The problem of the deterioration of the semiconductor region provided on the semiconductor substrate or the deterioration of the interlayer insulating film due to diffusion also arises.

It is an object of the present invention to provide a technique capable of improving the ability to embed a Cu film in a groove or a hole provided in an insulating film on a semiconductor substrate.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows. That is, (1) In the method of manufacturing a semiconductor integrated circuit device according to the present invention, a step of forming a groove or a hole in an insulating film on a semiconductor substrate and forming a Cu film containing about 80% or more Cu on the insulating film. And hydrogen under a reduced pressure of about 1 to 100 Torr.
3 to 70% of mixed gas with nitrogen or hydrogen
Subjecting the semiconductor substrate to a reflow process in which a mixed gas containing an inert gas containing about 0 to 70% is used as an atmosphere.

(2) In the method of manufacturing a semiconductor integrated circuit device according to the present invention, a step of forming a groove or a hole in an insulating film on a semiconductor substrate and a step of forming a barrier film and Cu in an upper layer of the insulating film by about 80%
A step of sequentially forming a Cu film including the above,
a step of subjecting the semiconductor substrate to a reflow treatment under a reduced pressure of about rr and a mixed gas with nitrogen containing about 30 to 70% of hydrogen or an inert gas containing about 30 to 70% of hydrogen as an atmosphere; And

(3) The method for manufacturing a semiconductor integrated circuit device according to the present invention is the method for manufacturing a semiconductor integrated circuit device according to the above (1) or (2), wherein a cold wall type furnace is used for the reflow treatment. It is.

(4) The method for manufacturing a semiconductor integrated circuit device according to the present invention is the method for manufacturing a semiconductor integrated circuit device according to (1) to (3), wherein the inert gas is an argon gas, a helium gas, Krypton gas or xenon gas is used.

(5) The method of manufacturing a semiconductor integrated circuit device according to the present invention is the method of manufacturing a semiconductor integrated circuit device according to any one of the above (1) to (4), wherein the Cu The surface of the film is flattened, and a Cu film is embedded in the groove or the hole.

(6) The method for manufacturing a semiconductor integrated circuit device according to the present invention is the method for manufacturing a semiconductor integrated circuit device according to any one of (1) to (4), wherein the Cu film is formed by a sputtering method or a plating method. Things.

(7) The method for manufacturing a semiconductor integrated circuit device according to the present invention is the method for manufacturing a semiconductor integrated circuit device according to any one of the above (1) to (4), wherein the Cu film forms a wiring or a plug. is there.

According to the above means, the semiconductor substrate is subjected to the reflow treatment in an atmosphere in which nitrogen or an inert gas is mixed with hydrogen, thereby suppressing a decrease in the effective temperature of the semiconductor substrate as compared with an atmosphere containing only hydrogen. So you can
The difference between the set temperature of the reflow process and the effective temperature of the semiconductor substrate becomes small, and process control such as temperature management becomes easy. In addition, the reflow treatment is performed on the semiconductor substrate in a reduced pressure atmosphere of about 1 to 100 Torr, so that oxygen is easily desorbed. Further, since the mixing ratio of hydrogen is relatively high, about 30 to 70%, the reducing action is performed. As a result, the natural oxide layer on the surface of the Cu film can be removed, so that the Cu atoms constituting the Cu film easily flow.

[0018]

Embodiments of the present invention will be described below in detail with reference to the drawings.

A method for manufacturing a Cu wiring to which a damascene process according to an embodiment of the present invention is applied will be described with reference to FIGS. In all the drawings for describing the embodiments, components having the same function are denoted by the same reference numerals, and the repeated description thereof will be omitted.

First, as shown in FIG. 1, a first insulating film 2 is formed on a semiconductor substrate 1 on which a semiconductor element (not shown) is formed.
To form Next, a second insulating film 3 having an etching selectivity with respect to the first insulating film 2 is formed on the first insulating film 2. The second insulating film 3 is made of, for example, S
Coating film such as OG (Spin On Glass) film, silicon oxide film formed by chemical vapor deposition (CVD) method, organic insulating film formed by coating method or CVD method or CVD method , A low dielectric constant film such as a silicon oxide film to which fluorine is added, a silicon nitride film, and a stacked film including a plurality of types of insulating films.

Next, as shown in FIG. 2, a groove 4 is formed by etching the second insulating film 3 using the resist pattern as a mask. The width of the groove 4 is, for example, about 0.5.
μm, and the depth is, for example, about 0.45 μm.

Next, as shown in FIG. 3, a barrier film 5 is deposited on the semiconductor substrate 1. The barrier film 5 has a function of preventing the diffusion of the Cu film, is formed by a sputtering method or a CVD method, and has a thickness of about 80 nm or less in a flat portion. As the barrier film 5, a titanium nitride (TiN) film, a tantalum (Ta) film, a tantalum nitride (TaN) film, a tungsten nitride (WN) film, a stacked film formed of these films, or the like is used.

Next, as shown in FIG. 4, a Cu film 6 is deposited on the barrier film 5 by a sputtering method. This C
The u film 6 contains about 80% or more of Cu, and the film thickness in the flat portion is, for example, about 0.4 to 0.6 μm.

Next, as shown in FIG.
Is subjected to heat treatment to flow Cu atoms constituting the Cu film 6 into the groove 4 by a flow phenomenon (reflow treatment).
The reflow process is performed in a reduced pressure atmosphere of about 1 to 100 Torr, and furthermore, the atmosphere contains 30 to 70% of hydrogen.
30 to 70 of mixed gas or hydrogen containing nitrogen
% Mixed gas with an inert gas containing about%.
Examples of the inert gas include an argon gas, a helium gas, a krypton gas, and a xenon gas.

The reflow process is performed using a cold wall type furnace body employing a lamp heating method. The conditions of the reflow process are, for example, hydrogen partial pressure 10 Torr, nitrogen partial pressure 10 Torr, total pressure 20 Torr, wafer susceptor set temperature 450 ° C and a reflow time of 2 minutes.

Thereafter, as shown in FIG. 6, the surface of the Cu film 6 and the exposed surface of the barrier film 5 are flattened by a CMP method, and the barrier film 5 and the Cu film 6 are buried in the trench 4 so that the Cu film 6 is formed. Constitutes the Cu wiring ML.

As described above, according to the present embodiment, the semiconductor substrate 1 is subjected to the reflow treatment in an atmosphere in which nitrogen or an inert gas is mixed with hydrogen, so that the semiconductor substrate 1 is compared with an atmosphere containing only hydrogen. A decrease in the effective temperature can be suppressed. As a result, the difference between the set temperature of the reflow process and the effective temperature of the semiconductor substrate 1 becomes small, and process control such as temperature management becomes easy. In addition, 1-100T
Since the reflow treatment is performed on the semiconductor substrate 1 in a reduced pressure atmosphere of about orr, the desorption of oxygen becomes easy, and the mixing ratio of hydrogen is relatively high at about 30 to 70%.
The natural oxide layer on the surface of the Cu film 6 is removed by the reducing action, so that Cu atoms flow easily.

In the present embodiment, the case where the present invention is applied to the reflow treatment of the Cu film 6 deposited by the sputtering method has been described. It is also applicable to reflow treatment, whereby the grains of the plated Cu film grow to improve electromigration resistance, and
Desorption of impurities in the plated Cu film can be promoted.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, in the above-described embodiment, the case where the present invention is applied to the wiring buried in the groove has been described. However, the plug embedded in the hole connecting the semiconductor element and the wiring or the hole connecting the upper wiring and the lower wiring is described. Is also applicable.

In the above embodiment, the case where the present invention is applied to a single damascene process has been described. However, the present invention can be applied to a dual damascene process.

[0032]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

According to the present invention, in the reflow treatment of the Cu film, the process control such as temperature control becomes easy, and the Cu atoms constituting the Cu film flow easily. Embedment is improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a main part of a semiconductor substrate showing a method for manufacturing a Cu wiring by a damascene process according to an embodiment of the present invention.

FIG. 2 is a fragmentary cross-sectional view of a semiconductor substrate, illustrating a method for manufacturing a Cu wiring by a damascene process according to an embodiment of the present invention;

FIG. 3 is a fragmentary cross-sectional view of a semiconductor substrate, illustrating a method of manufacturing a Cu wiring by a damascene process according to an embodiment of the present invention;

FIG. 4 is a fragmentary cross-sectional view of a semiconductor substrate, illustrating a method for manufacturing a Cu wiring by a damascene process according to an embodiment of the present invention;

FIG. 5 is a fragmentary cross-sectional view of a semiconductor substrate, illustrating a method for manufacturing a Cu wiring by a damascene process according to an embodiment of the present invention;

FIG. 6 is a fragmentary cross-sectional view of the semiconductor substrate, illustrating a method for manufacturing a Cu wiring by a damascene process according to an embodiment of the present invention;

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 2 first insulating film 3 second insulating film 4 groove 5 barrier film 6 Cu film ML Cu wiring

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 21/768 H01L 21/88 M 21/90 A (72) Inventor Tatsuyuki Saito Shinmachiroku, Ome-shi, Tokyo In the Device Development Center, Hitachi, Ltd., at 3-16, Hitachi, Ltd. Tsuyoshi Fujiwara Inventor Tsuyoshi Fujiwara, 6-chome, Shinmachi, Ome-shi, Tokyo F-Terminus, Device Development Center, Hitachi, Ltd. F-term 4K029 BA08 BD02 CA05 GA01 4K030 BA01 CA04 DA09 4M104 BB04 BB17 BB30 BB32 BB33 DD07 DD16 DD17 DD19 DD20 DD37 DD51 DD79 DD80 DD99 EE08 EE12 EE14 EE15 EE17 EE18 FF13 FF17 FF18 FF22 HH01 HH12 HH16 5F033 HH11 MM33 JJ13H33 PP06 PP15 PP26 QQ09 QQ35 QQ48 QQ73 QQ75 QQ85 RR04 RR06 RR09 RR11 RR21 SS11 SS21 TT01 WW00 XX01 XX05 XX10 XX25

Claims (8)

[Claims] (A) forming a groove or a hole in an insulating film on a semiconductor substrate; (b) forming a metal film on the insulating film; and (c) forming a metal film on the insulating film. Subjecting the semiconductor substrate to a reflow treatment under a reduced pressure of about 30 to 70% of hydrogen and an atmosphere of a mixed gas with nitrogen or an inert gas containing about 30 to 70% of hydrogen. And a method for manufacturing a semiconductor integrated circuit device. 2. A step of forming a groove or a hole in an insulating film on a semiconductor substrate; (b) a step of sequentially forming a barrier film and a metal film on the insulating film; and (c). .1 to 100To
The semiconductor substrate is subjected to a reflow process under a reduced pressure of about rr in a mixed gas with nitrogen containing about 30 to 70% of hydrogen or an inert gas containing about 30 to 70% of hydrogen as an atmosphere. And a method for manufacturing a semiconductor integrated circuit device. 3. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein a cold-wall type furnace body is used for the reflow process in the step (c). Method. 4. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein said metal film is made of copper.
% Of a semiconductor integrated circuit device. 5. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein the inert gas is an argon gas, a helium gas, a krypton gas, or a xenon gas. A method for manufacturing a semiconductor integrated circuit device. 6. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein, after the step (c), the surface of the metal film is flattened to form the groove or the groove. A method of manufacturing a semiconductor integrated circuit device, wherein the metal film is embedded in a hole. 7. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said metal film is formed by a sputtering method or a plating method. Device manufacturing method. 8. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein said metal film forms a wiring or a plug. Method.