JP2000349443A - Multilayered printed board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To securely reduce spurious radiation and to obtain superior economy. SOLUTION: A ground layer is stacked on a power supply layer across an insulating layer, and on the ground layer a signal wiring layer 15 is provided across an insulating layer 14. The signal wiring layer 15 is provided with a 1st power supply pad 21a which is connected to the power supply layer and a 1st connection part 21 which is formed of a 1st ground pad 21b connected to the ground layer nearby an integrated circuit element 15a. Further, a 2nd connection part 22 is provided in parallel nearby the 1st connection part 21. The 2nd connection part 22 is formed of a 2nd power supply pad 22a connected to the power supply layer and a 2nd ground pad 22b connected to the ground layer in series through an inductance element 24. A bypass capacitor is connected to one of the 1st connection part 21 and 2nd connection part 22.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed circuit board in which a power supply layer, a ground layer, and a signal wiring layer are stacked with an insulating layer interposed therebetween, and in particular, reduces the generation of unnecessary radiation such as electromagnetic noise. The present invention relates to a multilayer printed circuit board that can be used.

[0002]

2. Description of the Related Art In a multilayer printed circuit board in which a power supply layer, a ground layer, and a signal wiring are laminated with an insulating layer interposed therebetween, when an IC (integrated circuit) or the like that operates at a high speed is mounted,
A high frequency current is generated by the switching operation of the IC. Such a high frequency current, electromagnetic noise (EMI: El ectr
oMagnetic Interference) may cause unnecessary radiation, and the generated unnecessary radiation may adversely affect electronic devices mounted on the multilayer printed circuit board or other electronic devices. . In particular, unnecessary radiation called the common mode, which is generated by a high-frequency current flowing between the power supply layer and the ground layer, cannot be reliably prevented. Shield the entire printed circuit board,
Prevents unwanted radiation from affecting other equipment.

On the other hand, in Japanese Patent Application Laid-Open No. Hei 8-242047, a bypass capacitor electrically connected between a power supply line and a ground line is provided in the vicinity of a mounted IC or in the vicinity of a connector. There is disclosed a printed wiring board in which a voltage displacement between a power supply line and a ground line generated when an IC operates is suppressed.
In the printed wiring board having such a configuration, the high-frequency current generated during the operation of the IC is suppressed from flowing through the power supply line and the ground line, and therefore, the generation of unnecessary radiation is suppressed.

Japanese Patent Application Laid-Open No. 9-139573 discloses that a power supply layer is divided in a power supply layer of a multilayer printed circuit board in order to prevent current loops and diffusion of high-frequency components and to reduce unnecessary radiation. There is disclosed a configuration in which a filter or the like is provided between the divided power supply layers and an impedance adding circuit wired in the power supply layer is provided.

[0005]

In a multilayer printed circuit board, as disclosed in Japanese Patent Application Laid-Open No. Hei 8-242047, a bypass is provided so as to be interposed between a power supply layer and a ground layer near an IC or the like. If a capacitor is provided, high-frequency current generated from an IC that performs high-speed switching operation cannot be reliably controlled. For example, a harmonic component generated by switching of the IC and a power supply layer and a ground layer may not be controlled. May be close to the resonance frequency of the parallel resonance circuit. In such a case, a large current flows between the power supply layer and the ground layer, causing unnecessary radiation.

Further, as disclosed in Japanese Patent Application Laid-Open No. Hei 9-139573, in the configuration in which the power supply layer is divided, the diffusion of the high-frequency current over the entire power supply layer is suppressed, but from the power supply layer adjacent to the power supply layer. When a current loop is generated, unnecessary radiation may increase. In addition, it is necessary to provide a filter or the like between the divided power supply layers, which may impair economic efficiency. Further, in a configuration in which a wiring pattern is provided on the power supply layer,
The power supply layer cannot be treated as a reference layer,
For this reason, for example, processing such as sandwiching the power supply layer between a pair of ground layers is required, and as a result, the number of layers is increased as compared with a normal multilayer printed circuit board, and the economical efficiency is also impaired. is there.

An object of the present invention is to solve such a problem, and an object of the present invention is to provide an economical multilayer printed circuit board capable of reliably reducing unnecessary radiation.

[0008]

A multilayer printed board according to the present invention is a multilayer printed board in which a power supply layer, a ground layer, and a signal wiring layer are laminated with an insulating layer interposed therebetween.
A bypass capacitor is provided between the power supply layer and the ground layer via an inductance element between the first connection portion provided on the signal wiring layer so that the bypass capacitor is electrically connected between the power supply layer and the ground layer. A second connection portion provided in the signal wiring layer in proximity to the first connection portion so as to be electrically connected.

The inductance element is constituted by a wiring pattern provided on a signal wiring layer.

The wiring pattern has a rectangular wave shape or a spiral shape. A plurality of sets of the first connection portion and the second connection portion are provided.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic plan view showing an example of an embodiment of a multilayer printed board according to the present invention, and FIG. 2 is a schematic sectional view thereof. As shown in FIG. 2, the multilayer printed board 10 has a power supply layer 11 composed of conductive layers.
A ground layer 13 is laminated on one surface of the semiconductor device via an insulating layer 12, and a first signal wiring layer 15 is provided on the ground layer 13 via an insulating layer 14. Also,
On the other surface of the power supply layer 11, a second
Signal wiring layer 17 is provided.

As shown in FIG. 1, the first signal wiring layer 15 is provided with an integrated circuit element (IC) 15a.
In the vicinity of the integrated circuit element 15a, a ground-side through hole 15 electrically connected to the ground layer 13 is provided.
and a power supply side through hole electrically connected to the power supply layer 11 near the corner of the insulating layer 14 that is farther from the integrated circuit element 15a than the ground side through hole 15b. 15c is provided.

A first power supply pad 21a disposed near a corner of the multilayer printed circuit board 10 is connected to the power supply side through hole 15c via a wiring. Further, the multilayer printed circuit board 1 is connected to the first power supply pad 21a.
A first ground pad 21b is arranged at a position spaced at an appropriate distance from the integrated circuit element 15a along the horizontal direction of 0. The first ground pad 21b is connected to the ground side through hole 15b via a wiring. The first power supply pad 21a and the first ground pad 21b form a first connection portion 21.

A second ground pad 22b is disposed at a position spaced from the first ground pad 21b in the vertical direction of the multilayer printed circuit board 10 at an appropriate distance. The second ground pad 22b is also connected to the ground side through hole 15b via a wiring. Further, with respect to the second ground through hole 22b,
The second power supply pads 22a are disposed at appropriate positions along the vertical direction of the multilayer printed circuit board 10.
The second power supply pad 22a is connected to the power supply side through hole 15.
c is connected via an inductance element 24. The inductance element 24 is configured by a rectangular-wave-shaped wiring pattern. The second connection portion 22 is configured by the second power supply pad 22a and the second ground pad 22b.

The multilayer printed wiring board 1 having such a configuration
In the case of 0, since the integrated circuit element 15a is driven, the harmonic component of the high-frequency current generated by the switching operation causes unnecessary radiation, so that the harmonic component of the integrated circuit element 15a is absorbed. , FIG.
As shown in FIG. 3A, a state in which the bypass capacitor 23 is connected to the first connection portion 21 or FIG.
As shown in (b), the bypass capacitor 23 is connected to the second connection part 22.

The bypass capacitor 2 is connected to the first power supply pad 21a and the second ground pad 21b of the first connection portion 21.
3 is connected, the bypass capacitor 23 is interposed between the power supply layer 11 and the ground layer 13 in a state of being connected in series. When the bypass capacitor 23 is connected to the second power supply pad 22a and the second ground pad 22b of the second connection portion 22, the bypass capacitor 23
Is connected in series with the inductance element 24,
1 and the ground layer 13, a bypass capacitor 23
And an inductance element 24 are interposed in a state of being connected in series.

First power supply pad 2 in first connection portion 21
The wiring for connecting the first ground pad 21b and the ground-side through-hole 15b has a sufficiently wide wiring width in order to reduce the inductance component as much as possible. It is preferable to shorten the wiring length sufficiently, for example,
The wiring width is 1 mm or more, and the wiring length is 2 mm or less.

The inductance element 24 is set so that, for example, the inductance component has a characteristic of 10 nH.

As the bypass capacitor 23 selectively connected to the first connection portion 21 or the second connection portion 22, for example, a capacitor having a capacitance of 0.1 uF is used.

FIG. 4 shows the case where the bypass capacitor 23 is connected to the first connection portion 21 and the case where the bypass capacitor 23 is connected to the second connection portion 22. Integrated circuit element 15a
5 is a graph showing impedance characteristics of a parallel resonance circuit that resonates with a higher harmonic component of FIG. In a parallel resonant circuit,
When the first connection part 21 is connected to the bypass capacitor 23 (shown by a solid line in FIG. 4) because the frequency indicating the high impedance value becomes the resonance frequency, the resonance frequencies are 400 MHz, 600 MHz, 700 MHz, and 840 MHz, respectively. Becomes

On the other hand, when the bypass capacitor 23 is connected to the second connection portion 22 (shown by a broken line in FIG. 4), the inductance element 24 and the bypass capacitor 23 are connected.
The resonance frequencies of the resonance circuits formed by the series circuit of 380 MHz, 580 MHz, 700 MHz, and 820 MHz are respectively obtained.

As described above, the power supply layer 11 and the ground layer 13
Between the power supply layer 11 and the ground layer 13 between the case where only the bypass capacitor 23 is interposed and the case where a series circuit of the bypass capacitor 23 and the inductance element 24 is interposed. The resonance frequency will change. Therefore, the case where the bypass capacitor 23 is connected to the first connection portion 21 and the case where the second connection portion 2
2, the resonance frequency of the resonance circuit formed between the power supply layer 11 and the ground layer 13 is changed.

Which of the first connection portion 21 and the second connection portion 22 is connected with the bypass capacitor 23 is determined based on experiments. For example, as shown in FIG. 5, as a harmonic component generated from the integrated circuit element 15a, the voltage sequentially increases when 1 ns elapses, and 0.5 ns at 0.5 ns.
V. After that, after the voltage of 0.5 V is held for 0.5 ns, the pulse signal of a trapezoidal waveform of 40 MHz (period: 25 ns) in which the voltage sequentially decreases to 0 V in 1 ns, The case where the voltage is applied to the bypass capacitor 23 connected to the first connection unit 21 and the case where the voltage is applied to the bypass capacitor 23 connected to the second connection unit 22 are compared, and the first connection unit 21 and the second connection unit are compared. 22 is connected to the bypass capacitor 23. In addition,
The voltage components at each frequency when the applied trapezoidal pulse signal is subjected to the Fourier transform are as shown in FIG.

A bypass capacitor 23 is connected to the first connection portion 21.
When a trapezoidal pulse signal is applied, the resonance frequency at 400 MHz and the spectrum component of the frequency after Fourier transform in the pulse signal are close to each other as shown by the solid line in FIG. Therefore, the peak value of the resonance frequency at 400 MHz is 56 dBμV / m. On the other hand, the bypass capacitor 23 is connected to the second connection portion 22.
When the bypass capacitor 23 is connected in series with the inductance element 24, the resonance frequency at 400 MHz and the spectrum component of the frequency after the Fourier transform in the trapezoidal wave pulse signal, as shown by the broken line in FIG. Are not close to each other, the peak value of the resonance frequency at 400 MHz is reduced to 49 dBμV / m.

Therefore, by connecting the bypass capacitor 23 to the second connection portion and connecting the bypass capacitor 23 in series with the inductance element 24, the first connection portion 2
1 when the bypass capacitor 23 is connected to
Unwanted radiation can be reduced by 7 dBμV / m.

The power supply side through hole 15c and the second connecting portion 2
As long as predetermined inductance characteristics are obtained, the inductance element 24 provided between the second power supply pad 22a and the second power supply pad 22a is not limited to the configuration using the wiring pattern as described above. May be used. However, by configuring the inductance element 24 using the wiring pattern, the number of components can be reduced, and the production cost can be reduced. As described above, when the inductance element 24 is a wiring pattern having a rectangular wave shape, a large inductance characteristic can be obtained with a small installation area.
Further, the present invention is not limited to the configuration in which the wiring pattern is provided only on the signal wiring layer 15, and the wiring element may be formed on the ground layer 13, the power supply layer 11, and the like, and may be connected in series to form an inductance element. Good.

When the inductance element 24 is formed by a rectangular-wave-shaped wiring pattern, if the wiring has a width of 0.2 mm and an inductance characteristic of 0.5275 H / mm, it is necessary to set the inductance characteristic of the inductance element 24 to 10 nH. 18.95mm is required as the length. Therefore,
As shown in FIG. 8, if a rectangular wave-shaped wiring pattern having two periods (number of turns) is formed in a 5 mm × 5 mm area, an inductance characteristic of 10 nH can be obtained.

It should be noted that the wiring pattern of the inductance element 24 is not limited to a rectangular wave shape, but may be formed in a spiral shape as shown in FIG.

FIG. 10 shows an example of the multilayer printed board 10 of the present invention in which a plurality of integrated circuit elements 15a are provided on the signal wiring layer 15. This multilayer printed circuit board 10
The length in the horizontal direction is 144 mm and the width in the vertical direction is 108 mm. The cross-sectional structure is the same as that of FIG. 2, and the thickness of the power supply layer 11 and the ground layer 13 is 0.04 mm, respectively. The thickness of the insulating layer 12 between the first layer 11 and the ground layer 13 is
0.8 mm, the thickness of each signal wiring layer 15 and 16 is
0.02 mm, insulating layer 14 between ground layer 13 and first signal wiring layer 15 and power supply layer 11 and second signal wiring layer 17
The thickness of the insulating layer 21 between them is 0.4 mm. The power supply layer 11 and the ground layer 13 are each made of copper as a conductor.

The signal wiring layer 15 laminated on the ground layer 13 via the insulating layer 14 has nine integrated circuit elements 15
a is provided. At the center in the horizontal direction of the insulating layer 14,
Three integrated circuit elements 15a, each of which extends in the vertical direction, are provided side by side in the vertical direction.
The bypass capacitors 23 are provided on the power supply layer 11 and the ground layer 1 on the lateral sides of the
3 so as to be interposed therebetween.

On one lateral side of the insulating layer 14, three integrated circuit elements 1 each extending in the lateral direction are provided.
5a are provided side by side in the vertical direction, and a bypass capacitor 23a is provided on the side in the vertical direction of each integrated circuit element 15a.
Are respectively provided so as to be interposed between the power supply layer 11 and the ground layer 13 in a state along the lateral direction.

Further, one integrated circuit element 15a extending in the vertical direction is also provided on the other side in the horizontal direction of the insulating layer 14.
Two integrated circuit elements 15a each extending along the horizontal direction are provided along the vertical direction. The two integrated circuit elements 15a each extending along the horizontal direction are in a state of being shifted in the horizontal direction, close to the corner of the insulating layer 14, and the integrated circuit element 15a extending along the vertical direction is located at the corner. It is located on the far side of the part. The integrated circuit element 15a along the vertical direction is a source of a harmonic component that causes unnecessary radiation, and a bypass capacitor 23 is disposed on the side of the integrated circuit element 15a along the horizontal direction. , Power supply layer 1
1 and the ground layer 13.

The integrated circuit element 15a arranged vertically adjacent to the integrated circuit element 15a along the vertical direction
A bypass capacitor 23 is also provided on the side in the vertical direction so as to be interposed between the power supply layer 11 and the ground layer 13 along the horizontal direction.

In a region surrounded by two integrated circuit elements 15a arranged close to the corner of the insulating layer 14,
As in the multilayer printed circuit board 10 shown in FIG.
And a ground-side through hole 15b electrically connected to the ground layer 13. Then, the first ground pad 21b and the second ground pad 22 connected to the ground side through hole 15b via wiring, respectively.
b are provided, and a first power supply pad 21a and a first connection pad 25a connected to each other via wiring are provided in the power supply side through hole 15c. A second connection pad 25b to which the componentized inductance element 24 is connected is provided near the first power supply pad 21a, and a second power supply pad 22a is provided on the second connection pad 25b. They are connected by wiring. A componentized inductance element 24 is connected between the second connection pad 25b and the first connection pad 25a.

In the multilayer printed circuit board 10 having such a configuration, the first power supply pad 21a and the first ground pad 21b are also provided.
Form a first connection part, and the second power supply pad 22a and the second ground pad 22b form a second connection part 22. Then, the bypass capacitor 23 is selectively connected to either the first connection part 21 or the second connection part 22.

FIG. 11 shows such a multilayer printed circuit board 1.
0, the bypass capacitor 23 is connected to the first connection portion 21.
FIG. 12 is an equivalent circuit diagram when the second connection unit 2 is connected.
2 is an equivalent circuit diagram when a bypass capacitor 23 is connected to FIG. 11 and 12, C1 to Cn
Indicates stray capacitance, and L1 to Ln indicate parasitic inductances of the bypass capacitors 23.

The first connection portion 21 and the second connection portion 22 to which the bypass capacitor 15 is selectively connected are not limited to the configuration in which only one set is provided near the corner of the insulating layer 14 as described above. As shown in FIG. 13, the integrated circuit element 15a provided at a diagonal position with respect to the corner portion.
And the integrated circuit element 15a vertically adjacent to the integrated circuit element 15a.
And the second connection part 22 may be provided.

In this case, the respective second connecting portions 2
The second inductance element 24 connected to the second power supply pad 22a is not limited to a component, and may be configured by a wiring pattern. As shown in FIG. 2 power supply pad 22a
The configuration is not limited to the connection to the second ground pad 22b.

[0039]

As described above, according to the multilayer printed circuit board of the present invention, the bypass capacitor interposed between the power supply layer and the ground layer is selectively connected to one of the first connection portion and the second connection portion. Therefore, it is possible to easily change the resonance frequency of the harmonic component due to the mounted IC or the like, and it is possible to surely reduce the generation of unnecessary radiation.

[Brief description of the drawings]

FIG. 1 is a plan view showing an example of an embodiment of a multilayer printed board according to the present invention.

FIG. 2 is a schematic sectional view of the multilayer printed circuit board.

FIGS. 3A and 3B are plan views respectively showing states in which a bypass capacitor is attached to the multilayer printed circuit board.

FIG. 4 is a graph showing a relationship between a resonance frequency and an impedance of a parallel resonance circuit in the multilayer printed circuit board shown in each of FIGS. 3A and 3B.

FIG. 5 is an explanatory diagram showing an example of a waveform of a pulse signal used to determine a connection portion of a bypass capacitor to a multilayer printed circuit board.

FIG. 6 is a graph showing voltage components at each frequency when the pulse signal is subjected to Fourier transform.

FIG. 7 is a graph showing a relationship between a resonance frequency of a parallel resonance circuit and an electric field strength when a pulse signal is applied to the multilayer printed circuit board shown in each of FIGS. 3 (a) and 3 (b).

8 is an explanatory diagram of an inductance element provided on the multilayer printed board of the present invention shown in FIG.

FIG. 9 is a plan view showing another example of the multilayer printed board of the present invention.

FIG. 10 is a plan view showing still another example of the multilayer printed board of the present invention.

FIG. 11 is an equivalent circuit diagram when a bypass capacitor is provided at a first connection portion of the multilayer printed circuit board.

FIG. 12 is an equivalent circuit diagram when a bypass circuit is provided in a second connection portion of the multilayer printed board shown in FIG.

FIG. 13 is a plan view showing still another example of the multilayer printed board of the present invention.

FIG. 14 is a plan view showing still another example of the multilayer printed board of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Multilayer printed circuit board 11 Power supply layer 12 Insulation layer 13 Ground layer 14 Insulation layer 15 Signal wiring layer 15a Integrated circuit element 15b Ground side through hole 15c Power supply side through hole 16 Insulation layer 17 Signal wiring layer 21 First connection part 21a First power supply Pad 21b First ground pad 22 Second connection part 22a Second power supply pad 22b Second ground pad 23 Inductance element 24 Bypass capacitor

Claims (4)

[Claims] 1. A power supply layer, a ground layer, and a signal wiring layer,
A first connection portion provided on a signal wiring layer such that a bypass capacitor is electrically connected between a power supply layer and a ground layer; A second connection portion provided in the signal wiring layer in close proximity to the first connection portion so that a bypass capacitor is electrically connected between the layer and the ground layer via an inductance element. A multilayer printed circuit board. 2. The multilayer printed circuit board according to claim 1, wherein the inductance element is configured by a wiring pattern provided on a signal wiring layer. 3. The multilayer printed circuit board according to claim 2, wherein the wiring pattern has a rectangular wave shape or a spiral shape. 4. The multilayer printed circuit board according to claim 1, wherein a plurality of sets of the first connection portion and the second connection portion are provided.