JP2000344599A - Method for growing oxide crystal, cerium oxide, promethium oxide, oxide laminated structure, production of field effect transistor, field effect transistor, production of ferroelectric non-volatile memory and ferroelectric non-volatile memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an epitaxial rare-earth oxide (001)/silicon (001) structure by epitaxially growing a rare earth oxide such as cerium oxide having (001) plane azimuth on a silicon substrate having (001) plane azimuth. SOLUTION: The surface of Si-substrate 1 of (001) plane azimuth is treated so as to convert the surface into a dimer structure by surface re-constitution of 2×1, 1×2, and then cubic or tetragonal rare-earth oxide, e.g. CeO2 film 2 is epitaxially grown in (001) plane azimuth on the Si-substrate 1 by a molecular beam epitaxy method or the like. During this growing, a raw material containing at least one rare earth element is supplied after starting of supplying an oxidizing gas onto the surface of Si-substrate 1. It is possible to thermally treat in vacuum after growing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for growing an oxide crystal, a cerium oxide, a promethium oxide, an oxide laminated structure, a method for manufacturing a field effect transistor, a field effect transistor, and a method for manufacturing a ferroelectric nonvolatile memory. The present invention relates to a method and a ferroelectric nonvolatile memory, and is particularly suitable for application to oxide electronics developed on a silicon substrate.

[0002]

BACKGROUND OF THE INVENTION Silicon oxide silicon formed by thermal oxidation of the (Si) (SiO ₂₎ film, electrically insulating high interface state density as low, the process specifically ease, thermal stability, etc. To date, MOS (Metal-Oxide-Semicond
uctor) -FET has been used exclusively as a gate insulating film. S by thermal oxidation used as a gate insulating film
The iO ₂ film has a low relative dielectric constant (ε _r ３3.8),
It must be formed very thin on the i-substrate. However, with the demand for integration, as the thickness of the gate insulating film becomes thinner and the channel becomes shorter, problems such as dielectric breakdown of the gate insulating film and pinch-off of the channel due to the influence of source / drain voltages (short channel effect) are prominent. The material limit of the gate insulating film is approaching. For these reasons, the technical issues of the sub-0.1 micron generation MOS-FET include not only the development of lithography technology, but also
The necessity of a new gate insulating film having a high dielectric constant is called out (for example, (1) MTL VLSI Seminar (Massachusett
s Institute of Technology)). It is considered that if a gate insulating film can be formed using a material having a high dielectric constant, it is not necessary to reduce the thickness, so that gate leakage can be suppressed and a short channel effect can be suppressed.

On the other hand, in recent years, ferroelectric nonvolatile memories (F
eRAM) (for example, (2) Appl. Phys. Lett., 48 (1986) 143)
9, (3) IEDM Tech.Dig., (1987) 850, (4) IEEE J. Solid
State Circuits, 23 (1988) 1171, (5) 1988 IEEE Int.Sol
id-State Circuits Conf. (ISSCC88), (6) Digest of Tec
hnical Papers, THAM 10.6 (1988) 130, (7) Oyo Buturi, 62
(1993) 1212). The ferroelectric non-volatile memory which is considered to be most practical at present is a ferroelectric non-volatile memory having a DRAM-like structure (2).
Using a two-transistor memory cell or a one-transistor one-capacitor memory cell). This structure has an advantage in that the CMOS process and the ferroelectric capacitor process can be separated by using an interlayer insulating film, so that interference with the Si process is relatively easily suppressed. However, in this ferroelectric non-volatile memory, since the scaling law of the Si device cannot be applied structurally, as the miniaturization progresses, the structure becomes complicated in order to secure the accumulated charge amount of the capacitor. Further, it is necessary to search for a material having a large remanent polarization value. On the other hand, MFS (Metal-Ferroelectrics-Semiconducto
r) -FET type memory cell (MFMIS (Metal-Ferroel
ectrics-Metal-Insulator-Semiconductor)-FET type memory cell, FCG (Ferroelectric Capacitor Gate)
There are a number of research institutes that are working on ferroelectric non-volatile memories that use non-volatile memory cells. This ferroelectric nonvolatile memory adheres to the scaling law,
The required remanent polarization is very small (~ 0.1 μC / cm ²
In addition, since data can be stored with only one transistor, the cell size is small, which is advantageous for high integration. Further, since it is a non-destructive read, a two-transistor two-capacitor memory cell or a
Compared with a transistor-1 capacitor type memory cell, it is advantageous for fatigue which is considered to be an essential problem of a ferroelectric, and can operate at high speed. Since such excellent characteristics can be expected, the MFS-FET type ferroelectric nonvolatile memory is considered to be the ultimate memory ((8) Appl. Surf. Sci. 113/114 (1997) 656). ).

It is a process problem that hinders the practical use of the MFS-FET type ferroelectric nonvolatile memory. It is extremely difficult to grow a ferroelectric directly on a Si substrate. Therefore, growing a buffer layer made of an insulator on a Si substrate is regarded as a very important technology. MFIS (Metal-Ferroelectrics-Insulator-S) is a kind of MFS-FET type ferroelectric nonvolatile memory.
In the case of an (emiconductor) -FET type ferroelectric nonvolatile memory, since a gate voltage is distributed also to an insulating layer, there is a disadvantage that a write voltage is increased. To suppress this, an insulating layer having a high dielectric constant is required. On the other hand, the material characteristics required for the ferroelectric material include a low dielectric constant and an appropriate remanent polarization value (depending on device design, typically ~ 0.1.
About 1 μC / cm ² ), and above all, a good squareness ratio. In order to realize a better interface, it is an important condition that these materials can be grown at a low temperature. Thus, one transistor-1
It is necessary to select and develop materials from a viewpoint different from that of the capacitor method. There are many research reports on MFIS-FET type ferroelectric non-volatile memories, but retention (charge retention characteristics) due to insufficient interface characteristics.
At present, there are almost no reports of what can be put into practical use including the above. On the other hand, an MF that can employ an existing SiO ₂ film by thermal oxidation as a gate insulating film
The MIS structure has also been studied ((9) Jpn.J. Appl. Phys., 33
(1994) 5207), which is considered to be relatively close to the practical stage. To further advance this, a method has been proposed in which a ferroelectric capacitor is separately formed, and this is connected to a polycrystalline Si gate by wiring ((10) JP-A-8-250608, (11) JP-A-8-250608). 9-205181). According to this method, not only is element separation between the ferroelectric substance and the Si transistor easy, but also the degree of freedom in designing the area ratio between the capacitor and the gate is increased. Sufficient polarization can be obtained at the write voltage. However, it is difficult to obtain a required squareness ratio stably with a polycrystalline ferroelectric, and as the miniaturization progresses, the material limit of the SiO ₂ film due to the above-mentioned thermal oxidation is faced. There is no. After all, MFS
-The key technology for realizing the FET type ferroelectric non-volatile memory also results in the growth of a high dielectric constant insulating film on a Si substrate. In order to realize a steep interface and a low interface state density equivalent to that of a SiO ₂ film due to thermal oxidation, it is advantageous to epitaxially grow a material having good lattice matching. Si <1 with maximum mobility
10> direction, a MOS-
Si (001) exclusively used as a substrate for FET
There are extremely high technical hurdles that need to be on the substrate.

On the other hand, it is significant to introduce an oxide material other than SiO ₂ into the semiconductor industry. 1986
Discovery of high-temperature superconducting materials in 1987 ((12) Z.Phys.B., 64,189-193)
(1986)) Needless to say, oxide materials having perovskite or related structures have very important physical properties for semiconductor devices, such as ferroelectricity, high dielectric constant, superconductivity, and giant magnetoresistance. ((13) Mater.
Sci. Eng., B41 (1996) 166, (14) J. Ceram. Soc. Japan, Int.
Ed., 103 (1995) 1088). For example, as a ferroelectric material of a capacitor of the above-described ferroelectric nonvolatile memory, lead zircon titanate (PZT) having a large spontaneous polarization value and a low process temperature (for example, (15) J. Appl. Phys., 70,382-388 (19
91)), bismuth strontium tantalate (Bi) having a low driving voltage and a small deterioration in spontaneous polarization value due to polarization reversal.
₂ SrTa ₂ O ₉ ((16) Nature, 374 (1995) 627, (17) Ap
pl.Phys.Lett., 66 (1995) 221, (18) Mater.Sci.Eng., B32
(1995) 75, (19) Mater.Sci. Eng., B32 (1995) 83, (20) App
l.Phys.Lett., 67 (1995) 572, (21) J. Appl. Phys., 78 (199
5) 5073, (22) Appl. Phys. Lett., 68 (1996) 566, (23) App
l.Phys. Lett., 68 (1996) 690, (24) International Publication WO9
No. 3/12542). Further, a super giant magnetoresistive material (CMR (Colossal Magnetoresistance) material) whose resistivity changes by many orders of magnitude upon application of a magnetic field is found in a Mn oxide system ((25) Phys. Rev. Lett. 74 (199)
5) 5108), etc., and attention has been paid to how high potential oxide materials have ((26) Mater. Sci. Eng., B41 (199)
6) 166, (27) J. Ceram. Soc. Japan, Int.Ed., 103 (1995) 108
8) The technology of thinning oxides has been developing phenomenally in the past decade.

If such an oxide material having extremely high physical properties can be developed on Si, which is the base of the semiconductor industry, it is possible to impart high marketability to the material. However, these functional oxide materials and S
In general, it is not easy to directly grow these functional oxide materials on Si due to problems such as mutual thermal diffusion and difference in coefficient of thermal expansion between i and i.

As described above, most of these functional oxide material groups have a structure having a perovskite structure as a base. Among them, yttrium-based superconducting material having a critical temperature exceeding the liquid nitrogen temperature, Bi ₂ described above
Many such as SrTa ₂ O _{9 have a} structure called layered perovskite with extremely large anisotropy. The superconducting current path, the polarization axis, and the like in these layered perovskite structure oxides are limited to specific directions,
In the case of a simple perovskite oxide, the above-mentioned PZT
In many cases, the polarization axis is limited to a specific direction. Therefore, in the case of a device, it is important that the oxide is oriented or more preferably epitaxially grown on the base in order to obtain the maximum characteristics.

Ceria (cerium oxide: CeO ₂ ) having a fluorite structure has a high thermal stability, a high relative dielectric constant (ε _r ２６26), and a very good lattice matching with a Si substrate. (Misfit: about 0.35%), it is one of the candidates for the material of the high dielectric constant gate insulating film of the sub-0.1 micron generation that can replace the SiO ₂ film by thermal oxidation. It is considered to be one of the most ideal buffer layer materials for epitaxially growing perovskite-related oxides. In fact, research on epitaxial growth of ceria on Si substrates has been conducted.
Most of them are CeO ₂ (11
1) / Si (111) structure (for example, (28)
Jpn. J. Appl. Phys. 34 (1995), L688, (29) JP-A-7-25
No. 698). However, the most important Si
For the (001) substrate, epitaxial CeO
It is recognized that the ₂ (001) / Si (001) structure is ideal, and various laminated structures and devices have been devised ((30) JP-A-2-267104, (31) JP-A-6-97452). JP, (32) JP-A-10-182292
No., etc.) have not been realized. Until now, CeO ₂ (110) having an antiphase domain, reflecting a dimer structure by surface reconstruction of Si (001) -2 × 1, 1 × 2.
Have been considered to grow epitaxially. The growth temperature is about 800 ° C. where no SiO ₂ film is formed on the Si surface in a high vacuum (see (33) J. Vac. Sci. Technol. A1).
3 (1995) 772) is considered to be the lower limit of the epitaxial temperature ((34) Jpn. J. Appl. Phys. 33 (1994), 5219, (3
5) Appl. Phys. Lett. 56 (1990), 1332, (36) Appl. Phys. Lett.
t.59 (1991), 3604, (37) Physica C 192 (1992) 154, (38) J
pn. J. Appl. Phys. 36 (1997), 5253, (39) JP-A-9-642
06 publication). In order to obtain a steep interface, it is considered necessary to lower the growth temperature. For this purpose, electron beam assisted epitaxial growth and the like have been attempted, but the reported epitaxial growth temperature is still 710 ° C.
Is the lower limit ((40) Proceedings of the 1998 Spring Meeting of the Japan Society of Applied Physics, 28p-PA-1). CeO ₂ (00
1) Although there are no reports on the / Si (001) structure,
There is no experimental data indicating this ((41) Japanese Patent Laid-Open No. 2-2671).
No. 4, No. 4, No. 4, No. 4, No. 4, No. 4 (42) Solid State Comm. 108 (1998) 225), etc. CeO epitaxially on Si (001) substrate
₂ (001), a solid solution of zirconia (zirconium oxide: ZrO ₂ ) and ceria (Ce, Zr)
_{O 2 ((43) Jpn.J.Appl.Phys.35 (} 1996), 5150), CeO 2 / (Ce, Zr) This was a buffer layer O ₂ / Si laminated structure ((44) Jpn.J. Appl. Phys. 36 (1997), 5253, (45) 19
Proceedings of the 1998 Spring Meeting of the Japan Society of Applied Physics 29p-
ZF-4) or CeO ₂ / SrTiO ₃ / Si structure ((46)
Jpn.J.Appl.Phys.30 (1991) L1136) has also been proposed,
There has been no report that CeO ₂ (001) was directly epitaxially grown on a Si (001) substrate.

C-rare earth structure (bixbyite
Yttria (yttrium oxide: Y ₂ O ₃ )
Is also being studied diligently because it has material properties similar to ceria, but has the same difficulties as ceria, and it is difficult for Y ₂ O ₃ (110) to epitaxially grow on a Si (001) substrate. It is customary ((47) Appl.Phy
s. Lett. 71 (1997), 903).

On the other hand, there is an example in which a perovskite oxide is epitaxially grown on ceria (or yttria) (for example, (48) Appl. Phys. Lett. 68 (1996) 553), and therefore, the orientation of ceria is controlled. If possible, it will be possible to realize a device utilizing the characteristics of the functional oxide.

[0011]

Under these circumstances, CeO ₂ (00) is applied on the most important Si (001) substrate for application.
The technique of epitaxially growing 1) is extremely important.

Accordingly, an object of the present invention is to epitaxially grow cerium oxide, yttrium oxide, and a rare earth oxide having a similar crystal structure on a (001) silicon substrate in a (001) plane orientation, An oxide crystal growth method capable of realizing an epitaxial rare earth oxide (001) / silicon (001) structure, a cerium oxide, a promethium oxide, an oxide laminated structure, and a crystal growth method of this oxide are gate insulating. Method of manufacturing field effect transistor applied to film formation, field effect transistor, method of manufacturing ferroelectric nonvolatile memory applying crystal growth method of this oxide to formation of ferroelectric capacitor, and ferroelectric nonvolatile memory Is to provide.

[0013]

Means for Solving the Problems The present inventor has conducted intensive studies in order to solve the above-mentioned problems of the prior art. The outline is described below. Here, the growth of cerium oxide will be described as a representative example.

That is, in order to achieve the above object, it is important that the surface of the silicon substrate is formed at least once as a surface composed of steps and terraces. Such a surface can be realized by, for example, a method proposed by Ishizaka, Shiraki, and the like ((49) J. Electrochem. Soc., 133 (1986) 666) or a method similar thereto. The growth apparatus has excellent interface controllability, easily maintains a clean surface in an ultra-high vacuum, and has a molecular beam epitaxy (MBE) apparatus, a laser ablation apparatus, and a surface observable by reflection high-energy electron diffraction (RHEED). A reactive vapor deposition device or the like is desirable, but basically any device can be used as long as it can control a predetermined pressure, temperature, and the like. Cerium oxide (CeO
₂ ) In the case of growth, cerium oxide itself is generally used as the cerium raw material in general. However, since oxygen having a high vapor pressure is selectively volatilized, it is necessary to control a low oxygen partial pressure. It is desirable to use cerium metal. However, it is considered that an oxide raw material may be used if a high vacuum is devised by using a getter pump or the like in combination with evacuation of the growth chamber. Since cerium metal has a high melting point and a low vapor pressure, it is desirable to vaporize it with a high-temperature Knudsen cell, electron beam evaporation, excimer laser, or the like. Further, in order to suppress the reaction between these gases or metal elements and the surface of the highly active silicon substrate, a low-temperature process is important. In the reports made so far, there is no particular description on the surface treatment, using cerium metal, a substrate temperature of 450 to 600 ° C., and (4 to 6) ×
Oxygen partial pressure of 10 ^-4 Torr (10 ^-2 Torr near the substrate)
), activated by RF plasma,
There is an example in which epitaxial CeO ₂ can be formed on a silicon substrate (Japanese Patent Laid-Open No. 2-2671).
04 publication). However, there is no description about the epitaxial growth orientation, and at such a substrate temperature and oxygen partial pressure, an SiO ₂ film is formed on the silicon substrate surface, and the epitaxial CeO ₂ (001) is not grown. It is considered that such a reaction is further promoted by activation with RF plasma.

The inventor of the present invention suppressed the rate of cerium silicide generation and silicon oxide generation by lowering the growth temperature, and from another viewpoint, epitaxially grown CeO ₂ (001) on a silicon (001) substrate. The conditions under which this was done were studied. As a result, first, silicon (0
01) It is basically important that the surface of the substrate has a dimer structure by 2 × 1, 1 × 2 surface reconstruction before growth, and furthermore, it is concluded that the method of supplying raw materials during growth is also important. Reached. For the method of supplying the latter,
Specifically, it is important to start supplying an oxidizing gas such as oxygen to the surface of a silicon (001) substrate first, and then start supplying a Ce raw material. Although the reason has not been completely elucidated at present, the fact that the surface of the silicon (001) substrate is covered with molecules or atoms of an oxidizing gas such as oxygen when the supply of the Ce raw material is started is considered.
It is presumed that it promotes (001) epitaxial growth of eO ₂ .

In addition to the above, CeO ₂ (001)
In order to grow epitaxially, the ratio of the supply amount of the oxidizing gas to the supply amount of the Ce raw material with respect to the growth temperature, or the partial pressure or the supply amount of the oxidizing gas is appropriate if the supply amount of the Ce raw material is fixed. It is important to choose. FIG. 1 shows the relationship between the growth temperature T and the ratio O / Ce of the supply amount of the oxidizing gas to the supply amount of the Ce raw material when the supply amount of the Ce raw material is fixed. However, for convenience, FIG.
On the vertical axis, O ₂ flow rate [sccm] instead of O / Ce
Are shown. From FIG. 1, it can be seen that the region where CeO ₂ (001) can be epitaxially grown is limited. Also, it can be seen that the upper limit of the growth temperature is around 300 ° C. Further, the range of the O / Ce or O ₂ partial pressure increases as the growth temperature is lowered, and a considerable range can be obtained by lowering the temperature below 100 ° C., which is practically preferable.

The present inventors have conducted studies from various viewpoints in addition to the above studies and findings, and have come up with the present invention.

That is, in order to solve the above-mentioned problem, a first invention of the present invention is a process for forming a (001) -oriented silicon substrate surface into a dimer structure by 2 × 1, 1 × 2 surface reconstruction. And a step of epitaxially growing a cubic or tetragonal rare earth oxide on the silicon substrate in a (001) plane orientation.

According to a second aspect of the present invention, there is provided a method of forming a surface of a silicon substrate having a (001) orientation into a dimer structure by 2 × 1, 1 × 2 surface reconstruction, and in an atmosphere containing an oxidizing gas. Epitaxially growing a cubic or tetragonal rare earth oxide on the silicon substrate in the (001) plane orientation using a raw material containing at least one or more rare earth elements. It is a growth method.

In the third aspect of the present invention, the rare earth oxide is typically grown epitaxially at a growth temperature of less than 300 ° C., preferably at a growth temperature of 100 ° C. or less.

According to a third aspect of the present invention, there is provided a step of heating a silicon substrate having a (001) orientation in a vacuum at a pressure of 1 × 10 ⁻⁶ Torr or less to volatilize a silicon oxide film on the surface thereof; Epitaxially growing a cubic or tetragonal rare earth oxide in the (001) plane orientation on the silicon substrate on which the silicon oxide film has been volatilized. .

According to a fourth aspect of the present invention, there is provided a cerium oxide having a bixbyite structure.

According to a fifth aspect of the present invention, there is provided a promethium oxide having a bixbyite structure.

According to a sixth aspect of the present invention, there is provided a silicon substrate having a (001) plane orientation, a first CeO ₂ film grown on the silicon substrate at a first growth temperature, and a first CeO ₂ film.
A _second CeO ₂ film epitaxially grown at a second growth temperature higher than the first growth temperature on the O ₂ film.

In the sixth aspect of the present invention, typically, the second CeO ₂ film has a (001) plane orientation. The first growth temperature is, for example, about room temperature to about 300 ° C. Further, an SiO _x film may be present at the interface between the silicon substrate and the first CeO ₂ film.

According to a seventh aspect of the present invention, there is provided a silicon substrate having a (001) orientation, an SiO _x film on the silicon substrate, an amorphous CeO _y film on the SiO _x film, and an amorphous CeO _y film on the amorphous CeO _y film. (001) -oriented CeO epitaxially arranged on the above silicon substrate
An oxide laminated structure having _two films.

In the sixth and seventh aspects of the present invention, _x of the SiO _x film usually _satisfies 1 ≦ x ≦ 2, and _{y of} the amorphous CeO _y film usually satisfies 1.5 ≦ x ≦ 2.

The oxide laminated structure according to the sixth invention (with or without the SiO _x film at the interface between the silicon substrate and the first CeO ₂ film) and the oxide laminated structure according to the seventh invention are shown in FIG. 1, 2 and 3 respectively.

According to an eighth aspect of the present invention, there is provided a method of forming a surface of a silicon substrate having a (001) orientation into a dimer structure by 2 × 1, 1 × 2 surface reconstruction, and forming a cubic system on the silicon substrate. Or a tetragonal rare earth oxide (001)
Forming a gate insulating film by epitaxially growing in a plane direction.

In the eighth aspect of the present invention, the gate insulating film is typically formed by epitaxially growing a rare earth oxide at a growth temperature of less than 300 ° C., preferably at a growth temperature of 100 ° C. or less. Further, the silicon oxide film on the surface is volatilized by heating the silicon substrate in a vacuum at a pressure of 1 × 10 ⁻⁶ Torr or less to form a dimer structure, and a rare earth oxide is epitaxially grown on the silicon substrate. In some cases, a gate insulating film is formed.

According to a ninth aspect of the present invention, there is provided a method of forming a surface of a silicon substrate having a (001) orientation into a dimer structure by 2 × 1, 1 × 2 surface reconstruction, and in an atmosphere containing an oxidizing gas. A gate insulating film is formed by epitaxially growing a cubic or tetragonal rare earth oxide in the (001) plane orientation on the silicon substrate at a growth temperature of less than 300 ° C. using a raw material containing at least one or more rare earth elements. Forming a field-effect transistor.

A tenth aspect of the present invention is a method for heating a silicon substrate having a (001) plane orientation in a vacuum at a pressure of 1 × 10 ⁻⁶ Torr or less to volatilize a silicon oxide film on the surface. Forming a gate insulating film by epitaxially growing a cubic or tetragonal rare earth oxide in the (001) plane orientation on the silicon substrate from which the silicon oxide layer is volatilized. This is a method for manufacturing a field effect transistor.

According to an eleventh aspect of the present invention, there is provided a silicon substrate having a (001) orientation and a cubic or tetragonal (001) crystal epitaxially grown on the silicon substrate.
A field effect transistor having a gate insulating film made of a rare earth oxide having a plane orientation and a ferroelectric film epitaxially grown on the gate insulating film.

According to a twelfth aspect of the present invention, there is provided a method of forming a surface of a silicon substrate having a (001) orientation into a dimer structure by 2 × 1, 1 × 2 surface reconstruction, and forming a cubic system on the silicon substrate. Alternatively, a tetragonal rare earth oxide (00
1) A method for manufacturing a ferroelectric nonvolatile memory, comprising: a step of epitaxially growing a crystal in a plane orientation; and a step of epitaxially growing a ferroelectric film on the rare earth oxide.

According to a thirteenth aspect of the present invention, there is provided a silicon substrate having a (001) plane orientation and a cubic or tetragonal (001) crystal epitaxially grown on the silicon substrate.
A ferroelectric nonvolatile memory using a field-effect transistor having a gate insulating film made of a rare-earth oxide having a plane orientation and a ferroelectric film epitaxially grown on the gate insulating film.

According to a fourteenth aspect of the present invention, there is provided a silicon substrate having a (001) plane orientation and a cubic or tetragonal (001) plane orientation epitaxially grown on the surface of the first region of the silicon substrate. A capacitor using a rare earth oxide, a ferroelectric film epitaxially grown on the rare earth oxide, and a MIS-FET formed in a second region of the silicon substrate; A ferroelectric nonvolatile memory characterized in that a gate electrode of an FET is connected to each other by a wiring.

According to a fifteenth aspect of the present invention, there is provided a single crystal insulator substrate and a cubic or tetragonal (0) epitaxially grown on the surface of the first region of the single crystal insulator substrate.
01) Forming on a rare earth oxide having a plane orientation, a capacitor using a ferroelectric film epitaxially grown on the rare earth oxide, and a silicon film epitaxially grown on the surface of the second region of the single crystal insulator substrate MIS-
FET, the capacitor and the MIS-FET
Are connected to each other by a wiring.

In the present invention, the silicon substrate having the (001) plane orientation includes a silicon substrate turned off from the (001) plane within a range substantially equivalent to the (001) plane orientation.

In the present invention, the rare earth oxide is, specifically, an oxide of a rare earth element such as cerium (Ce) or yttrium (Y). In addition to the oxide of one rare earth element, Oxides of two or more rare earth elements are also included. When this rare earth oxide is expressed as ReO _z (where Re is a rare earth element), 0 <z ≦ 3 is usually satisfied. The rare-earth oxide is cubic or tetragonal, but may include those slightly distorted within a range recognized as cubic or tetragonal. This rare earth oxide typically has a fluorite structure (CeO ₂ structure; fluorite structure)
Or C-rare earth structure (Y ₂ O ₃ structure;
xbyite) structure).

In the present invention, from the viewpoint of more securely growing the rare earth oxide in the (001) plane orientation, it is preferable to supply an oxidizing gas to the surface of the silicon substrate when growing the rare earth oxide epitaxially. After the start, a raw material containing at least one or more rare earth elements is supplied. The raw material containing at least one or more rare earth elements may be made of at least one or more rare earth elements, or may be made of, for example, a rare earth oxide. Here, the rare earth element is a metal element.

In the present invention, after the rare earth oxide is epitaxially grown, a step of performing a heat treatment at a temperature equal to or higher than the growth temperature of the rare earth oxide in a vacuum at a pressure of 1 × 10 ⁻⁶ Torr or less may be further provided. . By this heat treatment in vacuum, a part of oxygen is extracted from the rare earth oxide. Here, particularly when the rare earth oxide is CeO _z , after this CeO _z is epitaxially grown,
CeO in a vacuum at a pressure of 1 × 10 ⁻⁶ Torr or less
_A heat treatment is performed at a temperature equal to or higher than the growth temperature of _z, and a part of O is extracted from CeO _z to obtain an oxygen-defective fluorite structure or a C-rare earth structure (bixbite structure).
_zd can be generated. Here, z−d in CeO _zd is usually 1.5 ≦ z−d <2, typically, for example, 1.5 ≦ z−d ≦ 1.8. Rare earth oxides can generate CeO _zd take bixbyite structure in the same manner when a PMO _z. The method may further include, after epitaxially growing the rare earth oxide, a step of homoepitaxially growing the rare earth oxide on the rare earth oxide at a growth temperature higher than the growth temperature of the rare earth oxide. Further, after the rare earth oxide is epitaxially grown, a step of epitaxially growing a functional oxide on the rare earth oxide may be further provided.

In the present invention, a silicon oxide film or a defect layer having a thickness of 5 nm or less may be formed at the interface between the silicon substrate and the rare earth oxide after the growth of the rare earth oxide, depending on the growth conditions and the like.

In the present invention, the functional oxide typically has a perovskite structure or a layered perovskite structure. Such a functional oxide may be basically any type, and specifically, is a ferroelectric, a superconductor, a pyroelectric, a piezoelectric, or the like.

According to the present invention configured as described above, the surface of the silicon substrate having the (001) plane orientation is 2 × 1,
Dimer structure by 1 × 2 surface reconstruction,
Preferably, when the rare-earth oxide is epitaxially grown, the supply of the oxidizing gas to the surface of the silicon substrate and then the supply of a raw material containing at least one or more rare-earth elements are performed, so that the (001) plane orientation is improved. A rare earth oxide can be favorably epitaxially grown in a (001) plane orientation on a silicon substrate.

[0045]

Embodiments of the present invention will be described below with reference to the drawings. In all the drawings of the embodiments, the same or corresponding portions are denoted by the same reference numerals.

First, an MBE apparatus used for growing CeO _{2 in} the following embodiments will be described. This MBE
Although the apparatus is not impossible even with an MBE apparatus designed for normal semiconductor growth, nozzles, piping, etc. are installed so that an oxidizing gas, preferably oxygen gas, can be introduced into the growth chamber, Further, it is necessary that the growth chamber, the heater, the cell, and the like are constituted by oxidation-resistant members. In addition, in order to be able to monitor the state of the substrate surface, a high-speed electron beam can be made incident on the substrate surface at an angle of several degrees or less, and its electron beam diffraction image can be observed. A screen coated with a phosphor is provided (RHEED system). The susceptor of the substrate is made of silicon carbide (SiC), and is heated from the back by a SiC heater. In order to supply the source material, three Knudsen cells for generating a molecular beam and two electron beam (EB) guns for electron beam evaporation are provided. The oxidizing gas is supplied to the vicinity of the substrate by a nozzle after the flow rate is controlled by the mass flow controller, and is blown to the substrate.

First, an oxide crystal growth method according to the first embodiment of the present invention will be described.

In the first embodiment, first, as shown in FIG. 5A, a Si substrate 1 having a (100) plane orientation is prepared.

Next, the surface treatment of the (100) Si substrate 1 is performed. This surface treatment is performed by the above-mentioned method proposed by Ishizaka, Shiraki, or the like, or a method similar thereto.
This is performed by forming a highly volatile SiO ₂ film on the surface and exposing the surface by heat treatment. Specifically, the Si substrate 1 was subjected to RCA cleaning, and then subjected to a treatment in concentrated nitric acid boiled at 120 to 130 ° C. for 10 minutes (etching of the substrate surface and formation of a SiO ₂ film) and 2.5% 10 with dilute hydrofluoric acid
The process (removal of the SiO ₂ film) for about 15 seconds is repeated three to four times to form a flat surface. Next, it was heated to 90 ° C. with ammonia peroxide (NH ₄ OH: H ₂ O).
₂ : H ₂ O = 1: 1: 3) to form a thin SiO ₂ film on the surface of the Si substrate 1 (10 minutes), and treat it with 2.5% diluted hydrofluoric acid for about 10 to 15 seconds (SiO 2 ₂ film removal). It was heated again to 90 ° C. with ammonia peroxide (N
_{H 4 OH: H 2 O 2} : H 2 O = 1: 1.25: 3) was placed in a thin SiO ₂ film is formed (10 minutes), rinsed with further resistivity 18MΩcm or ultrapure water Then, water droplets on the substrate surface are removed with nitrogen gas, and the substrate is put into a growth chamber of an MBE apparatus. Then, in this growth chamber, at 600 ° C.
After degassing for 1 hour, the temperature is raised to 1000 ° C. and held for several seconds to volatilize SiO from the surface of the Si substrate 1 (Si
+ SiO ₂ → 2SiO ↑). In this process, when the temperature is raised to about 850 ° C., a 2 × 1, 1 × 2 reconstructed surface is obtained (FIG. 5B). The Si substrate 1 on which the dimer structure is formed by the 2 × 1, 1 × 2 surface reconstruction in this manner is cooled to a growth temperature to obtain a CeO ₂ growth substrate. In the experiment of the present inventor, SiC was used for the heater and the susceptor, and the island-like structure which is considered to be usually a contamination and was considered as SiC was not completely removed.

Next, as shown in FIG. 5C, 2 × 1, 1 ×
At a low substrate temperature of about 100 ° C. or less, cerium metal and oxygen are used as raw materials on the Si substrate 1 on the surface of which a dimer structure is formed by the surface reconstruction of FIG. To grow the CeO ₂ film 2 having the (001) plane orientation epitaxially. Specifically, for example, cerium metal and oxygen are supplied into the growth chamber at a substrate temperature of 27 ° C., an EB gun current of 150 mA, and an oxygen flow rate of 0.05 sccm. What is important at this time is that the supply of oxygen to the surface of the Si substrate 1 is first started, and then the supply of cerium metal is performed. When growth is performed in this manner, it is confirmed on the RHEED screen that CeO ₂ (001) is grown epitaxially. FIGS. 6 and 7 show (001) CeO _2.
The simulation pattern of the electron beam diffraction position by <100> incidence of the film and the RHEED pattern actually obtained are shown, respectively. 8 and 9 show (00)
1) Simulation pattern of electron beam diffraction position due to <110> incidence of CeO ₂ film and RH actually obtained
3 shows an EED pattern. Under the above conditions, the CeO ₂ film 2
When the film was grown to a thickness of about nm or more, the orientation tended to deteriorate as the film thickness increased. FIG. 10 shows an example of a cross-sectional lattice image (<110> incident) of the CeO ₂ (001) / Si (001) structure obtained by the transmission electron microscope. 10, the Si substrate 1 and CeO
_{2 At} the interface with the film 2, a defect layer (SiO _x
CeO ₂ film 2)
Are aligned with those of the Si substrate 1,
It can be seen that the eO ₂ film 2 is grown epitaxially.

As described above, according to the first embodiment, after the surface of the (001) Si substrate 1 has a dimer structure by 2 × 1, 1 × 2 surface reconstruction, cerium metal and oxygen was fed at the appropriate rate, it is preceded by the supply of this case oxygen, by doing growth at a low temperature of the substrate temperature below about 100 ° C., a CeO ₂ film 2 (00
1) The epitaxial growth can be favorably performed in the plane orientation.

Next, an oxide crystal growth method according to the second embodiment of the present invention will be described.

In the second embodiment, as shown in FIG. 11A, first, as shown in FIG.
(001) CeO is formed on a (001) Si substrate 1 having a dimer structure formed on the surface by × 1, 1 × 2 surface reconstruction.
_{2 The} film 2 is epitaxially grown. The thickness of the CeO ₂ film 2 is, for example, 5 nm.

Next, this CeO ₂ film 2 is subjected to a heat treatment in a growth chamber of an MBE apparatus in a vacuum (for example, on the order of 10 ⁻⁹ Torr). FIGS. 12 to 17 show changes in the RHEED pattern due to the heat treatment in vacuum. 12 to 14 show the case of <100> incidence, FIG. 12 shows an RHEED pattern at room temperature immediately after growth, FIG. 13 shows an RHEED pattern at a heat treatment temperature of 300 ° C., and FIG. 14 shows a heat treatment temperature of 600 ° C. This is the RHEED pattern at the time of. 15 to 17 show the case of <110> incidence.
Is the RHEED pattern at room temperature immediately after growth, FIG.
Is the RHEED pattern when the heat treatment temperature is 300 ° C.
FIG. 17 shows a RHEED pattern when the heat treatment temperature is 600 ° C. From FIG. 12 to FIG. 17, it can be seen that the surface is once planarized by the heat treatment in a vacuum of about 300 ° C., and a super lattice spot appears by the heat treatment in a vacuum of about 500 ° C. or more. By raising the temperature to 900 ° C. and then cooling to room temperature, a (001) CeO _2-x film 3 in the bixbite phase is obtained as shown in FIG. 11B. <1 of this sample
FIG. 19 shows a RHEED pattern caused by incidence of <00>, and FIG. 18 shows a simulation pattern of an electron beam diffraction position caused by incidence of <100> of the CeO _2-x (001) film in the bixbyite phase. Further, R due to <110> incidence of the same sample
The HEED pattern is shown in FIG.
FIG. 20 shows a simulation pattern of the electron beam diffraction position due to the <110> incidence of the _2-x (001) film. From the consideration of the extinction rule, the space group is determined to be Ia3 (206) (FIGS. 18 and 20). This is considered to be an oxygen-deficient phase CeO _2-X having the same shape as Y ₂ O ₃ ((51) JCP
DS: 23-1048, 44-1086). The bixbyite phase is considered with respect to oxygen is nonstoichiometric, it has only stable novel substance in a high vacuum, 10 ^-7 the To
Under an oxygen pressure of rr or more, the superlattice pattern tended to disappear.

As described above, according to the second embodiment, a dimer structure is formed on the surface by 2 × 1, 1 × 2 surface reconstruction as in the first embodiment (00).
1) A (001) CeO ₂ film 2 is epitaxially grown on a Si substrate 1 and then subjected to a heat treatment in a vacuum.
The (001) CeO _2-x film 3 in the bixbite phase can be obtained.

Next, an oxide crystal growth method according to the third embodiment of the present invention will be described.

In the third embodiment, first, as shown in FIG. 22A, similar to the second embodiment,
The (001) of the bixbite phase on the (001) Si substrate 1
A CeO _2-x film 3 is formed. Here, the CeO _2-x film 3 does not have to have a _constant ratio of Ce ₂ O ₃ .

Next, as shown in FIG. 22B, CeO _2-x
A CeO ₂ film 4 is homoepitaxially grown on the film 3 in a (001) plane orientation. Specifically, the growth of the CeO ₂ film 4 is performed, for example, at a substrate temperature of 700 ° C. under an EB gun current of 150 mA and an oxygen flow rate of 0.25 sccm.
The CeO ₂ film 4 has a thickness of, for example, 45 nm. CeO thus grown homoepitaxially
The RHEED pattern of the _two films 4 is shown in FIGS. Here, FIG. 23 shows the case of <100> incidence, and FIG. 24 shows the case of <110> incidence. Under the conditions of the first embodiment, it was difficult to grow the CeO ₂ film to a thickness of about 5 nm or more, but by performing homoepitaxial growth as in the third embodiment, the temperature of 700 ° C.
At such a high substrate temperature, the CeO ₂ film 4 can be grown thick. At this time, the underlayer for homoepitaxial growth may be a phase in which a superlattice pattern is not recognized under an oxygen pressure of 10 ^-7 Torr or more.
In order to ease the diffusion of oxygen to the eO ₂ / Si interface, it is considered preferable to go through the step of forming the bixbite-phase CeO _2-x film 3 as described in the second embodiment.

Epitaxial Ce according to the first embodiment
Although the O ₂ film 2 was difficult to analyze by X-ray because of its small thickness, the homoepitaxial CeO ₂ film 4
Since the film thickness is sufficiently large, analysis using X-rays has become possible. FIG. 25 shows an X-ray by θ / 2θ scan of CeO ₂ (001) / Si (001) obtained by homoepitaxially growing a (001) CeO ₂ film at a substrate temperature of 700 ° C. on a CeO _2-x film grown at room temperature. The measurement result of a diffraction pattern is shown. However, the diffractometer used for this measurement has a degree of freedom of tilt α and in-plane rotation β in addition to θ / 2θ, and is capable of measurement such as axial stand and φ scan. The X-ray source is a CuKα ray.

In the X-ray diffraction pattern shown in FIG. 25, the diffraction peak from Si substrate 1 very close to CeO ₂ (002) is superimposed, reflecting good lattice matching. Here, this diffraction peak is described as Si (002) for convenience. This is a forbidden reflection in a Si crystal having a diamond structure (space group: Fd3m). Although there are various opinions about the interpretation of the diffraction peak, at least the main components are, for example, (111) and (-1-1) because of the unique in-plane rotation angle dependence.
It is considered to be double diffraction due to the combination of (1) and the like ((52) Materia 37, No. 5, p. 421 (19)
98)). For this reason, as usual, Si (00
4) Even if the alignment is performed at the peak, the intensity of Si (002) is generally not reproducible. On the other hand, since the background component is also recognized depending on the in-plane rotation angle,
There is a possibility that symmetry is reduced due to crystal imperfections or a surface or an interface that is imperfect as a crystal, and a component observed as a diffraction peak may be present. Here, this S
After setting the sample to the in-plane rotation angle at which the i (002) peak appears, the axis was set so that the symmetric reflection of Si (004) had the maximum intensity, and the crystal was evaluated.

The data of the X-ray diffraction pattern shown in FIG. 25 show that the oxidizing gas introduction nozzle is close to the substrate,
Since the oxygen feed concentration during the growth of the ₂ films are some distribution,
This is an evaluation of a 10 mm square area near the tip of the nozzle of the sample. In this region, CeO ₂ (111), (22)
0), etc., is hardly observed, and single-phase CeO
_It can be seen that ₂ (001) is formed. S in FIG.
FIG. 26 is an enlarged view of the vicinity of the i (002) and CeO ₂ (002) peaks. In FIG. 26, the superposition of the peaks is inevitable, but the CeO ₂ (002) peak is clearly recognized. The lattice constant is slightly smaller than the bulk value (〜5.411Å), and is about 5.392Å.

CeO ₂ ｛2 of the samples of FIGS. 25 and 26
FIG. 27 shows φ scan data of the peaks of 04 ° and the Si {202} substrate. According to FIG. 27, CeO ₂ ｛20
4}, the in-plane rotation phases of the substrate Si {202} are aligned, and it can be confirmed that the crystal axes of CeO ₂ and Si overlap the cube on cube in a macroscopic region, From this result, the CeO ₂ film 4
Epitaxial growth is confirmed.

[0063] Figure 28, (001) after growing the CeO _2-x film 3 at room temperature on the Si substrate 1, the CeO _2-x film 3
An example of a cross-sectional lattice image by a transmission electron microscope of a sample in which the CeO ₂ film 4 is homoepitaxially grown thick at 700 ° C. in the (001) plane orientation is shown above. However, in FIG. 28, the CeO _2-x film 3 is described as CeO _x . Since CeO _x is amorphous, it is described as a-CeO _x . According to FIG. 28, although a-SiO _x having a thickness of 2.5 nm exists at the interface between the Si substrate 1 and the CeO ₂ film 4, the lattice fringes of the CeO ₂ film 4 are aligned with those of the Si substrate 1. It can be seen that the CeO ₂ film 4 is grown epitaxially.

As described above, according to the third embodiment, the (001) CeO _2-x film 3 of the bixbite phase is formed on the (001) Si substrate 1 in the same manner as the second embodiment. After the formation, a CeO ₂ film 4 is formed on this CeO _2-x film 3 (0
01) The epitaxial (001) CeO having a sufficient thickness is grown by homoepitaxial growth in the plane orientation.
_Two films 4 can be obtained.

Next, a method of manufacturing the ferroelectric nonvolatile memory according to the fourth embodiment will be described. This ferroelectric nonvolatile memory is composed of CeO ₂ (001) / S
MIS-F using i (001) epitaxial structure
This is a ferroelectric nonvolatile memory using ET and a ferroelectric capacitor gate (FCG). FIG. 29 shows a completed state of the ferroelectric nonvolatile memory.

In the fourth embodiment, first, in the same manner as in the first embodiment, an epitaxial (001) CeO
_{The two} films 12 are selectively formed. In order to form the CeO ₂ film 12, the surface of the Si substrate 11 may be selectively covered with a growth mask (not shown), and the CeO ₂ film 12 may be selectively epitaxially grown. To C
After the eO ₂ film 12 is epitaxially grown, the CeO
The O ₂ film 12 may be patterned by ion milling or the like.

As a process other than the formation of the (001) CeO ₂ / (001) Si structure, a conventional semiconductor process can be basically used. That is, for example, first, the surface of the Si substrate 11 is selectively thermally oxidized by the LOCOS (Local Oxidation of Silicon) method to form the field insulating film 13 made of a SiO ₂ film. Next, a gate insulating film 14 made of a SiO ₂ film is formed on the surface of the active region surrounded by the field insulating film 13 by a thermal oxidation method. Next, a polycrystalline Si film is formed on the entire surface by a CVD (Chemical Vapor Deposition) method or the like.
After the film is doped with impurities to reduce the resistance, the polycrystalline S
The gate electrode 15 is formed by etching and patterning the i film. Next, impurities are ion-implanted into the Si substrate 1 by using the gate electrode 15 as a mask, and a heat treatment for electrically activating the impurities is performed as necessary, so that the source region 16 and the drain region 1 are formed.
7 is formed in self-alignment with the gate electrode 15. As an impurity, when an n-channel MIS-FET is formed, an n-type impurity, for example, arsenic (As) is used.
When a channel MIS-FET is formed, a p-type impurity, for example, boron (B) is used.

Next, on the (001) CeO ₂ film 12, a lower electrode 18 made of a conductive oxide such as (001) SrRuO ₃ , for example, a ferroelectric film 19 made of (001) PZT and a 001) An upper electrode 20 made of a conductive oxide such as SrRuO ₃ is sequentially formed,
Form a ferroelectric capacitor. Here, the lower electrode 18
Is formed larger than the ferroelectric film 19 and the upper electrode 20 so that a wiring can be connected later. These conductive oxides and ferroelectric films can be epitaxially grown by a sputtering method, a CVD method, or the like. In this case, the growth may be performed selectively using a growth mask, or may be performed by ion milling or the like using a mask made of a SiO ₂ film or the like after growing the entire surface.

Next, for example, the SiO
_After an interlayer insulating film 21 such as a _two- layer film is formed, a predetermined portion of the interlayer insulating film 21 on the gate electrode 15, a predetermined portion on the upper electrode 20, and a predetermined portion on the lower electrode 18 are removed by etching. Contact holes 22, 2
3 and 24 are formed. Next, for example, aluminum (Al) is formed on the entire surface by, for example, a vacuum evaporation method or a sputtering method.
After the film is formed, the Al film is patterned by etching to form a local wiring 25 connecting the gate electrode 15 and the upper electrode 20 and a local wiring 26 connected to the lower electrode 18.

By the above steps, as shown in FIG.
A ferroelectric nonvolatile memory having an MFMIS structure in which a ferroelectric capacitor is connected to the gate electrode 15 of the MIS-FET is manufactured.

According to the ferroelectric nonvolatile memory according to the fourth embodiment, not only the above-mentioned ferroelectric nonvolatile memory having the MFS (MFMIS) structure has many advantages, but also a high reliability. Since a high SiO ₂ film can be used as a gate insulating film and the ferroelectric capacitor is formed separately from the MIS-FET, the degree of freedom in designing the gate / capacitor area ratio is large, and the ferroelectric By making the capacitor relatively small, sufficient ferroelectric polarization can be obtained even at a low voltage, and above all, the ferroelectric film 19 can be formed as an epitaxial single-crystal thin film. Type is expected, M
The most important feature of the ferroelectric nonvolatile memory having the FS structure is that it is extremely advantageous for retention, disturbance, and the like, which are the biggest problems of the ferroelectric nonvolatile memory. Also, CeO ₂ (001)
/ Si (001) interface is made of SiO _x
Although there is a possibility of deterioration such as formation of a film, in this structure, as long as a conductive oxide such as SrRuO ₃ grows epitaxially on (001) CeO ₂ , device operation can be performed even if interface deterioration occurs. There is no problem and the process is more advantageous than the conventional MFIS structure ferroelectric nonvolatile memory.

Next, a method of manufacturing the ferroelectric nonvolatile memory according to the fifth embodiment of the present invention will be described. In this ferroelectric nonvolatile memory, CeO ₂ (00
1) A ferroelectric non-volatile memory using a MIS-FET and FCG using a sapphire (1-102) epitaxial structure. FIG. 30 shows a completed state of the ferroelectric nonvolatile memory.

As shown in FIG. 30, in order to manufacture this ferroelectric nonvolatile memory, first, an epitaxial layer is formed on the surface of a capacitor forming region of a sapphire substrate 51 having a so-called r-plane, that is, a (1-102) plane orientation. (001) C
An eO ₂ film 52 is formed. This r-plane sapphire substrate 51
The formation of the epitaxial (001) CeO ₂ film 52 thereon can be performed very easily. Next, a single crystal Si film 53 serving as a channel layer is epitaxially grown on the surface of the MIS-FET formation region of the sapphire substrate 51. Next, after forming a gate insulating film 54 such as a SiO ₂ film on the surface of the single crystal Si film 53, a gate electrode 55 made of, for example, polycrystalline Si doped with impurities is formed. next,
Using the gate electrode 55 as a mask, impurities are ion-implanted into the single-crystal Si film 53 to form a source region 56.
And a drain region 57 is formed in self-alignment with the gate electrode 55. In this way, SOI (Silicon
An MIS-FET having an on-insulator structure is formed. Next, as in the fourth embodiment, (001) CeO ₂
On the film 52, a lower electrode 58 made of a conductive oxide such as (001) SrRuO ₃ , for example, (001) PZT
A ferroelectric film 59 made of a ferroelectric material such as, for example, and an upper electrode 60 made of a conductive oxide such as (001) SrRuO ₃ are formed. Next, after an interlayer insulating film 61 such as a SiO ₂ film is formed on the entire surface by, for example, a CVD method,
Contact holes 62, 63, and 64 are formed by etching and removing predetermined portions of the interlayer insulating film 61 on the gate electrode 55, predetermined portions on the upper electrode 60, and predetermined portions on the lower electrode 58. Next, after forming, for example, an Al film on the entire surface by, for example, a vacuum deposition method, a sputtering method, or the like, the Al film is patterned by etching, and the local wiring 65 and the lower electrode 58 for connecting the gate electrode 55 and the upper electrode 60 are formed. Local wiring 6 connected to
Form one.

By the above steps, as shown in FIG.
The single-crystal Si film 53 serving as the channel layer of the MIS-FET and the lower electrode 58, the ferroelectric film 59, and the upper electrode 66 of the ferroelectric capacitor are all epitaxial films, and are formed on the gate electrode 55 of the MIS-FET. A ferroelectric nonvolatile memory having an MFMIS structure to which a ferroelectric capacitor is connected is manufactured.

The ferroelectric nonvolatile memory shown in FIG. 30 can obtain the same advantages as the ferroelectric nonvolatile memory according to the fourth embodiment.
By having an OI structure, suppression of short channel effects,
Advantages such as reduction in parasitic capacitance and lower operating voltage can be obtained.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above embodiments, and various modifications based on the technical idea of the present invention are possible.

For example, in the above-described first embodiment, when the (001) CeO ₂ film 2 is grown, the surface of the Si substrate 1 is treated by the method proposed by Ishizaka, Shiraki, etc., but not necessarily. It is not necessary to do so, and other methods may be used.

[0078]

As described above, according to the present invention, a rare earth oxide such as cerium oxide is epitaxially grown in a (001) plane on a silicon substrate having a (001) plane. 001)
/ Silicon (001) structure can be realized. By forming a gate insulating film of a field effect transistor or a base layer of a ferroelectric film in a ferroelectric nonvolatile memory using this epitaxial (001) rare earth oxide, a field effect transistor having good characteristics can be obtained. A ferroelectric nonvolatile memory can be obtained.

[Brief description of the drawings]

FIG. 1 is a schematic diagram for explaining the relationship between the obtained plane orientation and growth conditions when growing CeO ₂ on a (001) Si substrate.

FIG. 2 is a schematic diagram illustrating an example of an epitaxial structure formed on a (001) Si substrate.

FIG. 3 is a schematic diagram illustrating an example of an epitaxial structure formed on a (001) Si substrate.

FIG. 4 is a schematic diagram illustrating an example of an epitaxial structure formed on a (001) Si substrate.

FIG. 5 is a cross-sectional view for explaining the oxide crystal growth method according to the first embodiment of the present invention.

FIG. 6 is a schematic diagram showing a simulation pattern of an electron diffraction position of a (001) CeO ₂ film grown in the first embodiment of the present invention by <100> incidence.

FIG. 7 is a diagram showing an RHEED pattern actually obtained by <100> incidence of a (001) CeO ₂ film grown in the first embodiment of the present invention.

FIG. 8 is a schematic diagram showing a simulation pattern of an electron diffraction position of a (001) CeO ₂ film grown in the first embodiment of the present invention due to <110> incidence.

FIG. 9 is a diagram showing an RHEED pattern obtained by <110> incidence of a (001) CeO ₂ film grown in the first embodiment of the present invention.

FIG. 10 shows a cross-sectional lattice image of a sample obtained according to the first embodiment of the present invention, taken by a transmission electron microscope.

FIG. 11 is a cross-sectional view for explaining the oxide crystal growth method according to the second embodiment of the present invention.

FIG. 12 shows a second embodiment of the present invention;
FIG. 1 is a schematic diagram showing a RHEED pattern immediately after the growth of a CeO ₂ film.

FIG. 13 shows a second embodiment (00)
1) A schematic diagram showing a RHEED pattern obtained by <100> incidence after performing a heat treatment in vacuum at 300 ° C. after growth of a CeO ₂ film.

FIG. 14 shows a second embodiment of the present invention (00
1) A schematic diagram showing a RHEED pattern obtained by <100> incidence after heat treatment in vacuum at 600 ° C. after growth of a CeO ₂ film.

FIG. 15 shows a second embodiment of the present invention;
1) A schematic diagram showing a RHEED pattern obtained by <110> incidence immediately after the growth of a CeO ₂ film.

FIG. 16 shows a second embodiment of the present invention (00
1) A schematic diagram showing a RHEED pattern obtained by <110> incidence after a heat treatment in vacuum at 300 ° C. after growth of a CeO ₂ film.

FIG. 17 shows a second embodiment of the present invention (00
1) A schematic diagram showing a RHEED pattern obtained by <110> incidence after heat treatment in vacuum at 600 ° C. after growth of a CeO ₂ film.

FIG. 18 is a schematic diagram showing a simulation pattern of an electron diffraction position of a (001) CeO _2-x film obtained after performing a heat treatment in a vacuum in the second embodiment of the present invention by <100> incidence. .

FIG. 19 is a view showing a RHEED pattern obtained by <100> incidence of a (001) CeO _2-x film obtained after performing a heat treatment in a vacuum in the second embodiment of the present invention.

FIG. 20 is a schematic diagram showing a simulation pattern of an electron beam diffraction position of a (001) CeO _2-x film obtained by performing a heat treatment in a vacuum in the second embodiment of the present invention due to <110> incidence. .

FIG. 21 is a diagram showing an RHEED pattern obtained by <110> incidence of a (001) CeO _2-x film obtained after performing a heat treatment in a vacuum in the second embodiment of the present invention.

FIG. 22 is a cross-sectional view for explaining the oxide crystal growth method according to the third embodiment of the present invention.

FIG. 23 shows a graph of <10 of the (001) CeO ₂ film homoepitaxially grown in the third embodiment of the present invention.
0> is a diagram showing a RHEED pattern obtained by incidence.

FIG. 24 shows that the (001) CeO ₂ film homo-epitaxially grown in the third embodiment of the present invention has a <11
0> is a diagram showing a RHEED pattern obtained by incidence.

FIG. 25 is a schematic diagram showing an X-ray diffraction pattern of a (001) CeO ₂ film homoepitaxially grown in the third embodiment of the present invention.

26 is a schematic diagram showing an enlarged part of the X-ray diffraction pattern shown in FIG.

FIG. 27 shows a third embodiment of the present invention (00
1) Schematic diagrams showing φ scan data of CeO ₂ {204} and Si {202} peaks of a sample on which a CeO ₂ film is homoepitaxially grown.

FIG. 28 shows a cross-sectional lattice image of a sample obtained according to the third embodiment of the present invention, taken by a transmission electron microscope.

FIG. 29 is a cross-sectional view for explaining the method for manufacturing the ferroelectric nonvolatile memory according to the fourth embodiment of the present invention.

FIG. 30 is a cross-sectional view for explaining the method for manufacturing the ferroelectric nonvolatile memory according to the fifth embodiment of the present invention.

[Explanation of symbols]

1, 11,... Si substrate, ₂ , 4, 12,.
Film, 3 ... CeO _2-x film, 14, 54 ... Gate insulating film, 15, 55 ... Gate electrode, 18, 58 ...
Lower electrode, 19, 59 ... ferroelectric film, 20, 60
..Top electrodes

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01L 21/8242 H01L 29/78 301G 29/78 301Q 21/8247 371 29/788 29/792 (72) Invention Person Naomi Nagasawa 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo, Japan Sony Corporation (72) Inventor Masayuki Suzuki 6-35, Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Inventor Akio Machida 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (54) [Title of Invention] Oxide crystal growth method, cerium oxide, promethium oxide, oxide laminated structure, field-effect tiger Method of manufacturing transistor, field effect transistor, method of manufacturing ferroelectric nonvolatile memory, and ferroelectric nonvolatile memory

Claims (51)

[Claims] 1. A step of forming a surface of a (001) oriented silicon substrate into a dimer structure by 2 × 1, 1 × 2 surface reconstruction, and cubic or tetragonal rare earth oxidation on the silicon substrate. Epitaxial growth of a substance in a (001) plane orientation. 2. When epitaxially growing the rare earth oxide, supply of an oxidizing gas to the surface of the silicon substrate is started, and then supply of a raw material containing at least one or more rare earth elements is performed. The method for growing an oxide crystal according to claim 1. 3. The method of growing an oxide crystal according to claim 2, wherein said raw material containing at least one or more rare earth elements comprises at least one or more rare earth elements. 4. The method according to claim 2, wherein the raw material containing at least one or more rare earth elements is made of a rare earth oxide. 5. The method according to claim 1, further comprising, after epitaxially growing the rare earth oxide, performing a heat treatment at a temperature equal to or higher than the growth temperature of the rare earth oxide in a vacuum at a pressure of 1 × 10 ⁻⁶ Torr or less. The method for growing an oxide crystal according to claim 1. 6. The method according to claim 1, further comprising, after epitaxially growing the rare-earth oxide, homoepitaxially growing the rare-earth oxide on the rare-earth oxide at a growth temperature higher than the growth temperature of the rare-earth oxide. Item 4. The method for growing a crystal of an oxide according to Item 1. 7. The method according to claim 1, further comprising the step of epitaxially growing the rare earth oxide and then epitaxially growing a functional oxide on the rare earth oxide. 8. The oxide crystal growth method according to claim 1, wherein a silicon oxide film or a defect layer having a thickness of 5 nm or less is formed at an interface between said silicon substrate and said rare earth oxide. 9. The method according to claim 7, wherein the functional oxide has a perovskite structure or a layered perovskite structure. 10. The method according to claim 1, wherein the rare earth oxide is cerium oxide or yttrium oxide. 11. A step of forming a surface of a (001) oriented silicon substrate into a dimer structure by 2 × 1, 1 × 2 surface reconstruction, and removing at least one or more rare earth elements in an atmosphere containing an oxidizing gas. Epitaxial growth of a cubic or tetragonal rare earth oxide in the (001) plane orientation on the silicon substrate by using a raw material containing the oxide. 12. When the rare earth oxide is epitaxially grown, the supply of the oxidizing gas to the surface of the silicon substrate is started, and then the supply of the raw material containing at least one or more rare earth elements is performed. The method for growing an oxide crystal according to claim 11, wherein: 13. The oxide crystal growth method according to claim 11, wherein said raw material containing at least one or more rare earth elements comprises at least one or more rare earth elements. 14. The method of growing an oxide crystal according to claim 11, wherein the raw material containing at least one or more rare earth elements comprises a rare earth oxide. 15. The method according to claim 1, further comprising, after epitaxially growing the rare earth oxide, performing a heat treatment at a temperature equal to or higher than the growth temperature of the rare earth oxide in a vacuum at a pressure of 1 × 10 ⁻⁶ Torr or less. Claim 11
The crystal growth method of the above-mentioned oxide. 16. The method according to claim 1, further comprising, after epitaxially growing the rare-earth oxide, homoepitaxially growing the rare-earth oxide on the rare-earth oxide at a growth temperature higher than the growth temperature of the rare-earth oxide. Item 12. The method for growing an oxide crystal according to Item 11. 17. The oxide crystal growth method according to claim 11, further comprising a step of epitaxially growing a functional oxide on the rare earth oxide after the rare earth oxide is epitaxially grown. 18. The method according to claim 11, wherein a silicon oxide film or a defect layer having a thickness of 5 nm or less is formed at an interface between the silicon substrate and the rare earth oxide. 19. The method according to claim 11, wherein the functional oxide has a perovskite structure or a layered perovskite structure. 20. The method according to claim 11, wherein the rare earth oxide is cerium oxide or yttrium oxide.
The crystal growth method of the above-mentioned oxide. 21. The method according to claim 11, wherein said rare earth oxide is epitaxially grown at a growth temperature of less than 300 ° C. 22. The method according to claim 11, wherein the rare earth oxide is epitaxially grown at a growth temperature of 100 ° C. or less. 23. A silicon substrate having a (001) plane orientation
Heating the silicon oxide film on its surface by heating in a vacuum at a pressure of ^10-6 Torr or less; and cubic or tetragonal rare earth elements on the silicon substrate on which the silicon oxide film has been volatilized. Epitaxially growing the oxide in the (001) plane orientation. 24. When epitaxially growing the rare earth oxide, supply of an oxidizing gas to the surface of the silicon substrate is started and then supply of a raw material containing at least one or more rare earth elements is performed. 24. The method for growing an oxide crystal according to claim 23. 25. The method according to claim 24, wherein the raw material containing at least one or more rare earth elements comprises at least one or more rare earth elements. 26. The method for growing an oxide crystal according to claim 24, wherein the raw material containing at least one or more rare earth elements comprises a rare earth oxide. 27. The method according to claim 27, further comprising, after epitaxially growing the rare earth oxide, performing a heat treatment at a temperature not lower than the growth temperature of the rare earth oxide in a vacuum at a pressure of 1 × 10 ⁻⁶ Torr or less. Claim 23
The crystal growth method of the above-mentioned oxide. 28. The method of claim 28, further comprising the step of, after the rare-earth oxide is epitaxially grown, homoepitaxially growing the rare-earth oxide on the rare-earth oxide at a growth temperature higher than the growth temperature of the rare-earth oxide. Item 24. The oxide crystal growth method according to Item 23. 29. The oxide crystal growth method according to claim 23, further comprising the step of epitaxially growing a functional oxide on the rare earth oxide after the rare earth oxide is epitaxially grown. 30. The method according to claim 23, wherein a silicon oxide film or a defect layer having a thickness of 5 nm or less is formed at an interface between the silicon substrate and the rare earth oxide. 31. The oxide crystal growth method according to claim 23, wherein said functional oxide has a perovskite structure or a layered perovskite structure. 32. The method according to claim 23, wherein the rare earth oxide is cerium oxide or yttrium oxide.
The crystal growth method of the above-mentioned oxide. 33. A cerium oxide having a bixbyite structure. 34. A promethium oxide having a bixbyite structure. 35. A silicon substrate having a (001) plane orientation, and a first substrate grown at a first growth temperature on the silicon substrate.
And a _second Ce epitaxially grown on the first CeO ₂ film at a _second growth temperature higher than the first growth temperature.
An oxide laminated structure comprising an O ₂ film. 36. The oxide laminated structure according to claim 35, wherein the second CeO ₂ film has a (001) plane orientation. 37. The silicon substrate and the first CeO
Oxide stack structure according to claim 35, wherein that the SiO _x film present at the interface between the ₂ films. The silicon substrate 38. (001) plane orientation, and the SiO _x film on the silicon substrate, and the amorphous CeO _y film on the SiO _x film, with respect to the silicon substrate on the amorphous CeO _y film Ce with (001) orientation oriented epitaxially
An oxide laminated structure comprising an O ₂ film. 39. A step of forming a surface of a (001) plane silicon substrate into a dimer structure by 2 × 1, 1 × 2 surface reconstruction, and cubic or tetragonal rare earth oxidation on the silicon substrate. Forming a gate insulating film by epitaxially growing an object in a (001) plane orientation. 40. The gate insulating film is formed by epitaxially growing the rare earth oxide on the silicon substrate using a material containing at least one rare earth element in an atmosphere containing an oxidizing gas. The method for manufacturing a field effect transistor according to claim 39, wherein: 41. The field effect transistor according to claim 39, wherein the gate insulating film is formed by epitaxially growing the rare earth oxide on the silicon substrate at a growth temperature of less than 300 ° C. Production method. 42. The field effect transistor according to claim 41, wherein the gate insulating film is formed by epitaxially growing the rare earth oxide on the silicon substrate at a growth temperature of 100 ° C. or less. Production method. 43. The method according to claim 43, wherein the silicon substrate is 1 × 10 ⁻⁶ Torr.
The gate insulating film is formed by heating in a vacuum at a pressure of r or less to volatilize the silicon oxide film on the surface to form the dimer structure on the surface and epitaxially grow the rare earth oxide on the silicon substrate. 40. The method for manufacturing a field effect transistor according to claim 39, wherein: 44. The method according to claim 39, further comprising a step of epitaxially growing a ferroelectric film on the gate insulating film. 45. A step of forming a surface of a silicon substrate having a (001) plane orientation into a dimer structure by 2 × 1, 1 × 2 surface reconstruction; and Forming a gate insulating film by epitaxially growing a cubic or tetragonal rare earth oxide on the silicon substrate in a (001) plane orientation at a growth temperature of less than 300 ° C. A method for manufacturing a field effect transistor, comprising: 46. A silicon substrate having a (001) plane orientation of 1
Heating the silicon oxide film on its surface by heating in a vacuum at a pressure of ^10-6 Torr or less; and cubic or tetragonal rare earth elements on the silicon substrate on which the silicon oxide film has been volatilized. A method for manufacturing a field effect transistor, comprising: a step of forming a gate insulating film by epitaxially growing an oxide in a (001) plane orientation; and a step of epitaxially growing a ferroelectric film on the gate insulating film. . 47. A (001) silicon substrate, a gate insulating film made of a cubic or tetragonal (001) rare earth oxide epitaxially grown on the silicon substrate, and A field effect transistor comprising: a ferroelectric film epitaxially grown on the film. 48. A step of forming a surface of a (001) -oriented silicon substrate into a dimer structure by 2 × 1, 1 × 2 surface reconstruction, and cubic or tetragonal rare earth oxidation on the silicon substrate. A method for manufacturing a ferroelectric nonvolatile memory, comprising: a step of epitaxially growing an object in a (001) plane orientation; and a step of epitaxially growing a ferroelectric film on the rare earth oxide. 49. A (001) silicon substrate, a gate insulating film made of a cubic or tetragonal (001) rare earth oxide epitaxially grown on the silicon substrate, and A ferroelectric nonvolatile memory using a field effect transistor having a ferroelectric film epitaxially grown on the film. 50. A (001) silicon substrate, a cubic or tetragonal (001) rare earth oxide epitaxially grown on the surface of the first region of the silicon substrate, and the rare earth A capacitor using a ferroelectric film epitaxially grown on an oxide; and a MIS-F formed in a second region of the silicon substrate.
A ferroelectric nonvolatile memory, comprising: ET; wherein the capacitor and the gate electrode of the MIS-FET are connected to each other by a wiring. 51. A single-crystal insulator substrate, a cubic or tetragonal (001) rare-earth oxide epitaxially grown on a surface of a first region of the single-crystal insulator substrate, and the rare-earth element A capacitor using a ferroelectric film epitaxially grown on an oxide; and a MIS-FET formed on a silicon film epitaxially grown on the surface of the second region of the single crystal insulator substrate
Wherein the capacitor and the gate electrode of the MIS-FET are connected to each other by wiring.