JP2000341945A - Ringing choke converter circuit - Google Patents
Ringing choke converter circuitInfo
- Publication number
- JP2000341945A JP2000341945A JP11148498A JP14849899A JP2000341945A JP 2000341945 A JP2000341945 A JP 2000341945A JP 11148498 A JP11148498 A JP 11148498A JP 14849899 A JP14849899 A JP 14849899A JP 2000341945 A JP2000341945 A JP 2000341945A
- Authority
- JP
- Japan
- Prior art keywords
- winding
- switching element
- transformer
- capacitor
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Dc-Dc Converters (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、直流電源回路のリ
ンギングチョークコンバータ回路に関し、2次側の出力
電流がある値以下になると発振周波数を下げて、電源の
効率を高めようとするものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ringing choke converter circuit for a DC power supply circuit, which is intended to reduce the oscillation frequency when the output current on the secondary side falls below a certain value, thereby increasing the efficiency of the power supply. .
【0002】[0002]
【従来の技術】図2は従来より使用されている直流回路
で、2次側の出力電流が増大すると発振周波数が下が
り、出力電流が減少すると発振周波数が高くなり、スイ
ッチング素子3のスイッチングロスは発振周波数に反比
例するため、出力電流の少ない軽負荷時の効率が悪化す
る。2. Description of the Related Art FIG. 2 shows a conventional DC circuit. When the output current on the secondary side increases, the oscillation frequency decreases, and when the output current decreases, the oscillation frequency increases. Since the output current is inversely proportional to the oscillation frequency, the efficiency at the time of light load with a small output current is deteriorated.
【0003】[0003]
【発明が解決しようとする課題】上記のように従来より
使用しているリンギングチョークコンバータ回路は、軽
負荷時の発振周波数が定格負荷時に比べて高くなるた
め、スイッチングロスの発振周波数に占める割合が大き
くなり軽負荷時の効率を悪化させるとともに、軽負荷時
の雑音端子電圧および輻射ノイズなどの高周波ノイズが
悪化するという問題があり、軽負荷時の発振周波数を低
下させる手段が求められていた。As described above, in the ringing choke converter circuit conventionally used, the oscillation frequency at a light load is higher than that at a rated load, so that the ratio of switching loss to the oscillation frequency is small. There is a problem that the efficiency increases at a light load and the high-frequency noise such as a noise terminal voltage and a radiation noise at a light load deteriorates. Therefore, means for reducing the oscillation frequency at a light load has been required.
【0004】[0004]
【課題を解決するための手段】本発明は上記の課題を解
決したものであり、リンギングチョークコンバータ回路
が制御巻線系の出力電力によって非制御巻線系のフライ
バック電圧が変動するのを利用して、この電圧を検出し
て待機電力時のような軽負荷電力時において発振周波数
が低くなるように、軽負荷電力時にスイッチング素子3
のオフ時間を延ばし発振周波数を長くすることによっ
て、スイッチング素子3のスイッチングロスを少なくし
て軽負荷電力時の効率を高めようとするものである。す
なわち、インダクタンスを有するトランス1を用いて、
トランス1の巻線2の電圧をスイッチング素子3のゲー
トに与えることによって、スイッチング素子3がオンす
ると、トランス1の1次巻線4に電流が流れ、この時ト
ランス1の2次巻線5に電流が流れないように整流ダイ
オード19が接続され、2次側の出力電圧検出回路20
からのフィードバック制御21によってトランジスタ1
8がオンしてスイッチング素子3がオフすると、トラン
スの逆起電力によって2次巻線5を通してコンデンサ2
2に電流が流れ、安定した電圧を出力する自励発振のリ
ンギングチョークコンバータ回路において、スイッチン
グ素子3のゲートとPNP型トランジスタ6のコレクタ
を抵抗7を介して接続し、PNP型トランジスタ6のエ
ミッタと巻線2をコンデンサ8を介して接続し、PNP
型トランジスタ6のエミッタ・ベース間に抵抗9とコン
デンサ10を並列接続し、巻線2の一端と他端との間に
スイッチング素子3がオフ時にフライバック電圧が生じ
るように整流ダイオード11と平滑コンデンサ12を抵
抗13を介して接続し、平滑コンデンサ12の両端に負
荷抵抗を接続し、平滑コンデンサ12の負極とPNP型
トランジスタ6のベースを抵抗15とツェナーダイオー
ド16の直列回路を介して接続し、PNP型トランジス
タ6のコレクタ・エミッタ間に可飽和リアクトル17を
接続したことを特徴とするリンギングチョークコンバー
タ回路である。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and utilizes a ringing choke converter circuit in which a flyback voltage of a non-control winding system fluctuates due to output power of a control winding system. By detecting this voltage, the switching element 3 is turned on at light load power so that the oscillation frequency becomes lower at light load power such as standby power.
By extending the off-time and increasing the oscillation frequency, the switching loss of the switching element 3 is reduced, and the efficiency at the time of light load power is increased. That is, using the transformer 1 having inductance,
When the switching element 3 is turned on by applying the voltage of the winding 2 of the transformer 1 to the gate of the switching element 3, a current flows through the primary winding 4 of the transformer 1, and at this time, the secondary winding 5 of the transformer 1 A rectifier diode 19 is connected so that no current flows, and a secondary-side output voltage detection circuit 20
Transistor 1 by feedback control 21 from
8 is turned on and the switching element 3 is turned off, the back electromotive force of the transformer causes the capacitor 2 to pass through the secondary winding 5.
2, a self-oscillating ringing choke converter circuit that outputs a stable voltage by connecting a gate of the switching element 3 and a collector of the PNP transistor 6 via a resistor 7, and connects the emitter of the PNP transistor 6 to the emitter of the PNP transistor 6 The winding 2 is connected via a capacitor 8 and a PNP
A resistor 9 and a capacitor 10 are connected in parallel between the emitter and the base of the type transistor 6, and a rectifying diode 11 and a smoothing capacitor are connected between one end and the other end of the winding 2 so that a flyback voltage is generated when the switching element 3 is off. 12 is connected via a resistor 13, a load resistor is connected across the smoothing capacitor 12, and the negative electrode of the smoothing capacitor 12 and the base of the PNP transistor 6 are connected via a series circuit of a resistor 15 and a Zener diode 16. A ringing choke converter circuit characterized in that a saturable reactor 17 is connected between the collector and the emitter of the PNP transistor 6.
【0005】[0005]
【発明の実施の形態】図1において、スイッチング素子
3のドライブ巻線である巻線2のフライバック電圧(コ
ンデンサ12の電圧)は、2次側の制御系の巻線5の出
力電力によって変動する。制御系の巻線5の出力電力が
大きくなるとコンデンサ12の電圧は上昇し、逆に制御
系の巻線5の出力電力が下がり、軽負荷電力になるとコ
ンデンサ12の電圧は下降するため、このコンデンサ1
2の電圧をツェナーダイオード16により検出すること
ができる。制御系の巻線5の出力電力が大きいときは、
トランジスタ6がオンとなる時間が短くなりスイッチン
グ素子3のオフ時間が短くなるため発振周波数が高くな
る。逆に、制御系の巻線5の出力電力が下がり、軽負荷
電力になるとトランジスタ6がオフになるため、可飽和
リアクトル17が飽和するまでの時間分だけ、スイッチ
ング素子3のオフ時間が長くなり、発振周波数を低くす
ることができる。In FIG. 1, a flyback voltage (a voltage of a capacitor 12) of a winding 2 which is a drive winding of a switching element 3 fluctuates according to an output power of a winding 5 of a secondary control system. I do. When the output power of the control system winding 5 increases, the voltage of the capacitor 12 increases, and conversely, the output power of the control system winding 5 decreases, and when the load becomes light load, the voltage of the capacitor 12 decreases. 1
2 can be detected by the Zener diode 16. When the output power of the control system winding 5 is large,
Since the time during which the transistor 6 is turned on is shortened and the off time of the switching element 3 is shortened, the oscillation frequency is increased. Conversely, the output power of the winding 5 of the control system is reduced, and the transistor 6 is turned off when the load becomes lighter. Therefore, the off time of the switching element 3 becomes longer by the time until the saturable reactor 17 is saturated. , The oscillation frequency can be lowered.
【0006】[0006]
【実施例】図1は、本発明の実施例の基本回路である。
この回路を用いて実験で得たデータが、図3の「制御系
出力電力−発振周波数」と図4の「制御系出力電力−効
率」である。また、図2は上記の発振周波数の制御回路
を有しない従来回路であり、これによる実験データも図
3、図4に併せて記載した。FIG. 1 shows a basic circuit of an embodiment of the present invention.
Data obtained by experiments using this circuit are "control system output power-oscillation frequency" in FIG. 3 and "control system output power-efficiency" in FIG. FIG. 2 shows a conventional circuit having no oscillation frequency control circuit, and experimental data based on the circuit is also shown in FIGS. 3 and 4.
【0007】[0007]
【発明の効果】本発明は、制御系出力電力が軽負荷電力
になると、図3のように、ドライブ系の巻線2のフライ
バック電圧(コンデンサ12の電圧)が下がるのをツェ
ナーダイオード16によって検出してトランジスタ6を
オフにして、可飽和リアクトル17が飽和するまでの時
間分だけ、スイッチング素子3のオフ時間を長くして発
振周波数を低くすることができる。このため、スイッチ
ング素子3のオン時間の1サイクル(発振周波数の逆
数)に占める割合が小さくなるため図4のように軽負荷
電力時の効率を従来回路に比べ高くすることができ、省
電力化、省エネルギー化に貢献するところ大である。According to the present invention, as shown in FIG. 3, when the control system output power becomes light load power, the flyback voltage (voltage of the capacitor 12) of the drive system winding 2 is reduced by the Zener diode 16. By detecting the transistor 6 and turning it off, the off time of the switching element 3 can be lengthened by the time until the saturable reactor 17 is saturated, and the oscillation frequency can be lowered. For this reason, the ratio of the ON time of the switching element 3 to one cycle (the reciprocal of the oscillation frequency) is reduced, so that the efficiency at the time of light load power can be increased as compared with the conventional circuit as shown in FIG. And contribute to energy saving.
【図1】本発明の実施例の基本回路である。FIG. 1 is a basic circuit of an embodiment of the present invention.
【図2】従来例による基本回路である。FIG. 2 is a basic circuit according to a conventional example.
【図3】本発明の実施例の実験で得られた「制御系出力
電力−発振周波数」のデータの従来例との比較である。FIG. 3 is a comparison of data of “control system output power—oscillation frequency” obtained in an experiment of an embodiment of the present invention with a conventional example.
【図4】本発明の実施例の実験で得られた「制御系出力
電力−効率」のデータの従来例との比較である。FIG. 4 is a comparison of data of “control system output power—efficiency” obtained in an experiment of an embodiment of the present invention with a conventional example.
1 コンバータトランス 2 トランスのドライブ系巻線 3 スイッチング素子(FET) 4 トランスの1次巻線 5 トランスの2次巻線 6 トランジスタ 7 抵抗 8 コンデンサ 9 抵抗 10 コンデンサ 11 ダイオード 12 コンデンサ 13 抵抗 14 抵抗 15 抵抗 16 ツェナーダイオード 17 可飽和リアクトル 18 トランジスタ 19 ダイオード 20 電圧検出回路 21 制御回路 22 コンデンサ DESCRIPTION OF SYMBOLS 1 Converter transformer 2 Transformer drive system winding 3 Switching element (FET) 4 Transformer primary winding 5 Transformer secondary winding 6 Transistor 7 Resistance 8 Capacitor 9 Resistance 10 Capacitor 11 Diode 12 Capacitor 13 Resistance 14 Resistance 15 Resistance Reference Signs List 16 Zener diode 17 Saturable reactor 18 Transistor 19 Diode 20 Voltage detection circuit 21 Control circuit 22 Capacitor
Claims (1)
て、トランスの巻線の電圧をスイッチング素子のゲート
に与えることによって、スイッチング素子がオンする
と、トランスの1次巻線に電流が流れ、この時トランス
の2次巻線に電流が流れないように整流ダイオードが接
続され、2次側の出力電圧検出回路からのフィードバッ
ク制御によってトランジスタがオンしてスイッチング素
子がオフすると、トランスの逆起電力によって2次巻線
を通してコンデンサに電流が流れ、安定した電圧を出力
する自励発振のリンギングチョークコンバータ回路にお
いて、 スイッチング素子のゲートとPNP型トランジスタのコ
レクタを抵抗を介して接続し、PNP型トランジスタの
エミッタと巻線をコンデンサを介して接続し、PNP型
トランジスタのエミッタ・ベース間に抵抗とコンデンサ
を並列接続し、 巻線の一端と他端との間にスイッチング素子がオフ時に
フライバック電圧が生じるように整流ダイオードと平滑
コンデンサを抵抗を介して接続し、平滑コンデンサの両
端に負荷抵抗を接続し、平滑コンデンサの負極とPNP
型トランジスタのベースを抵抗とツェナーダイオードの
直列回路を介して接続し、 PNP型トランジスタのコレクタ・エミッタ間に可飽和
リアクトルを接続したことを特徴とするリンギングチョ
ークコンバータ回路。When a switching element is turned on by applying a voltage of a winding of the transformer to a gate of the switching element using a transformer having an inductance, a current flows through a primary winding of the transformer. A rectifier diode is connected so that current does not flow through the secondary winding, and when the transistor is turned on and the switching element is turned off by feedback control from the output voltage detection circuit on the secondary side, the secondary winding is generated by the back electromotive force of the transformer. In a self-oscillating ringing choke converter circuit that outputs a stable voltage by flowing current through a capacitor through a wire, the gate of the switching element and the collector of the PNP transistor are connected via a resistor, and the emitter and winding of the PNP transistor are connected. Are connected via a capacitor, and a PNP transistor Connect a resistor and a capacitor in parallel between the emitter and base, and connect a rectifier diode and a smoothing capacitor via a resistor between one end and the other end of the winding so that a flyback voltage is generated when the switching element is off. A load resistor is connected to both ends of the capacitor, and the negative electrode of the smoothing capacitor and PNP
A ringing choke converter circuit, wherein a base of a transistor is connected via a series circuit of a resistor and a Zener diode, and a saturable reactor is connected between the collector and the emitter of the PNP transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14849899A JP4303358B2 (en) | 1999-05-27 | 1999-05-27 | Ringing choke converter circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14849899A JP4303358B2 (en) | 1999-05-27 | 1999-05-27 | Ringing choke converter circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2000341945A true JP2000341945A (en) | 2000-12-08 |
JP4303358B2 JP4303358B2 (en) | 2009-07-29 |
Family
ID=15454108
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14849899A Expired - Fee Related JP4303358B2 (en) | 1999-05-27 | 1999-05-27 | Ringing choke converter circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4303358B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6563720B2 (en) | 2001-03-29 | 2003-05-13 | Sharp Kabushiki Kaisha | Switching power supply device |
JP2003219639A (en) * | 2002-01-21 | 2003-07-31 | Toshiba Corp | Switching power source |
KR101427576B1 (en) | 2012-03-28 | 2014-08-08 | 주식회사 엘시스 | Power control apparatus in electric vehicle |
-
1999
- 1999-05-27 JP JP14849899A patent/JP4303358B2/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6563720B2 (en) | 2001-03-29 | 2003-05-13 | Sharp Kabushiki Kaisha | Switching power supply device |
JP2003219639A (en) * | 2002-01-21 | 2003-07-31 | Toshiba Corp | Switching power source |
KR101427576B1 (en) | 2012-03-28 | 2014-08-08 | 주식회사 엘시스 | Power control apparatus in electric vehicle |
Also Published As
Publication number | Publication date |
---|---|
JP4303358B2 (en) | 2009-07-29 |
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