JP2000341651A - Format converting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a format converting device without causing any phase deviation of vertical synchronization even when any area of the valid picture of a high-definition video signal is selected and converted into a video signal of an NTSC system. SOLUTION: Luminance signals in an HDTV specification written in field memories 5 and 6 are allowed to start in the range from the 317th line to the 335th line of the luminance signal in the HDTV specification in a first field, and in the range from the 879th line to the 897th line of the luminance signal in the HDTV specification in a second field, and read from the field memories 5 and 6 based on a signal for reading from a signal for reading preparing circuit 10 with frequencies which are 1/2 times as high as sampling frequencies in the NTSC specification, and synthesized (double speed converted) by a multiplexer 11 so that read luminance signal data sampled with the sampling frequencies in the NTSC specification can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a format conversion apparatus, and more particularly, to a method for converting a high-definition video signal having a synchronization signal of the HDTV studio standard (ITU-R recommendation 709) to NT
The present invention relates to a format converter for converting a video signal into an SC standard video signal.

[0002]

2. Description of the Related Art In order to convert a high-definition video signal having an HDTV studio standard synchronization signal into an NTSC standard video signal, the high-definition video signal has higher definition in the horizontal and vertical directions than the NTSC standard video signal. Since the degree is large, data after conversion from a plurality of data of the HDTV signal is created by interpolation calculation. Further, since the aspect ratio of the screen is 16: 9 for a high-definition video signal and 4: 3 for a video signal of the NTSC standard, the aspect ratio is adjusted by, for example, truncating the left and right portions of the screen or forming a letterbox.

A format conversion apparatus for performing such format conversion is constituted by a combination of a memory circuit, a memory control circuit, and an interpolation circuit, and a memory to be used is, for example, a frame memory (usually a general-purpose random access memory ( RAM), whose configuration is common). For example, JP-A-5-12266
In the format conversion device described in Japanese Patent Application Publication No. 3 (1993) -223, a programmable PLL that generates a reference clock of an arbitrary frequency synchronized with a horizontal synchronization signal of an input video signal, and an A / D converter that A / D converts the input video signal with the reference clock And A
A video memory of 3 frames or more for storing output video data of the / D converter,
D / A converter for performing A / A conversion, a counter for detecting a field frequency of an input video signal, a comparator for comparing a field frequency of an input video signal with a field frequency of an output video signal, and writing / reading of a video memory And a memory control means for controlling the video signal in accordance with the output result of the comparator, so as to convert the format of the video signal without causing horizontal field distortion.

However, in this conventional format conversion apparatus, a large number of elements are used, expensive high-speed elements are required for moving image processing, and a frame memory is used for the delay amount. However, the delay of the output video signal extends over several frames.

Therefore, when converting a high-vision video signal into a video signal of the NTSC standard, a mass-produced general-purpose field memory is used.
A format conversion device having a small and inexpensive configuration has been conventionally known (Japanese Patent Laid-Open No. 154750/1995). This conventional format converter uses a field memory capable of independently writing / reading under external control, writes effective screen data of a high definition video signal into this field memory, and stores the field memory in an NTSC video signal. The data is read out at the signal synchronization speed, and the read out data is taken out as an NTSC video signal.

A feature of the structure of this conventional format converter is that after writing data of one field of a high definition video signal to a field memory, one frame of NTSC video signal data is read out from the field memory, Processing to obtain an NTSC video signal.

[0007]

However, the conventional format converter described in Japanese Patent Application Laid-Open No. Hei 7-154750 uses a mass-produced field memory and does not use expensive elements. On the other hand, while the format conversion can be performed, the vertical synchronization of the format-converted NTSC system video signal may move depending on the setting of the effective pixel area of the Hi-Vision system video signal, and the image may be disturbed.

[0008] The present invention has been made in view of the above points,
It is an object of the present invention to provide a format converter which does not cause a phase shift of vertical synchronization even when an area of an effective image of a high definition video signal is selected and converted into an NTSC video signal.

[0009]

In order to achieve the above object, the present invention provides a field memory capable of independently operating a first video signal having a synchronization signal conforming to the HDTV studio standard by separately writing and reading signals. After writing to
In the format conversion apparatus for converting the format into the second video signal of the NTSC system and reading the same, in the effective image of each field of the first video signal, the effective image of the area which becomes the effective image of the field of the second video signal is provided. Writing means for writing only data to the field memory; area selecting means for selecting an area which becomes a valid image of the field of the second video signal by controlling the writing timing of the writing means; Starting to read out valid image data of the first video signal at a clock frequency related to the standard of the second video signal during the period of lines 317 to 327 of the first video signal in the first field, In the second field, 880 lines to 890 lines of the first video signal
Reading means for starting reading at a clock frequency associated with the standard of the second video signal during the line period;
Output means for adding a synchronization signal to the data read from the field memory by the reading means and outputting the data as a second video signal.

According to the present invention, the effective image data of the first video signal written in the field memory is stored in the first field.
During the line period, the reading is started at the clock frequency associated with the standard of the second video signal, and in the second field, during the period of 880-890 lines of the first video signal, the reading of the second video signal is started. Since the reading is started at the clock frequency associated with the standard, the vertical synchronization of the format-converted second video signal can be performed regardless of where the effective image of the field of the NTSC standard is extracted from the effective image area of the first video signal. Deviation can be prevented.

In the present invention, the field memory is N
(Where N is an integer of 2 or more) are provided in parallel. One sample of the first video signal is input to one of the N field memories, and the field memory is cycled for each sample. A first switch circuit for selectively switching and inputting, and writing means for writing N field memories with a writing signal having a frequency of 1 / N times the sampling frequency of the first video signal;
The reading means reads the N field memories with a read signal having a frequency 1 / N times the sampling frequency of the second video signal, and synthesizes the read data of the N field memories in time series. And a switch circuit.

According to the present invention, a low-speed general-purpose general-purpose field memory operable at a sampling frequency of the first video signal / N as the field memory is used for writing / reading the high-speed first video signal. Can be used.

[0013]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a format conversion apparatus according to the present invention. This embodiment is a format converter for converting a luminance signal in a high-definition video signal having a HDTV studio standard (ITU-R recommendation 709) synchronization signal into a luminance signal in an NTSC standard video signal. , A luminance signal in a high-definition video signal having a HDTV studio standard synchronization signal is supplied from an input terminal 1 to an A / D converter 2,
While being sampled by the sampling signal and converted into digital data, the data is supplied to the synchronization separation circuit 3 where the horizontal synchronization signal and the vertical synchronization signal are separated.

In the format converter according to the present invention, only an arbitrary part of the screen of the high definition video signal is cut out and output as a video signal of the NTSC standard.

The sampling frequency of the luminance signal of the HDTV standard in the A / D converter 2 is, for example, 59.4 MHz.
And NTSC standard, the data rate of general-purpose field memory is 25 nsec /
About one sample. Therefore, a general-purpose dual-port field memory cannot be used as it is as a memory for writing / reading the output digital data of the A / D converter 2.

Therefore, in this embodiment, two field memories 5 and 6 are provided in parallel, and a demultiplexer 4 is provided between the output side of the A / D converter 2 and the input side of the field memories 5 and 6. And the field memories 5 and 6 are used alternately, so that the sampling frequency can be reduced to half the frequency of the above-mentioned 59.4 MHz. A general-purpose dual-port field memory can be used.

That is, A /
The digital data output from the D converter 2 is alternately input to the field memories 5 and 6 every sample period.
A write signal forming circuit 7 whose operation is controlled based on an external control signal input via an input terminal 8 is synchronized with the horizontal and vertical synchronizing signals separated by the synchronizing separation circuit 3 and has a frequency of 59.4 MHz. A write signal having a frequency which is half the frequency of the write signal is formed, and a write operation is performed on the field memories 5 and 6 with the write signal.

Here, the write signal forming circuit 7 sets the start position 22 of the designated effective image area 21 of the NTSC system video signal to the effective image area 20 of one field of the HDTV standard video signal shown in FIG. A selection is made by an external control signal input via the input terminal 8 of FIG. A control signal 24 for a line period is generated, and only in a control section determined by the control signals 23 and 24, luminance signal data of the HDTV standard is alternately written to the field memories 5 and 6.

The field memories 5 and 6 are dual-port field memories which can operate with clocks having independent frequencies for writing and reading, and have an internal structure of first-in-first-out (FIFO).
Of structure. When using this dual-port FIFO field memory, it is necessary to control the write position so as not to overtake the read position and the read position to not overtake the write position due to the difference between the write clock and the read clock. is there.

As schematically shown in FIG. 3B by the write clock shown in FIG.
When data is written in the field memory of the FO and the data is read by the read clock shown in FIG. 3C, the write position overtakes the read position, and the read data is schematically shown in FIG. Is not the data of the same field, but the data of the next field.

On the other hand, data is written into the field memory of the dual-port FIFO by the write clock shown in FIG. 3E, as schematically shown in FIG.
When data is read by the high-frequency read clock shown in FIG. 9G, the read position overtakes the write position, and the read data is undefined as indicated by 30 in FIG. Or, it becomes the data of the previous field.

Further, an effective image area of an NTSC system luminance signal to be format-converted from the HDTV standard luminance signal is selected, written into a field memory, and after a certain period of time so as to satisfy the above condition, data is transferred from the field memory. When reading is performed, the vertical synchronization shifts and the image is disturbed when the effective image area is changed.

Therefore, in this embodiment, when reading out the field memories 5 and 6, first, a horizontal synchronizing signal and a horizontal synchronizing signal are output from the HDTV standard luminance signal input via the input terminal 1 in FIG. The vertical synchronizing signal is separated and supplied to the write signal forming circuit 7, where only the control section determined by the control signals 23 and 24 described above is used.
A write signal for writing the luminance signal data of the HDTV standard in the field memories 5 and 6 is generated and supplied to the field memories 5 and 6 and supplied to the synchronizing circuit 9 where the vertical synchronization of the NTSC luminance signal is performed. Period (V
_BLANK), as shown in FIGS. 4A and 4B,
In the first field, 272 of the luminance signal of the HDTV standard is used.
In the second field, during the period from the line timing to the timing of the 281 line, a synchronization signal is generated which starts during the period from the timing of the 834 line to the timing of the 843 line of the luminance signal of the HDTV standard.

The synchronizing signal is supplied to the readout signal forming circuit 10 shown in FIG. 1. Here, as shown in FIGS. 4A and 4B, the first field is composed of 317 lines of the luminance signal of the HDTV standard. During the period of a total of 11 lines from the timing to the timing of the 327 lines, and during the period of a total of 11 lines from the timing of the 880 lines of the luminance signal of the HDTV standard to the timing of the 890 lines, the second field is used. At such a timing that the reading of the effective image of the NTSC system luminance signal starts, and the NTS
After being generated as a readout signal having a frequency which is 1/2 times the sampling frequency in the C standard, the signal is supplied to the field memories 5 and 6 to read out the luminance signal data of the stored HDTV standard.

HD to the field memories 5 and 6
As writing of the luminance signal data of the TV standard, FIG.
(A) has A, B, C,. . . The case where the luminance signal data of the area indicated by. . . The case where the luminance signal data of the area indicated by the symbol is written will be described. A, B, C,. . . When the luminance signal data of the area indicated by is written, the writing of the image is performed after the end of the reading of the previous image, and A ′,
B ', C',. . . In the case where the luminance signal data in the area indicated by is written, the writing of the image is started immediately before the start of reading, and these are described in more detail with reference to the time charts of FIGS. It is explained together with.

The HD shown in FIG. 5A (or FIG. 6A)
Digital data of the luminance signal of the TV standard is alternately stored in the field memories 5 and 6 at one sampling cycle through the demultiplexer 4, and the first field has 41 lines to 281 lines (or FIG. 5B) as shown in FIG. 6
(316 lines to 566 lines as shown in (B))
The 41st line period, the second field is from 604 lines to 84
4 lines (or 879 lines as shown in FIG. 6B)
1119 lines) for 241 line periods, and are written in the field memories 5 and 6 as shown in FIG.
As shown schematically in (C)), 241 lines of A ', B', C ',. . . (Or the areas indicated by A, B, C,... Shown in FIG. 4A) are written 390 pixels at a time.

In the first field, during the period from the timing of line 317 to the timing of line 327 of the luminance signal of the HDTV standard, in the second field, from the timing of line 880 of the luminance signal of the HDTV standard to line 890 , The read signal forming circuit 1 having a frequency which is 1/2 of the sampling frequency in the NTSC standard, and
0, the HDTV standard luminance signal data of the selection area 21 stored in the field memories 5 and 6 is read out based on the readout signal from the multiplexer 11.
5 (D)
Alternatively, it is read data sampled at a sampling frequency in the NTSC standard as schematically shown in FIG.

Accordingly, in the case of the example shown in FIG. 6, when 316 lines of HDTV standard luminance signal data are written in the field memory 5 or 6 as shown in FIG. ), Reading of the stored luminance data from the field memories 5 and 6 is started during the period immediately after the 317th line to the 327th line. However, since the reading speed is slower than the writing speed,
The read position does not overtake the write position.

The read data is supplied to the D / A converter 12 shown in FIG. 1 to be converted into an analog signal of 241 lines in each field. The vertical synchronizing signal having a width of 1 line to 21 lines in the field and 263 lines to 284 lines in the second field, and the horizontal synchronizing signal are added and synthesized, and FIG.
After the luminance signal is set to the NTSC system as shown in (E),
Output to the output terminal 14.

As described above, the first field is during a period of a total of 11 lines from the timing of line 317 to the timing of line 327 of the luminance signal of the HDTV standard, and the second field is 880 of the luminance signal of the HDTV standard.
During the period of a total of 11 lines from the timing of the line to the timing of the 890 lines, a synchronization signal of the NTSC system to be output is generated so that the reading of the effective image of the converted NTSC brightness signal is started. By reading data of one field of the NTSC system luminance signal based on the NTSC system, the amount of delay in converting the signal to the NTSC system luminance signal can be minimized to within one field, and the screen of the HDTV system luminance signal can be displayed. Regardless of which area is specified, the relationship between the read position and the write position of the field memories 5 and 6 satisfies the above-mentioned condition, and it is possible to prevent the phase shift of the vertical synchronization from occurring. Further, since the timings of writing and reading are taken into consideration as shown in FIGS. 5 and 6, a delay in the time required for conversion can be minimized.

The present invention is not limited to the above embodiment. For example, the number of field memories is set to three or more, and the frequency of the readout signal is set to the sampling frequency of the NTSC luminance signal / (the number of field memories). ), The same effect as in the above embodiment can be obtained. Also, format conversion can be performed for the two types of color difference signals by the same configuration as in FIG. In this case, however, only one field memory is required for each color difference signal, and the sampling frequency is 5
It may be 9.4 / 2 MHz.

[0032]

As described above, according to the present invention,
In the first field, the effective image data of the first video signal written in the field memory is converted into the clock frequency associated with the standard of the second video signal during the period from line 317 to line 327 of the first video signal. To start reading, and in the second field, the first video signal 88
During the period from the 0th line to the 890th line, reading is started at a clock frequency related to the standard of the second video signal, and by performing field processing, a valid image of a field of the NTSC standard is converted to a valid image of the first video signal. Since the vertical synchronization of the format-converted second video signal does not occur regardless of where the video signal is extracted from the image area, the image resulting from the vertical synchronization of the format-converted NTSC second video signal is not generated. Disturbance can be prevented.

Further, according to the present invention, since the write and read timings of the field memory are taken into consideration, the delay in the time required for conversion can be minimized.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between a screen of a luminance signal of the input HDTV standard and a screen of a converted NTSC luminance signal in FIG. 1 and a control signal for area selection.

FIG. 3 is an explanatory diagram of control conditions of a field memory.

FIG. 4 shows a luminance signal of the HDTV standard and NT in the present invention.
FIG. 3 is a diagram illustrating a relative relationship between luminance signals of the SC system.

FIG. 5 is a time chart illustrating an example of a write operation and a read operation to a field memory according to an embodiment of the present invention.

FIG. 6 is a time chart for explaining another example of writing and reading operations to and from the field memory according to the embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Input terminal of HDTV standard luminance signal 2 A / D converter 3 Synchronization separation circuit 4 Demultiplexer 5, 6 Field memory 7 Writing signal formation circuit 8 External control signal input terminal 9 Synchronization circuit 10 Readout signal formation circuit 11 Multiplexer 12 D / A converter 13 Addition circuit 14 Format-converted NTSC luminance signal output terminal 20 HDTV standard luminance signal screen 21 NTSC luminance signal screen 23, 24 Control signal

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Claims (2)

[Claims] 1. A first video signal having a synchronization signal of HDTV studio standard is written into a field memory which can operate independently by writing and reading separately, and then is formatted into a second video signal of the NTSC system. In the format conversion device for converting and reading, of the effective images of each field of the first video signal, only the effective image data of an area serving as an effective image of the field of the second video signal is stored in the field memory. Writing means for writing; area selecting means for selecting an area serving as an effective image in a field of the second video signal by controlling write timing of the writing means; and the first data written in the field memory. In the first field, the effective video data of the video signal of During the period from line 317 to line 327 of the signal, reading is started at the clock frequency related to the standard of the second video signal, and in the second field, during the period from line 880 to line 890 of the first video signal. Reading means for starting reading at a clock frequency related to the standard of the second video signal; and adding a synchronizing signal to the data read from the field memory by the reading means. Output means for outputting as a signal. 2. The method according to claim 1, wherein N field memories (N is an integer of 2 or more) are provided in parallel, and one sample of the first video signal is stored in one of the N field memories. A first switch circuit for inputting the input data while cyclically switching and inputting the field memory for each sample;
The N field memories are written with a write signal having a frequency 1 / N times the sampling frequency of the video signal, and the reading means has a frequency 1 / N times the sampling frequency of the second video signal. A read signal is used to read the N field memories,
2. The format conversion apparatus according to claim 1, further comprising: a second switch circuit that combines read data from the N field memories in a time-series manner.