JP2000341087A - Method for forming conduction path of laminated circuit element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid improper connection of a conduction path consisting of a plurality of conduction paths that are formed by continuing partial holes formed in advance in a plurality of dielectric sheets laminated with each other in a laminating direction and absorptively coating electrode paste to the inner face. SOLUTION: Dielectric sheets 2a-2g except a dielectric sheet 2h at the lowermost layer are laminated, each partial hole 10 continued in a laminating direction to configure a partial laminated product 20, electrode paste is absorptively coated to the inner face of the continuous partial hole 11 to form a 1st conductive layer 25. Then the dielectric sheet 2h at the lowermost layer is placed at the lower face of the partial laminated product 20, the partial hole 10 of the dielectric sheet 2h is matched with the continuous partial hole 11, through conduction paths, I, O, G are formed and the electrode paste is absorptively coated to form a 2nd conduction layer 25b and they are integrally baked.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a conductive path of a laminated circuit element used for a filter circuit or the like of a mobile communication device such as an automobile telephone and a portable telephone.

[0002]

2. Description of the Related Art A laminated circuit element comprising a plurality of dielectric sheets provided with an electrode pattern on a laminated surface and constituting a resonator or the like is known. This laminated circuit element A is shown in FIG.
As shown in the figure, on the side surface along the stacking direction, an input-side conductive path I connected to the input part of the internal circuit, an output-side conductive path O connected to the output part of the internal circuit, and a ground side connected to the ground part of the internal circuit In addition to the conductive path G, a relay conductive path N for electrically connecting the respective electrode patterns is provided. Such a laminated circuit element A is directly mounted on the surface of the printed circuit board K, each conductive path extends to the bottom surface of the laminated circuit element A, and the input-side conductive path I is an input-side external circuit of the substrate K. x, the output-side conductive path O is connected to the output-side external electric path y of the printed board K, and the ground-side conductive path G is connected to the ground-side external electric path z of the board K. However, the relay conductive path N connects the respective electrode patterns of the multilayer circuit element A and needs to be provided so as not to be connected to the external electric paths x, y, z, etc. of the printed board K.

Therefore, conventionally, as shown in FIG.
An annular insulating portion β is formed on the substrate K so that the portion α electrically connected to the relay conductive path N is not connected to another conductive surface. As described above, in the related art, it is necessary to process the insulating portion β on the printed board K so that the relay conductive path N of the laminated circuit element A and the wiring pattern of the printed board K are not electrically connected. , The mounting process was troublesome.

In order to solve such a problem, a plurality of dielectric sheets provided with an electrode pattern on a laminated surface are laminated and fired, and a portion formed in advance on a side edge of the dielectric sheet is provided. Continue the holes in the stacking direction,
A plurality of conductive paths formed by applying the electrode paste to the inner surface by suction are provided on the side surface, and a partial hole is formed in the lowermost dielectric sheet in a conductive path not connected to an external electric path on the mounting board. As a result, a laminated circuit element B in which through conductive paths I, O, G and non-through conductive paths N are formed as non-penetrating shapes has been proposed (FIGS. 1, 13).
reference).

[0005]

By the way, the method for forming a conductive path in the above-mentioned laminated circuit element B uses the means shown in FIG.

That is, first, the dielectric sheets s excluding the lowermost dielectric sheet s' are laminated, and the partial holes are continuously formed in the laminating direction to form the partial laminated body C. While electrode paste f is applied by suction, an electrode paste g is formed in a partial hole h formed in the lowermost dielectric sheet s '(FIG. 15A), and then the lowermost dielectric sheet s' is formed. Is arranged on the lower surface of the partial laminate C, and the continuous holes H are made to coincide with the partial holes h of the dielectric sheet s ′ (FIG. 15B).
They are fired.

That is, since the non-penetrating conductive path has no partial hole H in the lowermost dielectric sheet s', the electrode paste cannot be applied by suction using a vacuum suction method. Therefore,
Once the partial laminate C is formed, the electrode paste g is applied to the continuous partial holes H, and then the lowermost dielectric sheet is arranged.

It is also conceivable to apply an electrode paste to only the through conductive paths after laminating all the dielectric sheets. However, the suction coating step is performed by coating the shielding sheet on the surface of the dielectric sheet in order to apply the electrode paste to the conductive paths of the required through-holes. A step such as applying a suction step by step using a shielding sheet is required, and the processing is rather complicated.

By the way, as described above, the electrode pastes f and g are applied by suction to the continuous partial holes H of the partial laminate C and the partial holes h of the lowermost dielectric sheet s, respectively, and then stacked and fired. Due to the contraction of the electrode paste at the time of firing, as shown in FIG. 15C, the electrode pastes f and g are separated from each other on the superposed surface of the partial laminate C and the lowermost dielectric sheet s to cause a disconnection i. Easy to occur. An object of the present invention is to eliminate such poor connection of the conductive path.

[0010]

According to the present invention, a plurality of dielectric sheets provided with an electrode pattern on a laminated surface are laminated and fired. Continuous in the direction, provided with a plurality of conductive paths formed by applying the electrode paste by suction to the inner surface thereof, and in the case of a conductive path which is not connected to an external electric path on the mounting board, the lowermost dielectric sheet In the laminated circuit element in which the through-hole conductive path and the non-through-hole conductive path are respectively formed as non-penetrating by not forming the partial holes, the respective dielectric sheets except the lowermost dielectric sheet are laminated. Forming a first laminated layer by forming the first conductive layer by applying the electrode paste to the inner surface of the continuous partial holes by forming the partial laminated body by continuously forming the partial holes in the laminating direction, and then partially laminating the lowermost dielectric sheet. Located on the underside of the body A laminated circuit characterized in that a second conductive layer is formed by suction-coating an electrode paste on a through-side conductive path in which the partial hole of the lowermost dielectric sheet coincides with the continuous partial hole to form a second conductive layer, and then fired. This is a method for forming a conductive path of an element.

In this configuration, no electrode paste is formed in advance in the partial holes of the lowermost dielectric sheet, and only the partial laminated body obtained by laminating each dielectric sheet excluding the lowermost dielectric sheet is formed in advance. The first conductive layer is formed, and then both are overlapped, and the second conductive layer is formed by overcoating the first conductive layer only on the through conductive path. For this reason, the second conductive layer is continuous with the penetrating conductive path, and the conductive layer does not break due to shrinkage during firing on the superposed surface.

[0012]

FIG. 1 shows a laminated circuit element 1 manufactured using the method of the present invention. This laminated circuit element 1
Constitutes the filter circuit shown in FIG. 17, in which eight large plate-like dielectric sheets 2a to 2h are laminated and fired (see FIG. 11), and a large number of pieces are obtained by cutting this vertically and horizontally. Things. The dielectric sheets 2a to 2f
The lower surface of the electrode patterns T ₁ through T ₆ of the first to sixth electrode patterns P ₁ to P ₆ constituting the filter circuit partially is continuously in vertical and horizontal are respectively formed.

[0013] Here, the dielectric sheet 2a, as shown in Figure 2, the first electrode pattern P ₁ substantially rectangular pairwise
There comprises an electrode pattern T ₁ formed in a matrix. The first electrode pattern P ₁ is connected to the relay conductive path N.

The dielectric sheet 2b is, as shown in FIG.
Substantially rectangular second electrode pattern P ₂ is provided with the electrode pattern T ₂ which is formed vertically and horizontally. This second electrode pattern P
₂ is connected to the ground-side conductive path G.

The dielectric sheet 2c is formed as shown in FIG.
Nearly a third electrode pattern P ₃ rectangular pairwise comprises an electrode pattern T ₃ which is formed vertically and horizontally. The third electrode pattern P ₃ is connected to the relay conductive path N.

The dielectric sheet 2d is, as shown in FIG.
Comprising an electrode pattern T ₄ almost fourth electrode patterns P ₄ rectangular is formed vertically and horizontally to be half the time clipping.
The fourth electrode pattern P ₄ has one input conductive path I
And the other is connected to the output side conductive path O.

The dielectric sheet 2e is, as shown in FIG.
Substantially fifth electrode pattern P ₅ of H shape comprises an electrode pattern T ₅ formed vertically and horizontally. This fifth electrode pattern P
₅ an intermediate electrode for forming a pole generation capacitor C ₄ to obtain a band-pass filter characteristic of narrow occur an attenuation pole at the high band or the low frequency side of the resonance frequency band.

The dielectric sheet 2f is, as shown in FIG.
Comprising an electrode pattern T ₆ of the sixth electrode pattern P ₆ are formed vertically and horizontally serpentine strip. This sixth electrode pattern P ₆
Constitutes the inductor L.

The dielectric sheet 2g serves as a dummy for securing the thickness of the multilayer circuit element 1.

The dielectric sheet 2h has an input electrode pattern PI and an output electrode pattern PO that are cut in half at the time of cutting.
When provided with an electrode pattern T ₇ the strip of the ground electrode pattern PG is formed along the front-rear.

Each of these dielectric sheets 2a to 2f is cut in half by cutting out a concave portion hole 10 on the peripheral edge thereof.
It has a partial hole 10 for forming a concave hole constituting each conductive path.
This partial hole 10 is not only a rectangular hole as in the embodiment but also an elliptical hole,
Various shapes such as circular holes are proposed. The partial holes 10 are vertically continuous in a stacked state, and an inner surface thereof is coated with an electrode paste described later to form a conductive path. As the conductive paths, an input-side conductive path I connected to the input section of the internal circuit, an output-side conductive path O connected to the output section of the internal circuit, a ground-side conductive path G connected to the ground section of the internal circuit, A relay conductive path N for electrically connecting the electrode patterns is formed.

In each of the conductive paths, the conductive paths I, O, G
Penetrates vertically in order to connect to the required external electric paths x, y, z of the printed board K of FIG. However, the relay conductive path N is a power path for electrically connecting the respective electrode patterns to each other, and therefore has a non-penetrating shape because it is necessary to ensure insulation from the external electric path on the printed board K. Therefore, the partial hole 10 is not formed in the lowermost dielectric sheet 2h at a position corresponding to the relay conductive path N.

Here, a small plate-like dielectric sheet on which only each of the electrode patterns P _{1 to} P ₆ is formed is laminated and fired, and the laminated circuit element 1 is used. Can be done.

These conductive paths I, O, G, and N are configured such that the electrode paste is supplied from the upper surface of the laminated body, the electrode paste is suctioned from the lower surface, and the electrode paste is introduced into each hole. An electrode paste is applied to the inner surfaces of the conductive paths I, O, G, and N. After that, the whole is baked to form a conductive layer with an electrode paste. The electrode paste is formed by kneading a metal powder with an organic binder and an inorganic binder, and is baked together with the laminate to be fixed on the inner surface of the conductive path.

Incidentally, as described above, the relay conductive path N
Is not penetrable, so that the electrode paste cannot be applied by suction into the through holes after the dielectric sheets 2a to 2h are laminated. Therefore, in the present invention, the conductive paths I, O, G, and N are formed in the next step shown in FIGS.

First, as shown in FIGS. 10 and 12A, the dielectric sheets 2a to 2g are laminated to form a partial laminate 20. Then, a screen sheet is formed on the front and back surfaces of the partial laminate 20 so that the electrode paste is supplied only to a required surface.
The electrode paste can be introduced into the continuous partial holes 11 where 0s are continuous, the electrode paste is supplied from one side, and vacuum suction is performed from the other side. As a result, the electrode paste is introduced into each of the continuous partial holes 11, and the first conductive layer 25a is formed on the inner surface with the firing.

Next, the lowermost dielectric sheet 2h is overlaid on the lower surface of the partial laminate 20 and thermocompression-bonded. At this time, the partial holes 10 of the lowermost dielectric sheet 2h coincide with the through holes corresponding to the respective conductive paths I, O, and G, and the relay conductive paths N
The partial hole 10 does not correspond to the non-through hole corresponding to, and its lower end is blocked. Then, as shown in FIG. 11 and FIG. 12B, the electrode paste is supplied to the front and back surfaces of the laminate by the same means as described above. As a result, the electrode paste is not introduced into the non-penetrating relay conductive path N, but the penetrating conductive paths I, O, and G are covered with the second conductive layer 25a so as to cover the first conductive layer 25a.
The conductive layer 25b is covered. That is, in the relay conductive path N, each electrode pattern is conducted by the first conductive layer 25a, and in each conductive path I, O, G, each electrode pattern is continuously conducted by the first conductive layer 25a and the second conductive layer 25b. Becomes After the simultaneous firing and integration, the laminate is cut lengthwise and crosswise along the chain line L in FIG.
Get.

In the method of forming the conductive path, the boundary between the partial laminate 20 and the lowermost dielectric sheet 2h is formed by the conventional method shown in FIG. Although the conductive layer 25 was broken due to thermal contraction of the electrode paste during firing in I, O, and G, in the present invention, the conductive paths I, O, and G were successively formed in the stacking direction by the second conductive layer 25b. Since it is formed, there is no disconnection during firing as shown in FIG.

The laminated circuit element 1 has two resonance coils L, L, two resonance capacitors C ₁ , C ₁ , and two coarse adjustment capacitors C ₂ , C shown in FIG.
₂ , a filter circuit composed of two input / output capacitors C ₃ and C ₃ , a pole generating capacitor C ₄ connecting the input and output, and two inductors L and L is formed.

[0030] The laminate circuit element 1, as shown in Figure 14, the insulating layer _{Z 1} corresponding to each of the dielectric sheets 2a~2h
~ Z8 can be considered to be laminated and fired,
Insulating layer _Z 1 on each bottom surface of ~Z6 electrode pattern _P 1 to P6
Is carried. The relationship between such a configuration and the circuit of FIG. 17 will be described.

That is, the resonance capacitor C₁ 
Is the second electrode pattern P of the second insulating layer ₂ And the third insulation
Layer Z₃ Left and right third electrode patterns P₃ Is the third insulating layer
Z₃ Are configured to face each other vertically.
Resonant frequency adjusting capacitor C₂Are the left and right sides of the first insulating layer
First electrode pattern P₁ And the second insulating layer Z₂ Second electrode
Pattern P₂ Is the second insulating layer Z₂ Face up and down through
And the second using a laser beam cutting device.
One electrode pattern P₁ By trimming the electrostatic
The capacity is adjusted. Input / output capacitor C₃ Is the third
Edge layer Z₃ Left and right electrode patterns P₃ And the fourth insulating layer Z
₄ Left and right fourth electrode patterns P₄ Is the fourth insulating layer Z₄
 Are configured to face each other vertically. Extreme
Raw capacitor C₄ Is the fourth insulating layer Z₄ Left and right electrode pads
Turn P₄ And the fifth electrode pattern P5 of the fifth insulating layer Z5.
 Are vertically opposed via the fifth insulating layer Z5.
Is configured. Further, the resonance coil L is formed of a sixth insulating layer.
The left and right sixth electrode patterns P6 of Z6.
You.

On the lower surface of the eighth insulating layer Z8, the input electrode pattern PI and the output electrode pattern P
O, and a strip-shaped ground electrode pattern PG along the front and rear are formed, the input electrode pattern PI is the conductive path I, the output electrode pattern PO is the conductive path O, and the ground electrode pattern PG.
Is connected to the conductive path G.

Further, the conductive path I is fourth electrode patterns P ₄ on the left side of the fourth insulating layer Z _4, the fourth electrode pattern P ₄ on the right side of the fourth insulating layer Z ₄ is connected to the conductive path O Further, a second electrode pattern P ₂ and a sixth electrode pattern P 6 are connected to the conductive path G. On the other hand, the relay conductive path N, which is cut off by the eighth insulating layer Z8 and does not penetrate downward,
The electrode pattern P ₁ , the third electrode pattern P ₃ , and the sixth electrode pattern P6 are connected. Thus, the above-described circuit is configured.

The laminated circuit element 1 having such a structure is mounted on a printed circuit board K, and is connected to the input electrode pattern PI, the output electrode pattern PO, and the strip-shaped ground electrode pattern PG extending along the front and rear, respectively, on the printed circuit board K. Circuit x,
y and z are connected. On the other hand, the relay conductive path N is non-penetrating by the eighth insulating layer Z8, and is therefore insulated from each electric path on the printed board K.

In the above-described structure, the laminated circuit element 1 is symmetrical in the left and right direction. Therefore, the input electrode pattern PI and the output electrode pattern Po, and the input-side conductive path I and the output-side conductive path O are not specified in the structure. It is specified at the time of mounting on the printed board K.

[0036]

According to the present invention, there is provided a conductive path formed by connecting a plurality of dielectric sheets to be laminated one on another in advance in a laminating direction and applying an electrode paste to the inner surface thereof by suction. In the one provided with a plurality of, each dielectric sheet except for the lowermost dielectric sheet is laminated,
Each partial hole is continuously formed in the laminating direction to form a partial laminated body, and after forming the first conductive layer by suction-coating the electrode paste on the inner surface of the continuous partial hole, the lowermost dielectric sheet is partially laminated. The electrode paste was further applied by suction to the penetrating conductive path in which the partial holes of the lowermost dielectric sheet were aligned with the continuous partial holes to form a second conductive layer, which was then fired. Therefore, there is an excellent effect that the electrode paste layer is not broken due to shrinkage during firing on the superposed surface of the partial laminate and the lowermost dielectric sheet.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a mounted state of a multilayer circuit element 1 according to one embodiment of the present invention.

FIG. 2 is a perspective view seen from below a dielectric sheet 2a.

FIG. 3 is a perspective view as viewed from below a dielectric sheet 2b.

FIG. 4 is a perspective view seen from below a dielectric sheet 2c.

FIG. 5 is a perspective view seen from below a dielectric sheet 2d.

FIG. 6 is a perspective view seen from below a dielectric sheet 2e.

FIG. 7 is a perspective view seen from below a dielectric sheet 2f.

FIG. 8 is a perspective view seen from below a dielectric sheet 2g.

FIG. 9 is a perspective view of the lowermost dielectric sheet 2h as viewed from below.

FIG. 10 is an exploded perspective view of a partial hole 10 and a lowermost dielectric sheet 2h.

FIG. 11 is a perspective view showing a state where the partial holes 10 and the lowermost dielectric sheet 2h are overlapped.

FIG. 12 is a cross-sectional view illustrating a conductive path forming method of the present invention.

FIG. 13 is a perspective view of the laminated circuit element 1.

FIG. 14 is an exploded perspective view showing insulating layers Z ₁ to Z ₈ forming a partial hole 10.

FIG. 15 is a cross-sectional view showing a conventional conductive path forming method.

FIG. 16 is a perspective view showing a mounted state of a multilayer circuit element having a conventional configuration.

FIG. 17 is an equivalent circuit diagram.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 laminated circuit element 2 a to 2 h dielectric sheet 10 partial hole 20 partial laminate 25 a first conductive layer 25 b second conductive layer P _{1 to} P ₆ electrode pattern I, O, G penetrating conductive path N non-penetrating conductive path

 ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Takahisa Kitajima 14-18 Takatsuji-cho, Mizuho-ku, Nagoya F-term in Japan Special Ceramics Co., Ltd. 5E070 AA05 AB03 AB10 BA01 CB12 CB17 CB18 CB20 DB08 EA01 5E082 AA01 AB03 BB01 DD08 FF05 FG06 FG54 GG10 JJ03 JJ06 JJ23 JJ30 MM24 5J024 AA02 BA10 CA04 CA06 DA04 DA29 EA03 5J098 AA14 AA15 AA16 AB05 AD05 CA01 CA05

Claims (1)

[Claims] 1. A method of laminating a plurality of dielectric sheets having an electrode pattern on a laminated surface and firing the laminated dielectric sheets, wherein partial holes formed in advance in the dielectric sheets are continuous in the laminating direction, and the inner surface thereof is formed. A plurality of conductive paths formed by applying the electrode paste by suction to the conductive paths, and the conductive paths that are not connected to the external electric paths on the mounting board, are not formed because partial holes are not formed in the lowermost dielectric sheet. In a laminated circuit element in which a penetrating conductive path and a non-penetrating conductive path are respectively formed as a penetrating shape, in the laminated circuit element, the dielectric sheets except for the lowermost dielectric sheet are laminated, and each partial hole is formed in the laminating direction. Continuously forming a partial laminate, after applying the electrode paste by suction to the inner surface of the continuous partial hole to form a first conductive layer, disposing the lowermost dielectric sheet on the lower surface of the partial laminate, Invite the bottom layer to the partial hole A conductive path forming method for a laminated circuit element, characterized in that a second conductive layer is formed by suction-coating an electrode paste on a penetrating side conductive path in which partial holes of a conductor sheet coincide with each other, and then firing.