JP2000311965A - Semiconductor device and manufacture of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor device and its manufacturing method, which are capable of coping with it in that semiconductor elements can be enhanced in density and lessened in pitch lessening their weight and restraining the effects of stresses caused by a thermal expansion difference between the semiconductor element and a wiring board. SOLUTION: A semiconductor device is equipped with a semiconductor element 12, a multilayer wiring board 13 provided with element bonding pads 16 on its element-mounting surface 13a and outer connection pads 17 on its other mounting surface 13a located opposite to its other surface 13a, and each of solder balls 14 bonded to the outer connection pads 17, where an insulating board 20A nearly equal to the semiconductor element 12 in thermal expansion coefficient is provided on the mounting surface 13b of the board 13 to be located at a position confronting the semiconductor element 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device having a structure in which a semiconductor element is mounted on a multilayer wiring board and a method of manufacturing the same. In recent years, in order to respond to the increase in the density of semiconductor devices and the number of electrodes, semiconductor devices are mounted on a wiring board, as represented by a BGA (Ball Grid Array), and projecting electrodes such as solder balls are used as external connection terminals. Is provided.

On the other hand, semiconductor devices are required to have high reliability. Therefore, a highly reliable semiconductor device that does not cause peeling or damage between the semiconductor element and the wiring board and between the mounting board and the wiring board even when heat is applied during mounting or the like is desired. .

[0003]

2. Description of the Related Art Conventionally, as a semiconductor device having a structure in which a semiconductor element is mounted on a wiring board and external connection terminals such as solder balls are provided on a surface opposite to a surface on which the semiconductor element is mounted, ceramics such as ceramics are used. A structure in which a semiconductor element is connected to a substrate made of an inorganic material, or a structure in which a through hole is provided in a single-layer resin substrate to connect a semiconductor element mounted on the upper surface of the substrate to a solder ball formed on the lower surface of the substrate (BGA structure) Things are known.

Further, as a method of bonding a semiconductor element to a wiring board, a method using flip-chip bonding has been increasing in order to cope with a higher density of semiconductor elements and a narrower pitch of terminals. In addition, in order to cope with the above-mentioned increase in density and increase in the number of terminals, wiring boards having a multi-layer wiring structure, particularly inorganic material-based boards, are increasing.

FIG. 1 shows an example of a conventional semiconductor device. A semiconductor device 1 shown in FIG. 1 uses a ceramic multilayer wiring board 3 as a wiring board, and a semiconductor element 2
Is used as a bonding method.
The ceramic multilayer wiring board 3 has a bump bonding pad 6 on an element mounting surface (an upper surface in the figure) on which the semiconductor element 2 is mounted, and has an external connection on a side opposite to the element mounting surface (a lower surface in the figure). For use. A bump 5 is provided on the lower surface of the semiconductor element 2 in the figure, and the bump 5 is bonded to a bump bonding pad 6 to thereby form the semiconductor element 2.
Are mounted on the ceramic multilayer wiring board 3.

A conductor wiring 8 is formed inside the ceramic multilayer wiring board 3. The bump bonding pad 6 is formed at one end of the conductor wiring 8, and an external connection pad 7 is formed at the other end. Are formed. Solder balls 4 functioning as external connection terminals are bonded to the external connection pads 7, whereby the semiconductor element 2 is connected to the solder balls 4 via the bumps 5, the bump bonding pads 6, the conductor wiring 8, and the external connection pads 7. 4 is electrically connected.

The coefficient of thermal expansion of the semiconductor element 2 and the coefficient of thermal expansion of the ceramic multilayer wiring board 3 are significantly different. For this reason, when a heating process is performed to join the solder balls 4 to a mounting board (not shown) during mounting, the semiconductor element 2 is greatly deformed with respect to the ceramic multilayer wiring board 3, and thus the semiconductor element 2 and the ceramic multilayer wiring A large stress is applied to the bonding position with the substrate 3, that is, the position where the bumps 5 are provided.

For this reason, an underfill material 9 is interposed between the semiconductor element 2 and the ceramic multilayer wiring board 3 to prevent an excessive stress from being applied to the bump 5 by the underfill material 9. are doing.

[0009]

However, since the above-described semiconductor device 1 uses the ceramic multilayer wiring substrate 3 as a wiring substrate, a stack via becomes possible, and if the number of layers is increased, the pitch of the bumps 5 can be reduced. Is possible. However, when the number of layers is increased, the weight of the ceramic multilayer wiring board 3 made of an inorganic material is increased, resulting in a problem that the semiconductor device 1 becomes heavier.

Further, in the semiconductor device 1, since the thermal expansion coefficient of the semiconductor element 2 and the thermal expansion coefficient of the ceramic multilayer wiring board 3 are different from each other as described above, in order to ensure the reliability of the flip chip joint, It is necessary to interpose an underfill material 9 in a gap between the semiconductor element 2 and the ceramic multilayer wiring board 3. In selecting the underfill material 9, it is necessary to select an optimum resin capable of appropriately suppressing the application of stress to the flip chip joint based on the difference in thermal expansion coefficient, and this selection is troublesome. was there.

On the other hand, since a semiconductor device using a resin substrate as a wiring substrate uses a wiring substrate made of a resin that is lighter than ceramic, it is lighter than the semiconductor device 1 using the ceramic multilayer wiring substrate 3 described above. There are benefits in terms of conversion. However, since a single-layer wiring board is used, the wiring density is limited, and there is a problem that it is not possible to cope with a higher density and a narrower pitch of a semiconductor element.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and can cope with a high density and narrow pitch of a semiconductor element while reducing the weight. It is an object of the present invention to provide a semiconductor device and a method for manufacturing the same, which can suppress the influence of stress generated by the semiconductor device.

[0013]

Means for Solving the Problems In order to solve the above problems, the present invention is characterized by taking the following means. According to the first aspect of the present invention, a semiconductor element, an element bonding pad is formed on an element mounting surface on which the semiconductor element is mounted, and an external connection pad is formed on a mounting surface opposite to the element mounting surface, And mounting the wiring board in a semiconductor device comprising: a wiring board on which a conductor wiring for connecting the element bonding pad and the external connection pad is formed; and an external connection terminal bonded to the external connection pad. A substrate having a thermal expansion coefficient substantially equal to that of the semiconductor element is provided at least at a position facing the semiconductor element.

According to a second aspect of the present invention, in the semiconductor device according to the first aspect, the material of the substrate is silicon or glass. Also,
According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect, the wiring board is a multi-layered wiring board in which a multi-layered conductor wiring layer based on a resin is laminated. .

According to a fourth aspect of the present invention, in the semiconductor device according to any one of the first to third aspects, the substrate is provided so as to cover the mounting surface and faces the external connection pad. An opening is formed at a position where the opening is formed. According to a fifth aspect of the present invention, there is provided a semiconductor device manufacturing method for manufacturing a semiconductor device having a structure in which a semiconductor element is mounted on a multilayer wiring board, wherein the semiconductor device has a thermal expansion coefficient substantially equal to that of the semiconductor element. An external connection pad forming step of forming external connection pads on one surface of a flat plate-shaped substrate for a substrate, and a plurality of multilayer conductor wiring layers on the surface of the substrate for substrate on which the element bonding pads are formed. A multilayer wiring board having an element bonding pad on an element mounting surface on which the semiconductor element is mounted, and having therein a conductor wiring for electrically connecting the element bonding pad and the external connection pad. Forming a multilayer wiring board forming step, leaving at least a region facing the semiconductor element,
A substrate forming step of forming a substrate by removing the substrate base so as to expose the external connection pads, and mounting the semiconductor element on an element mounting surface of the multilayer wiring board; And an external connection terminal bonding step of bonding an external connection terminal to an external connection pad of the multilayer wiring board.

Each of the above means operates as follows.
According to the first aspect of the present invention, a substrate having substantially the same thermal expansion coefficient as that of the semiconductor element is provided on the mounting surface of the wiring substrate, and the position of the substrate is set at least at a position facing the semiconductor element. This can prevent the generation of excessive stress between the semiconductor element and the wiring board.

That is, the thermal expansion of the wiring substrate formed on the substrate is governed by the thermal expansion of the substrate in consideration of the rigidity of the substrate and the wiring substrate. Further, as described above, the thermal expansion coefficient of the substrate is substantially equal to the thermal expansion coefficient of the semiconductor element. Therefore, for example, even when heat is applied to the semiconductor device at the time of mounting or the like, the semiconductor element and the substrate perform substantially the same thermal deformation, and the wiring substrate is also substantially dominated by the deformation of the substrate as described above. Because of the change, generation of excessive stress between the semiconductor element and the wiring board can be suppressed. This can prevent peeling and damage from occurring at the joint position between the semiconductor element and the wiring board.

Further, as in the second aspect of the present invention, it is desirable to use silicon or glass having a similar coefficient of thermal expansion of the semiconductor element as the material of the substrate. According to the third aspect of the present invention, the weight of the wiring board can be reduced by using a multilayer wiring board in which a multilayer conductor wiring layer using a resin as a base material is laminated as the wiring board. That is, since the base material made of resin is lightweight, a multilayer wiring board in which a multilayer conductor wiring layer using resin as a base material is laminated can be reduced in weight as compared with a conventionally used ceramic multilayer wiring board. .

According to the fourth aspect of the present invention, the substrate is disposed so as to cover the mounting surface, and the opening is formed at a position facing the external connection pad. It is possible to reinforce. Thereby, the wiring board can be prevented from being deformed at the time of mounting or the like, and the mountability of the semiconductor device can be improved.

In addition, the number of components can be reduced and the weight can be reduced as compared with a configuration in which a reinforcing member is separately provided. Further, since the opening is formed at a position facing the external connection pad, the substrate does not hinder the arrangement of the external connection pad. According to the fifth aspect of the present invention, in the multilayer wiring board forming step, the multilayer wiring board is formed by laminating a plurality of multilayer conductor wiring layers on a surface of the base material for the substrate. . That is, before the substrate is formed from the multilayer wiring board in the substrate forming step, the base material for the substrate is a multilayer wiring board (multilayer conductor wiring layer).
It functions as a support member for supporting.

Therefore, the number of parts can be reduced as compared with a configuration using a support member for separately supporting a multilayer wiring board (multilayer conductor wiring layer), and the number of steps required for mounting and removing the support member can be reduced. Can be planned.

[0022]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 2 shows a semiconductor device 10A according to a first embodiment of the present invention. The semiconductor device 10A shown in FIG. 1 includes a semiconductor element 12, a multilayer wiring board 13 (wiring board), solder balls 14 (external connection terminals), an insulating board 20A (substrate), and the like.

The semiconductor element 12 has a plurality of bumps 15 formed on an outer periphery of a circuit forming surface (a lower surface in the figure). Also,
The semiconductor element 12 is a high-density element, so that the bump pitch is also reduced. Multilayer wiring board 13
Is a circuit board on which a plurality of conductor wiring layers are stacked. Each conductive wiring layer has a configuration in which a wiring film is formed on an insulating resin as a base material, and electrical connection between the conductive wiring layers is electrically connected by interlayer wiring (for example, conductive via). .

The wiring film and the conductive via cooperate to form a conductive wiring 18 inside the multilayer wiring board 13. Specific examples of the insulating resin include organic resins such as photosensitive epoxy, photosensitive polyimide, benzocyclobutene, olefin, and Teflon. An element mounting surface 13a of the multilayer wiring board 13 on which the semiconductor element is mounted.
Are formed with bump bonding pads 16 (element bonding pads), and the mounting surface 1 on the side opposite to the element mounting surface 13a.
An external connection pad 17 is formed on 3b. The bump bonding pad 16 and the external connection pad 17 are connected by a conductor wiring 18 formed inside the multilayer wiring board 13.

As described above, the weight of the multilayer wiring board 13 can be reduced by using the multilayer wiring board 13 having the structure in which the multilayer conductor wiring layers made of resin are laminated. That is, resin is lighter than ceramic,
The weight of the multilayer wiring board 13 can be reduced as compared with the conventionally used ceramic multilayer wiring board 3 (see FIG. 1). Therefore, the weight of the semiconductor device 10A can be reduced by using the multilayer wiring board 13.

Further, by using the multilayer wiring board 13 in which a plurality of conductive wiring layers are stacked, the degree of freedom in wiring design and fan-out of the conductive wiring 18 is improved, and the element mounting surface 1 is improved.
Since the number of wirings formed in 3a can be reduced, the pitch of the bump bonding pads 16 can be narrowed. Therefore, even if the number of terminals is increased due to the increase in density and the number of bumps 15 increases with the increase in density, it is possible to sufficiently cope with the increase.

The semiconductor element 12 is mounted (primary mounting) on the element mounting surface 13a of the multilayer wiring board 13 having the above-described structure by using the flip chip technique. Thereby, the semiconductor element 12 and the multilayer wiring board 13 are electrically connected. Further, an underfill material 19 is interposed between the semiconductor device 12 and the multilayer wiring board 13, and the underfill material 19 provided in the present embodiment prevents dust from adhering to the surface of the semiconductor element 12. And those that prevent moisture intrusion are selected. That is, the conventional underfill material 9 (see FIG. 1)
As described above, a material having almost no function of relaxing the stress applied to the bump 5 is selected. This will be described later in detail.

On the other hand, the solder balls 14 function as external connection terminals, and are joined to the external connection pads 17 of the multilayer wiring board 13 by using, for example, a transfer method. Therefore, the semiconductor element 12 has a configuration in which the semiconductor element 12 is electrically connected to the solder ball 14 via the bump 15, the bump bonding pad 16, the conductor wiring 18, and the external connection pad 17. The insulating substrate 20 </ b> A is provided on the mounting surface 13 b of the multilayer wiring board 13 so as to face the semiconductor element 12. In the present embodiment, the size of the insulating substrate 20A is
It is configured to be approximately equal to the size of 2.

The insulating substrate 20A is a plate-like member made of a material having a thermal expansion coefficient substantially equal to that of the semiconductor element 12. Specifically, the insulating substrate 20A uses, as its material, silicon or glass having a coefficient of thermal expansion close to the coefficient of thermal expansion of the semiconductor element 12, and the coefficient of thermal expansion is the same as the coefficient of thermal expansion of the semiconductor element 12. A range of approximately equal 5 to 10 ppm is selected.

As described above, the semiconductor device 1 according to the present embodiment
0A is because the insulating substrate 20A having substantially the same thermal expansion coefficient and size as the semiconductor element 12 is disposed on the mounting surface 13b of the multilayer wiring board 13 so as to face the semiconductor element 12.
The generation of excessive stress between the semiconductor element 12 and the multilayer wiring board 13 can be prevented. Hereinafter, the reason will be described. The thermal expansion of the multilayer wiring substrate 13 formed on the insulating substrate 20A is governed by the thermal expansion of the insulating substrate 20A in consideration of the rigidity of the insulating substrate 20A and the multilayer wiring substrate 13.

That is, the multilayer wiring board 13 is made of an organic resin as described above, and the insulating board 20A is made of silicon or glass. Therefore, the rigidity of the insulating substrate 20A is higher than the rigidity of the multilayer wiring board 13. Therefore, the thermal expansion of the multilayer wiring board 13 is governed by the thermal expansion of the insulating substrate 20A. Further, as described above, the thermal expansion coefficient of the insulating substrate 20A is substantially equal to the thermal expansion coefficient of the semiconductor element 12.

Therefore, even if heat is applied to the semiconductor device 10A during, for example, primary mounting, the semiconductor element 1
2 and the insulating substrate 20A undergo substantially the same thermal deformation, and the multilayer wiring board 13 (specifically, the region facing the insulating substrate 20A) is also governed by the deformation of the insulating substrate 20A as described above. It changes almost equally. Therefore, the semiconductor element 12
Generation of excessive stress (stress) between the substrate and the multilayer wiring board 13 can be suppressed. Thereby, it is possible to prevent bump separation and damage from occurring at the joint position between the semiconductor element 12 and the multilayer wiring board 13.

In addition, it is possible to suppress the stress (stress) on the bump bonding portion that has been flip-chip bonded,
The underfill material 19 to be filled between the semiconductor element 12 and the multilayer wiring board 13 may be selected to have such a property that the surface of the semiconductor element is protected from dust and moisture. Further, even if some voids are generated around the joint of the bumps 15, no crack is generated in the underfill material 19 based on the voids.
It is not necessary to consider the filling property of the resin, and the time required for resin selection can be reduced.

The semiconductor device 10A is mounted (secondarily mounted) on a mounting substrate (not shown). The semiconductor device 10A according to the present embodiment is mounted on the mounting substrate and the multilayer wiring board 13 during the secondary mounting. Can be reduced. That is, in the semiconductor device 10A according to the present embodiment, the insulating substrate 20A is provided only in the region facing the semiconductor element 12, and is not formed at the position where the solder ball 14 is provided. Further, as is well known, the mounting substrate is generally a resin substrate (for example, an epoxy resin).

Since the multilayer wiring board 13 is formed of resin as described above, its coefficient of thermal expansion is close to the coefficient of thermal expansion of the mounting board made of resin. In addition, solder ball 1
Since the insulating substrate 20A is not formed in the area where the wiring board 4 is provided, this area is
Deformation corresponding to the coefficient of thermal expansion of 3. Therefore, even when heat is applied to the semiconductor device 10A during secondary mounting or the like, the multilayer wiring board 13 and the mounting board undergo substantially the same thermal deformation. For this reason, excessive stress (stress) does not occur between the multilayer wiring board 13 and the mounting board, and thus peeling and damage of the solder balls 14 occur at the joining position between the multilayer wiring board 13 and the mounting board. Can be prevented. Thus, the semiconductor device 1 according to the present embodiment
According to 0A, the reliability at the time of secondary mounting can be improved.

Subsequently, the semiconductor device 10 having the above configuration is
The manufacturing method of A will be described with reference to FIGS. To manufacture the semiconductor device 10A, first, FIG.
As shown in (1), a plate-like base material 21 for an insulating substrate is prepared. The flat substrate 21 for an insulating substrate is made of an insulating substrate 20A.
Made of silicon or glass having a thermal expansion coefficient substantially equal to that of the semiconductor element 12, and having a thermal expansion coefficient substantially equal to the thermal expansion coefficient of the semiconductor element 12.
Those in the range of ppm are selected. The upper surface of the insulating substrate base 21 is a highly accurate smooth surface.

On the entire upper surface of the insulating substrate base material 21,
As shown in FIG. 3B, the conductor layer 22 is formed with a predetermined thickness. The conductive layer 22 is a conductive metal such as copper or aluminum, and is formed by using a sputtering method or an electroless plating method. When a substrate having conductivity is used instead of the insulating substrate 21, an electrolytic plating method can be used.

When the conductor layer 22 is formed, a resist (not shown) for masking a portion corresponding to the position where the external connection pad 17 is formed is formed, and an etching process is performed. As a result, as shown in FIG.
Are formed on the upper surface of the semiconductor device (external connection pad forming step). Subsequently, as shown in FIG. 4D, a multilayer wiring board 13 is formed on the upper surface of the insulating substrate base 21 on which the external connection pads 17 are formed (a multilayer wiring board forming step).

More specifically, a plurality of multilayer conductor wiring layers each having a configuration in which a wiring film is formed on a base made of an organic resin material are formed on the upper surface of the insulating substrate base material 21, and the respective conductor wiring layers are separated from each other. The layers are connected by conductor bumps or the like. As a method of forming the stack, a semi-additive method, an additive method, a photolithography method, or the like can be used.

Further, as described above, the upper surface of the insulating substrate base 21 is a flat surface with high precision, so that the conductor wiring layers to be laminated can be formed with high precision. Therefore, it is possible to suppress the occurrence of disconnection in the conductor wiring 18 when the multilayer wiring board 13 is formed. An element mounting pad 16 is formed on an element mounting surface located on the uppermost layer on which the semiconductor element 12 is mounted. The above-mentioned external connection pad 17 and the element bonding pad 16 are electrically connected by a conductor wiring 18 composed of a wiring film and a conductor bump. By performing the above processing, the multilayer wiring board 13 is formed on the upper surface of the insulating substrate base 21.

When the above-mentioned multilayer wiring board forming step is completed, subsequently, as shown in FIG.
An insulating substrate 20A is formed by removing the other portion while leaving a region facing one semiconductor element 12 (substrate forming step). By performing this substrate forming step, the external connection pads 17 are exposed to the outside. Subsequently, as shown in FIG. 5F, the semiconductor element 12 on which the bumps 15 are provided in advance is mounted on the element mounting surface 1 of the multilayer wiring board 13.
The bump 15 is bonded to the bump bonding pad 16 by flip chip bonding to 3a. Further, as shown in FIG. 5 (G), an underfill material 19 is interposed in a gap formed between the semiconductor element 12 and the multilayer wiring board 13. Thereby, the semiconductor element 12 is mounted on the multilayer wiring board 13 (element mounting step).

Subsequently, as shown in FIG. 6, a solder ball 14 serving as an external connection terminal is bonded to the external connection pad 17 of the multilayer wiring board 13 (part connection terminal bonding step), whereby the semiconductor shown in FIG. The device 10A is manufactured. According to the manufacturing method of the present embodiment described above, the multilayer wiring board 13
Is a substrate 21 for an insulating substrate in a multilayer wiring board forming process.
Is formed by laminating a plurality of multilayer conductor wiring layers on the surface thereof. That is, before the insulating substrate 20A is formed from the multilayer wiring substrate 13 in the substrate forming step, the insulating substrate base 21 functions as a support member that supports the multilayer wiring substrate 13 (multilayer conductor wiring layer).

Therefore, the number of components can be reduced as compared with a configuration using a support member for separately supporting a multilayer wiring board (multilayer conductor wiring layer), and the number of steps required for mounting and removing the support member can be reduced. Can be planned. next,
Second to sixth embodiments of the present invention will be described. 7 to 11 show semiconductor devices 10B to 10F according to second to sixth embodiments of the present invention. 7 to 11
, The same components as those described with reference to FIGS. 1 to 6 are denoted by the same reference numerals, and description thereof will be omitted.

FIG. 7 shows a semiconductor device 10 according to the second embodiment.
B is shown. In the semiconductor device 10B shown in FIG. 3, a frame member 23 (high rigid member) for increasing the rigidity of the multilayer wiring board 13 is disposed on the element mounting surface 13a of the multilayer wiring board 13 and at the outer peripheral position of the semiconductor element 12. Things. As the frame member 23, a material having a coefficient of thermal expansion substantially equal to the coefficient of thermal expansion of the mounting substrate on which the semiconductor device 10B is secondarily mounted is selected. The frame member 23 is fixed on the multilayer wiring board 13 using an adhesive 24, and the semiconductor element 12 is located in a central opening 29 formed at the center thereof.

As in the present embodiment, the frame member 23 for increasing the rigidity
Is provided on the multilayer wiring board 13, even if the multilayer wiring board 13 is made of resin as a base material, the multilayer wiring board 13 can be prevented from being deformed at the time of mounting or the like, and the mounting property of the semiconductor device 20B can be reduced. Can be improved. In addition, since the thermal expansion coefficient of the frame member 23 is substantially equal to the thermal expansion coefficient of the mounting substrate on which the semiconductor device 10B is secondarily mounted, excessive stress (stress) is generated during the secondary mounting. , Can be prevented, and the mounting reliability can be improved.

FIG. 8 shows a semiconductor device 10 according to the third embodiment.
It is a figure for explaining C. FIG. 8A shows a semiconductor device 10C, and FIG. 8B shows the semiconductor device 10C.
In the manufacturing process C, the state in which the substrate forming process is completed is shown. As described with reference to FIG. 4D, the semiconductor device 10B according to the present embodiment
After the formation of the multilayer wiring board 13 on the substrate 1, an opening 25 is formed at a position facing the external connection pad 17, as shown in FIG. This opening 25
May be formed by using an etching method or a laser processing method. Accordingly, as shown in FIG. 8A, the manufactured semiconductor device 10C has a configuration in which the solder balls 14 protrude outside from the opening 25 of the insulating substrate 20B formed as described above.

According to the semiconductor device 10B according to the configuration of the present embodiment, the insulating substrate 20B covers almost the entire mounting surface 13b of the multilayer wiring board 13 except for the position where the opening 25 is formed. 20B enables the multilayer wiring board 13 to be reinforced. Thereby, the multilayer wiring board 13 using resin as a base material at the time of secondary mounting or the like
Can be prevented from being generated, and the mountability of the semiconductor device 10C can be improved. In addition, the number of components can be reduced and the weight can be reduced as compared with a configuration in which a reinforcing member is separately provided. Further, since the opening 25 is formed at the position where the solder ball 14 is provided, the insulating substrate 20B does not hinder the placement of the solder ball 14.

Further, when the semiconductor device 10C is secondarily mounted on a mounting board, the diameter of the solder ball 14 is set to be smaller than the diameter of the opening 25 even if stress is generated due to the difference in thermal expansion of each member. Therefore, the solder ball 14 does not come into contact with the insulating substrate 20B (specifically, the edge of the opening 25). FIG. 9 shows a semiconductor device 10D according to a fourth embodiment. Semiconductor device 10D shown in FIG.
Is a semiconductor device 1C according to the second embodiment described above with reference to FIG. 7 in the semiconductor device 10C shown in FIG.
The frame 23 is further provided with a frame 23 disposed at 0B. Semiconductor device 10 according to the present embodiment
According to D, both the effect produced by the second embodiment and the effect produced by the third embodiment can be realized.

FIG. 10 shows a semiconductor device 10 according to a fifth embodiment.
E, and FIG. 11 shows a semiconductor device 10F according to the sixth embodiment. In each embodiment, the radiation fin 2
6 is provided. The semiconductor device 10E according to the fifth embodiment has a configuration in which the heat radiation fins 26 are arranged in the semiconductor device 10B according to the second embodiment illustrated in FIG. Further, the semiconductor device 10 of the sixth embodiment
F is the semiconductor device 10D according to the fourth embodiment shown in FIG.
The radiating fins 26 are disposed on the fins.

The radiating fins 26 are made of a material such as aluminum, which is lightweight and has good thermal conductivity, and has a shape with a wide radiating area. Also,
The heat radiation fins 26 are fixed to the back surface of the semiconductor element 12 to which the flip chip bonding has been performed, using a heat conductive material 27 (functioning as an adhesive). As described above, the semiconductor element 12 is flip-chip mounted on the multilayer wiring board 13 and the heat dissipating member 26 is disposed on the back surface thereof.
The heat generated in the semiconductor element 12 can be efficiently radiated to the outside, and the semiconductor element 12 can be operated stably.

In each of the above embodiments, the semiconductor device 1
Only the configuration in which the semiconductor device 12 is flip-chip mounted on the multilayer wiring board 13 is shown, but the semiconductor device 12 is primarily mounted face-up on the multilayer wiring board 13 and the semiconductor element 12 and the multilayer wiring board 13 are connected by wire bonding. It may be. In the case of this configuration, the semiconductor device 12
Can be alleviated at the position where it is die-mounted on the multilayer wiring board 13.

As is apparent from the above-described embodiment, the underfill material 19 is not always necessary. When the underfill material 19 is omitted, the number of parts is further reduced and the manufacturing process is simplified. Can be achieved.

[0053]

According to the present invention as described above, the following various effects can be realized. Claim 1 or 2
According to the described invention, even when heat is applied to the semiconductor device at the time of mounting or the like, the semiconductor element and the substrate perform substantially the same thermal deformation, and the wiring substrate is also governed by the deformation of the substrate as described above. Change almost equally.

Therefore, generation of excessive stress between the semiconductor element and the wiring board can be suppressed, and peeling and damage at the joining position between the semiconductor element and the wiring board can be prevented. it can. According to the third aspect of the present invention, the use of a multilayer wiring board made of a resin that is lighter than ceramics or the like as a base material is used as the wiring board, so that the weight of the wiring board can be reduced. The weight of the device can be reduced.

According to the fourth aspect of the present invention, it is possible to reinforce the wiring board by the board, thereby preventing the wiring board from being deformed at the time of mounting or the like, and improving the mountability of the semiconductor device. Can be done. In addition, the number of components can be reduced and the weight can be reduced as compared with a configuration in which a reinforcing member is separately provided. According to the fifth aspect of the present invention, before the substrate is formed from the multilayer wiring board in the substrate forming step, the base material for the substrate functions as a support member for supporting the multilayer wiring board (multilayer conductor wiring layer). Therefore, the number of parts can be reduced, and the number of steps required for attaching and detaching the support member can be reduced.

With respect to the above description, the following items are further disclosed. (1) a semiconductor element, an element bonding pad formed on an element mounting surface on which the semiconductor element is mounted, and an external connection pad formed on a mounting surface opposite to the element mounting surface; And a wiring board formed with a conductor wiring for connecting the external connection pad and an external connection pad, and a semiconductor device having an external connection terminal joined to the external connection pad, wherein at least the A semiconductor device, comprising: a substrate having a thermal expansion coefficient substantially equal to that of the semiconductor element provided at a position facing the semiconductor element.

(2) In the semiconductor device according to item 1,
A semiconductor device, wherein the substrate has a coefficient of thermal expansion of 5 to 10 ppm. (3) In the semiconductor device according to the item (1) or (2),
At the outer peripheral position of the semiconductor element on the mounting surface of the wiring board,
A semiconductor device comprising a high-rigid member for increasing the rigidity of the wiring board.

(4) In the semiconductor device according to any one of the above items (1) to (3), the semiconductor element is flip-chip mounted on the wiring board, and a heat radiating member is provided on a back surface of the semiconductor element. A semiconductor device characterized by the above-mentioned. (5) The semiconductor device according to any one of Items 1 to 4, wherein the semiconductor element is flip-chip bonded to the wiring substrate.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an example of a conventional semiconductor device.

FIG. 2 is a diagram illustrating a semiconductor device according to a first embodiment of the present invention.

FIG. 3 is a diagram for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention (part 1).

FIG. 4 is a view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention (part 2);

FIG. 5 is a view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention (part 3);

FIG. 6 is a view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention (part 4).

FIG. 7 is a diagram illustrating a semiconductor device according to a second embodiment of the present invention.

FIG. 8 is a diagram illustrating a semiconductor device according to a third embodiment of the present invention.

FIG. 9 is a diagram illustrating a semiconductor device according to a fourth embodiment of the present invention.

FIG. 10 is a diagram illustrating a semiconductor device according to a fifth embodiment of the present invention.

FIG. 11 is a diagram for explaining a semiconductor device according to a sixth embodiment of the present invention.

[Explanation of symbols]

 10A to 10F Semiconductor device 12 Semiconductor element 13 Multilayer wiring board 14 Solder ball 15 Bump 16 Bump bonding pad 17 External connection pad 19 Underfill material 20A, 20B Insulating substrate 21 Insulating substrate base material 22 Conductive layer 23 Frame material 25 Opening 26 Heat radiation fin

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Daiichi Kanwa 4-1-1, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa F-term within Fujitsu Limited (reference) 5F033 VV07

Claims (5)

[Claims] An element connection pad formed on an element mounting surface on which the semiconductor element is mounted, and an external connection pad formed on a mounting surface opposite to the element mounting surface; In a semiconductor device comprising: a wiring board on which a conductive wiring for connecting a bonding pad and an external connection pad is formed; and an external connection terminal bonded to the external connection pad. A semiconductor device comprising a substrate having a thermal expansion coefficient substantially equal to that of the semiconductor element at least at a position facing the semiconductor element. 2. The semiconductor device according to claim 1, wherein the material of the substrate is silicon or glass. 3. The semiconductor device according to claim 1, wherein the wiring board is a multilayer wiring board in which a multilayer conductor wiring layer made of resin is laminated. 4. The semiconductor device according to claim 1, wherein the substrate is provided so as to cover the mounting surface, and an opening is formed at a position facing the external connection pad. A semiconductor device characterized by the above-mentioned. 5. A method of manufacturing a semiconductor device having a structure in which a semiconductor element is mounted on a multilayer wiring board, comprising: a flat substrate having a thermal expansion coefficient substantially equal to that of the semiconductor element. An external connection pad forming step of forming external connection pads on one surface of the base material, and forming a plurality of multilayer conductor wiring layers on the surface of the substrate base on which the element bonding pads are formed; A multi-layer wiring board having a multi-layer wiring board having an element bonding pad on an element mounting surface on which the semiconductor element is mounted and having a conductor wiring for electrically connecting the element bonding pad and the external connection pad inside Forming a substrate by removing the substrate for the substrate so as to leave at least a region facing the semiconductor element and to expose the external connection pad; An element mounting step of mounting the semiconductor element on an element mounting surface of the multilayer wiring board and electrically connecting the semiconductor element to the element bonding pad; An external connection terminal joining step of joining the connection terminals.