JP2000306896A - Method and apparatus for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To remove a resist film formed on a surface of a metal pattern. SOLUTION: A discharge tube 33, hung from the top in a treatment chamber 31 of an ozone ashing device 30 performing a sub-ashing process, blows out an ashing gas containing ozone (O3) as main component like a shower outward in the diameter direction. A wafer 50 is held on a susceptor 37 provided at the bottom of the treatment chamber 31. A heater 38, provided concentrically outside the susceptor 37, heats only the outer periphery of the wafer 50. The susceptor 37 is rotated by a rotational shaft 39. The treatment chamber 31 is evacuated by an exhaust port 40. Since only the periphery of the wafer is heated, the ashing gas is supplied only to the periphery of the wafer, while oxidation of the surface of Cu wiring in the central portion and residues of the resist film in the periphery can be surely removed by ashing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for manufacturing a semiconductor device, and more particularly to an ashing technique for a resist film used for patterning a metal pattern.
For example, the present invention relates to a device that is effective for forming copper (Cu) wiring in a semiconductor device manufacturing process.

[0002]

2. Description of the Related Art The use of Cu, which is superior to aluminum (Al) in terms of reliability and electric resistance, as a wiring material for semiconductor devices has been studied. However, Cu
There are the following problems in using as a wiring material for a semiconductor device. Since Cu does not form a passive film unlike Al, it has no oxidation resistance. Therefore, when ashing with oxygen (O ₂ ) for removing the resist film is performed at a high temperature, an oxide film is formed on the surface of a pattern made of Cu (hereinafter, referred to as a Cu pattern). C
When an oxide film is formed on the surface of the u pattern, the electric resistance increases. Further, since diffusion of Cu into the oxide film is very fast, Cu atoms in the Cu wiring diffuse to a deep portion of the oxide film to cause an operation failure. Further, the adhesion to the interlayer insulating film and the passivation film is reduced.

As an example describing the problems and prospects of the Cu wiring technology, see “Electronic Materials November 1998 Extra Volume”, published on November 25, 1998,
To P18.

[0004]

For example, in an ashing step in which a resist film used to form a Cu pattern on a semiconductor wafer is removed by ashing with oxygen, reactive ion etching (reactive ion etc.) is performed.
hing. Hereinafter, it is called RIE. It is conceivable to prevent oxidation of the Cu pattern by performing ashing while cooling a semiconductor wafer as an object to be processed using an apparatus.

[0005] However, since the ashing process by the RIE apparatus is performed in a vacuum, the semiconductor wafer is mechanically fixed by the clamper. As a result, the resist film under the clamper in the peripheral portion of the semiconductor wafer is formed. It has been revealed by the present inventors that there is a problem of not being removed.

When a film formation process such as a CVD process or a sputtering process under a vacuum is performed on a semiconductor wafer with a part of the resist film remaining on the semiconductor wafer, carbon (C) components and the like in the resist film are removed. Evaporation under vacuum deteriorates the degree of vacuum in the film formation process, so that a desired film formation process is not performed on the semiconductor wafer.

A method of applying a so-called peripheral exposure technique in which a peripheral portion of the resist film held by the clamper is removed in advance is conceivable. However, since the oxide film in the peripheral portion of the semiconductor wafer is etched during the dry etching for forming the Cu pattern, a step occurs in the peripheral portion of the semiconductor wafer. Therefore, when the semiconductor wafer is subsequently subjected to chemical mechanical polishing (CMP), the present inventors have found that there is a problem that the uniformity of the polishing rate is reduced and a larger step is formed. Was.

An object of the present invention is to provide a semiconductor device manufacturing technique capable of removing a resist film formed on the surface of a metal pattern.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

The outline of a typical invention among the inventions disclosed in the present application is as follows.

That is, the present invention is characterized in that the remaining portion of the resist film remaining on the peripheral portion of the object to be processed is removed by sub-ashing.

According to the above-mentioned means, the remaining portion of the resist film remaining on the peripheral portion of the object is removed by sub-ashing, so that the object to be processed is then processed under vacuum. Even if it does, the phenomenon that the carbon (C) component and the like in the resist film evaporate under vacuum does not occur.

[0013]

FIG. 1 is a front sectional view showing an ozone ashing apparatus according to an embodiment of the present invention. FIG. 2 is a front sectional view showing an RIE apparatus used in the method of manufacturing a semiconductor device according to one embodiment of the present invention. FIG. 3 is an enlarged partial sectional view showing main steps of a method of manufacturing a semiconductor device according to an embodiment of the present invention.

In the present embodiment, the method for manufacturing a semiconductor device according to the present invention is used for manufacturing a semiconductor device having Cu wiring, and a semiconductor wafer on which a semiconductor integrated circuit including a semiconductor element is formed. (Hereinafter, referred to as a wafer). A step of implementing a Cu wiring forming method for forming a Cu wiring on the wafer is provided. The Cu wiring forming method according to the present embodiment includes an ashing (hereinafter, referred to as a main ashing step) step and a sub-ashing step.
The main ashing step is performed by the RIE apparatus shown in FIG. 2, and the sub-ashing step is performed by the ozone ashing apparatus shown in FIG.

Here, the RIE apparatus shown in FIG. 2 for performing the main ashing step will be described, and then the ozone ashing apparatus shown in FIG. 1 for performing the sub-ashing step will be described.

As shown in FIG. 2, the RIE apparatus 10 for performing the main ashing step includes a chamber 12 in which a processing chamber 11 is formed. An upper electrode plate 13 capable of blowing out ashing gas in a shower shape is suspended above the processing chamber 11. Although not shown, the upper electrode plate 13 is connected to the ground. A gas supply path 14 is connected to the upper electrode plate 13, and a gas supply source 15 is connected to the gas supply path 14 via a stop valve 16.

A susceptor 17 also serving as a lower electrode plate is provided at the center of the processing chamber 11, and the susceptor 17 clamps a peripheral portion of the wafer 50 with a wafer 50 as an object to be processed mounted thereon. It is configured to be fixed by 18. The susceptor 17 is connected to a high frequency power supply 19. A baffle plate 20 is horizontally installed below the susceptor 17, and a wall plate 21 is installed on the inner periphery of the processing chamber 11 so as to surround the susceptor 17. An exhaust port 22 connected to a vacuum pump 24 is opened below the chamber 12, and a flow control valve 23 is provided in the exhaust port 22.

A window 25 is formed in the upper part of the chamber 12, and a sensor head 27 for detecting light emission connected to a monochromator 26 is arranged outside the window 25. A capillary plate 28 is arranged at a position facing the window 25 of the wall plate 21, and the light emission detection sensor head 27 detects the light emission of the plasma P through the window 25 and the capillary plate 28. A magnet 29 is installed on the outer periphery of the upper part of the chamber 12 so as to rotate around the chamber 12. Although not shown, the chamber 12 is provided with a gate valve for loading and unloading.

As shown in FIG. 1, an ozone ashing apparatus 30 for performing a sub-ashing step is a processing chamber 3
1 is formed. A blowing pipe 33 is hung above the processing chamber 31, and the blowing pipe 33 is configured to blow an ashing gas mainly composed of ozone (O ₃ ) in a shower shape radially outward.
A gas supply path 34 is connected to the blowout pipe 33, and a gas supply source 35 is connected to the gas supply path 34 via a stop valve 36. A susceptor 37 is provided at the bottom of the processing chamber 31, and the susceptor 37 is configured to hold the wafer 50 on its upper surface. A heater 38 is concentrically provided outside the susceptor 37, and the heater 38 is configured to heat only the outer peripheral portion of the wafer 50 held by the susceptor 37. The susceptor 37 is configured to be rotated by a rotating shaft 39 driven to rotate by a motor or the like. The chamber 32 has an exhaust port 40 for exhausting the processing chamber 31. The chamber 32 is configured so that a wafer 50 as a work can be loaded and unloaded.

Next, a method of forming a through hole will be described with reference to FIGS.

The wafer 50 before the through holes are formed in the dry etching step is formed as shown in FIG. That is, a W (tungsten) line 53 is laid on a gate 52 formed on a substrate 51 of a wafer 50, and the W line 53 is
(Phosphorus-doped SiO ₂ ) film 54. P (plasma) -SiN is formed on the PSG film 54.
(Silicon nitride) film 55 is deposited and P-SiN
P-TEOS (tri-ethyl-ortho.
A (silicate) film 56 is applied. P-SiN film 5
5 and the P-TEOS film 56 are patterned so as to be appropriately connected electrically to the W line 53 with the Cu wiring 57 embedded therein.

A P-SiN film 58 is deposited on the P-TEOS film 56 so as to cover the Cu wiring 57.
On the P-SiN film 58, a SOG (spin-on-glass) film 59 is deposited. P on the SOG film 59
-A TEOS film 60 has been deposited. P-TEOS film 6
On the resist film 61, a resist film 61 is adhered, and a through-hole pattern 62 is patterned on the resist film 61 by lithography so as to correspond to the Cu wiring 57.

When the wafer 50 configured as described above is dry-etched in the dry etching step,
The positions of the P-SiN film 58, the SOG film 59 and the P-TEOS film 60 facing the through-hole pattern 62 are as follows:
A through hole 63 is drilled as shown in FIG. At the bottom of the through hole 63, the upper surface of the Cu wiring 57 is exposed.

The wafers 50 having the through holes 63 formed in the dry etching step are carried one by one from the carry-in / out gate valve into the processing chamber 11 of the RIE apparatus 10 for performing the main ashing step. The wafer 50 carried into the processing chamber 11 is placed on the susceptor 17 as shown in FIG. 2, and the periphery of the upper surface is fixed by the clamper 18. When the processing chamber 11 is evacuated by the exhaust port 22 and plasma is formed by the upper electrode plate 13 and the susceptor 17, and O ₂ gas is blown out of the upper electrode plate 13 through the gas supply path 14 as an ashing gas, as shown in FIG. As shown in FIG. 6, since the O ₂ gas 64 contacts the resist film 61, the resist film 61 is ashed and removed as shown in FIG.

During the ashing, the surface of the Cu wiring 57 may be oxidized because the O ₂ gas 64 comes into contact with the surface of the Cu wiring 57 as shown in FIG. Therefore, in the present embodiment, the wafer 50 is not heated by the susceptor 17 so that the Cu wiring 57 is not heated.
Is prevented from being oxidized by the O ₂ gas 64.

Here, when the RIE apparatus 10 performs ashing, the wafer 50 is fixed to the susceptor 17 by the clamper 18, so that the clamper 18 is formed on the resist film 61 around the wafer 50 as shown in FIG. The O ₂ gas 64 does not contact the contacted portion. For this reason, the resist film 61 at the portion where the clamper 18 contacts is left without ashing, and the resist film 61 at the portion where the clamper 18 contacts is replaced with the remaining resist film 61a as shown in FIG. Will form.

In the state where the residual resist film 61a is adhered, when a film forming process is performed on the wafer 50 under a vacuum such as a CVD process or a sputtering process, the residual resist film 6 is formed.
Since the carbon (C) component and the like in 1a evaporate under vacuum, the degree of vacuum in the film forming process deteriorates.
0 is in a state where the desired film forming process is not performed.
Therefore, it is necessary to remove the remaining resist film 61a only at the peripheral portion of the wafer 50.

Therefore, in this embodiment, the wafer 5
The remaining resist film 61a remaining only in the peripheral portion of 0 is removed in a sub-ashing step by the ozone ashing apparatus 30. Next, the sub-ashing step will be described.

The wafers 50 with the remaining resist film 61a adhered to the peripheral portion are transported from the main ashing step and are carried one by one into the processing chamber 31 of the ozone ashing apparatus 30. The wafer 50 carried into the processing chamber 31 is the susceptor 3
7 is heated as shown in FIG. 1 and only its periphery is heated locally by the heater 38. The processing chamber 31 is exhausted by the exhaust port 40, and ozone (O ₃ )
Is blown radially outward from the blowing pipe 33 through the gas supply path 34, the ashing gas 65 contacts only the peripheral portion of the wafer 50. At this time, since the susceptor 37 held by the wafer 50 is being rotated by the rotation shaft 39, the ashing gas 65 uniformly contacts the peripheral portion of the wafer 50. The components and supply amounts of the ashing gas 65 are as follows. Nitrogen (N
₂ ) Gas is 155 sccm (flow rate per minute, unit is cc), O ₂ gas is 10 slm (flow rate per minute, unit is 1), and O ₃ gas is 5 l / min (flow rate per minute) The unit is l).

Since only the peripheral portion of the wafer 50 is heated and the ashing gas 65 contacts only the peripheral portion of the wafer 50, the remaining resist film 61a remaining on the peripheral portion of the wafer 50 is effectively ashing. And removed as shown in FIG. However, only the peripheral portion of the wafer 50 is heated, and the ashing gas 65 contacts only the peripheral portion of the wafer 50.
The surface of the Cu wiring 57 exposed at the bottom of the through hole 63 in the central portion (chip acquisition region) is not activated, and the ashing gas 65 does not contact the surface. Does not oxidize. That is, since the ashing rate of the peripheral portion of the wafer 50 in the ozone ashing apparatus 30 is much higher than that of the central portion of the wafer 50 where the Cu wiring 57 is exposed, the surface of the central portion of the Cu wiring 57 is reduced. The remaining resist film 61a in the peripheral portion can be surely removed by ashing while preventing oxidation.

According to the above embodiment, the following effects can be obtained.

1) Ashing the resist film used for forming the Cu wiring without heating the wafer,
Since the surface of the u wiring can be prevented from being oxidized, the electric resistance of the Cu wiring can be prevented from increasing, and the diffusion of Cu atoms into the oxide film and the decrease in adhesion can be prevented. Can be prevented.

2) The resist film remaining on the peripheral portion of the wafer is removed by an ozone ashing device,
In a subsequent film formation process under vacuum such as a CVD process or a sputtering process, it is possible to prevent a carbon component or the like in the remaining resist film from evaporating under vacuum, and thus the degree of vacuum in the film formation process is deteriorated. Can be prevented, and a desired film forming process can be performed on the wafer.

3) During ozone ashing of the remaining resist film around the wafer, only the periphery of the wafer is heated,
In addition, by supplying the ashing gas only to the peripheral portion of the wafer, the ashing rate at the peripheral portion of the wafer can be made much higher than that at the central portion. While remaining, the remaining resist film at the peripheral portion can be surely removed by ashing.

4) By preventing the surface of the Cu wiring from being oxidized during ashing, the Cu wiring technology can be put to practical use, and the performance of the semiconductor device can be dramatically improved.

FIG. 8 is a front sectional view showing a semiconductor manufacturing apparatus used in a method of manufacturing a semiconductor device according to another embodiment of the present invention.

This embodiment is different from the above embodiment in that
The main ashing step and the sub-ashing step of the Cu wiring forming method are shown in FIG. 8 by reactive ion beam etching (hereinafter referred to as RI).
It is called BE. ) Is implemented by the device 70.

The RIBE apparatus 70 is a dry etching apparatus that separates a plasma generating section and a wafer and extracts only ions from plasma to perform etching. As shown in FIG. 8, a chamber 72 in which a processing chamber 71 is formed is provided. It has. A waveguide 74 for guiding a microwave 73 to the processing chamber 71 is connected to an upper portion of the processing chamber 71.
4 is connected to a magnetron 75. Processing room 71
A quartz plate 76 is erected so as to partition the processing chamber 71 up and down. A supply port 77 for supplying ashing gas to the lower chamber of the processing chamber 71 is provided below the quartz plate 76 of the chamber 72. An ion extraction electrode 78 is provided below the supply port 77 of the processing chamber 71 so as to partition the processing chamber 71 up and down. The ion extraction electrode 78 has an extraction port 79 formed in a mesh shape.

A susceptor 80 having a built-in heater 81 is installed below the processing chamber 71. The susceptor 80 clamps a peripheral portion of the wafer 50 with the wafer 50 as an object to be processed mounted thereon. It is configured to be fixed by 82. The heater 81 includes a central heater 81a for heating a central portion, and a peripheral heater 81 for heating a peripheral portion.
b. An exhaust port 83 connected to a vacuum pump is opened at a lower portion of the chamber 72.

Next, by explaining the operation of the RIBE device 70, a method of forming a Cu wiring in a method of manufacturing a semiconductor device according to another embodiment of the present invention will be described. The configuration of the wafer 50 will be described with reference to FIGS.

The wafers 50 having the through holes 63 formed in the dry etching step are loaded one by one from the loading / unloading gate valve into the processing chamber 71 of the RIBE apparatus 70 for performing the main ashing step. The wafer 50 carried into the processing chamber 71 is placed on the susceptor 80 as shown in FIG.
Fixed by When the processing chamber 71 is evacuated by the exhaust port 83 and the microwave 73 is introduced from the waveguide 74 into the upper chamber of the processing chamber 71, the plasma P is formed below the quartz plate 76, so that the ashing gas The O ₂ gas supplied from the supply port 77 is excited. When a voltage is applied to the ion extraction electrode 78, O ₂ ions are extracted from the extraction port 79 and collide with the wafer 50, so that the resist film 61 on the wafer 50 is sputtered,
Ashing (removal) is performed as shown in FIG.

At the time of the main ashing, since the O ₂ ions come into contact with the surface of the Cu wiring 57 as shown in FIG. 5, the surface of the Cu wiring 57 may be oxidized. Therefore, in the present embodiment, the heating of the wafer 50 by the heater 81 is not performed, thereby preventing the surface of the Cu wiring 57 from being oxidized by O ₂ ions.

Next, after the position of the clamper 82 with respect to the wafer 50 is shifted, a sub-ashing step of removing the remaining resist film 61a remaining in the peripheral portion is performed.
The sub-ashing process is performed in the same manner as the main ashing process described above, but only the peripheral portion of the wafer 50 held by the susceptor 80 is locally heated by the peripheral heater 81b. When only the peripheral portion of the wafer 50 is thus heated, the remaining resist film 61a remaining on the peripheral portion of the wafer 50 is effectively ashed and removed as shown in FIG. However, since only the peripheral portion of the wafer 50 is heated, the Cu wiring 5 exposed at the bottom of the through hole 63 in the central portion (chip acquisition region) of the wafer 50 is heated.
The surface of 7 does not oxidize.

According to the present embodiment, in addition to the foregoing embodiment, an effect is obtained that the main ashing step and the sub-ashing step can be performed by the same RIBE apparatus.

The invention made by the inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the gist of the invention. Needless to say.

For example, in the main ashing step, an ashing gas containing ozone or the like may be used instead of using an O ₂ gas as an ashing gas.

In the sub-ashing step, not only the ashing gas containing ozone is used as the ashing gas, but ultraviolet rays and ozone may be used in combination.

The resist film is not limited to the one used as a mask at the time of dry etching, and may be a resist film used as a mask at the time of ion implantation.

The main ashing step and the sub-ashing step are not limited to being performed by the RIE apparatus, the ozone ashing apparatus and the RIBE apparatus according to the above-described embodiment, but may be applied to a semiconductor manufacturing apparatus such as a dry etching apparatus or a sputtering apparatus of another structure or type. May be performed.

In the above description, the case where the invention made by the present inventor is mainly applied to the Cu wiring forming technique which is the application field as the background has been described. However, the present invention is not limited to this. The present invention can be applied to all semiconductor device manufacturing techniques such as a method of forming wirings and electrodes made of other metals.

[0051]

The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.

By removing the remaining portion of the resist film remaining on the peripheral portion of the object by sub-ashing, even if the object to be processed is subsequently processed under vacuum, the resist film is removed. To prevent the carbon (C) component and the like from evaporating under vacuum.
Appropriate processing can be ensured.

[Brief description of the drawings]

FIG. 1 is a front sectional view showing a semiconductor manufacturing apparatus according to an embodiment of the present invention.

FIG. 2 is a front sectional view showing an RIE device used in a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 3 is an enlarged partial cross-sectional view showing a state before dry etching in a method of manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 4 is an enlarged partial cross-sectional view similarly showing a state after dry etching.

FIG. 5 is an enlarged partial cross-sectional view showing an ashing process by the RIE apparatus.

FIG. 6 is an enlarged partial cross-sectional view showing an ashing process by the ozone ashing apparatus.

FIG. 7 is an enlarged partial cross-sectional view showing a state after the ashing step.

FIG. 8 is a front sectional view showing a semiconductor manufacturing apparatus used in a method of manufacturing a semiconductor device according to another embodiment of the present invention.

[Explanation of symbols]

10 RIE apparatus, 11 processing chamber, 12 chamber, 1
3 ... upper electrode plate, 14 ... gas supply path, 15 ... gas supply source,
16 stop valve, 17 susceptor, 18 clamper, 19
... High frequency power supply, 20 ... Baffle plate, 21 ... Wall plate,
22 ... exhaust port, 23 ... flow control valve, 24 ... vacuum pump,
Reference numeral 25: window, 26: monochromator, 27: sensor head for detecting light emission, 28: capillary plate, 29: magnet, 30: ozone ashing device, 31: processing chamber, 32
... chamber, 33 ... blow-out pipe, 34 ... gas supply path, 35 ...
Gas supply source, 36 ... Stop valve, 37 ... Susceptor, 38 ... Heater, 39 ... Rotating shaft, 40 ... Exhaust port, 50 ... Wafer (workpiece), 51 ... Substrate, 52 ... Gate, 53
... W line, 54 ... PSG film, 55 ... P-SiN film, 56 ...
P-TEOS film, 57: Cu wiring, 58: P-SiN
Film 59 SOG film 60 P-TEOS film 61 resist film 61 a remaining resist film 62 through hole pattern 63 through hole 64 O ₂ gas 6
5: Ashing gas, 70: RIBE device, 71: Processing chamber, 72: Chamber, 73: Microwave, 74: Waveguide, 75: Magnetron, 76: Quartz plate, 77: Supply port, 78: Ion extraction electrode, 79 ... drawer outlet, 80 ...
Susceptor, 81: heater, 81a: central heater, 81
b: peripheral heater, 82: clamper, 83: exhaust port.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F004 AA16 BA04 BA20 BB26 BC08 BD01 CA09 DA25 DA26 DA27 DB26 FA08 5F046 MA12 MA13 MA17

Claims (10)

[Claims] An ashing step of ashing a resist film used to form a metal pattern on an object to be processed; and a sub-ashing step of ashing a remaining portion of the resist film remaining on a peripheral portion of the object to be processed. And a method of manufacturing a semiconductor device. 2. The method according to claim 1, wherein the ashing in the sub-ashing step is performed by increasing an ashing rate of a peripheral portion of the workpiece. 3. In the sub-ashing step, a peripheral portion of the processing target is heated, and an ashing gas is supplied to a peripheral portion of the processing target.
Or a method for manufacturing a semiconductor device according to item 2. 4. The method according to claim 1, wherein an ozone gas is used as an ashing gas in the sub-ashing step. 5. The method for manufacturing a semiconductor device according to claim 1, wherein said metal is copper. 6. The method according to claim 1, wherein said metal pattern is formed by damascene.
6. The method for manufacturing a semiconductor device according to item 5. 7. A semiconductor manufacturing apparatus characterized by increasing an ashing rate at a peripheral portion of an object to be processed and ashing a remaining portion of the resist film remaining at a peripheral portion of the object to be processed. 8. The semiconductor manufacturing apparatus according to claim 7, wherein a peripheral portion of the object is heated and an ashing gas is supplied to a peripheral portion of the object. 9. The apparatus according to claim 7, further comprising a heater for heating a peripheral portion of the object to be processed, and a gas supply port for supplying an ashing gas to the peripheral portion of the object to be processed. Semiconductor manufacturing equipment. 10. The semiconductor manufacturing apparatus according to claim 7, wherein the ashing gas is ozone gas.